Semiconductor device and method of manufacturing semiconductor device

The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

Nitride semiconductors such as GaN, AlN, InN, and materials made of mixed crystals thereof have a wide bandgap and are used as high-power electronic devices, short-wavelength light emitting devices, and the like. Among these, as high-power devices, technologies related to field effect transistors (FETs), in particular, high electron mobility transistors (HEMTs) have been developed. HEMTs using such nitride semiconductors are used in high-power, high-efficiency amplifiers, high-power switching devices, and the like. In particular, in HEMTs in which AlGaN is used as an electron supply layer and GaN is used as a traveling layer, strain due to the difference in lattice constant between AlGaN and GaN occurs in AlGaN, and piezopolarization occurs. Due to the piezo polarization generated in this way, a high-concentration two-dimensional electron gas is generated, so that a high-power device can be obtained.

By the way, HEMTs used for such applications are required to have a normally-off property and a high dielectric strength. In particular, since normally-off is important from the viewpoint of safe operation, various methods for normal-off are being studied. As one of the methods for normalizing off, there is a method of forming a gate recess by removing a part of the semiconductor layer directly under the gate electrode. The gate recess structure formed by this method has an advantage that the threshold voltage can be made positive without increasing the resistance component between the electrodes. In addition, normally-off semiconductor devices used for electric power applications require high drain withstand voltage and gate withstand voltage. Therefore, in horizontal FETs and HEMTs, MIS (Metal Insulator Semiconductor) has an insulating film that serves as a gate insulating film. ) Structure is used. As described above, in a HEMT using a GaN-based semiconductor material, a semiconductor device suitable for electric power applications can be obtained by combining a gate recess structure and a MIS structure.

<p><patcit num="1"><text>Japanese Unexamined Patent Publication No. 2002-359256</text></patcit><patcit num="2"><text>JP-A-2007-19309</text></patcit><patcit num="3"><text>Japanese Unexamined Patent Publication No. 2009-76845</text></patcit></p>

<p> By the way, in a semiconductor device having a gate recess structure and a MIS structure, it is necessary to remove a part of a semiconductor layer formed by epitaxial growth or the like by etching or the like and form an insulating film on the etched part. For this reason, the manufactured semiconductor device is damaged by etching, and desired characteristics and yield cannot be obtained, and the manufacturing process becomes complicated, which increases the cost of the manufactured semiconductor device.</p><p> Therefore, there is a demand for a method for manufacturing a semiconductor device capable of manufacturing a semiconductor device having a gate recess structure and a MIS structure at low cost.</p>

<p> According to one aspect of the present embodiment, the semiconductor layer formed above the substrate, the insulating film formed by oxidizing a part of the semiconductor layer, and the electrode formed on the insulating film. The insulating film contains gallium oxide, or is formed of a material containing gallium oxide and indium oxide.</p><p> Further, according to one aspect of the present embodiment, a step of forming a semiconductor layer above the substrate, a step of forming a mask having an opening in a region where an insulating film is formed on the semiconductor layer, and the above-mentioned step. It has a step of oxidizing a part of the semiconductor layer in the opening to form an insulating film and a step of forming an electrode on the insulating film, and the semiconductor layer is formed of a nitride semiconductor. It is a feature.</p>

<p> According to the disclosed semiconductor device and the method for manufacturing a semiconductor device, the manufacturing process in the semiconductor device having the gate recess structure and the MIS structure can be simplified, and the semiconductor device having desired characteristics can be manufactured at low cost.</p>

<figref num="1">Structural diagram of the semiconductor device according to the first embodiment</figref><figref num="2">Manufacturing process diagram of the semiconductor device according to the first embodiment (1)</figref><figref num="3">Manufacturing process diagram of the semiconductor device according to the first embodiment (2)</figref><figref num="4">Manufacturing process diagram of the semiconductor device according to the first embodiment (2)</figref><figref num="5">Explanatory drawing of supercritical water</figref><figref num="6">Structural drawing of another semiconductor device according to the first embodiment</figref><figref num="7">Explanatory drawing of discretely packaged semiconductor device in 2nd Embodiment</figref><figref num="8">Circuit diagram of the power supply device according to the second embodiment</figref><figref num="9">Structural diagram of the high power amplifier in the second embodiment</figref>

A mode for carrying out the invention will be described below. The same members and the like are designated by the same reference numerals and the description thereof will be omitted.

[First Embodiment] (Structure of semiconductor device) The semiconductor device according to the first embodiment will be described with reference to FIG. The semiconductor device in the present embodiment is a transistor called HEMT, and is an electron traveling layer 21, a spacer layer 22, an electron supply layer 23, and a cap layer 24 on a buffer layer 20 formed on a substrate 10 made of a semiconductor or the like. A semiconductor layer made of is formed. This semiconductor layer is formed by epitaxial growth by MOVPE (Metal-Organic Vapor Phase Epitaxy) or the like. Further, the source electrode 42 and the drain electrode 43 are formed by being connected to the electron supply layer 23, and an insulating film 30 serving as a gate insulating film is formed on the electron traveling layer 21 in the region where the gate electrode 41 is formed. The gate electrode 41 is formed on the insulating film 30. The source electrode 42 and the drain electrode 43 may be connected to the electron traveling layer 21. Further, a protective film made of an insulator may be formed so as to cover the cap layer 24 and the like.

The substrate 10 is a Si substrate, a SiC substrate, and sapphire (Al).₂O₃) A substrate or the like is used. In the present embodiment, since the Si substrate is used as the substrate 10, the buffer layer 20 is formed. However, when the substrate 10 made of another material is used, it is not necessary to form the buffer layer 20. In some cases. The electron traveling layer 21 which is the first semiconductor layer is formed of i-GaN, the spacer layer 22 is formed of i-AlGaN, and the electron supply layer 23 which is the second semiconductor layer is made of n-AlGaN. The cap layer 24 is formed of n-GaN. As a result, the two-dimensional electron gas (2DEG) 21a is formed in the electron traveling layer 21 on the side closer to the electron supply layer 23.

The gate electrode 41, the source electrode 42, and the drain electrode 43 are made of a metal material. The insulating film 30 serving as the gate insulating film is formed by oxidizing the spacer layer 22, the electron supply layer 23, and the cap layer 24. Specifically, Ga is obtained by oxidizing i-AlGaN as the spacer layer 22, n-AlGaN as the electron supply layer 23, and n-GaN as the cap layer 24.₂O₃, Al₂O₃Is formed, and Ga formed in this way₂O₃, Al₂O₃A more insulating film 30 is formed. In the above description, the case where the spacer layer 22, the electron supply layer 23 and the cap layer 24 are oxidized has been described, but the electron supply layer 23 and the cap layer 24 may be oxidized, and the cap layer 24 may be oxidized. May be oxidized.

In the above, the semiconductor device in which the semiconductor layer is formed of GaN and AlGaN has been described, but the present embodiment is similarly applied to a semiconductor device using a nitride semiconductor such as InAlN or InGaAlN as the semiconductor layer. Can be done. In this case, the insulating film 30 serving as the gate insulating film is Ga formed by oxidizing InAlN and InGaAlN.₂O₃, In₂O₃, Al₂O₃Etc. are formed.

(Manufacturing method of semiconductor device) Next, a method of manufacturing the semiconductor device according to the present embodiment will be described with reference to FIGS. 2 to 4.

First, as shown in FIG. 2A, a buffer layer 20 is formed on the substrate 10, and semiconductors such as an electron traveling layer 21, a spacer layer 22, an electron supply layer 23, and a cap layer 24 are formed on the buffer layer 20. The layer is formed by epitaxially growing the layer with MOVPE or the like. After that, a silicon nitride (SiN) film 61 for forming a mask is formed on the cap layer 24. The substrate 10 is Si, SiC, sapphire (Al).₂O₃) Etc. can be used, and a buffer layer 20 is formed on the substrate 10 in order to epitaxially grow the electron traveling layer 21 and the like. The buffer layer 20 is formed of, for example, a 0.1 μm thick non-doped i-AlN. The electron traveling layer 21, which is the first semiconductor layer, is formed of non-doped i-GaN having a thickness of 3 μm. The spacer layer 22 is formed of non-doped i-AlGaN having a thickness of 5 nm. The electron supply layer 23, which is the second semiconductor layer, is an n-Al having a thickness of 30 nm._0.25Ga_0.75Formed by N, Si is 5 × 10 as an impurity element¹⁸cm^-3Is doped at the concentration of. The cap layer 24 is formed of n-GaN having a thickness of 10 nm, and Si is 5 × 10 as an impurity element.¹⁸cm^-3Is doped at the concentration of. The silicon nitride (SiN) film 61 is formed by forming a film on the cap layer 24 with a film thickness of 200 nm by plasma CVD (Chemical Vapor Deposition).

Next, as shown in FIG. 2B, a resist pattern 62 is formed on the silicon nitride film 61. Specifically, a photoresist is applied onto the silicon nitride film 61, and the resist pattern 62 is formed by exposing and developing with an exposure apparatus. The resist pattern 62 has an opening in a region where an insulating film to be a gate insulating film, which will be described later, is formed.

Next, as shown in FIG. 2C, the silicon nitride film 61 in the region where the resist pattern 62 is not formed is removed by dry etching such as RIE (Reactive Ion Etching), and further, the resist pattern 62 is further removed. Also remove. As a result, the mask 64 made of the silicon nitride film 61 having the opening 63 is formed. In the present embodiment, the silicon nitride film 61 is used as the material for forming the mask 64, but other materials may be used as long as they are not easily oxidized.

Next, as shown in FIG. 3A, the insulating film 30 that serves as the gate insulating film by oxidizing the spacer layer 22, the electron supply layer 23, and the cap layer 24 that are exposed in the opening 63 of the mask 64. To form. The insulating film 30 is formed by oxidizing the spacer layer 22, the electron supply layer 23, and the cap layer 24 with supercritical water. Specifically, a silicon nitride film 61 having an opening 63 formed therein is installed at a predetermined position in a chamber containing pure water, and the inside of the chamber is brought into a high temperature and high pressure state to bring the chamber into a high temperature and high pressure state. This is done by turning the pure water inside into supercritical water. Supercritical water has extremely strong oxidizing power, and even a material that normally oxidizes only at a high temperature can be oxidized at a low temperature. For example, when trying to oxidize GaN, AlGaN, etc. by thermal oxidation, a temperature of 1000 ° C. or higher is usually required, and when heated to such a high temperature, the crystal structure of the epitaxially grown semiconductor layer collapses. Therefore, it is not possible to obtain a semiconductor device having desired characteristics. However, in oxidation with supercritical water, supercritical water at a temperature of 700 ° C or lower, for example, about 380 ° C, comes into contact with the semiconductor layer to oxidize the semiconductor layer in a predetermined region in contact with the supercritical water. be able to. Therefore, the nitride semiconductor can be oxidized without causing disorder in the crystal structure of the semiconductor layer. Therefore, it is possible to form an insulating film 30 that serves as a gate insulating film by oxidizing a part of the semiconductor layer made of a nitride semiconductor without deteriorating the characteristics of the semiconductor device.

Here, supercritical water will be described based on FIG. Supercritical water is water in a state where the temperature is 374 ° C or higher and the pressure is 218 atm or higher, and gas and liquid cannot be distinguished from each other. Water in such a state, that is, supercritical water has properties significantly different from those of ordinary water, and one of such properties is that a chemical reaction is promoted. In the present embodiment, by using supercritical water, GaN and AlGaN, which normally oxidize only at extremely high temperatures, can be oxidized at relatively low temperatures. That is, by oxidizing the spacer layer 22 made of i-AlGaN, the electron supply layer 23 made of n-AlGaN, and the cap layer 24 made of n-GaN, Ga₂O₃And Al₂O₃The insulating film 30 made of the same can be formed. In the present embodiment, by using supercritical water, the spacer layer 22, the electron supply layer 23, and the cap layer 24 are oxidized to form the insulating film 30 at a temperature of 700 ° C. or lower, and further, 550 ° C. or lower. be able to. In this embodiment, the case of oxidation using supercritical water is described, but subcritical water having a temperature and pressure slightly lower than the critical point also has strong oxidizing power and is subcritical. The oxidizing power of water in a state close to water is also relatively strong. Therefore, it is considered that GaN and AlGaN can be oxidized at a low temperature similar to supercritical water if the water is in a liquid state at a temperature higher than 100 ° C (a temperature exceeding 100 ° C). That is, in the present embodiment, the semiconductor layer made of a nitride semiconductor can be oxidized even at a temperature equal to or lower than the temperature required for ohmic contact between the source electrode 42 and the drain electrode 43, which will be described later.

By oxidizing the spacer layer 22, the electron supply layer 23, and the cap layer 24 in this way, a recess is formed in the oxidized region, and an insulating film is formed in the recess. Therefore, the step of forming the recess and the step of forming the insulating film can be performed at the same time, and the manufacturing process can be simplified.

Although the case of oxidizing GaN and AlGaN has been described above, an oxide film can be formed in the same manner as long as it is a semiconductor device having a nitride semiconductor, and an insulating film can be formed by this oxide film. it can. Specifically, even in a semiconductor device using a nitride semiconductor such as InAlN or InGaAlN as the semiconductor layer, In by oxidation using supercritical water or the like.₂O₃, Ga₂O₃And Al₂O₃An insulating film made of the above can be formed.

Next, as shown in FIG. 3 (b), the silicon nitride film 61 is removed. Specifically, the silicon nitride film 61 is removed by wet etching using thermal phosphoric acid.

Next, as shown in FIG. 3 (c), the resist pattern 65 is formed. Specifically, a photoresist is applied to the surface of the cap layer 24, and the resist pattern 65 is formed by exposing and developing with an exposure apparatus. The resist pattern 65 has an opening in a region where the source electrode 42 and the drain electrode 43 are formed. Before forming the resist pattern 65, an element separation region (not shown) may be formed. In this case, a resist pattern (not shown) having an opening is formed in the device separation region, and the device separation region is formed by dry etching or ion implantation using a chlorine-based gas at the opening. After that, the resist pattern (not shown) used to form the element separation region is removed.

Next, as shown in FIG. 4A, the cap layer 24 at the opening of the resist pattern 65 is removed by performing dry etching of RIE or the like using a chlorine-based gas. After that, the resist pattern 65 is also removed with an organic solvent or the like. As a result, the cap layer 24 is removed in the region where the source electrode 42 and the drain electrode 43 are formed.

Next, as shown in FIG. 4 (b), the source electrode 42 and the drain electrode 43 are formed. Specifically, a resist pattern (not shown) having an opening is formed in the region where the source electrode 42 and the drain electrode 43 are formed. This resist pattern is formed by applying a photoresist to the surface on which the cap layer 24 is formed, and exposing and developing with the exposure layer. After that, a metal film (Ta: film thickness of about 20 nm / Al: film thickness of about 200 nm) was formed on the entire surface by vacuum deposition or the like, and then lift-off was performed using an organic solvent to form a film on the resist pattern. Remove the metal film. As a result, the source electrode 42 and the drain electrode 43 made of Ta / Al are formed on the electron supply layer 23 by the metal film in the region where the resist pattern is not formed. The film made of Ta in the metal film is formed in contact with the cap layer 24, and is subjected to heat treatment at a temperature of 400 ° C to 700 ° C, for example, 550 ° C in a nitrogen atmosphere to obtain a source. An ohmic contact is established at the electrode 42 and the drain electrode 43. Further, if ohmic contact is established without performing this heat treatment, it is not necessary to perform the heat treatment.

Next, as shown in FIG. 4 (c), the gate electrode 41 is formed. Specifically, a resist pattern (not shown) having an opening is formed in the region where the gate electrode 41 is formed. This resist pattern is formed by applying a photoresist to the surface on which the cap layer 24 is formed, and exposing and developing with an exposure apparatus. After that, a metal film (Ni: film thickness of about 40 nm / Au: film thickness of about 400 nm) is formed on the entire surface by vacuum deposition, and then lift-off is performed using an organic solvent to form a metal film on the resist pattern. Remove the membrane. As a result, the gate electrode 41 made of Ni / Au can be formed on the upper portion of the insulating film 30 by the metal film in the region where the resist pattern is not formed. After that, heat treatment or the like may be performed if necessary.

From the above, the semiconductor device according to the present embodiment can be manufactured.

Further, in the semiconductor device of the present embodiment, as shown in FIG. 6, the protective film 50 may be further formed in the region where the cap layer 24 is exposed. Specifically, the protective film 50 is formed of an insulator, and can be formed by, for example, forming an aluminum oxide film, a silicon nitride film, or the like with plasma ALD (Atomic Layer Deposition) or the like.

[Second Embodiment] Next, the second embodiment will be described. The present embodiment is a semiconductor device, a power supply device, and a high frequency amplifier.

The semiconductor device according to the present embodiment is a discrete package of the semiconductor device according to the first embodiment, and the semiconductor device discretely packaged in this way will be described with reference to FIG. 7. Note that FIG. 7 schematically shows the inside of the discretely packaged semiconductor device, and the arrangement of the electrodes and the like are different from those shown in the first embodiment.

First, the semiconductor device manufactured in the first embodiment is cut by dicing or the like to form a HEMT semiconductor chip 410 made of a GaN-based semiconductor material. The semiconductor chip 410 is fixed on the lead frame 420 with a die-attaching agent 430 such as solder.

Next, the gate electrode 441 is connected to the gate lead 421 by the bonding wire 431, the source electrode 442 is connected to the source lead 422 by the bonding wire 432, and the drain electrode 443 is connected to the drain lead 423 by the bonding wire 433. The bonding wires 431, 432, and 433 are formed of a metal material such as Al. The gate electrode 441 in the present embodiment is a gate electrode pad, and is connected to the gate electrode 41 in the first embodiment. The source electrode 442 is a source electrode pad and is connected to the source electrode 42 in the first embodiment. The drain electrode 443 is a drain electrode pad and is connected to the drain electrode 43 in the first embodiment.

Next, the resin is sealed with the mold resin 440 by the transfer molding method. In this way, a discretely packaged semiconductor device of HEMT using a GaN-based semiconductor material can be manufactured.

Further, the power supply device and the high frequency amplifier in the present embodiment are the power supply device and the high frequency amplifier using the semiconductor device in the first embodiment.

The power supply device according to the present embodiment will be described with reference to FIG. The power supply device 460 in the present embodiment includes a high-voltage primary side circuit 461, a low-voltage secondary side circuit 462, and a transformer 463 arranged between the primary side circuit 461 and the secondary side circuit 462. The primary side circuit 461 includes an AC power supply 464, a so-called bridge rectifier circuit 465, a plurality of switching elements (four in the example shown in FIG. 8) 466, and one switching element 467. The secondary side circuit 462 includes a plurality of switching elements (three in the example shown in FIG. 8) 468. In the example shown in FIG. 8, the semiconductor device according to the first embodiment is used as the switching elements 466 and 467 of the primary side circuit 461. The switching elements 466 and 467 of the primary circuit 461 are preferably normally-off semiconductor devices. Further, the switching element 468 used in the secondary side circuit 462 uses a normal MISFET (metal insulator semiconductor field effect transistor) formed of silicon.

Further, the high frequency amplifier according to the present embodiment will be described with reference to FIG. The high frequency amplifier 470 in this embodiment may be applied to, for example, a power amplifier for a base station of a mobile phone. The high frequency amplifier 470 includes a digital predistortion circuit 471, a mixer 472, a power amplifier 473 and a directional coupler 474. The digital predistortion circuit 471 compensates for the non-linear distortion of the input signal. The mixer 472 mixes the input signal and the AC signal with the non-linear distortion compensated. The power amplifier 473 amplifies the input signal mixed with the AC signal. In the example shown in FIG. 9, the power amplifier 473 has the semiconductor device according to the first embodiment. The directional coupler 474 monitors input signals and output signals. In the circuit shown in FIG. 9, for example, the output signal can be mixed with the AC signal by the mixer 472 and sent to the digital predistortion circuit 471 by switching the switch. In the present embodiment, the power supply device and the amplifier can be obtained at low cost by using the semiconductor device according to the first embodiment.

Although the embodiments have been described in detail above, the embodiments are not limited to the specific embodiments, and various modifications and changes can be made within the scope of the claims.

Regarding the above explanation, the following additional notes will be further disclosed. (Appendix 1) The semiconductor layer formed above the substrate and An insulating film formed by oxidizing a part of the semiconductor layer and The electrodes formed on the insulating film and Have, A semiconductor device characterized in that the insulating film contains gallium oxide or is formed of gallium oxide and indium oxide. (Appendix 2) The semiconductor device according to Appendix 1, wherein the insulating film further contains aluminum oxide. (Appendix 3) The semiconductor device according to Appendix 1 or 2, wherein the semiconductor layer is formed of a nitride semiconductor. (Appendix 4) The semiconductor device according to any one of Supplementary note 1 to 3, wherein the semiconductor layer is formed of one or two or more selected from Ga, Al, and In containing a nitride. (Appendix 5) From Appendix 1, the insulating film is obtained by oxidizing a part of the semiconductor layer by contacting it with supercritical water or water having a temperature higher than 100 ° C and lower than 700 ° C. The semiconductor device according to any one of 4. (Appendix 6) The electrode is a gate electrode and The semiconductor layer includes a first semiconductor layer and a second semiconductor layer formed above the first semiconductor layer. The semiconductor device according to any one of Supplementary note 1 to 5, further comprising a source electrode and a drain electrode formed in contact with the first semiconductor layer or the second semiconductor layer. (Appendix 7) The semiconductor device according to Appendix 6, wherein the first semiconductor layer contains GaN. (Appendix 8) The semiconductor device according to Appendix 6 or 7, wherein the second semiconductor layer contains AlGaN. (Appendix 9) The semiconductor device according to any one of Supplementary note 1 to 8, wherein the insulating film is in contact with the first semiconductor layer. (Appendix 10) The semiconductor device according to any one of Supplementary note 1 to 9, wherein a protective film made of an insulator is formed above the semiconductor layer. (Appendix 11) A power supply device comprising the semiconductor device according to any one of Appendix 1 to 10. (Appendix 12) An amplifier comprising the semiconductor device according to any one of Appendix 1 to 10. (Appendix 13) The process of forming a semiconductor layer on the substrate and A step of forming a mask having an opening in a region where an insulating film is formed on the semiconductor layer, and A step of oxidizing a part of the semiconductor layer in the opening to form an insulating film, The step of forming an electrode on the insulating film and Have, A method for manufacturing a semiconductor device, wherein the semiconductor layer is formed of a nitride semiconductor. (Appendix 14) The method for manufacturing a semiconductor device according to Appendix 13, wherein the semiconductor layer is formed of one or more selected from Ga, Al, and In containing a nitride. (Appendix 15) The step of forming the insulating film is characterized in that the semiconductor layer exposed at the opening of the mask is brought into contact with supercritical water or water having a temperature higher than 100 ° C. The method for manufacturing a semiconductor device according to Appendix 13 or 14. (Appendix 16) The method for manufacturing a conductor device according to any one of Supplementary note 13 to 15, wherein the step of forming the insulating film is performed at a temperature of 700 ° C. or lower. (Appendix 17) The steps of forming the mask include a step of forming a silicon nitride film on the semiconductor layer and a step of forming the silicon nitride film. The step of forming an opening in the silicon nitride film and The method for manufacturing a conductor device according to any one of Supplementary note 13 to 16, wherein the conductor device is provided. (Appendix 18) The electrode is a gate electrode and The step of forming the semiconductor layer includes a step of forming a first semiconductor layer and a step of forming a second semiconductor layer above the first semiconductor layer. Any of Appendix 13 to 17, characterized in that after the step of forming the semiconductor layer, there is a step of forming a source electrode and a drain electrode in contact with the first semiconductor layer or the second semiconductor layer. The method for manufacturing a semiconductor device according to the description. (Appendix 19) The method for manufacturing a semiconductor device according to Appendix 18, wherein the step of forming the source electrode and the drain electrode is performed after the step of forming the insulating film. (Appendix 20) The source electrode and the drain electrode are heat-treated for ohmic contact. The method for manufacturing a semiconductor device according to claim 18 or 19, wherein the temperature at which the insulating film is formed is lower than the temperature of the heat treatment for the ohmic contact.

10 board 20 buffer layer 21 Electronic traveling layer (first semiconductor layer) 21a 2DEG 22 Spacer layer 23 Electronic supply layer (second semiconductor layer) 24 cap layer 30 Insulation film 41 Gate electrode 42 Source electrode 43 Drain electrode 50 Protective film 61 Silicon nitride film 62 opening 63 Resist pattern 64 mask 65 resist pattern