Bit allocation among carriers in multicarrier communications

(Cross-reference of related applications) This application claims the priority of co-pending U.S. Provisional Patent Application No. 60 / 109,876, filed November 25, 1998, entitled "Method For Allocating Bits Among Carriers In A Multicarrier Communications System." .. The entire disclosure of the provisional application is incorporated herein by reference.

(Background of invention) (Field of invention) The present invention relates to a communication system, and more particularly to the transmission of information using a multicarrier transmission technique in which symbol orientation error correction is used.

(A brief description of the relevant prior art) The Public Switched Telephone Network (PSTN) provides the most widely available form of electronic communication for many individuals and businesses. Due to its availability and the considerable cost of providing another piece of equipment, there is a great need to adapt to the growing demand for high speed transmission of significant amounts of data. Since it was originally built to provide narrow bandwidth requirements for voice communications as a result, PSTNs are increasingly relying on digital systems to meet their service requirements.

The main limiting factor for the ability to implement high-speed digital transmission is the telephone subscriber loop between the premises of the telephone office (CO) and the telephone subscriber (subscriber). This loop often contains a pair of stranded wires suitable for carrying low frequency voice communications. Bandwidths from 0 to 4 kHZ are well suited for this voice communication, but they are not immediately adaptable to wideband communications (ie bandwidths on the order of hundreds of kilohertz or more) without the adoption of new communication technologies.

One approach to this problem is the development of discrete multitone digital telephone subscriber line (DMT DSL) technology. In an approach to communication across a local telephone subscriber loop between the central office and the telephone subscriber premises, the transmitted data is modulated into multiple discrete frequency carriers. The multiple discrete frequency carriers are summed up and then transmitted via a subscriber loop. The carriers efficiently and individually form subchannels that are separated from each other by a relatively small difference in frequency. However, these sets are aggregated to form an efficient broadband communication channel. At the receiving end, the carrier is demodulated and the data is restored.

Communication using such techniques is via "frames" of data and control information. In the form of asymmetric digital subscriber line (ADSL) communication currently used, 68 data form frames and one synchronization frame form a "superframe" that is repeated throughout transmission. The data frame carries the data to be transmitted. That is, it provides a known bit sequence. Known bit sequences are used for synchronization or "sync" frames to synchronize transmission and reception modems, as well as determination of transmission subchannel characteristics such as signal-to-noise ratio ("SNR"). It also makes it easier.

The duration of the super frame is 17 milliseconds. The duration of the frame is efficiently 250 microseconds (or, reciprocally, the frame rate is approximately 4 kHz) and consists of a set of bytes.

The bits contained in each frame and superframe are transmitted via subchannels. The number of bits carried to each subchannel during each data symbol or data block transmission period (ie, "bit loading") is the characteristic of the subchannel (typically) based on which the reference signal is transmitted to the subchannel. It is determined by measuring the signal-to-noise ratio). Bitloading can vary from one subchannel to another, depending on the signal-to-noise ratio of a particular channel. The loading information is generally calculated at the receiving end of the telephone subscriber line (for example, in the case of transmission from the central office to the telephone subscriber, at the telephone subscriber's premises) and communicated to the other end. The loading information is stored at both ends in the form of at least one "bit loading table" that defines the communication of the channel.

The maximum amount of information that can be encoded for a particular subcarrier is a function of the signal-to-noise ratio of the communication channel for that subcarrier. The signal-to-noise ratio of a communication channel can vary with frequency so that the maximum amount of information that can be encoded in one carrier can differ from the maximum amount of information that can be encoded in another carrier.

The bitloading algorithm provides at least one bit allocation table (in bits) indicating the amount of information to be encoded for each carrier. That is, in the J-carrier multi-carrier communication system, the bit allocation table B [j] shows the amount of information to be encoded for each J carrier for each of j = 1 to J.

It is known to shape the transmission to match the channel characteristics. For example, a technique known as "water polling" was developed by Gallager in 1968 ("Information Theory and Reliable Communication", p. 389) and in 1965 by Wozencraft ("Principles of Communication"). It was introduced in "Engineering" pp.285 ~ 357). Water polling relates to the energy distribution of a transmitted signal by a channel frequency response curve (a plot of the signal-to-noise ratio as a function of frequency). Invert the frequency response curve and "pouring" the available signal energy ("water") into the inversion curve, and more energy will be applied to the part of the channel where the signal-to-noise ratio is maximum. Will be distributed. In a multicarrier system where the transmission bandwidth is distributed across many subchannels, throughput is maximized by placing many bits on each subchannel to hold a given "water polling" energy and the desired error rate. Can be done.

Other techniques for allocating bits between carriers of a multicarrier signal are known. For example, U.S. Pat. No. 4,731,816 granted to Hughes-Hartogs discloses a bit-loading scheme in which one bit is added to each subcarrier at a time until the maximum rate is reached. The subcarrier that requires the minimum added power to hold the added bits is initially selected.

Another example is disclosed in US Pat. No. 5,479,477 granted to Chow et al. In more detail, Chow et al. Disclose a bit-loading scheme that allows either maximizing throughput or maximizing the margin of a particular target data rate. Unlike Hughes-Hartogs et al., Chow et al. Determine a bit-loading table for one carrier at a time (rather than one bit at a time). According to Chow et al., All carriers are classified to decrease in order depending on the signal-to-noise ratio being measured. The first subchannel selected is capable of carrying most bits. Using the scheme of Chow et al. To maximize the data rate, we provide a bitloading table similar to the bitloading table provided by the Hughes-Hartogs algorithm.

Another prior art is disclosed in US Pat. No. 5,596,604 granted to Cioffi et al. In the relevant part, Cioffi et al. Disclose that forward error correction coding (FECC) and interleaving techniques can be implemented to address the problem of noise-related errors in communication systems. These techniques allow the transmitted input data blocks to be augmented with parity data, forming codewords, and detecting and correcting errors in the blocks. Codewords can be interleaved in transmission so as to reduce the effects of error bursts on each codeword.

Cioffi et al. Teach that there can be a trade-off between efficient error correction and noise immunity and high reliability that requires short transmission delays. That is, Cioffi et al. Can create a system to show greater immunity to impulse noise by increasing the duration affecting interleaving, which can come at the cost of greater transmission delays. To improve this trade-off situation, Cioffi et al. Apply FECC coding and codeword interleaving separately to input signals from different channels to generate coded data signals with different reliability and different coding delays. Suggest to do. Bits of the coded data signal with relatively low delay are assigned to carriers that are susceptible to relatively large attenuation and / or channel noise. This means that each signal can be transmitted as each individually selected compromise between high reliability and short transmission delay is selected.

It is known to utilize such symbol-based FECC coding techniques (eg, Reed Solmoon coding) in multi-carrier communications. This allows the receiver to detect and correct the error with the received FECC symbol. However, depending on the type of error correction coding method used and the method by which bitloading is performed, certain problems can arise in multicarrier communication. For example, depending on the prior art, bit loading is performed and the bits are from the serial input bitstream in ascending or increasing constellation. In size), a channel or subchannel (hereafter collectively or singly "channel"", regardless of whether one or more FECC symbols contain bits assigned to a given channel for a given transmission period. Loaded in). As is readily apparent, given these types of bit-loading schemes, bits from multiple FECC symbols are typically assigned to a single channel during a given transmission period. As mentioned above, the FECC code maps a serial input bitstream to a codeword that is a set of FECC symbols. The FECC symbol consists of a finite number of bits (eg, 1 bit). Codewords also include the FECC parity symbol. The FECC parity symbol is an overhead symbol added to the bitstream to provide the receiver with error correction capability. FECC codewords are constructed so that the receiver can correct a given number of FECC symbols that are received incorrectly. The number of symbols that can be corrected by a given FECC code is known as the "correction capability" of the code.

<p> When symbol orientation coding and bit loading are used, single channel errors can introduce errors into multiple FECC symbols. Unfortunately, this weakens the power of the FECC code. This is because the code can only correct a fixed maximum number of FECC symbols received by mistake, and a single channel error that wastefully produces multiple symbol errors will use up the correction capability of the FECC code. is there. It is desirable to reduce the number of FECC symbols received in errors resulting from single channel errors, thereby increasing the efficiency of error correction using symbol orientation error correction methods in multicarrier communications.</p>

<p> (Gist of the invention) Therefore, the present invention can be used in multi-carrier communication to improve error correction efficiency using the symbol orientation error correction method by reducing the number of symbolic errors (eg, FECC symbolic errors) resulting from each channel error. Providing technology. More specifically, in the art of the present invention, the bits from a symbol are between channels so as to minimize the number of each channel assigned to one or more bits belonging to each symbol during each transmission period. Assigned. As will be appreciated by those skilled in the art, if the error correction coding method used in communication is symbolic orientation, a single channel error increases the likelihood of a correctable error if the number of symbols received as an error is reduced. Therefore, in the present invention, the number of channels assigned to each bit from one or more symbols for each transmission period is minimized, and therefore, compared with the prior art, one or more due to an error of a given channel during that transmission period. The possibility of errors in the symbol of is reduced. Thus, according to the present invention, there is a greater possibility that the channel error can be corrected as compared with the prior art. As an advantage, it can be shown that the multi-carrier communication according to the present invention improves error correction and data communication efficiency as compared with the prior art.</p><p> In one embodiment of the invention used to be advantageous in a multicarrier data modulation method, a plurality of carrier signals are provided and used when modulating the data bit signal of a serial input data stream. The data bit signal is mapped to the FECC symbol. Each symbol contains a finite number of bit signals. Each FECC symbol can be 1 byte in size. Each carrier signal is associated with each transmission channel. Bit signals are assigned between carrier signals for modulation with carrier signals. Bit signal allocation between carrier signals is performed to minimize the number of carrier signals assigned to bit signals belonging to one or more symbols during each transmission period (eg, bit loading period). The bit signal is then modulated using the carrier signal.</p><p> In this embodiment, each bit signal assigned to each carrier signal can be included in each single symbol. The allocation of bit signals between carrier signals is via each channel based on the determination of each maximum value of the bit signal that can be transmitted through each channel without exceeding the desired maximum probability of bit transmission error. Includes both determination of the actual number of each bit signal transmitted. The result is to minimize the number of each channel assigned to a bit signal belonging to one or more symbols, or to have each bit belonging to each single symbol for each transmission period. It only transmits.</p><p> Alternatively, in connection with the aforementioned, the allocation of bit signals between carrier signals determines each maximum number of bit signals that can be transmitted over each channel without exceeding the desired maximum probability of bit transmission error. Can include that. Each maximum number of bit signals can be assigned to carrier signals according to the carrier signal allocation sequence order. The sequence order is such that the number of each carrier signal that can be assigned to a bit signal belonging to one or more symbols is minimized, or each channel belongs to each single symbol in each transmission period. It can exist so that it only transmits.</p><p> Furthermore, or in connection with the aforementioned, the allocation of bit signals between carrier signals adjusts the transmission gain of at least one channel, thereby at least one without exceeding the desired maximum possibility of bit transmission error. Changing the maximum number of bit signals that can be transmitted over a channel to different numbers of bit signals, and assigning the actual number of bit signals to carrier signals associated with at least one channel depending on the different number. Including.</p><p> The above and other features and advantages of the present invention will become apparent with reference to the drawings, proceeding to the detailed description below.</p><p> Although the following detailed description proceeds with reference to specific embodiments and methods of use, it should be understood that the present invention is not intended to be limited to these embodiments and methods of use. Rather, as will be appreciated by those skilled in the art, many of these alternatives, modifications, and modifications are possible without departing from the present invention. Therefore, it is intended that the invention is broadly regarded as including the spirit of the appended claims and all alternatives, modifications, and modifications that are within the broad scope.<u style="single">(Item 1) A method of modulating multiple carrier data.</u><u style="single"> A step of providing a plurality of carrier signals for use in modulating a data bit signal of a serial input data stream (100), the data bits before the data bit signal is modulated on the carrier signal. A predetermined number of signals are mapped to one each of multiple error correction symbols (102, 104 ...), and the number of data bit signals that can be modulated on at least one carrier signal is assigned to each error correction symbol. With less than the predetermined number of mapped data bit signals, each of the carrier signals is associated with its respective transmission channel.</u><u style="single"> Based on the mapping of the data bit signal to the error correction symbol, the data bit signal is assigned between the carrier signals and modulated using the carrier signal, which is a step of modulating the data bit signal between the carrier signals. The allocation is made to minimize the number of carrier signals that modulate the data bit signals belonging to different error correction symbols during the transmission period.</u><u style="single"> Including, methods.</u><u style="single">(Item 2) The method according to item 1, wherein each error correction symbol is a forward error correction coding symbol.</u><u style="single">(Item 3) The method according to item 1, wherein each error correction symbol has a size of 1 byte.</u><u style="single">(Item 4) The method according to item 1, wherein for each carrier signal, all of the data bit signals assigned to the carrier signal are mapped to one error correction symbol during the transmission period.</u><u style="single">(Item 5) The step of allocating data bit signals between the carrier signals and the step of determining the maximum number of data bit signals that can be transmitted via the channel without exceeding the desired maximum probability of bit transmission error. , A step of allocating the data bit signal to the carrier signal according to the carrier signal allocation sequence order, in which the order is such that the number of carrier signals that modulate the data bit signals belonging to different error corrections is minimized. The method of item 1, comprising:</u><u style="single">(Item 6) Data in which the step of allocating data bit signals between the carrier signals differs from the maximum number of data bit signals that can be transmitted via at least one channel without exceeding the desired maximum probability of bit transmission error. The step of adjusting the transmission gain of the at least one channel to change to the number of bit signals and the actual number of data bit signals associated with the at least one channel according to the number of different data bit signals. The method of item 1, comprising the step of assigning to a carrier signal.</u><u style="single">(Item 7) The step of allocating data bit signals between the carrier signals also differs in the maximum number of bit signals that can be transmitted over at least one channel without exceeding the desired maximum probability of bit transmission error. The step of adjusting the transmit gain of the at least one channel to change to the number of data bit signals and the carrier associated with the at least one channel according to the number of different data bit signals to the actual number of bit signals. 5. The method of item 5, comprising the step of assigning to a signal.</u><u style="single">(Item 8) A computer-readable memory (52) having a computer-executable program instruction, and when the instruction is executed,</u><u style="single"> A step of providing a plurality of carrier signals for use in modulating a data bit signal of a serial input data stream (100), the data bits before the data bit signal is modulated on the carrier signal. A predetermined number of signals are mapped to one each of multiple error correction symbols (102, 104 ...), and the number of data bit signals that can be modulated on at least one carrier signal is assigned to each error correction symbol. Less than the predetermined number of mapped data bit signals, each of the carrier signals is associated with its respective transmission channel, a process is performed.</u><u style="single"> Based on the mapping of the data bit signal to the error correction symbol, the data bit signal is assigned between the carrier signals and modulated using the carrier signal, which is a step of modulating the data bit signal between the carrier signals. The allocation is performed so as to minimize the number of carrier signals that modulate the data bit signals belonging to different error correction symbols during the transmission period.</u><u style="single"> memory.</u><u style="single">(Item 9) The memory according to item 8, wherein each error correction symbol is a forward error correction coding symbol.</u><u style="single">(Item 10) The memory according to item 8, wherein each error correction symbol has a size of 1 byte.</u><u style="single">(Item 11) The memory according to item 8, wherein for each carrier signal, all of the data bit signals assigned to the carrier signal are mapped to one error correction symbol during the transmission period.</u><u style="single">(Item 12) The step of allocating the data bit signal between the carrier signals determines the maximum number of bit signals that can be transmitted via the channel without exceeding the desired maximum probability of bit transmission error, and the step of determining the maximum number of bit signals. The step of allocating the maximum number of data bit signals to the carrier signals according to the carrier signal allocation sequence order, the order being assigned data bit signals belonging to more than one error correction symbol during the transmission period. 8. The memory of item 8, comprising steps, the order in which the number of carrier signals is minimal.</u><u style="single">(Item 13) The step of allocating the data bit signals among the carrier signals differs in the maximum number of data bit signals that can be transmitted over at least one channel without exceeding the desired maximum probability of bit transmission error. The step of adjusting the transmission gain of the at least one channel to change to the number of data bit signals and the actual number of the data bit signals are associated with the at least one channel according to the different number of data bit signals described above. The memory according to item 8 or item 12, which includes a step of allocating the carrier signal.</u><u style="single">(Item 14) A system (1) that modulates multiple carrier data.</u><u style="single"> A signal generator (34) that generates a plurality of carrier signals for use in modulating the data bit signal of a serial input data stream (100), wherein the data bit signal is modulated on the carrier signal. Previously, a predetermined number of the data bit signals were mapped to one each of a plurality of error correction symbols (102, 104 ...), and the number of the data bit signals that could be modulated on at least one carrier signal was: With a signal generator (34), each of the carrier signals is associated with a respective transmission channel, less than the predetermined number of data bit signals mapped to each error correction symbol.</u><u style="single"> An allocation mechanism that allocates a data bit signal between the carrier signals based on the mapping of the data bit signal to the error correction symbol and modulates the data bit signal using the carrier signal, which is the carrier signal of the data bit signal. The allocation mechanism between is carried out to minimize the number of the carrier signals that modulate the data bit signals belonging to different error correction symbols during the transmission period.</u><u style="single"> Multiple carrier data modulation system (1).</u><u style="single">(Item 15) The system according to item 14, wherein each error correction symbol is a forward error correction coding symbol.</u><u style="single">(Item 16) The system according to item 15, wherein each error correction symbol has a size of 1 byte.</u><u style="single">(Item 17) The system according to item 14, wherein for each carrier signal, all of the data bit signals assigned to the carrier signal are mapped to one error correction symbol during the transmission period.</u><u style="single">(Item 18) The mechanism determines the maximum number of data bit signals that can be transmitted over the channel without exceeding the desired maximum probability of bit transmission error, and sets the maximum number of data bit signals as carriers. Signal Allocation Assigned to the carrier signal according to the sequence order, the order is the order in which the number of carrier signals assigned to the data bit signals belonging to different error correction symbols is minimized during the transmission period. The system described in.</u><u style="single">(Item 19) The system also changes the maximum number of data bit signals that can be transmitted over at least one channel to a different number of data bit signals without exceeding the desired maximum probability of bit transmission error. Adjusting the transmission gain of the at least one channel, the mechanism allocates an actual number of data bit signals to the carrier signal associated with the at least one channel according to the number of different data bit signals, item 14. Or the system described in item 18.</u><u style="single">(Item 20) A method of modulating multiple carrier data.</u><u style="single"> A step of providing a plurality of carrier signals for use in modulating a data bit signal of a serial input data stream (100), the data bits before the data bit signal is modulated on the carrier signal. A predetermined number of signals are mapped to one each of multiple error correction symbols (102, 104 ...), and the number of data bit signals that can be modulated on at least one carrier signal is assigned to each error correction symbol. With less than the predetermined number of mapped data bit signals, each of the carrier signals is associated with its respective transmission channel.</u><u style="single"> In the step of allocating the data bit signal between the carrier signals and modulating using the carrier signal, the allocation of the data bit signal between the carrier signals becomes the error correction symbol of the data bit signal. A step belonging to an error correction symbol in which the number of carrier signals that modulate the data bit signal is different during the transmission period, based on this mapping.</u><u style="single"> Including, methods.</u><u style="single">21. The method of item 20, wherein the data bit signal allocation process is also based on adjusting the signal-to-noise margin of at least one channel.</u><u style="single">(Item 22) The adjustment is performed during the transmission period to allow at least one channel to be assigned a data bit signal from only a single error correction symbol, item 21. the method of.</u><u style="single">(Item 23) The data bit signals are allocated between the carrier signals according to the carrier signal allocation sequence order, and the order has the minimum number of carrier signals that modulate the data bit signals belonging to different error correction symbols. The method according to item 21, which is an order to be obtained.</u><u style="single">(Item 24) The data bit signals are allocated between the carrier signals according to the carrier signal allocation sequence order, and the order has the minimum number of carrier signals that modulate the data bit signals belonging to different error correction symbols. The memory described in item 8 which is the order to be.</u><u style="single">(Item 25) The mechanism allocates the data bit signal to the carrier signal according to the carrier signal allocation sequence order, and the order is the number of carrier signals that modulate the data bit signal belonging to different error correction symbols. The system according to item 14, which is the minimum order.</u><u style="single">(Item 26) The actual signal-to-noise ratio of at least one channel is approximately the sum of the margin and the minimum required signal-to-noise ratio for at least one channel, said at least during the transmission period. The data bit signal transmitted over one channel belongs to more than one error correction symbol and the adjustment reduces the margin so as to reduce the number of data bit signals that can be transmitted by the at least one channel. 21. The method of item 21, comprising increasing the error rate probability for transmission of a bit signal over the at least one channel.</u><u style="single">(Item 27) A method of modulating a data bit signal on a transmission channel having a plurality of subchannels.</u><u style="single"> The process of mapping a predetermined number of data bit signals of the input data stream to each of multiple error correction symbols, and</u><u style="single"> A step of providing a plurality of subchannels for use in modulating a databit signal, wherein at least one of the subchannels is the predetermined number of databit signals mapped to each error correction symbol. Processes and processes used to modulate less data bit signals,</u><u style="single"> A step of arranging the subchannels in a group consisting of one or more subchannels based on the number of data bit signals that the subchannels can modulate, wherein the subchannels in each group are assigned to each error correction symbol. A step that makes it possible to modulate the predetermined number of mapped data bit signals.</u><u style="single"> A step of allocating the data bit signals so that the data bit signals mapped to different error correction symbols between the subchannel groups are not modulated on the same subchannel, thereby during the transmission period. A process that minimizes the number of error correction symbols affected by errors that occur on any given subchannel, and</u><u style="single"> Including, methods.</u><u style="single">28. The method of item 27, further comprising determining the subchannel order for assigning the data bit signal of the error correction symbol to a subchannel.</u><u style="single">29. The method of item 28, further comprising adjusting the number of data bit signals that can be performed by a given subchannel.</u><u style="single">(Item 30) The method according to item 29, wherein the step of adjusting the number of data bit signals includes the step of adjusting the transmission gain for the given subchannel.</u><u style="single">31. The method of item 29, wherein the step of adjusting the number of data bit signals comprises the step of adjusting the signal-to-noise ratio for the given subchannel.</u><u style="single">(Item 32) The method of item 28, wherein the order is based on the bit size of the error correction symbol and the number of data bit signals that each subchannel can execute.</u><u style="single">(Item 33) The method of item 27, further comprising adjusting the number of data bit signals that can be performed by a given subchannel.</u><u style="single">34. The method of item 33, wherein the step of adjusting the number of data bit signals comprises the step of adjusting the transmit gain for the given subchannel.</u><u style="single">35. The method of item 33, wherein the step of adjusting the number of data bit signals comprises the step of adjusting the signal-to-noise ratio for the given subchannel.</u><u style="single">(Item 36) The method of item 27, wherein the allocation process occurs during initialization of the multicarrier transceiver.</u></p>

<figref num="1">FIG. 1 is a schematic diagram of a DSL system in which the present invention can be used advantageously.</figref><figref num="2">Figure 2 is part of the bit allocation table that can be stored in the memory of the transceiver in the system of Figure 1.</figref><figref num="3">Figure 3 is part of another bit allocation table that can be stored in the memory of the transceiver in the system of Figure 1.</figref><figref num="4">FIG. 4 is a symbolic representation of a serial input data bitstream. The bit signal can be mapped to multiple FECC symbols, the symbolic representation of which is used to illustrate the features of embodiments of the present invention.</figref><figref num="5">Figure 5 is a symbolic representation of another serial input data bitstream. The bit signal can be mapped to multiple FECC symbols, the symbolic representation of which is used to illustrate the features of embodiments of the present invention.</figref>

(Detailed description of the exemplary embodiment) FIG. 1 shows a DSL communication system in which the present invention can be used advantageously. As shown in FIG. 1, the telephone office (CO) 10 is connected to the remote telephone subscriber 12 (CP: Customer Premises) by a telephone subscriber line or loop 14. Typically, the telephone subscriber line 14 includes a twist of a pair of copper wires; this is the traditional medium for voice communication between the telephone subscriber or customer and the telephone office. Designed for voice communications with a bandwidth of approximately 4kHz (kilohertz), its use is greatly expanded by DSL technology.

Telephone offices are, in turn, connected to the Digital Data Network (DDN) 16 to transmit and receive digital data, as well as to transmit and receive voice and other low-frequency communications, the public switched telephone network (DDN). PSTN ") Connected to 18. The digital data network is connected to the central station through the digital telephone subscriber line access multiplexer (DSLAM) 20, while the public exchange network is connected to the central station through the local switch bank 22. The DSLAM20 (or equivalent, such as the data that enables the switch line card) is POTS "splitter" 24 through the ADSL transceiver unit central office ("ATU-C") 26. Connected to. The local switch 20 also connects to the splitter.

The splitter 24 separates the data and voice (POTS) signals received from line 14. At the telephone subscriber end of line 14, the splitter 30 performs the same function. In particular, the splitter 30 passes the POTS signal from line 14 to a suitable device such as transmitters 31 and 32 and sends the digital data signal to the ADSL transceiver unit unit-subscriber (ATU-R) 34. And apply to data-using devices such as personal computers (PC) 36. The transceiver 34 can be advantageously incorporated as a card in the PC itself, as well as the transceiver 26 is typically incorporated as a card line in the multiplexer 20.

In this approach, the entire communication bandwidth is divided into multiple channels, which are parts of the entire bandwidth. Each channel is associated with each carrier signal. Data transmitted from one transceiver through each channel to another transceiver is modulated into each channel using the respective carriers associated with each channel. Due to the different signal-to-noise (SNR) characteristics of channels, the maximum amount of data that can be loaded efficiently varies between channels. Therefore, each transceiver so that each "bit allocation table" 40, 42 specifies the maximum number of bits that can be transmitted to the transceiver to which each channel is connected on each channel in each transmission time period. It is saved in.

Bit allocation tables 40, 42 are created during the initial process. Although this initial process involves the transmission of test signals on each channel by each transceiver to other transceivers and the measurement of the signal-to-noise ratio (SNR) of each channel. The signal received by each transceiver is measured and has a predetermined bit transmission error rate probability (eg, 10 transmitted).⁷The SNR measured during channel transmission without exceeding 1 bit error per bit) determines the maximum number of bits that can be transmitted from one transceiver in each channel to another transceiver over a particular line. The bit allocation table (eg, 40) determined by a particular transceiver (eg, 26) is transmitted over the digital telephone subscriber line 14, and according to this embodiment of the invention, other transceivers (eg, 34). Is transmitted to another transceiver (eg, 34) for use by.

Each transceiver or modem 26, 34 (not shown), read-only and random access memory (collectively referred to by reference numerals 50 and 52, respectively), and transmitter and receiver schematic blocks (shown). Including) and interconnected via a conventional bus circuit (not shown), transceivers 26, 34 perform DSL communication processing and various other processing in accordance with the present invention as described herein. It should be understood that it can work as it can. The read-only and random access memories 50 and 52 of these modems 26 and 34 store program code instructions that can be executed by the modem processor and, when executed by the processor, cause the modem to perform these operations. Memories 50 and 52 also store bit allocation tables 40 and 42, respectively.

With reference to FIG. 2, an example of the construction of the bit allocation table 42 used in the customer site equipment is shown in more detail. Table 40 used in the telephone office is essentially the same as Table 42 in construction and operation and is not further explained. In column 50, Table 42 lists the communication channels available in System 1 by number of channels. Each full-rate ADSL system has up to 256 such subchannels with a bandwidth of 4.1 kHz. For example, in one embodiment of the invention, upstream communication (ie, from the customer premises to the central telephone office) is made in the first set of channels, while downstream communication (from the central telephone office to the customer premises) is in the channel. Second, done in different sets. The plurality of channels form a protected frequency band between upstream and downstream communications that can be used to transmit information between modems 26, 34. However, for the purposes of a simple illustration, only 12 channels are shown in part of Table 42 in FIG.

As an alternative to this configuration, similar channels may be used for transmission and reception by both transceivers. For example, both upstream and downstream communications can use channels 1-32 to transmit data. In this alternative example, there is a detailed example in Table 42 for each communication direction.

For each channel (C) in line 50, field 52 is the maximum number of bits (B) that can be transmitted on the channel by the transmitter of the communication agency or modem pair and received by the receiver of that pair. To match the valid state on the channel (eg, measured signal-to-noise ratio (SNR), desired error rate probability, corresponding gain G1, G2, etc. in column 54 assigned to the channel). .. Table 42 identifies the maximum bit allocation for each channel that can be used when transceiver 34 transmits "upstream" to transceiver 26, and uses it when transceiver 34 receives transmission from transceiver 26. It also identifies the maximum bit allocation that uses the transmit gain for each possible channel. The transceiver 26 has a correspondence table 40, which is a mirror image of table 42. That is, the maximum bit allocation and gain specified for transmission by transceiver 34 is the maximum bit allocation and gain specified for reception by transceiver 26 and for reception by transceiver 34 and transmission by transceiver 26, which corresponds to reception by transceiver 26. Is similar to.

In this embodiment of the invention, actual bit loading is performed using Table 62, which includes columns 70, 72, 74 and 76. The rows corresponding to columns 70 and 72 identify the sequence order (listed in column 70), and in the sequence order, the system 1 communication channel (listed in column 72) is a serial input that should be transmitted over link 14. Data Bits Loaded as bits from streams 100, 200. The rows corresponding to columns 74 and 76 identify each number of bits (listed in column 74) and each channel described in column 72 and each transmit gain used to transmit each data bit through each channel. Loaded in (listed in column 76). That is, during communication between transceivers 26 and 34, each transceiver 26 and 34 transmits the bits contained in the respective continuous input streams 100 and 200 to other transmissions and receptions, respectively. The data stream 100 is provided to the modem 26 by the DDN 16 via the DSLAM 20. That is, the data stream 200 is provided from the computer 36 to the modem 34. Each of these continuous data streams 100, 200 contains a large number of continuous data bit signals, for example, in the case of stream 100, continuous data mapped to each FECC symbol 102, 104, 106, 108, 110, 112, etc. It is a bit signal, and in the case of stream 200, it is a continuous data bit signal mapped to each FECC symbol 202, 204, 206, 208, 210, 212 and the like. Each FECC symbol is the same size (eg 1 byte). During each data transmission period, the bits of the continuous bitstreams 100, 200 are allocated and loaded into each channel during the sequence order, using the number of bits specified in Table 62.

For example, assuming that at least channels 1-12 are assigned for data communication from transceiver 26 to transceiver 34, channel 2 is in the first data transmission period, as identified in the first row of Table 62. The first 8 bits of stream 100 are assigned, and channel 9 is assigned the next 8 bits of stream 100. Channel 3 is then assigned the next 7 bits of stream 100, and so on. Bit signals from stream 200 are assigned to each channel (not shown) for data transmission from transceiver 34 to transceiver 26 in a similar manner (ie, according to the sequence order identified in column 70, column 74). The number of each bit specified in). Each transceiver modulates each data bit signal with each carrier signal associated with each channel so that each data bit signal as assigned in Tables 60, 62 is routed through each channel assigned for data transmission. , Transmit for each channel at each gain identified in column 76.

As mentioned above, the transceiver 26 has Table 60, which is a mirror image of Table 62. That is, the actual bit allocation, the channel bit-loading sequence order (ie, as identified in rows 70 and 72), and the channel gain identified for transmission by transceiver 34 are received by transceiver 26, Correspondingly, it is the same as that specified by the reception by the transceiver 34 and the transmission by the transceiver 26.

In Table 62, the transmit gain assigned to each channel is the same as the transmit gain specified for each channel in Table 42. Further, in Table 62, the channels that can be used for communication in System 1 are the same as those in Table 42, and the number of bits assigned to each channel in Table 62 is assigned to each channel in Table 42. Equal to each maximum number of bits. An important difference between Tables 62 and 42 is columns 70 and 72, both of which identify the order in which the data bits map to the channel. If the transceiver produces Table 62 and uses an algorithm similar to reordering columns 70 and 72, the reordered columns in Tables 62 and 62 (ie, columns 70 and 72) are during initialization. Either it is communicated between transceivers or it can be generated from Table 42 by each transceiver.

According to embodiments of the present invention, the channel bitloading sequence order identified in columns 70, 72 of Table 62 is for each channel to which bit signals belonging to more than one symbol of data streams 100, 200 are assigned. The number (and thus the carrier signal with respect to the channel) is minimized. More specifically, in Table 62, for each data transmission period, each bit signal assigned to each channel is contained only in each single symbol.

For example, the data bits of stream 100 depicted in FIG. 4 are transmitted during the first transmission period following the initialization in Table 62, and then each symbol is according to the actual bit loading scheme in Table 62. Assuming the exemplary purpose of having a size of 8 bits, channel 2 is assigned all bits of the first symbol 102 of stream 100. Channel 9 is assigned all bits of the second symbol 104 of stream 100. Channel 3 is assigned 7 bits of the third symbol 106 of stream 100, and the remaining bits of symbol 106 of stream 100 are assigned to channel 7. According to the bit loading identified in Table 62, channel 6 is the fourth symbol 108 of stream 100 to ensure that each channel is assigned bits from only each single symbol during each data transmission period. 6 bits are allocated, the remaining 2 bits of the fourth symbol 108 are allocated to channel 5, and so on.

Of course, as will be appreciated by those skilled in the art, depending on the size of the symbol and the maximum number of bits that can be transmitted over each channel at each channel gain identified in columns 52, 54 of Table 42, the bits and There is no channel bit-loading sequence order with such a maximum number of gains, and each channel is assigned bits from only each single symbol during each data transmission period. Therefore, each carrier or channel transmit gain G1, G2, etc. and / or SNR margin (ie, the actual SNR of a given channel is required to transmit multiple bits assigned to the channel with the desired bit error rate probability. It is necessary to adjust one or more of (a predetermined amount that exceeds the minimum signal-to-noise ratio), and eventually each channel can be assigned bits from only each single symbol during each data transmission period. , Or gain and / or vary the maximum number of bits that can be transmitted over the channel with respect to the SNR margin (matching the aforementioned type of valid state on the channel, desired error rate probability, etc.). The amount by which the channel transmit gain and / or SNR margin is adjusted to achieve this result is based on the information retrieved and stored in the transceiver memory as part of the "training" period in the initialization of the communication. Can be determined empirically.

As an example, consider the case in Bit Allocation Table 42 where carriers numbered 2 and 9 are assigned 7 and 9 bits instead of 8 bits each. In this case, it is not possible to order the channel loading so that each channel can be assigned bits from only a single symbol during each data transmission period. This problem can be solved if different channels (eg, G2 and G9 are different) transmission gains are used to change the number of bits assigned to these channels corresponding to these gains. For example, in most cases, an additional transmission gain of 3 dB allows the transmission of an additional 1 bit on a channel with the same desired bit error ratio probability. Therefore, if G2 increases to G2 + 3dB and G9 decreases to G9-3dB, then channels 2 and 9 are 8 bits each (as in the original Table 42) without changing the bit error ratio probabilities of these channels. ) Can be carried, thus allowing the use of channel bit-loading sequence orders, where each channel is assigned to a bit from only a single symbol, respectively, during each data transmission period.

Alternatively, constant gain adjustments and / or SNR margin adjustments (eg, about 3.4 dB) may be applied to the channel, otherwise more than one symbol-to-bit is assigned to each transmission period. Ideally, but not necessarily, in a way that ensures that System 1 is maintained according to applicable industry DSL channel transmission gains and power margin standards known to those of skill in the art. The channel transmission gain and / or SNR margin should be adjusted. For example, such standards are disclosed in ITU Standard G.992.2 and ANSI Standard T.413, which are incorporated herein by reference in their entirety.

Not surprisingly, the transceiver processor, which is responsible for determining the actual bit loading tables 60,62, optionally implements the above techniques to best achieve the minimum number of channels allocated to a bit from one or more symbols. It should be recognized that it can be used in combination. That is, during the "test" period of communication initialization, the processor may thoroughly explore various possibilities in terms of channel bit-loading sequence order and / or channel transmission gain and / or SNR adjustment. Communicate based on a given optimization criterion (for example, an optimization criterion in which the SNR margin adjustment is equal across almost all channels and the number of channels allocated to bits from multiplex symbols is minimized during a given transmission period). Achieve the "optimal" results of.

While the present invention is disclosed in connection with exemplary embodiments and methods of use, it should be understood that many alternatives, modifications and variations thereof are possible without departing from the invention. Is. For example, System 1 is shown to include splitters 24, 30, but is shared with the owners of the present application, Aware, Inc. of Bedford, Massachusetts, USA, entitled "Splitterless Multicarrier Modem", 10 1998 Splitter if System 1 is modified appropriately to adapt and implement the teachings of co-pending PCT application No. PCT / US98 / 21442 filed on 9th May (published as WO99 / 20027). 24, 30 can instead be completely removed from system 1. The entire disclosure of the above co-pending PCT application is incorporated herein by reference.

Other modifications are also possible. For example, only the second table 62 can be transmitted, rather than both tables 42 and 62 being transmitted over the line 14. Similarly, only a single Table 62 needs to be created by the modem 34 during the test, rather than the creation of the two Tables 42, 62. Accordingly, the present invention is intended to include all alternatives, modifications, and modifications that are apparent to those skilled in the art and are within the scope of the claims.