Power amplification circuit
Abstract
Problem to be solved.To widen the frequency characteristic of a power amplifier circuit.
Solution.The outputs of differential push-pull amplifiers (PA1-PAn), each of which is matched at different frequencies (f1-fn), are combined and output in common by a secondary inductor (L12-Ln2). .. [Selection diagram] Fig. 1

Term
Projected expiry 12 December 2028.
- Priority and filed
- Published
- Today
- Projected expiry
10 claims: 2 independent, 8 dependent
- 1共通の入力端子に接続され、各々が、出力整合用のトランスを介して出力端子に共通に接続され、互いに異なる周波数で整合された複数個の差動プッシュプル増幅器を備え、 前記複数の差動プッシュプル増幅器の出力信号が、共通に前記トランスの二次インダクタで合成される、電力増幅回路。
- 2各前記差動プッシュプル増幅器は、 前記トランスの一部を構成する一次インダクタと、 入力信号を受ける前段増幅器と、 前記前段増幅器の出力信号を受けて反転増幅して前記一次インダクタを駆動する後段増幅器と、 前記後段増幅器の入力と出力との間に接続される帰還抵抗を備える、請求項1に記載の電力増幅回路。
- 3前記入力端子には、差動信号が与えられ、 各前記差動プッシュプル増幅器は、 前記差動信号の第1の信号を受ける第1の前段増幅器と、 前記差動信号の前記第1の信号と相補な第2の信号を受ける第2の前段増幅器と、 前記第1の前段増幅器の出力信号を非反転増幅する第1の後段増幅器と、 前記第2の前段増幅器の出力信号を非反転増幅する第2の後段増幅器と、 前記第1の前段増幅器の入力と前記第2の後段増幅器の出力との間に接続される第1の帰還抵抗と、 前記第2の前段増幅器の入力と前記第1の後段増幅器の出力との間に接続される第2の帰還抵抗と、 前記第1および第2の後段増幅器の出力の間に接続される一次トランスとを備える、請求項1記載の電力増幅回路。
- 4前記出力整合用のトランスは、 各前記差動プッシュプル増幅器に対応して配置される複数の一次インダクタと、 前記複数の差動プッシュプル増幅器に共通に設けられ、前記複数の一次インダクタが磁気結合される1つの二次インダクタを備える、請求項1から3のいずれかに記載の電力増幅回路。
- 5前記複数の一次インダクタは、順次、同心円状に配置されるループ形状の一次インダクタ配線を備え、 前記二次インダクタが、前記複数の一次インダクタ配線を囲むようにループ形状に配置される二次インダクタ配線を備える、請求項4記載の電力増幅回路。
- 6前記一次インダクタおよび前記二次インダクタは、互いに積層して配置されるループ形状のインダクタ配線を備える、請求項4記載の電力増幅回路。
- 7前記複数の差動プッシュプル増幅器は、それぞれが、前記トランスの一次インダクタを含むとともに互いに異なる周波数で整合される第1および第2の差動プッシュプル増幅器を備え、 前記出力整合用のトランスにおいて、 前記第1の差動プッシュプル増幅器において設けられる第1の一次インダクタは、ループ状に形成される第1のループ状一次インダクタ配線で構成され、 前記第2の差動プッシュプル増幅器において設けられる一次インダクタは、前記第1のループ状一次インダクタ配線の内側に配置される第2のループ状一次インダクタ配線で構成され、 前記二次インダクタは、前記第1および第2のループ状一次インダクタ配線の間に配置されるループ状の二次インダクタ配線で構成され、 前記第1および第2のループ状の一次インダクタ配線の間隔は、前記第1および第2の一次インダクタ配線各々の線幅の少なくとも3倍である、請求項1記載の電力増幅回路。
- 8前記第1および第2の差動プッシュプル増幅器は、前記入力端子に与えられる差動信号を増幅する差動増幅段を備え、 前記第1および第2のループ状一次インダクタ配線は、各々、対応の差動増幅段の出力に接続される分離端を有し、 前記第1および第2のループ状の一次インダクタ配線の各々の前記分離端と対向する部分がセンタータップ配線により短絡される、請求項7記載の電力増幅回路。
- 9前記ループ状の二次インダクタ配線は、前記第1および第2のループ状一次インダクタ配線の間に配置されるとともに各々が分離部を有する第1および第2のループ形状の二次インダクタ配線を備え、前記分離部の端部において前記第1および第2のループ形状の二次インダクタ配線が、並列に接続される、請求項7記載の電力増幅回路。
- 10前記二次インダクタの巻数は、前記第1および第2の一次インダクタ各々の巻数よりも大きい、請求項7記載の電力増幅回路。
Independent claims10
98 paragraphs, as filed
The present invention relates to a power amplifier circuit, and more particularly to a power amplifier circuit having a wide band frequency characteristic.
The power amplifier circuit amplifies a weak signal to a required level and outputs it. Such a power amplifier circuit is used, for example, in a wireless communication application such as a mobile device, for amplifying and outputting a weak high frequency signal to the power required by a wireless system.
One such power amplifier circuit is a differential push-pull system. This differential push-pull type power amplifier circuit generates an output signal by synthesizing a differential signal amplified by a pair of transistors with a synthesizer. Since a differential signal is used, an output with twice the amplitude of the output signal of a single transistor can be obtained, and even-order harmonics are canceled, so a high-output and low-distortion amplifier circuit can be realized. It is an effective means.
In the field of mobile communications such as mobile phones, cost reduction is an important issue due to the reduction in occupied area. Therefore, a fine CMOS transistor (complementary insulated gate type field effect transistor) is used as a component transistor, and a transformer is often used as a synthesizer in the microwave region. An example of the configuration of a differential push-pull amplifier using such a fine CMOS process is Non-Patent Document 1 (Jongchan Kang, et al., A single-chip linear CMOS power amplifier for 2.4 GHz WLAN, International Solid- State Circuits Conference 2006, Digest of Technical Papers, pp.761-769, Feb. 2006.).
In the configuration of the power amplifier shown in Non-Patent Document 1, the transformer constituting the synthesizer is composed of a half-wound (1/2-turn) primary side and secondary side slab inductor, respectively. Both ends of the primary metal slab are driven by a pair of MOS transistors that receive differential signals. In this non-patent document 1, the primary and secondary inductors of the transformer are composed of half-wound inductors, and by eliminating the cancellation of magnetic flux from the opposite side, the conversion efficiency (ratio of output power Pout and input power Pin, Try to improve Pout / Pin).
Further, a configuration of a power amplifier circuit using a differential push-pull amplifier for the purpose of low loss, small area and high output is shown in Patent Document 1 (Japanese Patent Laid-Open No. 2005-503679). In the configuration shown in Patent Document 1, the outputs of a plurality of differential push-pull amplifiers are combined by a transformer, and an output of several W class is realized by using a fine CMOS transistor. Specifically, in Patent Document 1, the outputs of four differential push-pull amplifiers are combined by connecting the secondary inductors of a transformer in series. Impedance conversion is performed by this secondary inductor, and low output impedance is given to the drain of the transistor of each push-pull amplifier, so that the drain voltage is suppressed to a low level and high output power is realized. Further, the primary inductor and the secondary inductor of the transformer have a slab shape, respectively, and the transformers are arranged in an annular shape to reduce the loss and the area.
Further, a configuration for improving the efficiency and operating range of the power amplifier is shown in Patent Document 2 (Japanese Unexamined Patent Publication No. 2006-295896). In the configuration shown in Patent Document 2, a primary side transmission line (inductor) having a different shape is used in a transmission line transformer used as a matching circuit of a power amplifier. That is, primary inductors having different shapes and different parasitic components are arranged on both sides of the secondary inductor of the transformer, and a differential push-pull amplifier is connected to each of these primary inductors. The primary inductor is switched so that the load resistance is reduced when high output power is generated and the load resistance is increased when low output power is generated. This Patent Document 2 aims to improve the efficiency and the operating range (dynamic range) of the power amplifier circuit as a whole by giving the two differential push-pull amplifiers different output loads.<patcit num="1"><text>Special Table 2005-503679</text></patcit><patcit num="2"><text>Japanese Unexamined Patent Publication No. 2006-295896</text></patcit><nplcit num="1"><text>Jongchan Kang, et al., A single-chip linear CMOS power amplifier for 2.4 GHz WLAN, International Solid-State Circuits Conference 2006, Digest of Technical Papers, pp.761-769, Feb. 2006.</text></nplcit>
<p> In the field of mobile communication, power amplifiers are used in transmission systems with high output and low distortion. However, in this field of mobile communication, various communication standards exist, and sets of various wireless transmission parameters (frequency band, bandwidth, modulation method, required signal-to-noise ratio, etc.) are defined, and each specification has its own specifications. Therefore, it is required to set the necessary parameters. In particular, communication standards that modulate using a wide frequency band and international standard specifications that correspond to the communication standards of each country are required to maintain high output over a wide band. However, in general, a high-output CMOS transistor has a low output impedance and output matching is performed by using a matching circuit, so that the frequency characteristic tends to be a narrow band frequency characteristic. Similarly, when the CMOS differential push-pull amplifier shown in Patent Document 1, Patent Document 2 and Non-Patent Document 1 described above is used, a narrow band frequency characteristic can be obtained. In these Patent Documents 1 and 2 and Non-Patent Document 1, the configuration in which the frequency characteristic is wide band is not considered.</p><p> Therefore, an object of the present invention is to provide a power amplifier circuit having a wide band frequency characteristic.</p><p> Another object of the present invention is to realize a power amplifier circuit having a wide band frequency characteristic by utilizing a power amplifier having a narrow band frequency characteristic.</p>
<p> The power amplifier circuit according to the present invention includes a plurality of differential push-pull amplifiers, each of which is matched at a different frequency from each other, and all the outputs of the plurality of differential push-pull amplifiers are synthesized by the secondary inductor of the transformer. Will be done.</p>
<p> The output of multiple differential push-pull amplifiers is combined with a secondary inductor and can maintain high output in the frequency band defined by the different matching frequencies of these differential push-pull amplifiers, with a flat frequency over a wide band. A power amplifier circuit having characteristics can be realized.</p>
[Embodiment 1] FIG. 1 is a diagram showing a configuration of a power amplifier circuit according to the first embodiment of the present invention. In FIG. 1, differential input signals IN (+) and IN (-) are given to input terminals 1 and 2. Differential push-pull amplifiers PA1-PAn are connected in parallel to these input terminals 1 and 2. These differential push-pull amplifiers PA1-PAn are matched at different frequencies f1, f2, ... fn, respectively. Here, the frequencies f1, f2, ... fn satisfy the relationship of f1 <f2 <... <fn.
Each of the differential push-pull amplifiers PA1-PAn includes an amplifier provided corresponding to each of these input terminals 1 and 2 and a parallel resonant circuit of a capacitor and a primary inductor that match the outputs of these amplifiers. Specifically, the differential push-pull amplifier PA1 has amplifiers AMP11 and AMP12 provided at input terminals 1 and 2, respectively, and capacitors C1 and a primary inductor L11 connected in parallel between the outputs of these amplifiers AMP11 and AMP12. Including. The differential push-pull amplifier PA2 includes amplifiers AMP21 and AMP22 provided for input terminals 1 and 2, respectively, and capacitors C2 and a primary inductor L21 connected in parallel between the outputs of these amplifiers AMP21 and AMP22. The differential push-pull amplifier PAn includes amplifiers AMPn1 and AMPn2 provided for input terminals 1 and 2, respectively, and capacitors Cn and a primary inductor Ln1 connected in parallel between the outputs of these amplifiers AMPn1 and AMPn2.
In the differential push-pull amplifier PAi (any of i = 1-n), the matching frequency of the amplifiers AMPi1 and AMPi2 is determined by the parallel resonant circuit of the capacitor Ci and the primary inductor Li1.
Secondary inductors L12 and L22-Ln2 are provided facing the primary inductors L11-Ln1 of these differential push-pull amplifiers PA1-PAn, respectively. These secondary inductors L12-Ln2 are connected in series between output terminals 3 and 4. Differential output signals OUT (+) and OUT (-) are output from output terminals 3 and 4. Here, the sign (+,-) of the differential output signal defines the amplifiers AMP11, AMP12-AMPn1 and AMPn2 as non-inverting amplifiers (positive phase amplifiers). Further, by grounding one of these output terminals 3 and 4, a single-phase signal can be output from the other output terminal.
The primary inductor L11-Ln1 and the corresponding secondary inductor L12-Ln2 form a transformer that performs impedance matching and impedance conversion, respectively. The so-called "coil polarity (indicated by black circles)" of the primary inductor L11-Ln1 and the secondary inductor L12-Ln2 are the same. Therefore, the secondary inductor L12-Ln2 is connected in series between the output terminals 3 and 4, and the secondary inductor L12-Ln2 corresponding to the primary inductor L11-Ln1 of these differential push-pull amplifiers PA1-PAn is connected. The secondary side signals generated by the magnetic coupling between them are combined by the secondary inductors L12-Ln2, and the combined signals are output to the output terminals 3 and 4.
These n differential push-pull amplifiers PA1-PAn are matched with different frequencies f1-fn from each other, and the matching frequency is determined by the capacitance and inductance of the corresponding capacitor Ci and the primary inductor Li1. Generally, in these differential push-pull amplifiers PA1-PAn different differential push-pull amplifiers PAi and PAj, the capacitances of the capacitors Ci and Cj are different from each other, and the inductances of the primary inductors Li1 and Lj1 are different from each other.
If the characteristics of the amplifiers AMP11, AMP12-AMPn1 and AMPn2 included in the differential push-pull amplifier PA1-PAn are the same, the higher the matching frequency, the smaller the inductance L and capacitance C required for matching tend to be.
Figure 2 outlines these shapes so that the magnitude relationship between the capacitance and inductance of the capacitors C1-Cn and the transformer primary inductor L11-Ln1 contained in these differential push-pull amplifiers PA1-PAn can be visually understood. It is a diagram illustrated in a concrete manner. In FIG. 2, the magnitude of the capacitance is indicated by the length of the counter electrode, and the magnitude of the inductance is indicated by the length of the inductor.
In FIG. 2, the capacitors C1-Cn are formed of the same material and in the same process, and their capacitance is proportional to the facing area of the electrodes. In FIG. 2, the electrode facing area is shown by the length of the electrode. Further, when the inductors constituting each transformer are formed of the same material in the same process, the inductance of the transformer's primary inductor L11-Ln1 is relative to the length regardless of whether the inductor is composed of a coil or a metal slab. Monotonically increases. Therefore, as shown in FIG. 2, in the differential push-pull amplifier PA1 matched at the lowest frequency f1, the facing area of the electrodes of the capacitor C1 is the largest, and the length of the primary inductor L11 of the transformer is the longest. As the matching frequency increases, the electrode facing areas of the capacitors C2, ... Cn gradually decrease, and the lengths of the transformer primary inductors L21 ... Ln1 gradually decrease.
Therefore, when the amplifiers AMP11, AMP12-AMPn1 and AMPn2 have the same characteristics, by adjusting the electrode facing area of this capacitor and the length of the primary inductor of the transformer, differential push-pull amplifiers that match at different frequencies can be obtained. It can be realized.
Further, in the illustrated configuration, the secondary inductor L12-Ln2 arranged to face the primary inductor L11-Ln of the transformer is also set to have the same length as the corresponding primary inductor. In this case, the turns ratio of the primary side inductor and the secondary side inductor are equivalently equalized, and the impedance conversion ratio is set to 1. The impedance conversion ratios of the differential push-pull amplifiers PA1-PAn can all be made equal, and the output signals matched to the output load can be combined in the secondary inductors L12-Ln2 and generated at output terminals 3 and 4. As a result, even if the frequencies of the differential input signals IN (+) and IN (-) given to the input terminals 1 and 2 are different, the differential push-pull amplifier matched to the frequency of the input signal provides a large output. The signal can be generated, and the frequency characteristics of the output signal having a peak at the matching frequency f1-fn can be obtained by these differential push-pull amplifiers PA1-PAn, and this frequency characteristic can be widened. ..
FIG. 3 is a diagram showing the results obtained by simulating the frequency characteristics of the output signal of the power amplifier circuit according to the first embodiment of the present invention. FIG. 3 shows the output frequency characteristics when four differential push-pull amplifiers (n = 4) are provided. In FIG. 3, the horizontal axis shows the frequency (unit: GHz), and the vertical axis shows the output (unit: dBm).
As shown in FIG. 3, since the output signals of the differential push-pull amplifiers PA1-PA4 matched at frequencies f1-f4 are combined by the secondary inductor, the output signals having peaks at each of these frequencies f1-f4. Is synthesized, and a plurality of different peaks are superposed on each other, so that the frequency characteristic is widened.
Therefore, even if the output frequency characteristics of each of the differential push-pull amplifiers PA1-PAn are in a narrow band, by synthesizing all the output signals of these differential push-pull amplifiers PA1-PAn with the secondary inductor of the transformer. , A power amplifier circuit having a wide band frequency characteristic can be realized.
[Embodiment 2] FIG. 4 is a diagram schematically showing a configuration of a power amplifier circuit according to the second embodiment of the present invention. The configuration of the power amplifier circuit shown in FIG. 4 differs from the configuration of the power amplifier circuit according to the first embodiment shown in FIG. 1 in the following points. That is, in each of the differential push-pull amplifiers PA1-PAn, the amplifiers arranged for each of the input terminals 1 and 2 are composed of a series of the front stage amplifier and the rear stage amplifier, respectively. Specifically, in the differential push-pull amplifier PA1, the input terminal 1 is provided with a series of the front-stage amplifier FP11 and the rear-stage amplifier SP11, and the input terminal 2 is provided with a series of the front-stage amplifier FP12 and the rear-stage amplifier SP12. Be done. In the differential push-pull amplifier PA (n-1), the input terminal 1 is provided with a series of the front stage amplifier FP (n-1) 1 and the rear stage amplifier SP (n-1) 1, and the input terminal 2 On the other hand, a series of the front stage amplifier FP (n-1) 2 and the rear stage amplifier SP (n-1) 2 is provided. In the differential push-pull amplifier PAn, the input terminal 1 is provided with a series of the front-stage amplifier FPn1 and the rear-stage amplifier SPn1, and the input terminal 2 is provided with a series of the front-stage amplifier FPn2 and the rear-stage amplifier SPn2.
The operating characteristics of these pre-stage amplifiers FP11, FP12-FP (n-1) 1, FP (n-1) 2, ..., FPn1 and FPn2 are all the same, and the post-stage amplifiers SP11, SP12-SPn1, SPn2 is composed of an inverting amplifier (reverse phase amplifier), and the operating characteristics of these subsequent amplifiers are also the same.
In the differential push-pull amplifier PA1-PA (n-1), a feedback resistor R11-R (n-1) 1 is connected between each output and input of the post-stage amplifier SP11-SP (n-1) 1. Further, a feedback resistor R12-R (n-1) 2 is connected between the output and the input of the post-stage amplifier SP12-SP (n-1) 2. This feedback resistor is not provided in the post-stage amplifiers SPn1 and SPn2 of the differential push-pull amplifier PAn.
In each of the differential push-pull amplifiers PA1-PA (n-1), the resistance values of the feedback resistors Ra1 and Ra2 are equal, and the degree of negative feedback of the post-stage amplifiers SPa1 and SPa2 is equal. Where a is one of 1- (n-1).
A capacitor Ci and a transformer primary inductor Li1 are connected between the outputs of the post-stage amplifiers SPI1 and SPi2 (i = 1-n). The arrangement of the transformer and the capacitor for output matching is the same as the configuration of the power amplifier shown in FIG. 1, and the corresponding parts are designated by the same reference numerals, and detailed description thereof will be omitted. However, since the post-stage amplifiers SP11, SP12-SPn1 and SPn2 are inverting amplifiers (reverse phase amplifiers), the output terminals 4 and 5 are output terminals 4 and 5 when the pre-stage amplifiers FP11, FP12-FPn1 and FPn2 are non-inverting amplifiers (positive phase amplifiers). A signal having the opposite phase to that of the first embodiment is output to. That is, the output signal OUT (-) is output to the output terminal 4, and the output signal OUT (+) is output to the output terminal 5. In this case as well, as in the first embodiment, one of the output terminals 4 and 5 may be grounded, and a single-phase signal may be generated from the other non-grounded output terminal.
In general, the gain of the amplifier has frequency dependence due to the operating characteristics of the transistor contained therein and the like, and monotonically decreases with respect to the frequency toward the upper limit frequency. Therefore, the output signal of the differential push-pull amplifier PA1 at the frequency f1 tends to be larger than the output of the differential push-pull amplifier PA2 at the frequency f2 (> f1). Similarly, the output signal at frequency f (n-1) of the differential push-pull amplifier PA (n-1) tends to be larger than the output signal at frequency fn of the differential push-pull amplifier PAn.
In this case, when the output signals of the differential push-pull amplifier PA1-PAn are simply combined, the output frequency characteristics include the frequency characteristics in which the output power decreases as the frequency increases, as shown in FIG. can get.
In order to flatten such frequency characteristics, the output of the differential amplifier PA1-PA (n-1) may be suppressed in accordance with the output of the differential push-pull amplifier PAn. As the method, there are a method of connecting a series resistor to the input of the amplifier to attenuate the input signal and a method of suppressing the gain of the amplifier by negative feedback via a resistance element. Attenuation of the input signal simply reduces the output of the amplifier, whereas negative feedback has the effect of widening the frequency characteristics of the amplifier instead of suppressing the gain. Therefore, by widening the frequency characteristic of the differential push-pull amplifier alone by negative feedback, the frequency characteristic of the entire amplifier can be further flattened.
Specifically, for the post-stage amplifiers SP11, SP12-SP (n-1) 1, SP (n-1) 2, the feedback resistors R11, R12-R (n-1) 1, R (n-1), respectively. 2 is connected, and negative feedback is applied to the input of these subsequent amplifiers SP11, SP12-SP (n-1) 1, SP (n-1) 2 via a resistor element to suppress the output power. As a result, the output gain of these differential push-pull amplifiers PA1-PA (n-1) is matched (almost matched) with the output gain of the differential push-pull amplifier PAn having the highest matching frequency, and the output frequency characteristics are adjusted. Flatten.
Generally, the tendency is that the resistance values of the negative feedback resistors Rk1 and Rk2 of the differential push-pull amplifier PAk are the feedback resistors Rj1 and Rj2 of the push-pull amplifier PAj matched at the frequency fj (> fk: j = k + 1). The resistance value tends to be smaller than that. In this case, the degree of negative feedback due to the feedback resistors Rj1 and Rj2 to the post-stage amplifiers SPj1 and SPj2 is made smaller than the degree of negative feedback applied to the post-stage amplifiers SPk1 and SPk2. That is, the resistance value of the feedback resistor is gradually increased as the matching frequency is increased, and the degree of negative feedback is gradually decreased.
Since the differential push-pull amplifier PAn matched by the frequency fn does not have a feedback resistor, these differential push-pull amplifiers PA1 correspond to the output of the differential push-pull amplifier PAn having the smallest gain. -The output of PA (n-1) is reduced by applying negative feedback. Since the output of each differential push-pull amplifier PA1-PAn is combined by a series of secondary inductors L12-Ln2, the frequency characteristics of the power amplifier circuit composed of these differential push-pull amplifiers PA1-PAn are flattened. Can be transformed into.
The resistance values of the feedback resistors R11, R12-R (n-1) 1, and R (n-1) 2 may be the same. When the power of the output signal is large, a large negative feedback is applied and the degree of suppression of the output power becomes large. The resistance value of these negative feedback resistors may be appropriately determined according to the frequency dependence of the output power.
[Change example] FIG. 5 is a diagram showing a configuration of a modified example of the power amplifier circuit according to the second embodiment of the present invention. The configuration of the power amplifier circuit shown in FIG. 5 differs from the configuration of the power amplifier circuit shown in FIG. 4 in the following points. That is, in each of the differential push-pull amplifiers PA1-PA (n-1), a non-inverting amplifier (positive phase amplifier) is used instead of the inverting amplifier (negative phase amplifier). That is, in the differential push-pull amplifier PA1, the post-stage amplifiers SA11 and SA12 are provided, and in the differential push-pull amplifier PA (n-1), the post-stage amplifiers SA (n-1) 1 and SA (n-1) 2 are provided. Provided. The differential push-pull amplifier PAn is also provided with post-stage amplifiers SAn1 and SAn2. The differential push-pull amplifier PAj (not shown) is also provided with post-stage amplifiers SAj1 and SAj2 (j = 2- (n-2)). These post-stage amplifiers SA11, SA12-SAn1 and SAn2 all have the same operating characteristics, and the pre-stage amplifiers FP11, FP12-FPn1 and FPn2 also have the same operating characteristics.
Further, in order to apply negative feedback to the output, the input and output of the post-stage amplifier are cross-connected via a resistor in each of the differential push-pull amplifiers PA1-PA (n-1). That is, in the differential push-pull amplifier PAi (i = 1- (n-1)), the resistor Zi1 is connected between the output of the post-stage amplifier SAi1 and the input of the post-stage amplifier SAi2, and the output of the post-stage amplifier SAi2 and the post-stage amplifier A resistor Zi2 is provided between the inputs of SAi1. The relationship between the resistance values of the feedback resistor elements Z11, Z12-Z (n-1) 1 and Z (n-1) 2 is the resistance R11, R12-R (n-1) in the power amplifier circuit shown in Fig. 4 above. It is the same as the relationship of resistance of 1, R (n-1) 2.
The other configurations of the power amplifier circuit shown in FIG. 5 are the same as the configurations of the power amplifier circuit shown in FIG. 4, and the corresponding parts are designated by the same reference number, and detailed description thereof will be omitted. However, since a non-inverting amplifier (positive phase amplifier) is used as a post-stage amplifier in each of the differential push-pull amplifiers PA1-PAn, the output signals OUT (+) and OUT are connected to output terminals 4 and 5, respectively. (-) Is generated and an output signal in phase with the input signals IN (+) and IN (-) given to input terminals 1 and 2 is obtained.
In the configuration of the power amplifier circuit shown in FIG. 5, the differential push-pull amplifiers PA1-PA (n-1) internally provide differential signals IN (+) and IN (-) to input terminals 1 and 2, respectively. ) Is amplified to generate a differential signal to drive the corresponding primary inductor. In the differential push-pull amplifier PAi, the output signals of the post-stage amplifiers SAi1 and SAi2 are out of phase. Therefore, by tapping the feedback resistors Zi1 and Zi2, negative feedback can be applied to the inputs of these post-stage amplifiers SAi1 and SAi2 to suppress the output signal.
Therefore, even in the configuration shown in FIG. 5, when the differential push-pull amplifiers PA1-PAn are matched at different frequencies f1-fn by applying negative feedback to each input according to the output. However, the output power can be made almost the same, and a flat frequency characteristic can be obtained over a wide band.
FIG. 6 is a diagram showing the results obtained by simulating the frequency characteristics of the output of the power amplifier circuit according to the second embodiment of the present invention. In FIG. 6, the horizontal axis shows the frequency (unit: GHz), and the vertical axis shows the output (unit: dBm). As simulation conditions, four differential push-pull amplifiers are used, the amplification factor of the previous stage amplifier is set to 1, and the simulation is performed under the same conditions as the simulation shown in Fig. 3 above, except for the condition that a negative feedback resistor is added. are doing. Therefore, the frequency characteristics of the power amplifier circuit shown in FIG. 4 in which the inverting amplifier is used as the post-stage amplifier are shown, but the same result can be obtained in the configuration of the power amplifier circuit shown in FIG.
As shown in FIG. 6, three peaks on the low frequency side (outputs corresponding to frequencies f1-f3) are suppressed and the frequency characteristics are flattened as compared with the output frequency characteristics shown in FIG. Furthermore, the frequency characteristics of the differential push-pull amplifier unit (PA1-PA3) corresponding to the frequency f1-f3 are widened by negative feedback, and the lower the frequency, the larger the amount of negative feedback, so the low frequency side The frequency characteristics are more flattened.
Even if the amplifier is inverting and amplified in the low frequency region, the phase difference between the input signal and the output signal may be smaller than π / 2 in the high frequency region due to the parasitic component of the amplifier. In such a case, such an inverting amplifier with poor high frequency response characteristics is regarded as a non-inverting amplifier, and the corresponding feedback resistance is set accordingly, as shown in FIG. 5, instead of FIG. Need to connect.
As described above, according to the second embodiment of the present invention, in a differential push-pull amplifier other than the differential push-pull amplifier matched at the highest frequency, negative feedback is applied to the output of the internal amplifier. A resistance element is connected to. As a result, the output gain of each differential push-pull amplifier is made uniform, and a power amplifier circuit having a flat frequency characteristic over a wide band can be obtained.
[Embodiment 3] FIG. 7 is a diagram schematically showing a configuration of a power amplifier circuit according to the third embodiment of the present invention. In the power amplifier circuit shown in FIG. 7, in the transformer 10 that matches and synthesizes the outputs of the differential push-pull amplifier, the transformer primary inductors L11-Ln1 are arranged in parallel, and the transformer primary inductors L11-Ln1 are arranged in parallel with these primary inductors L11-Ln1. On the other hand, a secondary inductor L2 is provided in common. This secondary inductor L2 is connected between output terminals 4 and 5.
The capacitors C1-Cn corresponding to these primary inductors L11-Ln1 and the corresponding amplifiers AMP11-AMPn1 and AMP12-AMPn2 are arranged in the same manner as in the first embodiment shown in FIG. In this configuration, the primary inductors L11-Ln1 are arranged in parallel with each other, so that the amplifier AMP11-AMPn1 connected to the input terminal 1 and the amplifier AMP12-AMPn2 connected to the input terminal 2 are grouped together. , Is arranged separately on one side and the other side of the transformer.
Also in the configuration of the power amplifier circuit shown in FIG. 7, the differential push-pull amplifier includes a pair of amplifiers AMPi1 and AMPi2, and are matched at different frequencies f1-fn.
Also in the configuration shown in FIG. 7, since the primary inductors L11-Ln1 arranged in parallel with the same polarity are commonly magnetically coupled to the secondary inductor L2, the secondary inductor L2 is used for the differential push-pull amplifier ( The output of PA1-PAn) is synthesized, and a wide band frequency characteristic can be realized.
In the configuration shown in FIG. 7, the secondary inductor L2 is commonly provided in the primary inductors L11-Ln1 of the plurality of differential push-pull amplifiers (PA1-PAn). Therefore, the layout area of the transformer 10 can be reduced as compared with the configuration in which the secondary inductors are provided and connected in series corresponding to the individual primary inductors L11-Ln1, and this power amplifier circuit is configured by one chip. In that case, the chip area can be reduced.
In analog circuits, the inductance of inductors depends on the length, width, etc., so it is impossible to improve the performance by miniaturizing the process. This also applies to the transformer 10 of the output unit composed of the inductor. Therefore, the chip area by sharing the secondary inductor of the transformer for output synthesis for multiple differential push-pull amplifiers (PA1-PAn) and setting the occupied area of the transformer 10 to substantially 1 / n times. The reduction effect is great.
In the configuration of the power amplifier circuit shown in FIG. 7, as in the configuration according to the second embodiment, in each differential push-pull amplifier, a front-stage amplifier and a rear-stage amplifier are arranged in series instead of the amplifiers AM Pi1 and AM Pi2, respectively. , A negative feedback resistance element may be arranged, and in the case of this configuration, the frequency characteristics can be flattened as in the second embodiment.
Further, in the power amplifier circuit shown in FIG. 7, the primary inductors are arranged in the order from the inductor L11 having the matching frequency f1 to the primary inductor Ln1 having the highest matching frequency fn from the left in the figure. However, the arrangement order of this primary inductor may be reversed.
FIG. 8 is a diagram schematically showing an example of the configuration of the transformer 10 of the power amplifier circuit according to the third embodiment of the present invention. FIG. 8 shows the arrangement of the inductors of the transformer 10 with respect to the four differential push-pull amplifiers (PA1-PA4).
In FIG. 8, closed loop-shaped primary inductors 30-33 having their ends separated from each other are sequentially arranged concentrically. These loop-shaped primary inductors (inductors and loops) 30-33 are composed of metal wiring, and these loop-shaped primary inductors 30-33 are configured with the same line width, respectively, at the first end and the second. The end is connected to the output of a corresponding amplifier that produces a differential signal.
The lengths of these loop-shaped primary inductors 30-33 are gradually increased from the inside to the outside, and when the line widths are the same, the inductance is changed from the loop-shaped primary inductor 30 to the loop-shaped primary inductor 33. It is gradually increased toward. Therefore, the innermost loop-shaped primary inductor 30 corresponds to the primary inductor L14 having the highest matching frequency, and the loop-shaped primary inductor 33 corresponds to the primary inductor L11 having the lowest matching frequency. A closed-loop inductor (inductor loop) 35 having one end separated from the loop-shaped primary inductor 33 is arranged on the outer circumference and concentrically. Both ends of the looped secondary inductor 35 (L2) are arranged to face each of the separated ends of the primary inductors 30-33 and are connected to output terminals 4 and 5, respectively.
In the case of the arrangement shown in FIG. 8, an inductor is formed on the same substrate (chip) using metal wiring and arranged in a plane, and the inductance is determined according to the length of the metal wiring.
Further, by arranging the ends of the loop-shaped primary inductor 30-33 and the loop-shaped secondary inductor 35 so as to face each other and align with each other, it is possible to easily arrange the wiring for these inductors 30-33 and 35. Can be done.
[Transformer change example] FIG. 9 is a diagram schematically showing a configuration of a modified example of a transformer of a power amplifier circuit according to a third embodiment of the present invention. Also in the configuration of the transformer 10 shown in FIG. 9, the configuration when four differential push-pull amplifiers are used is shown as an example.
In FIG. 9, loop-shaped wirings 40-43 and 44 having their ends separated from each other are arranged in a laminated manner. Wiring 40-43 is used as the primary inductor, the separated ends of which are connected to the output of the corresponding amplifier via signal wiring 46a, 46b-49a, 49b, respectively. On the other hand, the wiring 44 is used as a secondary inductor, and its separated ends are connected to the output terminals 4 and 5, respectively, via the signal wirings 45a and 45b.
In the case of the configuration shown in FIG. 9, the wirings 40-43 constituting the primary inductor and the wirings 44 constituting the secondary inductor are laminated, so that the layout area of the transformer 10 can be further reduced.
In FIG. 9, the wires 40-43 have the same shape, and the matching frequency is adjusted by the capacitance value connected in parallel to each wire. Further, the wirings 40-43 may have different shapes.
In the configurations shown in FIGS. 8 and 9, it is necessary to consider the magnetic coupling between the primary inductors. The magnetic coupling between the primary inductors is adjusted by the shape and spacing of the wires 40-43 that make up the primary inductor, the position of the wires 44 that make up the secondary inductor, and the capacitance value of the individual capacitors connected to each wire. Will be done. Here, a capacitor may also be connected in the wiring 44 constituting the secondary inductor.
As described above, in the third embodiment of the present invention, the secondary inductor of the transformer of the output of the plurality of differential push-pull amplifiers is provided in common to these the plurality of differential push-pull amplifiers. Therefore, the layout area of the transformer for output matching and synthesis can be reduced, and the layout area of the power amplifier circuit can be reduced accordingly.
[Embodiment 4] FIG. 10 is a diagram schematically showing a configuration of a power amplifier circuit according to a fourth embodiment of the present invention. In the configuration of the power amplifier circuit shown in FIG. 10, two differential push-pull amplifiers are used.
In FIG. 10, the power amplifier circuit includes N-channel MOS transistors (insulated gate type field effect transistors) TR11 and TR21 whose gate is connected to input terminal 1, and N-channel MOS transistors TR12 and TR12 whose gate is connected to input terminal 2. Including TR22. The source nodes of these MOS transistors TR11 and TR21 are commonly grounded, and the sources of MOS transistors TR12 and TR22 are commonly grounded. These MOS transistors TR11, TR12, TR21, and TR22 each operate as an amplification element and correspond to the amplifier AMP described in the embodiments so far. A gate bias voltage Vg is applied to the gates of these MOS transistors TR11, TR12, TR21 and TR22 via the bias resistor Rb.
This power amplifier circuit further includes a capacitor C1 connected between the drain nodes of the MOS transistors TR11 and TR12 and a capacitor C2 connected between the drain nodes of the MOS transistors TR21 and TR22 for output synthesis and output matching. Includes a transformer 50 with at least functionality.
The transformer 50 includes a primary inductor wiring 52 whose one end is separated to form a loop, a loop-shaped primary inductor wiring 54 which is arranged inside the primary inductor wiring 52 and whose one end is separated, and these. Includes a secondary inductor wire 56 that is located between the primary inductor wires 52 and 54, one end of which is separated at a portion of the primary inductors 52 and 54 that faces the separation. These inductor wires 52, 54 and 56 are arranged concentrically.
Both ends of the primary inductor wiring 52 are connected to the drain nodes of the MOS transistors TR11 and TR12, respectively, and the ends of the primary inductor wiring 54 are connected to the drain nodes of the MOS transistors TR21 and TR22, respectively. These primary inductor wires 52 and 54 are also interconnected by a center tap wire 60 at a portion facing the separator (the center point of the loop wire), and a drain bias voltage Vd is supplied through the wire 60. To.
The secondary inductor wiring 56 is wider than the primary inductor wirings 52 and 54, and both ends thereof are connected to output terminals 4 and 5, respectively.
Generally, since the source grounded MOS transistor is an inverting amplifier, the output signal OUT (-) is output to the output terminal 4, and the output signal OUT (+) is output to the output terminal 5. Since the separated end of the primary inductor and the loop end of the loop-shaped secondary inductor are arranged in opposite directions, if the polarity of the coil is defined via the clockwise direction, the positional relationship between the output terminal 4 and the output terminal 5 Is the reverse of the arrangement shown in Figure 1.
In the configuration of the power amplifier circuit shown in FIG. 10, the MOS transistors TR11, TR12, the capacitor C1, and the primary inductor wiring 52 and the secondary inductor wiring 56 constitute one differential push-pull amplifier, and the MOS transistors TR21, The TR22, capacitor C2, primary inductor wiring 54 and secondary inductor wiring 56 constitute separate differential push-pull amplifiers, and the matching frequencies of these two differential push-pull amplifiers are different from each other. Since the length of the primary inductor wiring 54 is shorter than that of the primary inductor wiring 52, when the capacitances of the capacitors C1 and C2 are equal, the resonance frequency of the resonant circuit composed of the primary inductor wiring 54 and the capacitor C2 is the primary inductor wiring. Higher than the resonant circuit consisting of 52 and capacitor C1.
The line width of the secondary inductor wires 56 is set to several times (at least three times) the line widths of these primary inductor wires 52 and 54, and the magnetic coupling between the primary inductor wires 52 and 54 is sufficiently suppressed. In this case, the spacing between the primary inductor wires 52 and 54 should be at least three times the line width of the primary inductor wires 52 and 54 without significantly increasing the layout area of the transformer 50. It is effective from the viewpoint of sufficiently suppressing the magnetic coupling of and 54.
For example, in the case of a linear inductor wiring (slab inductor), if the wiring interval is set to 3 times the line width, the coupling coefficient is approximately halved as compared with the case where the wiring interval is extremely narrow.
In the configuration of the power amplifier circuit shown in FIG. 10, the wiring 60 supplies the drain bias voltage Vd, and the wiring 60 functions as a virtual AC ground for each of the two differential push-pull amplifiers. Therefore, even if the primary inductor wires 52 and 54 are interconnected by the wiring 60, the wiring 60 functions as a virtual AC ground, and thus adversely affects the signals generated in these primary inductor wires 52 and 54. Does not reach.
In the case of the power amplifier circuit shown in FIG. 10, two differential push-pull amplifiers are used, and although the effect of widening the frequency characteristics is reduced, the magnetism between the primary inductors is maintained while having the effect of reducing the chip area. Coupling can be easily reduced and the design can be simplified.
Further, in a differential push-pull amplifier, the asymmetry of the circuit arrangement may cause the asymmetry of the parasitic component, which may cause a decrease in the output of the amplifier and / or an increase in distortion. However, in the case of the configuration of the power amplifier circuit shown in FIG. 10, the circuit can be laid out mirror-symmetrically with respect to the straight line passing through the separated ends of the primary inductor wirings 52 and 54 and the secondary inductor wiring 56 of the transformer 50. The problem of output reduction and / or distortion can be solved.
In addition, the transformer 50 is also mirror-symmetrical, and the midpoints of the primary inductor wirings 52 and 54 are virtual AC grounded as described above, and the midpoints of these primary inductor wirings 52 and 54 are connected by the center tap wiring 60. The drain bias voltage Vd can be supplied from one end thereof. In addition, since the center tap wiring 60 acts as a virtual AC ground, it is not necessary to connect the AC cutoff coil for separating the primary inductor wirings 52 and 54 from the power supply (Vd), which simplifies the transformer configuration. And the layout area can be reduced.
[Change example] FIG. 11 is a diagram schematically showing a configuration of a modified example of a transformer of a power amplifier circuit according to a fourth embodiment of the present invention. In the configuration shown in FIG. 11, three differential push-pull amplifiers are provided in the power amplifier circuit. In the transformer 70, loop-shaped primary inductor wirings 72, 74, and 76 having separated ends are arranged concentrically with their separated ends aligned. A loop-shaped secondary inductor wiring 80 with one end separated is arranged between the primary inductor wirings 72 and 74, and one end thereof is aligned with the separation part of the secondary inductor wiring 80 between the primary inductor wirings 74 and 76. The secondary inductor wiring 82 is arranged.
Both ends of the primary inductor wire 72 are connected to the output of the corresponding amplifier via signal wires 77a and 77b, respectively. The ends of the primary inductor wiring 74 are connected to the output of the corresponding amplifier via signal wiring 78a and 78b, respectively. The primary inductor wiring 76 has its opposite ends connected to the output of the corresponding amplifier via signal wiring 79a and 79b, respectively.
The secondary inductor wires 80 and 82 are short-circuited by the signal wires 84a and 84b at the short-circuited portions 85a and 85b arranged to face the separated ends of the primary inductor wires 72, 74 and 76. These signal wirings 84a and 84b are connected to output terminals 4 and 5, respectively.
As shown in FIG. 11, by arranging the secondary inductor wiring between the primary inductor wirings, the magnetic coupling between the primary inductors can be reduced. Further, due to the short circuit of the secondary inductor wirings 80 and 82 by the signal wirings 84a and 84b in the short circuit portions 85a and 85b, the signals generated in the secondary inductor wirings 80 and 82 are synthesized and transmitted to the output terminals 4 and 5. To.
In the arrangement shown in FIG. 11, by arranging the primary inductor wiring and the secondary inductor wiring alternately, it is possible to realize a configuration in which n (n 3) differential push-pull amplifiers are arranged.
In the arrangement of the transformer 70 shown in FIG. 11, the line widths of the secondary inductor wirings 80 and 82 are set to several times (preferably three times or more) the line widths of the primary inductor wires 72, 74 and 76. Similar to the case where the two differential push-pull amplifiers shown in the above are provided, the magnetic coupling between the primary inductors can be further reduced. However, in this case, the occupied area of the transformer increases.
Also in the configuration of the transformer 70 shown in FIG. 11, the drain bias voltage may be supplied at the midpoints of the primary inductor wirings 72, 74 and 76 in the vicinity of the short-circuited portions 85a and 85b.
Further, in the arrangement shown in FIG. 11, when two differential push-pull amplifiers are used, the primary inductor wiring 74 may be deleted and the transformer 70 may be configured by using the primary inductor wirings 72 and 76. Even in this case, the secondary inductor wirings 80 and 82 allow the distance between the primary inductor wirings 72 and 76 to be sufficiently wide, and the magnetic coupling of these primary inductor wirings 72 and 76 is sufficiently suppressed. Can be done.
As described above, according to the fourth embodiment of the present invention, the loop-shaped secondary inductor wiring is arranged between the loop-shaped primary inductor wirings, and the magnetic coupling between the primary inductor wirings can be reduced. The need to consider magnetic coupling between the primary inductor wires is reduced, simplifying the design.
[Embodiment 5] FIG. 12 is a diagram schematically showing a configuration of a power amplifier circuit according to a fifth embodiment of the present invention. The power amplifier circuit shown in FIG. 12 has a different configuration of the transformer 90 from the power amplifier circuit shown in FIG. 10, but the amplifier configuration is the same, and the corresponding components of this amplifier are given the same reference number. , The detailed description thereof will be omitted.
In FIG. 12, the transformer 90 includes primary inductor wires 92 and 94 formed in a loop with one end separated and secondary inductor wires 96 and 98 arranged between these primary inductor wires 92 and 94. .. The secondary inductor wires 96 and 98 are connected in series at a connection portion 100 arranged corresponding to a separation portion of the primary inductor wires 92 and 94. The primary inductor wires 92 and 94 are interconnected by the center tap wiring 102 at the separated ends of the secondary inductor wiring 96 and receive the drain bias voltage Vd.
In the configuration of the transformer 90 shown in FIG. 12, the primary inductor wirings 92 and 94 and the secondary inductor wirings 96 and 98 have the same line width. Also, the spacing between the primary inductor wires 92 and 94 is at least three times their line width, and their magnetic coupling is reduced. Since the secondary inductor wires 96 and 98 are connected in series, the load resistance of each differential amplifier is divided to reduce the chip area reduction effect and the drain voltage of the amplifier transistors TR11, TR12, TR21 and TR22. (Because a voltage twice the applied voltage of the primary transformer wiring can be generated between output terminals 4 and 5).
Even when the spacing between the secondary inductor wires 96 and 98 is narrowed, the output voltage is four times the input voltage due to impedance conversion by the transformer 90 with a turns ratio of 1: 2 between the primary inductor and the secondary inductor. A voltage can be obtained and, as a result, the drain voltage of the amplifier's MOS transistors TR11, TR12, TR21 and TR22 can be reduced.
Further, as the intersecting structure at the connection portion 100 of the secondary inductor wirings 96 and 98, the same configuration as the structure at the intersection of the secondary inductor wiring 98 and the center tap wiring 102 may be used. That is, for example, at the intersection 100, a configuration in which the secondary inductor wirings 98 and 96 are laminated via an insulating film may be used.
As described above, according to the fifth embodiment of the present invention, the secondary inductor wiring is arranged between the primary inductor wirings, the magnetic coupling between the primary inductors can be reduced, and the signal having a small occupied area can be reduced. A transformer with little interference can be obtained.
Further, by arranging a plurality of the secondary inductor wirings and connecting them in series, the drain voltage of the transistor of the amplifier can be reduced by the turns ratio of the primary inductor and the secondary inductor.
By applying the present invention to a power amplifier circuit that requires a flat frequency characteristic over a wide band, such as in the field of mobile communication, it is possible to realize a power amplifier circuit having a wide band frequency characteristic with a simple circuit configuration. Further, the differential push-pull amplifier may be integrated on a common board, the transformer is formed on the common board, and the components other than the transformer of the differential push-pull amplifier are formed on another board. You may.
<figref num="1">It is a figure which shows schematic structure of the power amplifier circuit according to Embodiment 1 of this invention.</figref><figref num="2">It is a figure which visually illustrates the magnitude relation of LC component of the power amplifier circuit shown in FIG.</figref><figref num="3">It is a figure which shows the result of having obtained the frequency characteristic of the power amplifier circuit according to Embodiment 1 of this invention by simulation.</figref><figref num="4">It is a figure which shows the structure of the power amplifier circuit according to Embodiment 2 of this invention.</figref><figref num="5">It is a figure which shows the structure of the power amplifier circuit of the modification of Embodiment 2 of this invention.</figref><figref num="6">It is a figure which shows the result of having obtained the frequency characteristic of the power amplifier circuit according to Embodiment 2 of this invention by simulation.</figref><figref num="7">It is a figure which shows the structure of the power amplifier circuit according to Embodiment 3 of this invention.</figref><figref num="8">It is a figure which shows typically an example of the structure of the transformer of the power amplifier circuit according to Embodiment 3 of this invention.</figref><figref num="9">It is a figure which shows schematic structure of the modification example of the transformer of the power amplifier circuit according to Embodiment 3 of this invention.</figref><figref num="10">It is a figure which shows the structure of the power amplifier circuit according to Embodiment 4 of this invention.</figref><figref num="11">It is a figure which shows schematic structure of the modification example of the transformer of the power amplifier circuit according to Embodiment 4 of this invention.</figref><figref num="12">It is a figure which shows schematic structure of the power amplifier circuit according to Embodiment 5 of this invention.</figref>
Code description
PA1-PAn differential push-pull amplifier, C1-Cn capacitor, L11-Ln1 primary inductor, L12-Ln2 secondary inductor, R11, R12-R (n-1) 1, R (n-1) 2 resistors, FP11- FP12-FPn1, FPn2 pre-stage amplifier, SP11, SPn1, SPn2, SA11, SA12-SAn1, SAn2 post-stage amplifier, 10,50,70,90 transformer, 30-33,40-43,52,54,72,74,76 , 92,94 Primary inductor wiring, 35,44,56,80,82,96,98 Secondary inductor wiring.
13 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13
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| Document | Relation | Office | Cited during |
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| JP2015534420A | Cited by | Japan | Search report |
| WO2022065012A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US12095489B2 | Cited by | United States of America | Applicant |
| JP2013055578A | Cited by | Japan | Search report |
| JP2013055578A | Cited by | Japan | Examiner |
| JP2002515196A | Cites | Japan | Examiner |
| JP2005109651A | Cites | Japan | Examiner |
| JP2005503679A | Cites | Japan | Examiner |
| JP2008263432A | Cites | Japan | Examiner |
| JP2008278345A | Cites | Japan | Search report |
| JP2008278345A | Cites | Japan | Examiner |
| JPH0588018U | Cites | Japan | Examiner |
| JPH08222436A | Cites | Japan | Examiner |
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| 2008316891 | Japan | A | |
| JP20080316891 | – | – | – |
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| US2010117817A1 | United States of America | A1 | |
| WO2010056860A1 | World Intellectual Property Organization (WIPO) | A1 | |
| US2010148869A1 | United States of America | A1 | |
| JP2010141673AThis record | Japan | A | |
| US8134408B2 | United States of America | B2 | |
| US2012133431A1 | United States of America | A1 | |
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| JP5168495B2 | Japan | B2 | |
| US2013069723A1 | United States of America | A1 | |
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| US8779855B2 | United States of America | B2 | |
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| US2015291083A1 | United States of America | A1 | |
| US9545876B2 | United States of America | B2 |
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Numbers
- Publication
- 2010141673
- Publication, DOCDB
- 2010141673
- Publication, EPODOC
- JP2010141673
- Application
- 316891
- Application, DOCDB
- 2008316891
- Application, EPODOC
- JP20080316891
Titles2
- Japanese
- 電力増幅回路
- English
- Power amplifier circuit
Classification
- CPC, 5
- H03F3/211
- H03F1/56
- H03F3/26
- H03F2200/537
- H03F2203/21139
- IPC, 5
- H03F3 24
- H03F3 45
- H03F1 48
- H03F3 26
- H03F3 68