Protection circuit and usb device

The present invention relates to a protection circuit and a USB device, and more particularly to a protection circuit and a USB device for supplying power from a power supply supplied from a USB port to an internal circuit.

In recent years, with the development of digital devices, the number of devices used by connecting to a computer is increasing. The USB interface is widely used as an interface for connecting to a computer. With the spread of USB interfaces, the number of USB devices is increasing.

The USB interface has a 5V power line in addition to the signal line. Some USB devices use the 5V power supply supplied to this power line to charge the secondary battery built into the device. In such a USB device, the circuit was designed on the assumption that a device such as a personal computer that supplies voltage from a USB port outputs 5V, which is a voltage according to the USB standard. Therefore, when the output voltage of the USB port on the power supply device side is in the overvoltage / overcurrent state, the device on the side to which power is supplied via the USB port may be destroyed by the overvoltage / overcurrent.

A USB cable with a built-in protection circuit for charge control, overcharging, and overcurrent protection of the secondary battery of a USB device has been developed (see Patent Document 1).<patcit num="1"><text>Japanese Unexamined Patent Publication No. 2000-339067</text></patcit>

<p> However, conventional USB devices cannot protect the internal circuits of the device from overcharging and overcurrent of the USB port.</p><p> The present invention has been made in view of the above points, and an object of the present invention is to provide a power supply circuit and a USB device capable of protecting a USB device from overvoltage and overcurrent.</p>

<p> The present invention is a protection circuit that protects the internal circuit (112) from the power supply supplied to the USB port (111), and the detection means (121) for detecting the voltage / current supplied to the USB port (111). , Having a switch means (M11) that disconnects the power supply from the USB port (111) to the internal circuit (112) when the voltage / current detected by the detection means (121) is overvoltage / overcurrent. It is a feature.</p><p> The internal circuit (112) is a charge control circuit for charging the secondary battery (122).</p><p> The detecting means (121) is characterized in that the voltage applied to the internal resistance of the switching means (M11) is detected.</p><p> The detection means (121) and the switch means (M11) are characterized in that they are each composed of different semiconductor devices.</p><p> Further, the present invention is a USB device in which an internal circuit (112) is driven by a power source from the USB port (111), and the detection means (121) for detecting the voltage / current supplied to the USB port (111). , Having a switch means (M11) that disconnects the power supply from the USB port (111) to the internal circuit (112) when the voltage / current detected by the detection means (121) is overvoltage / overcurrent. It is a feature.</p><p> The internal circuit (112) is a charge control circuit for charging the secondary battery (122).</p><p> The detecting means (121) is characterized in that the voltage applied to the internal resistance of the switching means (M11) is detected.</p><p> It should be noted that the above reference reference numerals are for reference only, and the description of the scope of claims is not limited thereto.</p>

<p> According to the present invention, when power is supplied to the internal circuit from the USB port, the detection means for detecting the voltage / current supplied to the USB port and the voltage / current detected by the detection means are overvoltage / overcurrent. When the USB port of the power supply side device is in an overvoltage / overcurrent state, the detection means detects this by providing a switch means for cutting off the power supply from the USB port to the internal circuit, and the switch means USB. The power supply from the port to the internal circuit can be cut off, which protects the internal circuit from overvoltage / overcurrent.</p>

FIG. 1 shows a system configuration diagram of an embodiment of the present invention.

The USB device 101 of this embodiment has a USB port 111, and the USB port 111 is connected to the USB port 104 of the personal computer 102 via the USB cable 103, and the power supply is supplied through the power line of the USB cable 103. It is said that the internal battery 122 can be charged and the device main body 123 can be driven.

The USB device 101 has a USB port 111, an internal circuit 112, and a protection circuit 113. The USB port 111 is connected to the USB port 104 of the personal computer 102 via the USB cable 103. The power line of the USB port 111 is connected to the protection circuit 113, and the signal line of the USB port 111 is connected to the main body of the device.

The internal circuit 112 is composed of a charge control IC 121, a secondary battery 122, and a device main body 123. The charge control IC 121 controls the charge / discharge of the secondary battery 122 by the output voltage of the protection circuit 113, that is, the power supply voltage applied to the power supply line of the USB port 111.

The secondary battery 122 is composed of a Ni-Cd battery, a lithium ion battery, etc., is connected to the charge control IC 121 and the device main body 123, and the charge / discharge is controlled by the charge control IC 121.

The device main body 123 is a circuit unit that executes the functions of the USB device 101, for example, a function as a digital audio player, and has a built-in controller 131. The controller 131 supplies a signal for setting the current limit value to the protection circuit 113 when the power is turned on.

The protection circuit 113 is provided between the USB port 111 and the internal circuit 123, and protects the internal circuit 123 from overvoltage and overcurrent supplied to the USB port 111.

FIG. 2 shows a block configuration diagram of the protection circuit 113.

The protection circuit 113 is composed of a protection IC 114 and a current detection resistor Rs.

In the protection IC 114, the positive electrode of the USB port 111 is connected to the terminal T11, and the negative electrode of the USB port 111 is connected to the terminal T12. Further, the terminal T13 of the protection IC 114 is connected to the charge control IC 121.

Further, a current detection resistor Rs is connected between the terminal T11 and the terminal T14 of the protection IC 114. Further, the controller 131 provided in the device main body 123 is connected to the terminal T15 of the protection IC 114.

The protection IC 114 consists of a transistor M11, voltage detection resistors R11, R12, error amplifier AMP11, comparator COMP11, COMP12, reference voltage source 141, 142, current limit control circuit 143, temperature detection circuit 144, delay block 145, and inverter 146. Has been done.

Transistor M11 consists of a p-channel MOS field effect transistor with a source-drain connected between terminals T14 and T13, turned off in an overvoltage / overcurrent state, from terminal T11 to terminal T13. Cut off the current supply. As a result, the current supply from the positive electrode of the USB port 111 to the charge control IC 121 is cut off in the overvoltage / overcurrent state.

The voltage detection resistors R11 and R12 are connected in series between the terminals T11 and T12, and the voltage applied from the USB port 111 between the terminals T11 and T12 is divided according to the resistance ratio. It is compressed and supplied as a detection voltage Vs to the inverting input terminal of the comparator COMP11.

In the comparator COMP11, the reference voltage Vref11 is applied to the non-inverting input terminal from the reference voltage source 141. The comparator COMP11 sets the output to a high level when the detection voltage Vs of the voltage applied between the positive electrode and the negative electrode of the USB port 111 is smaller than the reference voltage Vref11, that is, in the normal state, and the positive electrode of the USB port 111 is positive. When the detection voltage Vs of the voltage applied between the electrode and the negative electrode is larger than the reference voltage Vref, that is, in the overvoltage state, the output is set to the low level. The output of the comparator COMP11 is supplied to the delay block 145.

In the error amplifier AMP11, the inverting input terminal is connected to the terminal T14, the non-inverting input terminal is connected to the terminal T11, and the voltage across the current detection resistor Rs is applied between the inverting input terminal and the non-inverting input terminal. , Outputs an output signal according to the voltage. The output signal of the error amplifier AMP11 is supplied to the inverting input terminal of the comparator COMP12.

A current limit setting circuit 143 is connected to the error amplifier AMP11. The current limit setting circuit 143 sets the error amplifier AMP11 as the first gain G11 when the current limit setting signal supplied to the terminal T15 is high level, and when the current limit setting signal supplied to the terminal T15 is low level. Set the gain of the error amplifier AMP12 to the second gain G12 (&lt;first gain G11).

The first gain G11 is set so that the output of the error amplifier AMP11 becomes the reference voltage Vref12 generated by the reference voltage source 142 when the current flowing through the resistor Rs is 100 mA + α. The second gain G12 is set so that the output of the error amplifier AMP 11 becomes the reference voltage Vref 12 generated by the reference voltage source 142 when the current flowing through the resistor Rs is 500 mA + α. Here, α is set to, for example, α = (detection error) + (margin).

The comparator COMP12 sets the output to a low level when the output signal of the error amplifier AMP11 becomes larger than the reference voltage Vref12, and sets the output to a high level when the output signal of the error amplifier AMP11 becomes smaller than the reference voltage Vref12. That is, when the current flowing through the current detection resistor Rs is 100 mA when the current limit is set to 100 mA, the output is lowered and the current detection resistor Rs is set when the limit current is set to 500 mA. When the current flowing through is 500mA, the output is set to low level. Further, a temperature detection circuit 144 is connected to the comparator COMP12.

The temperature detection circuit 144 is provided close to the transistor M11, and when the temperature of the transistor M11 exceeds a certain temperature, the output supplied to the comparator COMP12 is lowered to a low level. When the output of the temperature detection circuit 144 becomes low level, the comparator COPM11 forcibly lowers the output regardless of the voltage between the non-inverting input terminal and the inverting input terminal.

The output of the comparator COMP12 is supplied to the delay block 145.

The output of the comparator COMP11 and the output of the comparator COMP12 are supplied to the delay block 145, and when either the output of the comparator COMP11 or the output of the comparator COMP12 is low level, the output is set to the low level and the comparator COMP11 When both the output of and the output of the comparator COMP12 are at high level, the output is set to high level. That is, the logical product of the output of the comparator COMP11 and the output of the comparator COMP12 is output. At this time, the output is delayed when the power is turned on and when an overcurrent is detected. The output of the delay block 145 is supplied to the inverter 146. The inverter 146 inverts the output of the delay block 145 and supplies it to the gate of the transistor M11.

The transistor M11 turns off when the output of the inverter 146 is at a high level and turns on when the output of the inverter 146 is at a low level. That is, the transistor M11 is turned off when it becomes an overvoltage or overcurrent state.

[Operation] First, the operation in the overvoltage state will be described.

When the voltage of the terminal T11, that is, the applied voltage between the positive electrode and the negative electrode of the USB port 111 becomes an overvoltage state, the detected voltage Vs becomes larger than the reference voltage Vref11. The output of the comparator COMP11 becomes low level. When the output of the comparator COMP11 becomes low level, the transistor M11 is turned off with a delay. As a result, it is possible to prevent the terminal T13 from being in an overvoltage state.

Next, the operation in the overcurrent state will be described.

When the current output from the terminal T13 becomes an overcurrent state, the current flowing through the current detection resistor Rs becomes an overcurrent state. As a result, the output of the error amplifier AMP11 becomes larger than the reference voltage Vref12. As a result, the output of the comparator COMP12 becomes low level. When the output of the comparator COMP12 becomes low level, the transistor M11 is turned off with a delay. As a result, it is possible to prevent the current output from the terminal T13 from becoming an overcurrent state.

At startup, the outputs of the comparators COMP11 and COMP12 are delayed and output, and the output of the delay block 145 is maintained at a low level for a predetermined delay time. Therefore, the transistor M11 is maintained in the off state for at least a predetermined delay time. As a result, it is possible to prevent the error amplifiers AMP11, comparator COMP11, and COMP12 from operating, the transistor M11 to turn on, and the terminal T13 to be in an overvoltage or overcurrent state during unstable operation such as at startup.

The delay block 145 delays even when the current is overcurrent, and prevents the transistor M11 from switching due to current fluctuation.

Next, the operation of the controller 131 will be described.

FIG. 3 shows a processing flowchart of the controller 131.

When the power is turned on in step S1-1, the controller 131 reads out the current limit set value set in the internal memory or the like in step S1-2.

Next, when the current limit setting value read from the internal memory in step S1-3 is 100 mA, the controller 131 sets the output supplied to the error amplifier AMP11 in step S1-4 to a high level. As a result, the gain of the error amplifier AMP11 is set to the first gain G11, that is, the transistor M11 is turned off when the current flowing through the current detection resistor Rs is 100 mA + α.

Further, when the current limit setting value read from the internal memory in step S1-3 is 500 mA, the controller 131 sets the output supplied to the error amplifier AMP 11 in step S1-5 to a low level. As a result, the gain of the error amplifier AMP11 is set to the second gain G12, that is, the transistor M11 is turned off when the current flowing through the current detection resistor Rs is 500 mA + α.

The controller 131 maintains the current limit set value until the power is turned off in step S1-6.

FIG. 4 shows a block configuration diagram of a modified example of the protection circuit 113. In the figure, the same components as those in FIG. 2 are designated by the same reference numerals, and the description thereof will be omitted.

The protection circuit 211 of this modification uses the on-resistance of the transistor M11 instead of the current detection resistor Rs. The terminal T11 is connected to the non-inverting input terminal of the error amplifier AMP11, and the terminal T13 is connected to the error amplifier AMP11. It is connected to the inverting input terminal of.

In the above embodiment, the transistor M11 is built in the protection ICs 114 and 212 as an example. However, the transistor M11 can also be used as an external component of the protection ICs 114 and 212 as shown by the alternate long and short dash lines in FIGS. 2 and 4. Good.

It is needless to say that the present invention is not limited to the above examples, and various modifications can be considered without departing from the gist of the present invention.

<figref num="1">It is a system block diagram of one Example of this invention.</figref><figref num="2">It is a block block diagram of protection circuit 113.</figref><figref num="3">It is a processing flowchart of a controller 131.</figref><figref num="4">It is a block block diagram of the modification of protection circuit 113.</figref>

Code description

101 USB device, 102 personal computer, 103 USB cable 104, 111 USB port 112 internal circuit, 113 protection circuit 121 charge control IC, 122 secondary battery, 123 device body 131 controller 141, 142 reference voltage source, 143 current limit setting circuit , 144 Temperature detection circuit 145 Delay block, 146 Inverter AMP11 Error amplifier, COMP11, COMP12 Comparator Rs Current detection resistor, R11, R12 resistor