System and method for transmitting video data

The field of the present invention relates to microelectromechanical systems (MEMS).

Microelectromechanical systems (MEMS) include micromechanical elements, actuators, and electronic devices. Micromechanical elements are deposited, etched, or etched to remove a substrate and / or a portion of the deposited material, or add multiple layers to form an electronic device and an electromechanical device, or any other. It can be created using a micromachining process. One type of MEMS device is called an interference modulator. The interference modulator may include a pair of conductive plates. One or both of the pair of conductive plates may be transparent and / or reflective in whole or in part and can move relative to each other when the appropriate electrical signal is applied. One plate may contain a rest layer deposited on the substrate and the other plate may contain a metal film separated from the rest layer by an air gap. Such devices have a wide range of applications and utilize the characteristics of these types of devices so that their features can be used to improve existing products and create new products that have not yet been developed. / Or it would be technically beneficial to change. It would be beneficial to use such a device to display video data with new controllers and processing to reduce manufacturing costs and gain power savings.

Outline of the invention

The systems, methods, and devices described herein each have several perspectives, and a single perspective of those perspectives does not exclusively contribute to its desired properties. Without limiting the scope of this invention, its more prominent features will be briefly discussed. After considering this discussion, and especially after reading the tighted section "Detailed Description of An Embodiment", how the features of this invention benefit over other display devices. You will understand what to supply.

One embodiment includes a system. The system includes means for supplying video data for display and means for displaying received video data independently of the frame buffer, the display means being configured to hold the video data.

Other embodiments include a method of displaying video data. The method comprises receiving video data and displaying the received video data through an array of bistable display elements, independent of the frame buffer.

Other embodiments include methods of manufacturing a system for displaying data.

The method is to provide a processor; to provide multiple bistable display elements; and to receive video data from the processor and display the video data through multiple bistable display elements, independent of the framebuffer. Includes providing a driver controller configured to.

Other embodiments include a system for displaying data. The system includes a processor configured to provide video data and a circuit configured to display the video data provided to multiple bistable display elements, independent of the framebuffer.

In yet another embodiment, the invention receives video data and displays the data via a plurality of bistable display elements, including a display configured to display the video data regardless of the frame buffer. System is provided.

In addition, other embodiments include a system for displaying data.

The system includes: Processor; Multiple bistable display elements; and a driver controller configured to receive video data from the processor and display the video data through multiple bistable display elements regardless of the framebuffer. ..

The following detailed description is directed to a particular embodiment. However, the invention can be embodied in many different ways. As used herein, reference to "one embodiment" or "embodiment" means that the particular features, structures, or properties described in connection with the embodiment are included in at least one embodiment. In various places throughout the specification, the appearance of the phrases "in one embodiment", "following one embodiment", and "in some embodiments" does not necessarily refer to the same embodiment. Nor is it separated. Alternatively, the alternative embodiment is mutually exclusive with other embodiments. In addition, various features that may be exhibited by some embodiments, rather than by other embodiments, are described. Similarly, various requirements that may be requirements for some embodiments rather than other embodiments are described.

In one embodiment, the display array on the device includes at least one drive circuit and means for displaying video data, such as an array of interference modulators. As used herein, video data refers to any type of viewable video data, including images, graphics, and words that can be displayed in static or dynamic images (eg, when viewed). A series of video frames that give the appearance of a moving application, eg, a continuous, ever-changing stock price, a "video clip" or an event of action). As used herein, video data also refers to any type of control data, including instructions on how to process the video data (display mode), such as frame rate and data format. The array is driven by a drive circuit to display video data.

One embodiment includes a driver controller having two interfaces for receiving video data. In one embodiment, the first transmitted video data of the two interfaces is stored in the framebuffer. The second video data transmitted on the two interfaces is transmitted directly to the array driver for display, independent of the frame buffer. Potential power savings may be achieved by limiting the use of frame buffers. In one embodiment, the client device is manufactured without any frame buffer to further reduce manufacturing costs and further power savings.

In this description, the drawings are referred to and similar numbers are assigned to similar parts throughout. The present invention is made to display an image regardless of whether it is moving (eg, video) or stationary (eg, still image) and whether it is in text format or image data. It may be carried out by the device. In particular, the invention is, but is not limited to, mobile phones, wireless devices, personal digital assistance (PDSs), handheld or portable computers, GPS receivers / navigators, cameras, MP3 players, camcoders, game consoles, watches, etc. Clocks, calculators, television monitors, flat panel displays, computer monitors, audible displays (eg mileage meter displays, etc.), cockpit control and / or displays, camera view displays (eg rear camera in vehicles), electronic photography , Electronic billboards or signs, projectors, buildings, packaging, and aesthetic structures (eg, displays of images about a single jewel) are intended to be implemented or associated in various electronic devices. To. MEMS devices similar in structure to the MEMS devices described herein can also be used in hidden applications such as electronic exchange devices.

Spatial light modulators used to image applications come in many different formats. A transmissive liquid crystal display (LCD) modulator modulates light by controlling a crystalline twist and / or arrangement structure to block or pass light. Reflected spatial light modulators utilize various physical effects to control the amount of light reflected onto the imaging surface. Examples of such reflection modulators include reflective LCDs and digital micromirror devices.

Another example of a spatial optical modulator is an interference modulator that modulates light by interference. The interference modulator is a bistable display element that employs a resonant optical cavity with at least one movable wall or deflectable wall. Constructive interference within the optical cavity determines the color of visible light emerging from the cavity. Typically, when a movable wall of at least partially metal moves toward the stationary front surface of the cavity, the light interference in the cavity is modulated and the modulation is the color of the light appearing in front of the modulator. Affects. When the interference modulator is a direct-viewing device, the front surface is typically the surface on which the image seen by the viewer appears.

FIG. 1 illustrates a network system according to one embodiment. Server 2, such as a web server, is operably connected to network 3. The server 2 can correspond to a web server, a mobile phone server, a wireless e-mail server, or the like.

Network 3 can include wired or wireless networks such as WiFi networks, mobile phone networks, Bluetooth networks and the like. Network 3 can be operably connected to a wide variety of devices. Examples of devices that can be connected to Network 3 are wireless handheld devices such as laptop computers, BlackBerry, Palm Pilot, pocket PCs, and web-enabled mobile phones, smartphones (Smartphones). ) Etc. Includes a computer such as the Personal Digital Assistant (PDA) 5, which can include a form phone 6. Many other devices such as desktop PCs, set-top boxes, digital media players, handheld PCs, global positioning system (GPS) navigation devices, car displays or other static and mobile displays can be used. For convenience of discussion, all of these devices are collectively referred to here as client device 7.

One bistable display element embodiment consisting of an interfering MEMS display element is illustrated in FIG. In these devices, the pixels are in a bright or dark state. In the bright (on or open) state, the display element reflects most of the visible light incident on the user. In dark conditions (off or closed), the display element reflects very little visible light incident on the user. Depending on the embodiment, the light reflection characteristics in the "on" state and the "off" state may be reversed. To enable color display in addition to black and white, MEMS pixels can be configured to be largely reflective at the selected color.

FIG. 2 is an isometric view illustrating two adjacent pixels in a series of pixels of a visual display device, where each pixel comprises a MEMS interference modulator.

In some embodiments, the interference modulator display comprises a row / column array of these interference modulators. Each interference modulator contains a pair of reflective layers that are variable and located at controllable distances from each other, forming a resonant optical cavity with at least one variable size. In one embodiment, one of the reflective layers can move between the two positions. In the first position, the movable layer, referred to here as the released state, is located at a relatively distant distance from the fixed partially reflective layer. In the second position, the movable layer is located closer and adjacent to the partially reflective layer. The incident light reflected from the two layers interferes positively (constructively) or passively (destructively) depending on the position of the movable reflective layer, and is totally reflected or non-reflected for each pixel. Make one of.

The illustrated portion of the pixel array of FIG. 2 contains two adjacent coherent modulators 12a and 12b. In the interference modulator 12a on the left, the movable and highly reflective layer 14a is illustrated at a released position at a predetermined distance from the fixed partially reflective layer 16a. In the interference modulator 12b on the right, the movable high-reflection layer 14b is illustrated in an actuated position adjacent to the fixed partial reflection layer 16b.

The partially reflective layers 16a, 16b are electrically conductive, partially transparent and fixed, for example, each having one or more layers of chromium and indium-tin-oxide on the transparent substrate 20. It may be manufactured by depositing on. The layers can be patterned into parallel stripes to form row electrodes in the display device as further described below. The high-reflection layers 14a and 14b are the interpositions deposited between the deposited metal layer or group of metals (orthogonal to the row electrode, partial reflection layers 16a and 16b) and the support member 19 deposited on the support material. It may be formed as a series of parallel strips of sacrificial material. When the sacrificial material is etched and removed, the deformable metal layer is separated from the fixed metal layer by a defined air gap 19. A highly conductive and reflective material such as aluminum can be used as a deformable layer, and these stripes can form column electrodes in a display device.

In the absence of the applied voltage, the air gap 19 is maintained between the layers 14a and 16a, and the deformable layer is in a mechanically relaxed state as illustrated by the interferometer 12a of FIG. However, when a potential difference is applied to the selected rows and columns, the capacitors formed at the intersections of the row and column electrodes at the corresponding pixels are charged and electrostatic forces attract the electrodes together. If the voltage is high enough, the moving layer is deformed and pressed against the fixed layer as shown by the interference modulator 12b on the right side of FIG. 2 (a dielectric material not shown in this figure is on the fixed layer. May deposit on, prevent short circuits and control separation distance). This movement is the same regardless of the polarity of the applied potential difference. In this way, the row / column actuation capable of controlling the reflective vs. nonreflection interference modulator state is similar to many methods used in conventional LCD and other display techniques.

Figures 3-5 illustrate one exemplary process and system for using an array of interference modulators in display applications. However, processes and systems can also be applied to other displays such as plasma, EL, OLED, STN LCD, and TFT LCD.

Currently available flat panel display controllers and drivers have been designed to work almost exclusively with displays that need to be constantly refreshed. So, for example, images displayed on plasma, EL, OLED, STN LCD and TFT LCD panels will disappear in a matter of seconds if not refreshed multiple times within a second. However, the type of interference modulator described above has the ability to hold its state for a longer period of time without refreshing, so the state of the interfering modulator can be either of the two states without refreshing. It may be maintained in the crab. A display that uses an interference modulator is called a bistable display. In one embodiment, the state of the pixel element is maintained by applying a bias voltage, sometimes referred to as a latch voltage, to one or more interference modulators containing the pixel element.

In general, display devices typically require one or more controller and driver circuits for proper control of the display device. For example, a driver circuit, such as a driver circuit used to drive an LCD's, may be bonded directly to the edge of the display panel itself or may be placed along the edge of the display panel itself. Alternatively, the driver circuit may be mounted on a flexible circuit element that connects the display panel (at its edge) to the rest of the electronic system.

In either case, the driver is typically located at the interface between the display panel and the rest of the electronic system.

FIG. 3A is a system block diagram illustrating some embodiments of an electronic device that can incorporate various perspectives. In an exemplary embodiment, the electronic device includes a processor 21. The processor 21 is any general purpose single-chip or multi-chip microprocessor, such as ARM, Pentium®, Pentium II®, Pentium III®, Pentium IV®, Pentium (registered trademark). A registered trademark) Pro, 8051, MIPS®, Power PC®, ALPHA®, or any special purpose microprocessor such as a digital signal processor, microcontroller, or programmable gate array. You can. As is customary in the art, processor 21 may be configured to execute one or more software modules. In addition to running the operating system, the processor may be configured to run one or more software applications, including web browsers, phone applications, email programs or any other software application.

FIG. 3A illustrates an embodiment of an electronic device including a network interface 27 connected to a processor 21. And according to some embodiments, the network interface can be connected to the array driver 22.

The network interface 27 includes suitable hardware and software so that the device can interact with other devices via a network, eg, server 2 shown in FIG. The processor 21 is connected to the driver controller 29. The driver controller 29 is connected to the array driver 22 and the frame buffer 28. In some embodiments, the processor 21 is also connected to the array driver 22. The array driver 22 is connected to the display array 30 and drives the display array 30. In FIG. 3A, the illustrated components illustrate the configuration of an interferometer display. However, this configuration can also be used in LCDs with an LCD controller and driver. As illustrated in FIG. 3A, the driver controller 29 is connected to the processor 21 via the parallel bus 36. Driver controllers 29, such as LCD controllers, are often associated with system processors 21 as stand-alone integrated circuits, but such controllers may be implemented in many ways. They may be embedded in the processor 21 as hardware, embedded in the processor 21 as software, or fully integrated in hardware using the array driver 22. In one embodiment, the driver controller 29 takes the display information generated by the processor 21, appropriately reformates the information for high speed transmission to the display array 30, and sends the formatted information to the array driver 22. ..

Array driver 22 receives formatted information from driver controller 29 and video data into a parallel waveform set that is applied multiple times per second to hundreds and sometimes thousands of leads coming from the xy matrix of display pixels. Reformat. Currently available flat panel display controllers and drivers, such as those just mentioned, have been designed to work almost exclusively with displays that need to be constantly refreshed. Since bistable displays (eg, arrays of interference modulators) do not require such constant refresh, features that reduce power requirements may be achieved through the use of bistable displays. However, if the bistable display is operated by the controller and driver used with the current display, the benefits of the bistable display may not be optimized. Therefore, improved controller and driver systems and methods for use in bistable displays are desired. For fast bistable displays such as the interference modulators mentioned above, these improved controllers and drivers preferably facilitate the inherent capabilities of low refresh rate modes, video rate refresh modes, and bistable modulators. Implement a unique mode for doing so. According to the methods and systems described herein, the bistable display may be configured in various ways to reduce power requirements.

In one embodiment illustrated in FIG. 3A, the array driver 22 receives video data from the processor 21 via a data link 31 that bypasses the driver controller 29. The data link 31 may include a serial peripheral interface (SPI), an I2C bus, a parallel bus, or any other available interface. In one embodiment shown in FIG. 3A, the processor 21 supplies the array driver 22 with instructions that allow the array driver 22 to optimize the power requirements of the display array 30 (eg, an interferometer display). In one embodiment, video data targeted at, for example, a portion of the display defined by the server 2 can be identified by the data packet header information and can be transmitted via the data link 31. In addition, the processor 21 is graphically primitive to the array driver 22 along the data link 31. You can send a primitive like primitive). These graphical primitives can correspond to a set of instructions such as primitives for drawing shapes and text.

Further referring to FIG. 3A, in one embodiment, video data may be supplied from the network interface 27 to the array driver 22 via the data link 33. In one embodiment, network interface 27 analyzes control information that determines whether incoming video sent from server 2 must be sent to processor 21 or optionally array driver 22. ..

In one embodiment, the video data supplied by the data link 33 is not stored in the framebuffer 28, as is usually the case in many embodiments. It will be appreciated that in some embodiments, video data can be provided for the array driver 22 using a second driver controller (not shown). Datalink 33 may include SPI, I2C bus or any other available interface. The array driver 22 can further include address decoding, row and column drivers for display, and the like. The network interface 27 can further, at least in part, supply the video data directly to the array driver 22 in response to instructions embedded within the video data supplied to the network interface 27. Arbiter logic It will be appreciated by those skilled in the art that logic) can be used to control access by the network interface and processor 21 to prevent data collisions in the array driver 22. In one embodiment, the driver running on the processor 21 data during a period that is typically unused by the processor 21, such as the period traditionally used for vertical and / or horizontal blanking delays. By enabling the transfer, the timing of data transfer from the network interface 27 to the array driver 22 is controlled.

Advantageously, this design allows Server 2 to bypass Processor 21 and Driver Controller 29 and directly address parts of Display Array 30. For example, in the illustrated embodiment, this allows the server 2 to directly address the predefined display array area of the display array 30. In one embodiment, the amount of data communicated between the network interface 27 and the array driver 22 is relatively slow, with a serial bus such as an integrated circuit (I2C) bus or a serial peripheral interface (SPI) bus. Communicated using. However, it will also be appreciated that other circuits are typically used when other types of displays are used. The video data provided by the data link 33 can be advantageously displayed without the framebuffer 28 and with little intervention from the processor 21.

FIG. 3A further illustrates the configuration of a processor 21 connected to a driver controller 29, such as an interference modulator controller. The driver controller 29 is connected to the array driver 22. The array driver 22 is connected to the display array 30. In this embodiment, the driver controller 29 addresses the display array 30 optimization and supplies information to the array driver 22 without the need for a separate connection between the array driver 22 and the processor 21. In certain embodiments, the processor 21 can be configured to communicate with the driver controller 29. The driver controller 29 can include a frame buffer 28 for temporary storage of one or more frames of video data.

As shown in FIG. 3A, in one embodiment, the array driver 22 includes a row driver circuit 24 and a column driver circuit 26 that supply signals to the pixel display array 30. The cross section of the array illustrated in FIG. 2 is shown by line 1-1 in FIG. 3A. For MEMS interferometric modulators, the row / column operating protocol may utilize the hysteresis characteristics of these devices illustrated in FIG. 4A. For example, it may require a potential difference of 10 volts to transform the moving layer from the released state to the actuated state. However, when the voltage is reduced from that value, the moving layer maintains its state as a voltage that recedes below 10 volts. In the exemplary embodiment of FIG. 4A, the moving layer does not fully release until the voltage drops below 2 volts. Therefore, in the example illustrated in FIG. 4A, there is a voltage range of about 3 to 7 volts. There is a window of applied voltage that stabilizes the device in either the released or actuated state. This is referred to herein as the "hysteresis window" or "stabilization window".

For a display array with the hysteresis characteristic of Figure 4A, the pixels in the strobe row that are actuated during the row strobing are exposed to a voltage difference of about 10 volts and the released pixels have a voltage difference near zero volts. Row / column actuation protocols can be designed to be exposed. After the strobe, the pixels are exposed to a steady-state voltage difference of about 5 volts so that the row strobe keeps the pixels in place. After being written, each pixel sees a potential difference within a 3-7 volt "stable window" in this example. This feature stabilizes the pixel design illustrated in FIG. 2 under the same applied voltage conditions, either in the actuated or pre-released state. This stable state is within a hysteresis window with little wattage loss, as each pixel of the interference modulator, whether actuated or released, is essentially a capacitor formed by a fixed and moving reflective layer. It can be held by voltage. In essence, when the applied voltage is fixed, no current flows through the pixels.

In a typical application, the display frame may be created by asserting a set of column powers according to the desired set of actuating pixels in the first row. The row pulse is then applied to the row 1 electrode and activates the pixel corresponding to the asserted column line. The asserted set of column electrodes is then modified to correspond to the desired set of actuated pixels in the second row. The pulse is then applied to the row 2 electrodes and actuates the appropriate pixels in row 2 according to the asserted column electrodes. Row 1 pixels are unaffected by row 2 pulses and remain set during the row 1 pulse period. This may be repeated for the entire series of rows in a sequential way to generate frames. In general, frames are refreshed and / or updated with new video data by constantly repeating this process at a desired number of frames per second. In addition, various protocols that drive the row and column electrodes of the pixel array to generate display array frames are also well known and may be used.

One embodiment of client device 7 is shown in FIG. 3B. A typical client 40 includes a housing 41, a display 42, an antenna 43, a speaker 44, an input device 48 and a microphone 46. The housing 41 is generally molded from any of a variety of manufacturing processes well known to those of skill in the art, including injection molding and vacuum forming. Further, the housing 41 may be made of any of a variety of materials, including, but not limited to, plastic, metal, glass, rubber, and pottery, or a combination thereof. In one embodiment, the housing 41 includes a removable portion (not shown) that may be replaced with another removable portion containing a different color or a different logo, image, or symbol.

The display 42 of a typical client 40 may be any of a variety of displays, including bistable displays, as described herein with respect to FIGS. 2, 3A and 4-6, for example. In other embodiments, as is well known to those skilled in the art, the display 42 may be a flat panel display such as a plasma, EL, OLED, STN LCD or TFT LCD, or a CRT or other, as described above. Includes non-flat panel displays such as tube devices. However, for the purposes of describing this embodiment, the display 42 includes an interferometer display, as described herein.

The components of one embodiment of a typical client 40 are schematically illustrated in FIG. 3C. The illustrated exemplary client 40 includes a housing 41, which can include at least additional components partially enclosed therein. For example, in one embodiment, the exemplary client 40 includes a network interface 27 that includes an antenna 43 connected to a transceiver 47. Transceiver 47 is connected to processor 21. Processor 21 is connected to tuning hardware 52. The tuning hardware 52 is connected to the speaker 44 and the microphone 46. Processor 21 is also connected to input device 48 and driver controller 29. The driver controller 29 is connected to the frame buffer 28 and the array driver 22. The array driver 22 is then connected to the display array 30. The power supply 50 powers all the components required by the particular example client 40 design.

Since the network interface 27 includes the antenna 43 and the transceiver 47, the exemplary client 40 can communicate with other devices via the network 3, for example the server 2 shown in FIG. In one embodiment, the network interface 27 may have some processing power that further reduces the requirements of the processor 21. Antenna 43 is any antenna known to those of skill in the art that transmits and receives signals. In one embodiment, the antenna is IEEE Sends and receives RF signals according to the IEEE 802.11 standard, including 802.11 (a), (b) or (g). In other embodiments, the antenna transmits and receives RF signals according to the BLUETOOTH standard. In the case of mobile phones, the antenna is designed to receive CDMA, GSM, AMPS or other known signals used to communicate within the wireless mobile phone network. Since the transceiver 47 processes the signal received from the antenna 43 in advance, the signal is received by the processor 21 and further processed by the processor 21. Since the transceiver 47 also processes the signal received from the processor 21, the signal may be transmitted from the exemplary client 40 via the antenna 43.

The processor 21 generally controls the overall operation of the exemplary client 40, but the operation control may be shared with server 2 (not shown) or server 2 as described in more detail below. May be given to. In one embodiment, the processor 21 includes a microcontroller, CPU, or logical unit to control the operation of the exemplary client 40. The tuning hardware 52 generally includes an amplifier and a filter to send the signal to the speaker 44 and to receive the signal from the microphone 46. The tuning hardware 52 may be a discrete component within the exemplary client 40, or it may be embedded within the processor 21 or other component.

The input device 48 allows the user to control the operation of the exemplary client 40. In one embodiment, the input device 48 includes a QWERTY keyboard or phone keypad, buttons, switches, touch-sensitive screens, and keypads such as pressure or heat sensitive thin films. In one embodiment, the microphone is an input device for the exemplary client 40. When a microphone is used to enter data into the device, voice commands may be provided by the user to control the behavior of the exemplary client 40.

In one embodiment, the driver controller 29, array driver 22 and display array 30 are suitable for any of the display types described herein. For example, in one embodiment, the driver controller 29 is a conventional display controller or a bistable display controller (eg, an interference modulator controller). In another embodiment, the array driver 22 is a conventional driver or bistable display driver (eg, an interference modulator display). In yet another embodiment, the display array 30 is a typical display array or bistable display array (eg, a display that includes an array of interference modulators).

The power source 50 is one of a variety of technically well-known energy storage devices. For example, in one embodiment, the power source 50 is a secondary battery such as a nickel cadmium battery or a lithium ion battery. In another embodiment, the power source 50 is a renewable energy source, condenser or solar cell, including plastic solar cells and solar cell paint. In another embodiment, the power source 50 is configured to receive power from a wall outlet.

In one embodiment, the array driver 22 shall display the input video stream in an interlaced and interlaced format on a bistable display without converting the video stream to a progressively scanned format. To indicate that it must, the array driver 22 includes a register that may be set to a predefined value. Thus, the bistable display does not require the conversion of interlaced video data from interlaced to gradual scanning.

In some practices, there is control programmable potential for display controllers that can be placed in several locations in the electronic display system, as described above. In some cases, control programmable potential resides in the array driver 22 located at the interface between the electronic display system and the display component itself. Those skilled in the art will recognize that the optimizations described above may be performed on any number of hardware and / or software components and in various configurations.

In one embodiment, the circuits are array drivers to take advantage of the fact that the output signal set of most graphics controllers contains signals that depict the horizontal active area of the addressed display array 30. Embedded in 22. This horizontal active area can be set via the register settings in the driver controller 29. These register settings can be changed by processor 21. This signal is usually designated as Display Enable (DE). In addition, almost all display video interfaces utilize line pulse (LP) or horizontal sync (HSYNC) signals to mark the end of a line of data. The circuit counting LP can determine the vertical position of the current row. When the refresh signal is conditioned on the DE from processor 21 (signaling for the horizontal region) and on the LP counter circuit (signaling for the vertical region), the area update function can be performed.

In one embodiment, the driver controller 29 is integrated with the array driver 22. Such embodiments are common in highly integrated systems such as mobile phones, watches and other small area displays. The specialized circuitry within such an integrated array driver 22 first determines which pixels and therefore the rows need refreshing, and only those rows with modified pixels to update. select. Using such circuits, specific rows can be addressed in a non-sequential order based on varying according to the image content. This embodiment has the advantage that the data rate can be reduced between the processor 21 and the display array 30 because only the modified video data needs to be sent through the interface. Reducing the effective data rate required between processor 21 and array driver 22 improves power consumption, noise margin and electromagnetic interference problems for the system.

Figures 4 and 5 show one possible operating protocol for creating display frames on the 3x3 array of Figure 3. FIG. 4B illustrates a possible set of columns and row voltage levels that may be used for the pixels showing the hysteresis curve of FIG. 4A. In Figure 4A / 4B embodiments, actuating pixels may include setting the appropriate columns to -Vbias and the appropriate rows to + ΔV. This may correspond to -5 volts and +5 volts, respectively. Pixel release + Vbias with appropriate columns It may be achieved by setting to, setting the appropriate row to the same + ΔV, and creating a zero volt potential difference in the pixels. In these rows, where the row voltage is held at 0 volts, the pixels are stable in whatever state they were originally in, regardless of whether the columns are + Vbias or -Vbias. Similarly, actuating pixels may include setting the appropriate columns to + Vbias and the appropriate rows to -ΔV. This may correspond to 5 volts and -5 volts, respectively. Pixel release may be achieved by setting the appropriate columns to -Vbias, the appropriate rows to the same -ΔV, and creating a zero volt potential difference for the pixels. In these rows, where the row voltage is held at 0 volts, the pixels are stable in whatever state they were originally in, regardless of whether the columns are + Vbias or -Vbias.

FIG. 5B is a timing diagram showing a series of row and column signals applied to the 3x3 array of FIG. 3A that will result in the display arrangement illustrated in FIG. 5A. In this case, the actuated pixel is not reflected. Before writing the frame illustrated in Figure 5A, the pixels can be in any state. And in this example, all rows are 0 volt and all columns are +5 volt. Due to these applied voltages, all pixels are stable in the actuated or released state in which they are present.

In the frame of FIG. 5A, pixels (1,1), (1,2), (2,2), (3,2) and (3,3) are actuated. To achieve this, during the "line time" period for row 1, columns 1 and 2 are set to -5 volts and column 3 is set to +5 volts. This does not change the state of any pixel, as all pixels remain in the 3-7 volt stability window. Row 1 is then strobed with a pulse that rises from 0 to 5 volts and returns to zero. It activates (1,1) and (1,2) pixels and releases (1,3) pixels. Other pixels in the array are unaffected. To set row 2 as desired, column 2 is set to -5 volts and columns 1 and 3 are set to +5 volts. The same strobe applied in row 2 will then actuate pixel (2,2) and release pixels (2,1) and (2,3). Again, the other pixels in the array are unaffected. Row 3 is similarly set by setting columns 2 and 3 to -5 volts and column 1 to +5 volts. The row 3 strobe sets the row 3 pixels as shown in Figure 5A. After writing the frame, the row potential is 0. Also, the column potential can be maintained at +5 or -5 volts. Therefore, the display is stable in the arrangement shown in FIG. 5A. It will be appreciated that the same procedure can be used for dozens or hundreds of row and column arrays. The timing, sequence, and level of voltage used to perform row and column actuation can vary widely within the general principles outlined above. And the above example is merely an example, and any actuation voltage method can be used.

The structural details of an interference modulator that operates according to the principles described above may vary widely. For example, FIGS. 6A-6C illustrate three different embodiments of the moving mirror structure.

FIG. 6A is a cross section of the embodiment of FIG. 2 in which a piece of reflective material 14 is deposited on the orthogonal support 18. In FIG. 6B, the reflective material 14 is attached to the support 18 only at the corners of range 32. In FIG. 6C, the reflective material 14 is suspended from the deformable layer 34. The structural design and material used for the reflective material 14 can be optimized for optical properties, and the structural design and material used for the deformable layer is optimized for the desired mechanical properties. This embodiment has advantages because it can be. The production of various types of interferometers is described in various published applications, including, for example, US published application 2004/0051929. A wide variety of well-known techniques may be used to generate the structures described above, including a series of material deposition, patterning, and etching steps.

An embodiment of the process flow is shown in FIG. Figure 7 shows a high-level flowchart of the client device 7 control process. This flowchart is by a client device 7, such as a laptop computer 4, PDA5 or mobile phone 6, connected to network 3 to graphically display the video data received from server 2 over network 3. Describe the process used. Depending on the embodiment, the state of FIG. 7 can be removed, added, or rearranged.

Referencing FIG. 7 again, starting in state 74, client device 7 sends a signal over network 3 to server 2 indicating that client device 7 is ready for video. In one embodiment, the user may initiate the process of FIG. 7 by turning on an electronic device such as a mobile phone. Following state 76, client device 7 begins its control process. An example of initiating a control process is discussed further with reference to Figure 8.

An embodiment of the process flow is shown in FIG. FIG. 8 shows a flowchart of the control process of the client device 7 for starting and executing the control process. This flowchart illustrates in more detail the state 76 discussed with reference to FIG. Depending on the embodiment, the state of FIG. 8 can be removed, added, or rearranged.

Starting in decision state 84, client device 7 requires an application on client device 7 where actions on client device 7 are initiated, or server 2 has sent an application to client device 7 for execution. Or determine if server 2 has sent a request to client device 7 to run an application that resides on client device 7. If the application does not need to be started, client device 7 remains in decision state 84. After starting the application, continuing in state 86, the client device 7 starts the process, which causes the client device 7 to receive and display the video data. Video data may flow from Server 2 or may be downloaded to Client Device 7 memory for later access. The video data can be video, still image, or text or image information. Video data can also have various compression codings, can be interlaced or progressively scanned, and can have a variety of varying refresh rates. The display array 30 can be divided into areas of any shape and size. Each region receives characteristic video data. For example, a refresh rate or compression coding specific to that region only. Regions may change video data characteristics and shape and size. The area may be opened and closed and reopened. In addition to the video data, the client device 7 can also receive control data. The control data can include commands from server 2 to client device 7 regarding video data characteristics such as compression coding, refresh rate, and video data that is interlaced or progressively scanned. The control data gives instructions to the division of the display array 30 and different areas of the display area 30.

In one exemplary embodiment, server 2 sends control and video data over the wireless network 3 to the PDA to generate a continuously updating clock in the upper right corner of the display array 30 and in the upper left corner of the display array 30. Generate image slideshows, generate periodically updated scores for ball games along the lower areas of the display array 30, and cloud shapes to buy pans that scroll continuously across the display array 30. Generate a bubble reminder. The video data for the photo slide show is downloaded and resides in the PDA memory. And the video data is in an interlaced format. The clock and ball game video data flow the text from server 2. Reminders are text with graphics and a progressively scanned format. It is understood that what is presented herein is merely an exemplary embodiment. Other embodiments are possible, contained by state 86, and are within the scope of this discussion.

Continuing to decision state 88, client device 7 looks for a command to relocate the area of display array 30, a command to change the refresh rate of the area of display array 30, or a command to stop. Upon receiving a command from server 2, client device 7 advances to decision state 90 and determines if the command received in decision state 88 is a command to abort. In decision state 90, if the command received in decision state 88 is determined to be a command to abort, client device 7 continues state 98, stops execution of the application, and resets. The client device 7 may also communicate status or other information to server 2 and / or receive such similar communication from server 2. In decision state 90, client device 7 returns to state 86 if it is determined in decision state 88 that the command received from server 2 is not a command to abort. In decision state 88, if no command is received from server 2, client device 7 proceeds to decision state 92, and client device 7 either stops updating the area of display array 30 or aborts. Look for commands from the user, such as commands for. In decision state 92, if client device 7 does not receive a command from the user, client device 7 returns to decision state 88. If a command is received from the user in decision state 92, client device 7 proceeds to decision state 94, and client device 7 determines whether the command received in decision state 92 is a command to abort. To do. In decision state 94, the client device 7 proceeds from decision state 94 to state 96 if the command received in decision state 92 from the user is not a command to abort. In state 96, client device 7 , Sends a user command to server 2, such as a command received in state 92, to stop updating the area of display array 30, and then returns to decision state 88. In decision state 94, if the command received from the user in decision state 92 is determined to be a command to abort, client device 7 continues state 98 and stops running the application. The client device 7 may also communicate status or other information to server 2 and / or receive such similar communication from server 2.

FIG. 9 shows the control process in which server 2 sends video data to client device 7. Server 2 sends control information and video data to client device 7 for display. Depending on the embodiment, the state of FIG. 9 can be removed, added, or rearranged.

In state 124, server 2 is started, in embodiment (1) it waits for a data request from client device 7 over network 3, and in alternative embodiment (2) server 2 is a client. Send video data without waiting for a data request from device 7. The two embodiments include scenarios in which either Server 2 or Client Device 7 may initiate a request for video data transmitted from Server 2 to Client Device 7.

Following the decision state 128, the server 2 determines whether or not a response (ready display signal) from the client device 7 indicating that the client device 7 is in the ready state has been received. If the ready display signal is not received in state 128, the server 2 remains in the determined state 128 until the ready display signal is received.

Upon receiving the ready display signal, server 2 proceeds to state 126, where server 2 sends control data to client device 7. Control data may flow from server 2 or may be downloaded to client device 7 memory for later access. The control data may divide the display array 30 into regions of any shape and size, or define video data characteristics such as refresh rates or interlaced formats for specific regions or all regions. Good. The control data may be opened, closed, or reopened.

Following state 130, server 2 sends video data. The video data may be streamed from Server 2 or downloaded to Client Device 7 memory for later access. The video data can include moving images, still images, text images, or images. Video data can also have a variety of compression codings, can be interlaced or progressively scanned, and can have a variety of and varying refresh rates. Each region may receive video data with characteristics such as refresh rate or compression coding that are unique to that region only.

Server 2 proceeds to decision state 132, where server 2 is like a command to stop updating the area of display array 30, a command to increase the refresh rate, or a command to stop. , Look for commands from the user. In decision state 132, server 2 receives a command from the user and server 2 proceeds to state 134. In state 134, server 2 executes the command received from the user in state 132 and then moves to decision state 138. In decision state 132, if server 2 does not receive a command from the user, server 2 proceeds to decision state 138.

In state 138, server 2 performs actions by client device 7, such as receiving and storing video data to be displayed later, increasing the data transfer rate, or the next set of video data in interlaced format. Determine if an act of anticipation is necessary. In decision state 138, server 2 determines that an action by the client is required, server 2 proceeds to state 140, where server 2 sends a command to client device 7 to perform the action. After that, server 2 goes to state 130. In decision state 138, if server 2 determines that no action by the client is required, server 2 proceeds to decision state 142.

Following the decision state 142, the server 2 decides whether to terminate the data transfer. In decision state 142, server 2 decides not to end the data transfer and server 2 returns to state 130. In decision state 142, server 2 decides to end the data transfer, server 2 proceeds to state 144, where server 2 ends the data transfer and sends a abort message to the client. Server 2 may further convey status or other information to client device 7 and / or may receive such similar communications from client device 7.

FIG. 10 shows an exemplary partial system diagram of an embodiment of client device 7. In this case, the driver controller 29 does not use the framebuffer 28 for at least one portion of the video data. In the illustrated embodiment, the driver controller 29 has a first interface 202 and a second interface 204. The processor 21 may send video data to either the first interface 202 or the second interface 204 via the dual port bus 206. The video data received via the first interface 202 is stored in the frame buffer 28. The video data received via the second interface 204 is sent directly to the array driver 22 for immediate display on the display array 30 regardless of the frame buffer 28. Client device 7 can receive video data from server 2 by the process described above with respect to FIGS. 7-9. In one embodiment, the processor 21 determines whether video data should be transmitted to either the first interface 202 or the second interface 204 based on the control information provided by the server 2.

In one embodiment, given the bistable nature of the display array 30, it is not necessary to refresh the image displayed by the display area 30 in order to maintain the displayed image. Also, the framebuffer 28 may not be needed to store the video data received via the first interface 202. In this embodiment, the video data is transmitted to the display by the driver controller 29 immediately after it is received and regardless of any predetermined refresh period.

The driver controller 29 is communicating with the processor 21. The driver controller 29 can also communicate with another device, such as network interface 27. For example, processor 21 and / or network interface 27 can be configured to send packets of video data to either the first interface 202 or the second interface 204. The video data can correspond to raw graphic data and / or basic graphics for interpretation through a direct interface.

In one embodiment, the video data received via the first interface 202 is targeted for display on the first region of the display array 30. Also, the video data received via the second interface 204 is targeted for display on the second region of the display array 30. Regions may be defined during manufacturing, or optionally dynamically defined by driver controller 29, processor 21 or server 2 (Figure 1). For example, the display array 30 can be distributed between the first part for displaying the content from the client device 7 and the second part for displaying the content from the server 2. For example, content from server 2 can include stock quotes, traffic alerts, news, while content from client device 7 can include indications of remaining battery life or received signal strength. In one embodiment, the arbiter 208 schedules access to the array driver 22. For example, the arbiter 208 can allow the video data from the first interface 202 to be transmitted to the first part of the display array 30, and then display the video data from the second interface 204. It can be made transmittable to the second part of the array 30.

In one embodiment, the dedicated bus is provided for the first interface 202 and the second interface 204. In this embodiment, the first interface 202 or the second interface 204 can be directly connected to either the processor 21 or the network interface 27 (FIG. 3A). Depending on the embodiment, the location and size of the area of the display array 30 may be adjusted by the end user of the client device and / or the server 2. Further, the regions may overlap. That is, one area covers the overlapping portion of the underlying area designated to be on top of the other.

In some embodiments, the arbiter 208 resolves an access conflict for the array driver 22 between the first interface 202 and the second interface 204, maintaining and applying data and / or address hold times. As a matter of fact, a handshake function that limits the data transfer speed may or may not be provided. If necessary, the arbiter 208 communicates with the processor 21 via a control link 207 to manage such handshake functionality. In the illustrated embodiment, the arbiter 208 communicates with the display array 30 via the array driver 22. In other embodiments, the arbiter 208 may be integrated into the array driver 22.

One embodiment further comprises a circuit configured to schedule access to the display array 30. For example, if the display array 30 is split, different parts of the display array 30 can have different refresh rates and different update techniques. For example, the first part of the bistable display array 30 can be addressed line by line, and the second part of the display array 30 can be addressed in a pixel-by-pixel manner.

Figure 11 is located in one embodiment of a client device 7, may be used to sense the state of the display array 30, there Component is a block diagram illustrating the cement. Client device 7 includes a short pulse generator 250 and a pulse sensing circuit 254. The state of the pixels in the display array 30 is determined using a short pulse generator 250 and pulse sensing circuit 254. In one embodiment, the short pulse generator 250 and the pulse sensing circuit 254 are integrated into a single component.

Determining the pixel state of display area 30 determines the image that will be displayed if client device 7 may then not have a framebuffer to store the data for the graphic image transferred to the display. It can be a useful feature to give. The state of the pixels in the display array 30 is determined using the pulse sensing circuit 254. In one embodiment, the display array 30 includes an interferometer display. In another embodiment, the display array 30 includes a thin film transistor (TFT) display. Furthermore, it should be noted that, at least in one embodiment of the electrophoretic display, an active matrix substrate with a TFT is also used to control the display.

In one embodiment, the display controller 29 determines the state of one or more pixels in the display array 30 to update the displayed graphic image. One example of modifying the content of a graphic image to update the image is to lighten or darken the area. Brightening or darkening the area can be achieved, for example, by activating relatively more pixels or selectively activating relatively few pixels of the display array 30 in the area of interest. ..

As previously discussed, in one embodiment, the stable state of the display array 30 is maintained by maintaining a bias on the display array 30. Mirrors placed approximately adjacent to the intersection of the corresponding row line and the corresponding column line can be biased by a line (conductor) within the selected voltage range to maintain the state of the mirror.

The short pulse generator 250 is configured to modulate at least one of the column and / or row lines containing the modulation element of interest. Apply a pulse of appropriate size and for a relatively short period of time to the selected row or column without interfering with or changing the state of the modulator connected to the selected amount or column. be able to. The pulse sensing circuit 254 monitors the column or row line that is also connected to the modulation element of interest. The pulse sensing circuit detects the amplitude of the signal reflected from the modulation element of interest. Such amplitude depends on the state of the modulation element of interest and can reveal the state of the modulation element. The coupling between the applied and reflected pulses is highly dependent on the state of the modulation element. High level coupling is associated with the modulation element in the collapsed state. In this case, the two mirrors of the modulation element are in close proximity. The low level coupling is associated with the modulation element in the released state. In this case, the two mirrors of the modulation element are relatively far apart from each other.

If multiple mirrors in the subarray are used to represent pixels, the remaining mirrors can query as well. Then, the searched state of the mirror can be mapped to clarify the original state of the pixel. In one embodiment, the mirrors are modulated in parallel and monitored to speed up the detection process. For example, row lines can carry relatively short pulses. You can also monitor multiple column lines to determine the status of the corresponding mirrors connected to the active row line at the same time.

FIG. 12 is a flowchart illustrating an exemplary process of processing data in the driver controller 29 of FIG. Further states may be added depending on the embodiment. Others may be removed and the order of states may be rearranged. Starting from state 300, a decision is made as to whether to send data to either the first interface 202 or the second interface 204 of the driver controller. This decision may be made by processor 21, network interface 27 (Figure 3A) or server (Figure 2). If the video data is transmitted to the first interface 202, the video data is received by the driver controller 29 in state 304 and stored in the framebuffer 28. Following state 306, the driver controller 29 periodically displays the video data in the framebuffer 28 on the display array 30. With reference to the decision state 300 again, if the video data is sent to the second interface 204, the driver controller 29 receives the video data and sends the video data directly to the array driver 22 for display on the display array 30. Send (state 308). In one embodiment, data received through the second interface bypasses the framebuffer 28.

Although the above detailed description has shown, described and pointed out novel features that apply to various embodiments, various omissions, alternatives, format changes, device or process detail changes are described and made in the present invention. It will be understood that one of ordinary skill in the art may do so without departing from the spirit. As will be appreciated, the present invention does not provide all of the features and benefits described herein, as some features may be used or implemented separately from others. It may be embodied in the form.

<figref num="1">FIG. 1 illustrates a network system of one embodiment.</figref><figref num="2">FIG. 2 depicts a portion of an embodiment of an interference modulator display array in which the movable reflective layer of the first interferometric modulator is in the open position and the movable reflective layer of the second interferometric modulator is in the actuate position. It is an isometric projection.</figref><figref num="3A">FIG. 3A is a system block diagram illustrating an embodiment of an electronic device incorporating a 3x3 interference modulator display array.</figref><figref num="3B">FIG. 3B is an explanatory diagram of an embodiment of the client of the server-based wireless network of FIG.</figref><figref num="3C">FIG. 3C is an exemplary block diagram configuration of the client of FIG. 3B.</figref><figref num="4A">FIG. 4A is a diagram of the applied voltage for an exemplary embodiment of the movable mirror position vs. the interference modulator of FIG.</figref><figref num="4B">FIG. 4B is an explanatory diagram of a set of row and column voltages that may be used to drive an interferometer display array.</figref><figref num="5A">FIG. 5A illustrates one typical timing diagram for row and column signals that may be used to frame the data in the 3x3 interference modulator display array of FIG. 3A.</figref><figref num="5B">Figure 5B illustrates one typical timing diagram for row and column signals that may be used to frame the data in the 3x3 interference modulator display array of Figure 3A.</figref><figref num="6A">FIG. 6A is a cross section of the interference modulator of FIG.</figref><figref num="6B">FIG. 6B is a cross section of an alternative embodiment of the interference modulator.</figref><figref num="6C">FIG. 6C is a cross section of another alternative embodiment of the interference modulator.</figref><figref num="7">Figure 7 is a high-level flowchart of the client control process.</figref><figref num="8">FIG. 8 is a flowchart of the client control process for starting and executing the reception / display process.</figref><figref num="9">FIG. 9 is a flowchart of the server control process for sending video data to the client.</figref><figref num="10">FIG. 10 is a block diagram illustrating an exemplary driver controller according to one embodiment.</figref><figref num="11">FIG. 11 is a block diagram illustrating a system for testing the condition of a display array.</figref><figref num="12">FIG. 12 is a flowchart illustrating the process of processing video data in the driver controller of FIG.</figref>