Display device and driving method thereof

The present invention relates to an active matrix type display device having a plurality of display pixels and performing display control on a pixel-by-pixel basis and a driving method thereof. In particular, an active matrix type in which the display element of each pixel is composed of an organic EL (Electro Luminescence) element. The present invention relates to display devices and their driving methods.

In recent years, as a self-luminous high-brightness display, a thin display device using an organic EL has attracted attention. Since it is self-luminous, it does not require a backlight like a liquid crystal display device, and the entire display panel can be made as thin as 1 to 2 mm, making it possible to reduce the size and weight, and there are no restrictions on the viewing angle, and the response speed is high. It has advantages such as high speed, high brightness, high contrast, and low power consumption, and is considered to be a strong candidate for next-generation displays. Organic EL displays are currently being applied to small displays for mobile devices (portable information devices) such as digital cameras and mobile phones, and are expected to be applied to medium- and large-sized displays such as monitors for PCs and televisions in the future. ing. Since mobile devices can be easily carried indoors or outdoors, it is necessary to realize the optimum display image in various usage environments from dark places such as in a room to bright places such as outdoors in the sun. In addition, since PC monitors and TVs are used in various environments depending on the user, it is necessary to realize the optimum display image. Furthermore, in such an environment, the optimum display image differs depending on each user, and the brightness of the display screen is set so that it can be used by all users, from users who select a bright display image to users who select a dark display image. It is necessary to be able to do it.

Display devices such as CRTs, liquid crystals, and organic EL perform a refresh operation that rewrites the displayed video frame several tens of times per second, and the rewriting frequency of this frame is called the refresh rate. Flicker occurs when this refresh rate is low. Therefore, the refresh rate of these display devices is usually rewritten at a frequency (60 Hz) at which flicker does not occur. By the way, the brightness of the display screen of the liquid crystal display device can be set by the brightness of the backlight, and the brightness of the display screen can be arbitrarily set in order to optimize the usage environment and power consumption. is there. The backlight usually uses a cold cathode fluorescent lamp, and is lit by a high-speed switching drive of tens to hundreds of kHz by an inverter circuit (lamp drive circuit), so the human eye recognizes the blinking of the backlight. It is not possible to provide a good display screen without flicker. Further, the liquid crystal display device inverts the polarity of the voltage applied to the pixel electrodes for each frame with respect to the reference voltage, inverts the polarity for each horizontal pixel line, and inverts the polarity for each display pixel. Flicker is suppressed by the driving method.

On the other hand, the organic EL display device uses a self-luminous display element for each pixel, and emits light by passing a current through each light emitting element to display an image. The brightness of the display screen can be set according to the light emission time occupied in one frame. Therefore, even if the refresh rate of the displayed image is displayed at 60 Hz, flicker (flicker) of the display screen occurs depending on the frequency of the light emission and the ratio (duty ratio) of the light emission time and the non-light emission time in one frame. , The display quality deteriorates. Flicker (flicker) does not occur in the state where the light is constantly emitted (duty 100%), but since it is a hold type drive like a liquid crystal display device, the moving image is blurred when displaying a moving image due to the afterimage of the retina. Image quality deteriorates. Retinal afterimage is a phenomenon that occurs in a hold-type drive display that continues to display images during one frame period, and the brightness changes stepwise each time the image is switched, so the image is always displayed without breaks. Become. When the image displayed on the display is switched to the next image, humans recognize the two images in an overlapping manner, and as a result, the outline of the image seems to be blurred.

In addition, by increasing the refresh rate of the displayed image, flicker does not occur. On a typical display, if you set the refresh rate to about 72Hz, you will hardly feel flicker. However, the operating speed of the drive circuit must be increased, the power consumption increases, and the members used (electronic parts, etc.) and the drive circuit must be significantly changed accordingly. In addition, as the speed increases, energy consumption due to high-speed switching in the digital circuit section of the drive circuit increases, and electromagnetic waves are emitted into the air. Electromagnetic waves emitted into the air include various frequencies and cause various disturbances to electrical and electronic equipment.

<p> The conventional duty drive method that controls the brightness of the display screen by the duty ratio of the light emission time uses a light emission time setting signal. FIG. 3 is a waveform diagram of a vertical synchronization signal and a light emission time setting signal when the refresh rate (frame rewriting frequency) of the displayed image is 60 Hz. It represents the extinguishing time when the non-light emitting period is not displayed, and represents the lighting time when the light emitting period is displayed, and the ratio of the two in one frame is the duty ratio. Since the brightness of the image is finely brightened or darkened in a cycle of 1 frame (1/60 second), the difference in brightness between light and dark is recognized as flicker. Working for a long time on a screen that feels flicker is very bad for the eyes and has an adverse effect on brain fatigue.</p><p> FIG. 4 shows the waveforms of the vertical synchronization signal and the light emission time setting signal when the refresh rate displayed to suppress flicker is set to, for example, 75 Hz. The non-light emitting period represents the extinguishing time when the image is not displayed, the light emitting period represents the lighting time when the image is displayed, and the brightness of the image becomes finely brightened or darkened in a cycle of 1/75 second. However, on a general display, if you set the refresh rate to 72Hz or higher, you will hardly feel flicker, so if you set it to 75Hz, the difference in brightness between non-emission and light emission will not be recognized as flicker. .. However, the operating speed of the drive circuit must be increased, the power consumption increases, and the members used (electronic parts, etc.) and the drive circuit must be significantly changed accordingly. In addition, there is a concern about the problem of EMI due to electromagnetic noise generated from the digital circuit portion of the drive circuit due to the increase in speed.</p><p> When the display brightness is controlled by the duty ratio of the light emission time as a display device in this way, it is indispensable to maintain good display quality without recognizing flicker on the display screen, and the function is realized. There is a problem that must be done.</p>

<p> In view of the above-mentioned problems of the prior art, it is an object of the present invention to easily suppress flicker that occurs in the case of duty drive in which the display brightness is controlled by the duty ratio of the light emission time in a display device such as an organic EL. To do.</p><p> The following measures were taken to achieve this purpose. That is, the present invention includes a pixel array unit, a scan line drive circuit and a data line drive circuit for driving the pixel array unit, and a system circuit for controlling the pixel array unit. The data line drive circuit includes a data line and a pixel composed of a light emitting element arranged at an intersecting portion thereof, and the data line drive circuit is connected to each data line, and a video data signal supplied from the system circuit in frame units. Is supplied to each pixel, the scanning line drive circuit is connected to each scanning line, operates according to a light emission control signal supplied from the system circuit, and the pixels are sequentially selected for each frame to select the image. In a display device that emits light from each light emitting element with a brightness corresponding to a data signal, the system circuit includes a light emitting control means, and a duty ratio of a light emitting time to a non-light emitting time within one frame according to screen brightness information. Is set, each light emitting element is made to emit light according to the duty ratio, one frame is divided into a plurality of subframes, and each subframe is made to emit light for a light emitting time according to the duty ratio to cause flicker. It is characterized by suppressing.</p><p> Preferably, the light emission control means sets the number of subframes according to the set duty ratio. In this case, the light emission control means increases the number of subframes as the duty ratio becomes smaller. The light emitting device is, for example, an organic electroluminescence light emitting device.</p><p> Further, the present invention includes a pixel array unit constituting a screen, a scanning line driving circuit and a data line driving circuit for driving the screen, and the pixel array unit includes row-shaped scanning lines, columnar data lines, and the like. The data line drive circuit is connected to each data line, including pixels composed of light emitting elements arranged at the intersections of the two, and supplies a video data signal supplied from the outside in frame units to each pixel. The scanning line drive circuit is connected to each scanning line and operates according to a light emission control signal supplied from the outside, and pixels are sequentially selected for each frame with a brightness corresponding to the video data signal. In the driving method of the display device that emits light from the light emitting element, the duty ratio between the light emitting time and the non-light emitting time in one frame is set according to the brightness information of the screen, and each light emitting element is made to emit light according to the duty ratio. It is characterized in that one frame is divided into a plurality of subframes and each light emitting element is made to emit light for a light emitting time corresponding to the duty ratio in each subframe to suppress flicker.</p>

<p> According to the present invention, flicker can be suppressed by providing a subframe and increasing the apparent frame frequency without changing the frame frequency. According to the present invention, in a self-luminous display device such as an organic EL, a display device capable of easily suppressing flicker that occurs in the case of duty drive in which the display brightness is controlled by the duty ratio of the light emission time and its drive. The method can be realized and provided.</p>

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic configuration diagram showing an active matrix type organic EL display device using an organic EL element which is a self-luminous element as a display element of each pixel in the display device according to the present invention. The active matrix type organic EL display device according to the present embodiment includes a pixel array unit 12 in which pixels 11 are arranged in a matrix, a scanning drive circuit 13 for driving the pixel array unit 12, and a data line drive circuit 14. It is formed on the organic EL panel unit substrate 15 and has an external system circuit 16 for driving the scanning line drive circuit 13 and the data line drive circuit 14 outside the organic EL panel unit 15.

That is, the display device according to the present invention includes a pixel array unit 12, a scanning line driving circuit 13 and a data line driving circuit 14 for driving the pixel array unit 12, and a system circuit 16 for controlling them. The pixel array unit 12 includes a row-shaped scanning line DSL, a column-shaped data line DTL, and a pixel 11 composed of a light emitting element 17 arranged at a portion where the two intersect. The data line drive circuit 14 is connected to each data line DTL, and supplies a video data signal supplied from the system circuit 16 in frame units to each pixel 11. The scan line drive circuit 13 is connected to each scan line DSL and operates according to the light emission control signal DS supplied from the system circuit 16, and the pixel 11 is sequentially selected for each frame and responds to the video data signal. Each light emitting element 17 is made to emit light by brightness. As a feature, the system circuit 16 includes a light emission control means Z, sets a duty ratio between a light emission time and a non-light emission time in one frame according to screen luminance information, and each light emission according to the duty ratio. In addition to causing the element 17 to emit light, one frame is divided into a plurality of subframes, and each subframe emits light for a light emitting time corresponding to the duty ratio to suppress flicker. According to the present invention, flicker can be suppressed by providing a subframe and increasing the apparent frame frequency without changing the frame frequency.

In FIG. 1, the pixel 11 has a field effect transistor (for example, a polysilicon TFT (Thin Film Transistor) or an amorphous silicon TFT 18) as an active element for driving the organic EL element 17 to emit light, and is on a substrate on which these TFT 18s are formed. The organic EL element 17 is formed in the structure. However, TFT 18 in the figure is schematically displayed as a symbol, and the actual pixel circuit is composed of a plurality of TFTs and other circuit elements. The organic EL element 17 forms a plurality of first electrodes made of a transparent conductive film on a substrate, and a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are sequentially deposited on the first electrodes to be organic. It has a structure in which a layer is formed and a second electrode made of metal is formed on the organic layer, and when a DC voltage is applied between the first electrode and the second electrode, electrons and positives are positive in the light emitting layer. It emits light when it recombines with the holes.

In the pixel array section 12, scanning lines DSL-1 to DSL-n are wired in each row for a pixel array of n columns and m rows. In addition, data lines DTL-1 to DTL-m are wired in each row. Each end of the scanning lines DSL-1 to DSL-n is connected to the output end of each stage of the scanning line drive circuit 13. The scanning line drive circuit 13 is composed of, for example, a shift register or the like, and when a light emission control signal DS generated by the external system circuit 16 is given, the scanning line drive circuit 13 is synchronized with the vertical clock pulse VCK also generated by the external system circuit 16. Light emission control Sequential scanning pulses DS-1 to DS-n are output, and scanning lines DSL-1 to DSL-n are driven.

Each end of the data line DTL-1 to DTL-m is connected to the output end of each stage of the data line drive circuit 14. The data line drive circuit 14 has a current write type or voltage write type drive circuit configuration in which luminance information is written to each of the pixels 11 in the form of a current value or a voltage value through the data lines DTL-1 to DTL-m. ing.

The external system circuit 16 is formed on an external system circuit board arranged outside the organic EL panel 15. The external system circuit 16 receives a timing generator 19 for controlling the data line drive circuit 14 and the scanning line drive circuit 13 from the outside, converts the brightness setting signal into a desired digital signal, and transfers the signal to the timing generator 19. It is equipped with a brightness setting signal receiver 20 as a supply interface.

The timing generator 19 receives an image data signal, a synchronization signal, and screen brightness setting information supplied from the outside, and controls a scanning line drive circuit 13 with a vertical clock pulse VCK, a light emission control signal DS, and a data line drive circuit 14. The horizontal scanning control signal and the video data signal to be controlled are generated based on the synchronization signal and supplied to the scanning line drive circuit 13 and the data line drive circuit 14, respectively. The timing generator 19 particularly has a built-in light emission control means Z, generates a light emission control signal DS based on screen luminance information, and supplies the light emission control signal DS to the scanning line drive circuit 13.

FIG. 2 is a block diagram showing an example of the configuration of the light emission control means for generating the light emission control signal DS in the timing generator 19. The light emission control means Z according to this example has a light emission period setting circuit 21, a brightness level setting circuit 22, and a flicker suppression circuit 23.

The luminance level setting circuit 22 sets the luminance level based on the luminance setting signal given through the luminance setting signal receiver 20. The light emission period setting circuit 21 emits light emission period pulse DP (light emission of one frame period T of the video signal) in order to obtain desired brightness during each vertical scanning period according to the digital luminance information set by the luminance level setting circuit 22. A duty ratio of the control pulse, that is, a signal defining the ratio of the high level period to the period of the period T, in other words, the ratio of the high level period to the low level period) is generated and supplied as an input of the flicker suppression circuit 23. The flicker suppression circuit 23 detects a high level period in one frame period T period of the light emission period pulse DP set by the light emission period setting circuit 21, converts it to a timing at which flicker can be suppressed, and converts the light emission control signal DS. Is output.

Subsequently, the operation of the active matrix type organic EL display device according to the present embodiment having the above configuration will be described. The scan line drive circuit 13 sequentially applies light emission control sequential scan pulse DS-1 to a plurality of scan lines DSL-1 to DSL-n in each vertical period by the vertical clock pulse VCK and the light emission control signal DS given from the timing generator 19. Supply ~ DS-n. Pixels 11 in each row are active when the emission control sequential scanning pulses DS-1 to DS-n, which are commonly supplied from one of the scanning lines DSL-1 to DSL-n, are at a high level. It becomes an activated state (lighting state), and during a low level period, it becomes an inactivated state (lighting state).

On the other hand, the data line drive circuit 14 samples video data in each horizontal period by the horizontal scanning control signal given from the timing generator 19, and supplies the video data to the plurality of data lines DTL-DTL-m in parallel. Then, when the pixel 11 is activated, the drive current or drive voltage corresponding to the current or voltage of the video data signal supplied from the data line drive circuit 14 through the plurality of data lines DTL-1 to DTL-m is generated. It is given to the organic EL element 17.

In the light emission control means Z of FIG. 2 which constitutes a part of the timing generator 19, the luminance level setting circuit 22 sets the luminance level based on the luminance setting signal supplied from the outside and processed by the receiver 20. The light emitting period setting circuit 21 changes the duty ratio (ratio of the light emitting period and the non-light emitting period) of the light emitting period pulse according to this luminance level. Here, the screen brightness setting signal (dimming control signal) is a signal obtained as a result of selecting a desired brightness by a brightness adjustment switch, a volume, or the like that can be controlled by an external personal computer or manually operated by the user.

Next, a driving method capable of easily suppressing flicker that occurs in the case of duty driving in which the display brightness is controlled by the duty ratio of the light emission time will be described with reference to FIG. In the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period pulse. Control is performed by setting the duty ratio (ratio of light emitting period to non-light emitting period) to 4: 1 as shown in the figure, for example. The light emission period pulse DP set by the light emission period setting circuit 21 detects a high level period in one frame (1 V) cycle period of the light emission period pulse by the flicker suppression circuit 23, and sets 1/2 frame (1/2 × V) as the cycle. A signal DS having the same duty ratio as the light emission period pulse DP, that is, 4: 1 is generated in the subframe cycle period, and two signals are provided in one frame (1V) cycle period. That is, the light emission period pulse signal DP in one frame (1V) cycle period is apparently converted to double speed timing. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the pulse duty ratio (ratio of light emission period to non-light emission period) is set to 1: 1 as shown in FIG. 6, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. The high level period in one frame (1V) period of the pulse is detected, and the duty ratio is the same as the emission period pulse DP in the subframe period with 1/2 frame (1/2 × V) as the period, that is, 1: 1. A signal DS is generated, and two such signals are provided in one frame (1V) cycle period. That is, the light emission period pulse signal in one frame (1V) cycle period is apparently converted to double speed timing. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Similarly, in the light emission control means Z, the light emission period setting circuit 21 emits light in order to obtain the desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22. In the control in which the duty ratio of the period pulse (ratio of light emission period to non-light emission period) is set to 1: 4 as shown in FIG. 7, the light emission period pulse DP set by the light emission period setting circuit 21 emits light by the flicker suppression circuit 23. The same duty ratio as the emission period pulse DP, that is, 1: 4 in the subframe period period with a period of 1/2 frame (1/2 × V) detected by detecting the high level period in one frame (1V) period of the period pulse. A signal DS is generated so as to be, and two such signals are provided in one frame (1V) cycle period. That is, the light emission period pulse signal in one frame (1V) cycle period is apparently converted to double speed timing. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

As described above, in the organic EL display device whose display brightness is controlled by the duty ratio of the emission time of the pixel 11, the emission period pulse signal in one frame (1V) cycle period is apparently converted to the timing of double speed. Flicker can be easily suppressed regardless of the brightness control. In the above embodiment, the case where the light emission period pulse signal in the 1-frame (1V) cycle period is apparently set to the double speed timing has been described as an example, but the speed is not limited to the double speed. Here, a case where the light emission period pulse signal in the 1-frame (1V) cycle period is apparently not at double speed will be described with reference to FIG.

In the light emission control means Z, in order to obtain the desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 performs the light emission period pulse DP. In the control in which the duty ratio (ratio of light emission period to non-light emission period) is set to 4: 1 as shown in FIG. 8, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period pulse by the flicker suppression circuit 23. The high level period in the 1 frame (1V) cycle period is detected so that the duty ratio is the same as the emission period pulse DP, that is, 4: 1 in the subframe cycle period with the cycle of 1/3 frame (1/3 × V). A light emission control signal DS is generated, and three signals are provided in one frame (1V) cycle period. That is, the light emission period pulse signal in one frame (1V) cycle period is apparently converted to the timing of triple speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse (ratio of light emission period to non-light emission period) is set to 1: 1 as shown in FIG. 9, the light emission period pulse set by the light emission period setting circuit 21 is the light emission period pulse set by the flicker suppression circuit 23. A high level period in a 1-frame (1V) period is detected, and the duty ratio is the same as that of the light emission period pulse, that is, 1: 1 in a subframe period with a period of 1/3 frame (1/3 × V). A signal is generated, and three signals are provided in one frame (1V) cycle period. That is, the light emission period pulse signal in one frame (1V) cycle period is apparently converted to the timing of triple speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Similarly, in the light emission control means, the light emission period setting circuit 21 sets the light emission period in order to obtain the desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22. In the control in which the duty ratio of the pulse (ratio of light emission period to non-light emission period) is set to 1: 4 as shown in FIG. 10, the light emission period pulse set by the light emission period setting circuit 21 is the light emission period pulse set by the flicker suppression circuit 23. A high level period in a 1-frame (1V) period is detected, and the duty ratio is the same as that of the light emission period pulse, that is, 1: 4 in a subframe period with a period of 1/3 frame (1/3 × V). A signal is generated, and three signals are provided in one frame (1V) cycle period. That is, the light emission period pulse signal in one frame (1V) cycle period is apparently converted to the timing of triple speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

As described above, in the organic EL display device whose display brightness is controlled by the duty ratio of the emission time of the pixel 11, the emission period pulse signal in one frame (1V) cycle period is apparently converted to a timing of 3 times speed. Flicker can be easily suppressed regardless of the brightness control.

By using the above method, in an organic EL display device that controls the display brightness by the duty ratio of the light emission time of the pixel 11, the light emission period pulse signal in one frame (1V) cycle period is apparently accelerated at the timing. By converting, the flicker (flicker) of the display screen is maintained without breaking the duty ratio of the light emission period pulse set by the light emission period setting circuit 21 in order to obtain the desired brightness corresponding to the brightness setting signal supplied from the outside. It is possible to suppress it extremely easily. In the above embodiment, the case where the device is applied to an organic EL display device using the organic EL element 17 as the display element of the pixel 11 has been described as an example, but the present invention is not limited to this, and the present invention is not limited to this. It can be applied to all display devices using a self-luminous element as the display element of.

Next, a developed form of the present invention will be described. FIG. 11 is a graph showing the flicker level (appearance of flicker) when one frame is 60 Hz and the duty of the light emitting period and the non-light emitting period is set to 0% to 100%. The flicker level increases as the duty decreases. This is because the longer the non-light emitting time at 1V, that is, the longer the black screen is displayed, the more dominant the black display on the entire display screen becomes, and it becomes easier for the human eye to recognize the flashing of light emission and non-light emission. , Flicker becomes large. Therefore, for the purpose of adjusting the brightness of the display screen, for example, when the brightness is controlled by a brightness adjustment signal from the outside, the flicker level (the appearance of the flicker) differs depending on the set brightness, and the display is displayed. It causes deterioration of quality. Even when the display brightness is output according to the light emission time as a display device, or when the light emission time is changed by adjusting the brightness, the display screen does not recognize flicker (flicker) or flicker level (how the flicker looks), which is good. It is essential to maintain the display quality, and the function must be realized.

In the duty drive in which the display brightness is controlled by the light emission time, a drive method capable of easily suppressing the difference in the flicker generation rate (appearance of flicker) caused by the change in the light emission time will be described with reference to FIG. The circuit configuration itself is as shown in FIGS. 1 and 2, and these figures will continue to be referred to.

In the light emission control means Z, the light emission period setting circuit 21 performs the light emission period pulse DP in order to obtain the desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22. In the control in which the duty ratio (ratio of light emission period to non-light emission period) is set to 9: 1 as shown in FIG. 12, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period pulse DP by the flicker suppression circuit 23. The high level period in one frame (1V) period is detected, and the duty ratio is the same as the emission period pulse DP in the subframe period with 1/2 frame (1/2 x V) as the period, that is, 9: 1. Such a light emission control signal DS is generated, and two of the signals are provided in one frame (1V) cycle period. That is, the light emission period pulse DP signal in one frame (1V) cycle period is apparently converted to double speed timing. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse DP (ratio of light emission period to non-light emission period) is set to 8: 2 as shown in FIG. 13, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. In order to detect the high level period in one frame (1V) period of the pulse DP and suppress the difference from the appearance of the flicker in Fig. 12, a sub with a period of 1/3 frame (1/3 × V). Raise to the frame cycle period. In that subframe, a light emission control signal DS having the same duty ratio as the light emission period pulse DP, that is, 8: 2, is generated, and three such signals are provided in one frame (1V) cycle period. That is, the light emission period pulse DP signal in one frame (1V) cycle period is apparently converted to the timing of triple speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse DP (ratio of light emission period to non-light emission period) is set to 7: 3 as shown in FIG. 14, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. In order to detect the high level period in one frame (1V) period of the pulse DP and suppress the difference from the appearance of the flicker in FIGS. 12 and 13, 1/4 frame (1/4 × V) is set as the period. A light emission control signal DS having the same duty ratio as the light emission period pulse DP, that is, 7: 3 is generated in the subframe cycle period, and four signals are provided in one frame (1V) cycle period. That is, the light emission period pulse DP signal in one frame (1V) cycle period is apparently converted to the timing of 4 times speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse DP (ratio of light emission period to non-light emission period) is set to 6: 4 as shown in FIG. 15, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. 1/5 frame (1/5 x V) is used to detect the high level period in the 1 frame (1 V) cycle period of the pulse DP and suppress the difference from the appearance of the flicker in FIGS. 12, 13 and 14. A light emission control signal DS having the same duty ratio as the light emission period pulse DP, that is, 6: 4 is generated in the subframe cycle period, and five of these signals are provided in one frame (1V) cycle period. That is, the light emission period pulse DP signal in one frame (1V) cycle period is apparently converted to a timing of 5 times speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse DP (ratio of light emission period to non-light emission period) is set to 5: 5 as shown in FIG. 16, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. 1/6 frame (1/6 x V) to detect the high level period in the 1 frame (1V) period of the pulse DP and suppress the difference from the appearance of the flicker in FIGS. 12, 13, 14 and 15. ) Is the cycle, and the emission control signal DS is generated so that the duty ratio is the same as the emission period pulse DP, that is, 5: 5, and six of these signals are provided in one frame (1V) period. .. That is, the light emission period pulse DP signal in the 1 frame (1V) cycle period is apparently converted to the timing of 6 times speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse DP (ratio of light emission period to non-light emission period) is set to 4: 6 as shown in FIG. 17, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. 1/7 frame (1/7) to detect the high level period in the 1 frame (1V) period of the pulse DP and suppress the difference from the appearance of the flicker in Figures 12, 13, 14, 15 and 16. A light emission control signal DS having the same duty ratio as the light emission period pulse DP, that is, 4: 6 is generated in the subframe cycle period with × V) as the cycle, and the signal is generated 7 during the 1 frame (1V) cycle period. Provide one. That is, the light emission period pulse DP signal in one frame (1V) cycle period is apparently converted to a 7x speed timing. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse DP (ratio of light emission period to non-light emission period) is set to 3: 7 as shown in FIG. 18, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. 1/8 frame (1) to detect the high level period in the 1 frame (1V) period of the pulse DP and suppress the difference from the appearance of the flicker in Figures 12, 13, 14, 15, 16 and 17. A light emission control signal DS having the same duty ratio as the light emission period pulse DP, that is, 3: 7 is generated in a subframe cycle period with a cycle of / 8 × V), and the signal is used during one frame (1V) cycle period. Eight are provided in. That is, the light emission period pulse DP signal in one frame (1V) cycle period is apparently converted to the timing of 8 times speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse DP (ratio of light emission period to non-light emission period) is set to 2: 8 as shown in FIG. 19, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. 1/9 frame to detect high level period in 1 frame (1V) period of pulse DP and suppress the difference from the appearance of flicker in Figures 12, 13, 14, 15, 16, 17 and 18. A emission control signal DS having the same duty ratio as the emission period pulse DP, that is, 2: 8 is generated in a subframe period with a period of (1/9 × V), and the signal is converted to 1 frame (1V). Nine are provided during the cycle period. That is, the light emission period pulse DP signal in one frame (1V) cycle period is apparently converted to the timing of 9 times speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

Further, in the light emission control means Z, in order to obtain a desired brightness corresponding to the brightness setting signal supplied from the outside processed by the brightness setting signal receiver 20 by the brightness level setting circuit 22, the light emission period setting circuit 21 sets the light emission period. In the control in which the duty ratio of the pulse DP (ratio of light emission period to non-light emission period) is set to 1: 9 as shown in FIG. 20, the light emission period pulse DP set by the light emission period setting circuit 21 is the light emission period by the flicker suppression circuit 23. In order to detect the high level period in one frame (1V) period of the pulse DP and suppress the difference from the appearance of the flicker in FIGS. 12, 13, 14, 15, 16, 17, 18 and 19, 1 / A emission control signal DS is generated so that the duty ratio is the same as the emission period pulse DP, that is, 1: 9 in the subframe period with a period of 10 frames (1/10 × V), and the signal is used for 1 frame (1V). ) Provide 10 pieces during the cycle period. That is, the light emission period pulse DP signal in one frame (1V) cycle period is apparently converted to a timing of 10 times speed. However, since there is no change in the ratio of the light emission time to the non-light emission time in one frame (1V) cycle period, the emission brightness does not change.

As described above, in the organic EL display device whose display brightness is controlled by the emission time of the pixel 11, the subframe frequency is changed according to the duty ratio of the emission period pulse DP signal in one frame (1V) period, and the subframe is also subframed. By making the duty ratio in one frame the same as the duty ratio in one frame, flicker (flicker) or flicker on the display screen even when the display brightness is output according to the light emission time or when the light emission time is changed by adjusting the brightness. The difference in level (how the flicker looks) can be easily suppressed. In the above embodiment, the case where the device is applied to an organic EL display device using the organic EL element 17 as the display element of the pixel 11 has been described as an example, but the present invention is not limited to this, and the present invention is not limited to this. It can be applied to all display devices using a self-luminous element as the display element of.

Finally, FIG. 21 is a block diagram showing a configuration example of the organic EL display panel shown in FIG. The display panel 15 is selected by the pixel array unit 12, the data line drive circuit 14, the scanning line drive circuits 13, 13a, and the data line drive circuit 14 in which the pixel circuits (PXLC) 11 are arranged in an m × n matrix. Data lines DTL-1 to DTL-m to which signals according to the brightness information are supplied, scanning lines WSL-1 to WSL-n selectively driven by the additional scanning line drive circuit 13a, and selection by the scanning line drive circuit 13. It has scanning lines DSL-1 to DSL-n to be driven. Here, the scanning line driving circuit 13 performs duty driving, and the scanning line driving circuit 13a performs data writing driving for each pixel prior to duty driving.

FIG. 22 is a circuit diagram showing a configuration example of the pixel circuit shown in FIG. As shown in the figure, the pixel circuit 11 is basically composed of a p-channel type thin film field effect transistor (hereinafter referred to as TFT). That is, the pixel circuit 11 has a drive TFT111, a switching TFT112, a sampling TFT115, an organic EL element 17, and a holding capacity C111. The pixel circuit 11 having such a configuration is arranged at the intersection of the data line DTL-1 and the scanning lines WSL-1 and DSL-1. The data line DTL-1 is connected to the drain of the sampling TFT 115, the scanning line WSL-1 is connected to the gate of the sampling TFT 115, and the other scanning line DSL-1 is connected to the gate of the switching TFT 112.

The drive TFT111, the switching TFT112, and the organic EL element 17 are connected in series between the power supply potential Vcc and the ground potential GND. That is, the source of the drive transistor 111 is connected to the power supply potential Vcc, while the cathode of the organic EL element (light emitting element) 17 is connected to the ground potential GND. Generally, the organic EL element 17 has a rectifying property and is therefore represented by a diode symbol. On the other hand, the sampling TFT 115 and the holding capacity C111 are connected to the gate of the drive TFT 111. The gate-source voltage of drive TFT111 is represented by Vgs.

Regarding the operation of the pixel circuit 11, when the scanning line WSL-1 is selected (here, the low level) and a signal is applied to the data line DTL-1, the sampling TFT 115 conducts and the signal is written to the holding capacitance C111. Is done. The signal potential written in the holding capacitance C111 becomes the gate potential of the drive transistor 111. Subsequently, when the scanning line WSL-1 is deselected (high level here), the data line DTL-1 and the drive TFT111 are electrically separated, but the gate potential Vgs of the drive TFT111 is stabilized by the holding capacitance C111. Is held in. Subsequently, when the other scanning line DSL-1 is selected (low level here), the switching TFT 112 conducts, and the drive current flows from the power supply potential Vcc toward the ground potential GND through the TFT 111, TFT 112, and the light emitting element 17. When the DSL-1 is in the non-selected state, the switching transistor 112 is turned off and the drive current stops flowing. The switching TFT 112 is inserted to control the light emitting time of the light emitting element 17.

The current flowing through the TFT 111 and the light emitting element 17 becomes a value corresponding to the gate-source voltage Vgs of the TFT 111, and the light emitting element 17 continues to emit light with a brightness corresponding to the current value. As described above, the operation of selecting the scanning line WSL-1 and transmitting the signal given to the data line DTL-1 to the inside of the pixel circuit 11 is called "writing". As described above, once the signal is written, the light emitting element 17 continues to emit light with a constant brightness until it is rewritten next time.

<figref num="1">It is a schematic block diagram which shows the active matrix type organic EL display device which concerns on one Embodiment of this invention.</figref><figref num="2">It is a block diagram which shows an example of the structure of the light emission control means in the display device which concerns on this invention.</figref><figref num="3">It is a timing chart figure which showed the waveform of the vertical synchronization signal and the light emission time setting signal by the conventional method.</figref><figref num="4">It is a timing chart figure which showed the waveform of the vertical synchronization signal and the light emission time setting signal at the time of suppressing flicker by the conventional method.</figref><figref num="5">Emission period pulse DP with the ratio of emission / non-emission time set to 4: 1 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 4: 1. It is a timing chart diagram showing the DS signal that the signal is apparently converted to the timing of double speed.</figref><figref num="6">Emission period pulse DP with the ratio of emission / non-emission time set to 1: 1 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 1: 1. It is a timing chart diagram showing the DS signal that the signal is apparently converted to the timing of double speed.</figref><figref num="7">Emission period pulse DP with the ratio of emission / non-emission time set to 1: 4 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 1: 4. It is a timing chart diagram showing the DS signal that the signal is apparently converted to the timing of double speed.</figref><figref num="8">Emission period pulse DP with the ratio of emission / non-emission time set to 4: 1 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 4: 1. It is a timing chart diagram showing the DS signal that the signal is apparently converted to the timing of 3 times speed.</figref><figref num="9">Emission period pulse DP with the ratio of emission / non-emission time set to 1: 1 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 1: 1. It is a timing chart diagram showing the DS signal that the signal is apparently converted to the timing of 3 times speed.</figref><figref num="10">Emission period pulse DP with the ratio of emission / non-emission time set to 1: 4 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 1: 4. It is a timing chart diagram showing the DS signal that the signal is apparently converted to the timing of 3 times speed.</figref><figref num="11">It is a figure which showed the flicker level (the appearance of a flicker) when the duty of a light emitting period and a non-light emitting period is set to 0 to 100%.</figref><figref num="12">Emission period pulse DP with the ratio of emission / non-emission time set to 9: 1 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 9: 1. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 2x speed.</figref><figref num="13">Emission period pulse DP with the ratio of emission / non-emission time set to 8: 2 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 8: 2. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 3 times speed.</figref><figref num="14">Emission period pulse DP with the ratio of emission / non-emission time set to 7: 3, and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 7: 3. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 4 times speed.</figref><figref num="15">Emission period pulse DP with the ratio of emission / non-emission time set to 6: 4 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 6: 4. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 5 times speed.</figref><figref num="16">Emission period pulse DP with the ratio of emission / non-emission time set to 5: 5, and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 5: 5. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 6 times speed.</figref><figref num="17">Emission period pulse DP with the ratio of emission / non-emission time set to 4: 6 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 4: 6. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 7 times speed.</figref><figref num="18">Emission period pulse DP with the ratio of emission / non-emission time set to 3: 7 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 3: 7. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 8 times speed.</figref><figref num="19">Emission period pulse DP with the ratio of emission / non-emission time set to 2: 8 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 2: 8. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 9 times speed.</figref><figref num="20">Emission period pulse DP with the ratio of emission / non-emission time set to 1: 9 and emission period pulse in 1 frame (1V) cycle period so as to suppress flicker while keeping the ratio of emission / non-emission time 1: 9. It is a timing chart diagram which shows the DS signal which apparently converted the DP signal into the timing of 10 times speed.</figref><figref num="21">It is a block diagram which shows an example of the organic EL panel shown in FIG.</figref><figref num="22">It is a circuit diagram which shows an example of the pixel circuit included in the organic EL panel shown in FIG.</figref>

Code description

11 ... pixels, 12 ... pixel array section, 13 ... scanning line drive circuit, 14 ... data line drive circuit, 15 ... organic EL panel section, 16 ... system circuit, 17 ... Organic EL element, 19 Timing generator, 21 Light emission period setting circuit, 22 Brightness level setting circuit, 23 Flicker suppression circuit, Z Light emission control means