Semiconductor apparatus

The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a power supply wiring for supplying power to a circuit portion of the semiconductor device via a power supply line of the semiconductor device.

Conventionally, in a semiconductor device in which a semiconductor element is mounted by using a wire bonding method, an electrode on the outer periphery of the semiconductor element mounted on the substrate and a bonding lead on the substrate are electrically bonded by a wire or the like. During operation, the power supply current is supplied from the electrodes on the outer periphery of the semiconductor element to the central circuit portion of the semiconductor element via the power supply line.

FIG. 1 shows the configuration of the conventional semiconductor device 10. A semiconductor element 1 such as an LSI is mounted on the interposer used as the substrate shown by the dotted line in FIG. The semiconductor element 1 includes a core portion 5 forming a circuit portion, a plurality of electrode pads 2 arranged on the outer periphery of the core portion 5, and a power supply line 4.

Among these electrode pads 2, the electrode pads 2 arranged for the power supply are connected to the circuit portion of the semiconductor element 1 by the power supply line 4. Further, among the plurality of electrode pads 2, the electrode pads 2 arranged for grounding are connected to the circuit portion of the semiconductor element 1 by the power supply line 4. During operation, a power supply current from a power source (not shown) is supplied from the outer periphery of the semiconductor element 1 to a circuit unit formed in the central core portion 5 via the power supply line 4.

On the substrate of the semiconductor device 1, a plurality of bonding leads 7 are arranged in a region surrounding the semiconductor element 1. Of the plurality of bonding leads 7, the power supply bonding lead 7 is connected to a power supply (not shown), and among the plurality of bonding leads 7, the grounding bonding lead 7 is grounded. All of the bonding leads 7 provided on the substrate are electrically bonded to the electrode pads 2 on the outer periphery of the semiconductor element 1 by the wires 8.

As a technique related to power supply wiring of a semiconductor device, for example, Patent Document 1 discloses a power supply wiring provided in a semiconductor device having a plurality of wiring layers. This semiconductor device has a wiring structure in which a plurality of semiconductor elements and power supply wiring are connected via through holes.

Further, Patent Document 2 discloses a semiconductor integrated circuit having a multi-layer wiring structure. In order to block the influence of electric and magnetic fields outside the semiconductor integrated circuit, the semiconductor integrated circuit connects at least one of the plurality of conductor layers to a power source or ground on the substrate. It has a wiring structure formed so as to completely cover the outer periphery of the element (transistor).<patcit num="1"><text>Japanese Unexamined Patent Publication No. 03-008360</text></patcit><patcit num="2"><text>JP-A-64-089447</text></patcit>

<p> By the way, in the conventional semiconductor device 10 shown in FIG. 1, the power supply current is supplied to the core portion 5 of the semiconductor element 1 via the power supply line 4 during operation, but the power supply voltage at the center of the core portion 5 is It tends to be lower than the power supply voltage in the outer peripheral portion of the core portion 5. In particular, during high-speed operation, the power supply current is consumed by passive components such as resistors and inductors, so the power supply voltage in the center of the core 5 is lower than the power supply voltage in the outer periphery of the core 5, and the semiconductor element 1 In some cases, the circuit unit of the above cannot perform a predetermined operation. Therefore, in the case of the conventional semiconductor device 10, this voltage drop causes a malfunction of the semiconductor element 1.</p><p> The present invention has been made in view of the above points, and an object of the present invention is to provide a simple and low-cost semiconductor device capable of stably operating a semiconductor element by improving the structure of a power supply line. To provide.</p>

<p> In order to solve the above problems, the first aspect of the present invention is to provide a semiconductor element in which a circuit unit provided in the center is connected to a power supply electrode for supplying power from the outside by a power supply line, and the semiconductor element. A first connection terminal, which is mounted and arranged in a region surrounding the semiconductor element, is formed on a substrate electrically bonded to the power supply electrode and a power supply line arranged in the center of the circuit portion. The opening of 1, the second opening formed on the power supply line arranged on the outer peripheral portion of the circuit portion, and the second connection terminal arranged in the region surrounding the semiconductor element on the substrate. It is a semiconductor device that is electrically bonded and includes a conductor layer that connects the power supply line in the first opening and the power supply line in the second opening to each other.</p><p> In order to solve the above problems, the second aspect of the present invention is to provide a semiconductor element in which a circuit unit provided in the center is connected to a power supply bump for supplying power from the outside by a power supply line, and the semiconductor element. Along with mounting, a first connection terminal arranged in a region of the semiconductor element facing the power supply bump is arranged in the center of the circuit portion and a substrate electrically joined to the power supply bump. The first opening formed on the power supply line, the second opening formed on the power supply line arranged on the outer peripheral portion of the circuit portion, and the region facing the circuit portion on the substrate are arranged. A semiconductor characterized by being electrically bonded to the second connection terminal and provided with a conductor layer for connecting the power supply line in the first opening and the power supply line in the second opening to each other. It is a device.</p><p> In order to solve the above problems, the second aspect of the present invention is to provide a semiconductor element in which a circuit unit provided in the center is connected to a power supply bump for supplying power from the outside by a power supply line, and the semiconductor element. A first lead, which is mounted and arranged in a region surrounding the semiconductor element, is formed on a TAB tape electrically bonded to the power supply bump and a power supply line arranged in the center of the circuit portion. The opening of 1, the second opening formed on the power supply line arranged on the outer peripheral portion of the circuit portion, and the second lead arranged in the region of the TAB tape facing the semiconductor element. It is a semiconductor device that is electrically bonded and includes a conductor layer that connects the power supply line in the first opening and the power supply line in the second opening to each other.</p><p> Further, in any of the semiconductor devices on the first to third side surfaces, the conductor layer may be formed by using any conductive substance of silver, gold, and copper.</p><p> Further, in the semiconductor device on any of the first to third side surfaces, the power supply line in the first opening and the power supply line in the second opening are connected to the conductor layer via the metal plating layer. It may be configured to do so.</p>

<p> According to the semiconductor device of the present invention, openings are formed on the power supply lines arranged at the center and the outer peripheral portion of the circuit portion of the semiconductor element, respectively, and the power supply line at the opening in the center of the circuit portion and the outer peripheral portion of the circuit portion. By connecting the power supply lines at the openings of the above to each other by a conductor layer formed of silver paste or the like, it is possible to increase the power supply current supplied to the center of the circuit portion during operation. Therefore, it is possible to prevent the power supply voltage at the center of the circuit unit from dropping during operation, and it is possible to operate the semiconductor element in a stable manner.</p>

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 4 shows a configuration of a semiconductor device according to an embodiment of the present invention. FIG. 10 is a side view showing the structure of the semiconductor device of FIG.

The semiconductor device 20 shown in FIG. 4 includes a semiconductor element 11 such as an LSI mounted on the wiring board 21. The wiring board 21 is used, for example, as an interposer. The semiconductor element 11 includes a circuit portion (core portion) formed in the center, a plurality of electrode pads 12 arranged on the outer periphery of the circuit portion, and a power supply line 14. As shown in FIG. 10, the semiconductor element 11 is mounted on the wiring board 21 via the die attachment 21a with the circuit portion formed on the front surface side facing upward and the bottom surface on the back surface side facing downward.

Among the plurality of electrode pads 12, the electrode pads 12 arranged for the power supply are connected to the circuit portion of the semiconductor element 11 by the power supply line 14. Further, among the plurality of electrode pads 12, the electrode pads 12 arranged for grounding are connected to the circuit portion of the semiconductor element 11 by the power supply line 14. During operation, a power supply current from a power source (not shown) is supplied from the outer peripheral portion of the semiconductor element 11 to the central circuit portion via the power supply line 14.

On the wiring board 21 of the semiconductor device 20, a plurality of bonding leads 17 are arranged in a region surrounding the semiconductor element 11. Of the plurality of bonding leads 17, the power supply bonding lead 17 is connected to a power supply (not shown), and among the plurality of bonding leads 17, the grounding bonding lead 17 is grounded. Each electrode pad 12 on the outer periphery of the semiconductor element 11 is electrically bonded to any one of a plurality of bonding leads 17 by a wire 18.

In order to solve the problem that the power supply voltage supplied to the center of the circuit portion of the semiconductor element drops during the operation of the conventional semiconductor device described above, in the semiconductor device 20 of FIG. 4, the center of the circuit portion of the semiconductor element 11 is used. An opening 13 is formed on each of the power supply lines 14 arranged on the outer peripheral portion and the outer peripheral portion. A conductor layer 16 that covers almost the entire circuit portion of the semiconductor element 11 is formed on these openings 13, and is formed in the power line 14 in the opening 13 in the center of the circuit portion and the opening 13 in the outer peripheral portion of the circuit portion. The power line 14 and the power line 14 are connected to each other by the conductor layer 16.

The conductor layer 16 can be formed by applying a conductive material such as silver paste on the semiconductor element 11. Of the plurality of bonding leads 17 on the wiring board 21 of the semiconductor device 20, the bonding leads 17 for the conductor layer are electrically bonded to the conductor layer 16 by the wires 18. These conductor layer bonding leads 17 (8 in the example of FIG. 4) include a bonding lead connected to a power supply (not shown) and a grounded bonding lead. Therefore, during operation, a power supply current from a power source (not shown) is directly supplied to the conductor layer 16 via the bonding lead 17 for the conductor layer and the wire 18.

In the semiconductor device of the present invention, by forming the conductor layer 16, it is possible to increase the power supply current supplied to the center of the circuit portion of the semiconductor element 11 during operation. Therefore, it is possible to prevent the power supply voltage in the center of the circuit portion of the semiconductor element 11 from dropping during operation, and it is possible to operate the semiconductor element 11 in a stable manner.

FIG. 2 is a diagram for explaining a conductor layer 16 formed on the power supply line 14 of the circuit portion of the semiconductor element 11 of FIG.

First, before forming the conductor layer 16, as shown in FIG. 2A, a plurality of openings 13 are formed on the power supply line 14 of the semiconductor element 11. The positions where the plurality of openings 13 are formed are on the power supply line 14 near the center of the circuit portion of the semiconductor element 11 where the voltage drop occurs and on the power supply line 14 near the outer peripheral portion of the circuit portion of the semiconductor element 11. They are evenly distributed. In each opening 13, a part of the power line 14 of the semiconductor element 11 is opened so as not to be blocked by another wiring layer, an insulating layer, or the like. These openings 13 can be formed in the manufacturing process of the semiconductor device 11. Alternatively, these openings 13 may be formed after the semiconductor element 11 is manufactured.

As shown in FIG. 2B, the conductor layer 16 is formed after forming the plurality of openings 13. A conductor layer 16 is formed by applying or printing a conductive substance such as silver paste so that all the openings 13 on the semiconductor element 11 are covered, and the power line 14 and the conductor layer 16 are formed in each opening 13. Connected to each other.

FIG. 9 is a cross-sectional view showing the cross-sectional structure of the semiconductor element 11 of FIG. 2 (b). As shown in FIG. 9, the semiconductor element 11 is composed of a substrate 19 such as silicon, a wiring layer 15 formed on the substrate 19, a conductor layer 16 formed on the wiring layer 15, and an electrode pad 12. .. The wiring layer 15 includes an insulating layer 15a, a power supply line 14, other wiring layers, and the like. The opening 13 is formed so that the power supply line 14 is exposed by removing the insulating layer 15a of the wiring layer 15. The conductor layer 16 is formed by applying or printing a silver paste or the like so as to cover all the openings 13 on the semiconductor element 11.

In this embodiment, the silver paste used has a silver (Ag) content of 60% or more, is heated and cured, and the cured product has a silver content of 99% or more. Of course, as a material for forming the conductor layer 16, in addition to silver (Ag), a metal such as gold (Au) or copper (Cu) or other conductive substance may be used.

FIG. 3 is a cross-sectional view showing the connection relationship between the power supply line 14 and the conductor layer 16 in the opening 13 of the semiconductor element 11 of FIG. 2 (b).

The wiring of the semiconductor element 11 in FIG. 2 is made of aluminum (Al) or copper (Cu), and the wiring width of the power supply line 14 is as thin as about 10 μm. Nickel (Ni) and gold (Au) are plated on the power line 14 of the opening 13 by electroless plating before the silver paste is applied so as not to occur.

As shown in FIG. 3, in the opening 13 provided in the circuit portion of the semiconductor element 11, the Ni plating layer 17a and the Au plating layer 17b are first formed on the power supply line 14, and then on the plating layers 17a and 17b. Further, the conductor layer 16 is formed by applying and curing the silver paste so as to cover almost the entire surface including the center and the outer periphery of the circuit portion of the semiconductor element 11. Since it has such a structure, the opening 13 provided in the center of the circuit portion of the semiconductor element 11 and the opening 13 provided in the outer peripheral portion of the circuit portion of the semiconductor element 11 are connected to each other by the conductor layer 16. , The conductor layer 16 is electrically connected to the power line 14 at each opening 13.

As described above, in the semiconductor device 20 of FIG. 4, the power supply current supplied to the center of the circuit portion of the semiconductor element 11 during operation by forming the opening 13 and the conductor layer 16 in the circuit portion of the semiconductor element 11 Can be increased. Therefore, it is possible to prevent the power supply voltage at the center of the circuit portion of the semiconductor element 11 from dropping during operation, and it is possible to operate the semiconductor element 11 in a stable manner. Further, since the opening 13 and the conductor layer 16 in this embodiment can be easily formed on the semiconductor element 11 by using a well-known wiring technique, a simple and low-cost semiconductor device can be provided.

Next, the semiconductor device according to another embodiment of the present invention will be described with reference to FIGS. 5 and 6.

Chip mounting technologies for mounting ICs, LSI chips, etc. include wire bonding methods, flip chip bonding methods, TAB (Tape Automated Bonding) methods, and the like, and these methods are used properly for each device and product field.

The semiconductor device 20 of FIG. 4 described above is an example in which the present invention is applied when a semiconductor element is mounted by using a wire bonding method. On the other hand, the semiconductor device 30 shown in FIGS. 5 and 6 is an example in which the present invention is applied when a semiconductor element is mounted by using a flip chip bonding method.

FIG. 5 shows only the configuration of the circuit forming surface (back surface side) of the semiconductor element 11a of this embodiment. FIG. 6 is a cross-sectional view showing the connection relationship between the substrate 22, the semiconductor element 11a, and the conductor layer 16 in the semiconductor device 30 of this embodiment.

The semiconductor device 30 of this embodiment includes a semiconductor element 11a such as an LSI mounted on the substrate 22. Unlike the semiconductor element 11 in FIG. 2B in which a plurality of electrode pads 12 are arranged, a plurality of bumps 12a are provided on the outer peripheral portion of the semiconductor element 11a instead of the plurality of electrode pads 12 as shown in FIG. Is placed.

As shown in FIG. 5, the semiconductor element 11a includes a circuit portion (core portion) formed in the center, a plurality of bumps 12a arranged on the outer periphery of the circuit portion, a power supply line 14, and a plurality of openings 13. , Consists of conductor layer 16.

Of the plurality of bumps 12a, the bumps 12a arranged for the power supply are connected to the circuit portion of the semiconductor element 11a by the power supply line 14. Further, among the plurality of bumps 12a, the pad 12a arranged for grounding is connected to the circuit portion of the semiconductor element 11a by the power supply line 14. During operation, a power supply current from a power source (not shown) is supplied from the outer peripheral portion of the semiconductor element 11a to the central circuit portion via the power supply line 14.

Further, openings 13 are formed on the power supply lines 14 arranged at the center and the outer periphery of the circuit portion of the semiconductor element 11a, respectively. A conductor layer 16 that covers almost the entire circuit portion of the semiconductor element 11a is formed on these openings 13, and is formed in the power line 14 in the opening 13 in the center of the circuit portion and the opening 13 in the outer peripheral portion of the circuit portion. The power line 14 and the power line 14 are connected to each other by the conductor layer 16. The conductor layer 16 can be formed by applying a conductive material such as silver paste to the semiconductor element 11a and curing it in the same manner as in the above-described forming method with reference to FIG. Here, duplicate description will be omitted.

As shown in FIG. 6, a connection terminal 24 is arranged in a region of the substrate 22 of the semiconductor device 30 facing the circuit portion of the semiconductor element 11a, and a plurality of bumps 12a of the semiconductor element 11a on the substrate 22. A plurality of connection terminals 23 are arranged in the region facing the above. Of the plurality of connection terminals 23, the power supply connection terminal 23 is connected to a power supply (not shown), and among the plurality of connection terminals 23, the ground connection terminal 23 is grounded.

In the semiconductor device 30 of FIG. 6, each bump 12a on the outer periphery of the semiconductor element 11a is electrically joined to any one of a plurality of connection terminals 23 provided on the substrate 22. Further, the conductor layer 16 at the center of the semiconductor element 11a is also electrically joined to the connection terminal 24 provided on the substrate 22.

Similar to the example of FIG. 4, in the semiconductor device 30 of the present embodiment, by forming the opening 13 and the conductor layer 16 in the circuit portion of the semiconductor element 11a, the semiconductor device 30 is supplied to the center of the circuit portion of the semiconductor element 11a during operation. It is possible to increase the power supply current. Therefore, it is possible to prevent the power supply voltage in the center of the circuit portion of the semiconductor element 11a from dropping during operation, and it is possible to operate the semiconductor element 11a in a stable manner. Further, since the opening 13 and the conductor layer 16 in this embodiment can be easily formed on the semiconductor element 11a by using a well-known wiring technique, a simple and low-cost semiconductor device can be provided.

Next, the semiconductor device according to another embodiment of the present invention will be described with reference to FIGS. 7 and 8.

As described above, the semiconductor device 20 of FIG. 4 is an example in which the present invention is applied when a semiconductor element is mounted by using a wire bonding method. On the other hand, the semiconductor device 40 shown in FIGS. 7 and 8 is an example in which the present invention is applied when a semiconductor element is mounted by using the TAB method.

FIG. 7 shows the circuit forming surface (front side) of the semiconductor element 11b of this embodiment and the configuration of the TAB tape 28. FIG. 8 is a cross-sectional view showing the connection relationship between the TAB tape 28, the semiconductor element 11b, and the conductor layer 16 in the semiconductor device 40 of this embodiment.

The semiconductor device 40 of this embodiment includes a semiconductor element 11b mounted on the TAB tape 28. Unlike the example of FIG. 2B, a plurality of bumps 12b are arranged on the outer peripheral portion of the semiconductor element 11b instead of the plurality of electrode pads 12 as shown in FIG.

As shown in FIG. 7, the semiconductor element 11b includes a circuit portion (core portion) formed in the center, a plurality of bumps 12b arranged on the outer periphery of the circuit portion, a power supply line 14, and a plurality of openings 13. , Consists of conductor layer 16.

Of the plurality of bumps 12b, the bumps 12b arranged for the power supply are connected to the circuit portion of the semiconductor element 11b by the power supply line 14. Further, among the plurality of bumps 12b, the bumps 12b arranged for grounding are connected to the circuit portion of the semiconductor element 11b by the power supply line 14. During operation, a power supply current from a power source (not shown) is supplied from the outer peripheral portion of the semiconductor element 11b to the central circuit portion via the power supply line 14.

Further, openings 13 are formed on the power supply lines 14 arranged at the center and the outer periphery of the circuit portion of the semiconductor element 11b, respectively. A conductor layer 16 that covers almost the entire circuit portion of the semiconductor element 11b is formed on these openings 13, and is formed in the power line 14 in the opening 13 in the center of the circuit portion and the opening 13 in the outer peripheral portion of the circuit portion. The power line 14 and the power line 14 are connected to each other by the conductor layer 16. The conductor layer 16 can be formed by applying a conductive material such as silver paste to the semiconductor element 11b and curing it in the same manner as in the forming method described above with reference to FIG. Here, duplicate description will be omitted.

Further, the TAB tape 28 is provided with a plurality of leads 27 at positions facing the plurality of bumps 12b of the semiconductor element 11b, respectively. Of the plurality of leads 27, the power supply lead 27 is connected to a power supply (not shown), and among the plurality of leads 27, the grounding lead 27 is grounded. Further, a pair of power supply leads 29 intersecting in an X shape are arranged in the opening of the TAB tape 28 formed at a position facing the circuit portion of the semiconductor element 11b.

As shown in FIG. 8, in the semiconductor device 40 of this embodiment, each bump 12b on the outer periphery of the semiconductor element 11b is electrically joined to any one of a plurality of reeds 27 provided on the TAB tape 28. .. Further, the conductor layer 16 at the center of the semiconductor element 11b is also electrically bonded to the power supply lead 29 provided on the TAB tape 28.

Similar to the example of FIG. 4, in the semiconductor device 40 of the present embodiment, by forming the opening 13 and the conductor layer 16 in the circuit portion of the semiconductor element 11b, the semiconductor device 40 is supplied to the center of the circuit portion of the semiconductor element 11b during operation. The power supply current to be generated can be increased. Therefore, it is possible to prevent the power supply voltage in the center of the circuit portion of the semiconductor element 11b from dropping during operation, and it is possible to operate the semiconductor element 11b in a stable manner. Further, since the opening 13 and the conductor layer 16 in this embodiment can be easily formed on the semiconductor element 11b by using a well-known wiring technique, a simple and low-cost semiconductor device can be provided.

The present invention is not limited to the specifically disclosed embodiments, and various modifications and modifications can be made without departing from the scope of the claims.

<figref num="1">It is a figure which shows the structure of the conventional semiconductor device.</figref><figref num="2">It is a figure for demonstrating the conductor layer formed on the power line of the circuit part of the semiconductor element which concerns on one Embodiment of this invention.</figref><figref num="3">It is sectional drawing which shows the connection relationship of the power line and the conductor layer in the semiconductor element of FIG.</figref><figref num="4">It is a figure which shows the structure of the semiconductor device in one Embodiment of this invention.</figref><figref num="5">It is a figure which shows the structure of the semiconductor device in another embodiment of this invention.</figref><figref num="6">FIG. 5 is a cross-sectional view showing a connection relationship between a substrate, a semiconductor element, and a conductor layer in the semiconductor device of FIG.</figref><figref num="7">It is a figure which shows the structure of the semiconductor device in another embodiment of this invention.</figref><figref num="8">FIG. 5 is a cross-sectional view showing a connection relationship between a TAB tape, a semiconductor element, and a conductor layer in the semiconductor device of FIG.</figref><figref num="9">It is sectional drawing which shows the cross-sectional structure of the semiconductor element of FIG. 2 (b).</figref><figref num="10">It is a side view which shows the connection relationship of a wiring board, a semiconductor element and a conductor layer in the semiconductor device of FIG.</figref>

Code description

1 Semiconductor element 2 Electrode pad 4 Power line 5 Core part 7 Bonding lead 8 Wire 10 Conventional semiconductor device 11, 11a, 11b Semiconductor element 12 Electrode pad 12a, 12b Bump 13 Opening 14 Power line 15 Wiring layer 15a Insulation film 16 Conductor Layer 17 Bonding lead 18 Wire 19 Board 20 Semiconductor device 21 Wiring board 21a Die attachment 22 Board 23 Connection terminal 24 Connection terminal 27 Lead 28 TAB tape 29 Power supply lead 30 Semiconductor device 40 Semiconductor device