Network device and control method therefor

The present invention relates to a network device capable of switching between two buffers of sleep operation and normal operation when realizing the network function in a device having a network function, a control method of the network device, a program, and a recording medium.

In recent years, there has been an increasing demand for reducing standby power consumption when a device is not operating (so-called sleep mode). Along with this, the CPU (central processing unit) and controller for performing necessary processing during sleep and the main CPU for performing necessary processing for normal operation are separated, and the latter main CPU is powered during sleep. Some devices reduce standby power consumption by not supplying power (Patent Document 1).

When separating CPUs in such devices, there is a method of collecting processes with external inputs (so-called I / O (input / output) processes) into one CPU (or controller). As a result, only the CPU (I / O CPU) (or controller) for I / O processing operates during sleep, and if there is any input there, the device drives the main CPU required for normal operation. It becomes possible to return to the normal state (Patent Document 2).

When such a separation method is adopted, a high-speed one is used for the main CPU of the device, and a high-speed memory is often adopted in the device accordingly. As a matter of course, the power consumption increases, so that the device can reduce the standby power by stopping the power supply together with the main CPU and its associated memory during sleep.

On the other hand, the I / O CPU uses a CPU that can perform necessary processing during sleep, and in many cases, a memory with a small capacity, low speed, and low power consumption is adopted.

The network processing of the device adopting the CPU configuration as described above will be described. Network processing of such devices consumes relatively CPU power and requires high-speed processing. On the other hand, the device must be accessible from the network even during sleep, so it must be running at all times.

In order for the device to satisfy this condition, the device processes the packet using the main CPU and the memory on the main CPU side during operation, and switches the operation to the I / O CPU side during sleep to sleep. It is necessary to enter the state and be able to return from the operation on the I / O CPU side to the original operation on the main CPU side by a specific operation or a specific received packet (Patent Document 3).

In order to realize this configuration, the device usually needs to be able to switch the buffer area that holds the packets received by the network adapter (also called a network controller, LAN (local area network) controller, etc.). .. More specifically, the device needs to be able to store packets in the memory of the main CPU during normal operation and in the memory of the I / O CPU during sleep.<patcit num="1"><text>Japanese Unexamined Patent Publication No. 2000-261515</text></patcit><patcit num="2"><text>Japanese Unexamined Patent Publication No. 11-110089</text></patcit><patcit num="3"><text>Japanese Unexamined Patent Publication No. 2004-34488</text></patcit>

<p> However, devices that use a network controller that can switch between the two buffers of sleep operation and normal operation as described above meet the requirement that they must be able to access from the network even during sleep while performing network processing at high speed. However, there is still room for improvement in the above-mentioned prior art in that it is very difficult to switch between the sleep operation and the normal operation without dropping packets.</p><p> The present invention has been made in view of such a situation, and an object of the present invention is a network device having a function of switching between two buffers of sleep operation and normal operation, and a network device and its control that do not cause packet omission. To provide a method.</p>

<p> In order to achieve such an object, the network device of the present invention is connected to a communication network and receives input of received data from the communication network in a first operation (normal operation) and a second operation (sleep operation). ), Which is a data processing unit (100) that operates in the first operation, and is a first storage means (1003-) for storing the input received data. A data processing unit having 0 to 1003-n), a first control means (105, 101, 102) for controlling the data processing unit and converting the received data, and the first operation. A data input processing unit (200) that operates in both the second operation and the second storage means (1004-0 to 1004-n) for storing the input received data, and the above. The second control means (206, 201) for controlling the data input processing means, the received data is received from the communication network, and the received received data is used in the first operation. A data input process having a communication means (203) stored in the storage means and stored in the second storage means at the time of transition to the second operation in the first operation or in the second operation. When the received data is stored in the first storage means or the second storage means at the time of transition to the second operation, the second operation is performed. It is characterized by stopping the transition.</p><p> Further, in order to achieve the above object, the control method of the network device of the present invention is to switch between a first operation and a second operation of being connected to a communication network and accepting input of received data from the communication network. A method of controlling a network device that can be performed, wherein the network device is a data processing unit that operates in the first operation, and is a first storage means for storing the input received data, and the data. A data processing unit that controls the processing unit and has a first control means for converting the received data, and a data input processing unit that operates in both the first operation and the second operation. The received data is received from the communication network, the second storage means for storing the input received data, the second control means for controlling the data input processing unit, and the reception. The received data is stored in the first storage means in the first operation, and at the time of transition to the second operation in the first operation or in the second operation, the second operation. The control method includes a data input processing unit having a communication means to be stored in the storage means, and the control method includes a step of storing received data in the first storage means in the first reception state and a second reception state. When the received data is stored in the first storage means or the second storage means at the time of the step of storing the received data in the second storage means and the transition to the second operation. Is characterized by including a step of canceling the transition to the second operation.</p><p> Further, in order to achieve the above object, the program of the present invention is characterized in that a computer is made to execute each step of the control method of the network device.</p><p> Further, in order to achieve the above object, the recording medium of the present invention is characterized in that a program for causing a computer to execute each step of the control method of the network device is recorded.</p><p> Reference numerals in the figure corresponding to the components of the claims are shown in parentheses. However, the components described in the claims are not limited to the components of the embodiment in () above.</p><p> With the above configuration, a network device that uses a network controller that can switch between two buffers, sleep operation and normal operation, uses a processing procedure that does not drop packets when entering sleep operation, and is fast during normal operation. It provides a system that can perform various packet processing, is prepared for data reception even during sleep operation, and does not drop packets even when switching between both operations.</p>

<p> As described above, according to the present invention, in a network device that can switch between two buffers, sleep operation and normal operation, high-speed packet processing can be performed during normal operation, data reception is provided even during sleep operation, and both operations are performed. It has the effect of not dropping packets even while switching.</p>

Hereinafter, embodiments to which the present invention can be applied will be described in detail with reference to the drawings. In each drawing, parts having the same function are designated by the same reference numerals, and duplication of description will be omitted.

FIG. 1 is a configuration diagram of the network system of the present embodiment. The network system of the present embodiment includes a network device 1000 and a network 600 connected to the network device 1000. The network 600 is a well-known communication network such as LAN. The network device 1000 includes a data processing device 100, an input / output processing device 200, and a bus 500, and can switch between sleep operation and normal operation.

The bus 500 is, for example, a PCI (Peripheral Component Interconnect) bus or the like, and is a data communication path of the data processing device 100, the input / output processing device 200, and other devices in the network device 1000.

The data processing device 100 includes a CPU 105, a ROM (read only memory) 103a, a RAM (random access memory) 103b, a bus controller 104, and the like. The CPU 105 controls the operation of the data processing device 100. The ROM 103a stores various control programs and arithmetic data executed by the CPU 105. In the present embodiment, the protocol processing program 101 that analyzes the protocol of the network data to be transmitted and received and the network driver 102 that controls the transmission and reception of packets. Etc. are included. The RAM 103b is used as a work area such as a buffer for operating the CPU 105 or the like and an area for accumulating data.

The protocol processing program 101 converts data to be transmitted and received according to network protocols such as TCP (Transmission Control Protocol), UDP (user datagram protocol), and IP (Internet Protocol), and divides / combines the data to be transmitted and received. By executing this, the CPU 105 exchanges data between the application of the network device 1000 and the network driver 102.

The network driver 102 is a program that is executed by the CPU 105, transmits the data processed by the protocol processing program 101 by controlling the LAN controller 203 described later, and passes the data received from the LAN controller 203 to the protocol processing program 101. is there.

The bus controller 104 controls the bus 500 to which the data processing device 100 and the input / output processing device 200 are connected, and is located between the data processing device 100 and the input / output processing device 200 or in the network device 1000 connected to the bus 500. Allow communication with other devices.

The input / output processing device 200 includes a CPU 206, a ROM 202a, a RAM 202b, a bus controller 204, a power supply controller 205, a LAN controller 203, and the like. The CPU 206 controls the operation of the input / output processing device 200. The ROM 202a stores various control programs and arithmetic data executed by the CPU 206, and in the present embodiment, includes a network driver 201 and the like that control the transmission and reception of packets. RAM202b is used as a work area such as a buffer for operating the CPU 206 and the like and an area for accumulating data.

The network driver 201 is a program executed by the CPU 206 that handles only the data received from the LAN controller 203 and passes the data received from the LAN controller 203 to the protocol processing program 101.

The bus controller 204 controls the bus 500 to which the data processing device 100 and the input / output processing device 200 are connected, and is located between the data processing device 100 and the input / output processing device 200 or in the network device 1000 connected to the bus 500. Allow communication with other devices.

The power controller 205 is a controller that controls the power supply of the entire network device 1000, and controls the power supplied to the input / output processing device 200, the data processing device 100, and the bus 500. The power controller 205 stops supplying power to the data processing device 100 and the bus 500 in the sleep operation.

The LAN controller 203 controls the signal on the network 600, transmits the data held in the RAM as a signal on the network 600, and performs a process of extracting a packet addressed to itself from the signal flowing on the network 600. .. The LAN controller 203 is a network adapter (network controller) that can switch between two buffers, a buffer for sleep operation in the input / output processing device 200 and a buffer for normal operation in the data processing device 100. When storing data in a buffer for normal operation in the data processing device 100, the LAN controller 203 performs DMA transfer. Therefore, the transfer from the LAN controller 203 to the buffer in the data processing device 100 can be realized without imposing a load on the CPU 105.

Next, the operations of the network drivers 102 and 201 and the LAN controller 203 will be described with reference to FIGS. 2 and 3. FIG. 2 is an explanatory diagram of the transmission buffer, and FIG. 3 is an explanatory diagram of the reception buffer.

First, the transmission process of the network device 1000 will be described with reference to FIG. By executing the protocol processing program 101, the CPU 105 converts the transmission data passed from the application of the network device 1000 into data, divides the data, and generates a packet. The CPU 105 stores the generated packet in one of the transmission buffers 903-0 to 903-n (n; natural number) in the RAM 103b according to the processing of the network driver 102.

Here, when storing the generated packet in the buffer in RAM 103b, the CPU 105 first requests the CPU 206 to refer to the descriptor blocks 901-0 to 901-n for the transmission buffer in the RAM 202b. The CPU 206 that received the request refers to the Flag (Flag = OFF (free) / ON (with data)) of each internal data 902 of the descriptor blocks 901-0 to 901-n according to the processing of the network driver 201, and makes the free space. Search for the descriptor block 901-i (0 i n) shown.

Next, the CPU 206 notifies the CPU 105 of the Address (the address of the empty buffer 903-i) of the internal data 902 of the descriptor block 901-i. The CPU 105 identifies the position of the buffer 903-i in the RAM 103b based on the received Address, and copies the generated packet described above to the buffer 903-i. After the copy is completed, the CPU 105 notifies the CPU 206 of the length (data length) and Flag (= ON (with data)) of the copied packet.

The CPU 206 sets the received Length and Flag in the internal data 902 of the descriptor block 901-i, and instructs the LAN controller 203 to send the data.

When the LAN controller 203 receives a transmission instruction, it refers to the Flag of each internal data 902 of the descriptor blocks 901-0 to 901-n, and indicates that there is a transmission packet (Flag = ON (data is available)). Search for -i (0 i n). Next, the LAN controller 203 identifies the position of the buffer 903-i in the RAM 103b based on the Address and Length of the internal data 902 of the descriptor block 901-i, and transmits the packet of the data length Length copied to the buffer 903-i. It reads, converts the packet into an electrical signal, and sends it over network 600. After the transmission is completed, the LAN controller 203 clears the Flag of the internal data 902 of the descriptor block 901-i and ends the process.

The LAN controller 203 controls the signal on the network 600, transmits the data held in the RAM as a signal on the network 600, and performs a process of extracting a packet addressed to itself from the signal flowing on the network 600. .. The LAN controller 203 is a network adapter (network controller) that can switch between two buffers, a buffer for sleep operation in the input / output processing device 200 and a buffer for normal operation in the data processing device 100. When storing data in a buffer for normal operation in the data processing device 100, the LAN controller 203 performs DMA transfer. Therefore, the transfer from the LAN controller 203 to the buffer in the data processing device 100 can be realized without imposing a load on the CPU 105.

Here, when storing the generated packet in the buffer, the LAN controller 203 first sets the Flag (Flag = OFF (free) / ON) of each internal data 1002 of the descriptor blocks 1001-0 to 1001-n for the receive buffer. (With data)) to search for the descriptor block 1001-i (0 i n) indicating free space.

Next, the LAN controller 203 determines the buffer in use by referring to the operation mode flag (not shown) in the LAN controller 203 indicating whether the current operation mode of the network device 1000 is the normal operation or the sleep operation.

Since the normal buffer is being used during normal operation, the LAN controller 203 is in the RAM 103b of the normal buffer 1003-i based on Address 1 (address of the empty normal buffer 1003-i) of the internal data 1002 of the descriptor block 1001-i. The position in is specified, and the above-mentioned generated packet is copied to the normal buffer 1003-i. Here, when the received packet is stored in the normal buffer 1003-i in the data processing device 100, the LAN controller 203 performs DMA transfer to the normal buffer. Therefore, the transfer from the LAN controller 203 to the buffer in the data processing device 100 can be realized without imposing a load on the CPU 105.

Since the sleep buffer is being used in the sleep operation, the LAN controller 203 is in the RAM 202b of the sleep buffer 1004-i based on Address 2 (address of the free sleep buffer 1004-i) of the internal data 1002 of the descriptor block 1001-i. The location in is identified and the generated packet described above is copied to sleep buffer 1004-i. When the received packet is stored in the sleep buffers 1004-0 to 1004-n in the input / output processing device 200, the CPU 206 stores the data received by the LAN controller in the sleep buffer.

After the copy is completed, the LAN controller 203 sets the length (data length) and Flag (= ON (with data)) of the copied packet in the internal data 1002 of the descriptor block 1001-i, and CPU 206 processes the network driver 201. Notify the completion of reception.

Next, the CPU 206 that processes the network driver 201 requests the LAN controller 203 to refer to the operation mode flag in the LAN controller 203 described above, and determines whether the current operation mode of the network device 1000 is normal operation or sleep operation. Determine.

In the case of normal operation, the CPU 206 that processes the network driver 201 notifies the CPU 105 that processes the network driver 102 of the completion of reception. Next, the CPU 105 determines whether there are packets in the normal buffers 1003-0 to 1003-n, acquires the information of the normal buffer containing the packets, and processes them.

In the case of sleep operation, the CPU 206 that processes the network driver 201 determines whether the packet received and stored in the sleep buffer 1004-i is a specific packet that returns the operation mode to normal operation, and if it is a specific packet, Notifies the power controller 205 to return the operating mode to normal operation. Upon receiving the notification of returning to the normal operation, the power controller 205 resumes the power supply to the data processing device 100 and the bus 500, which had been stopped in the sleep operation. Next, the CPU 105 requests the CPU 206 to determine whether there are packets in the sleep buffers 1004-0 to 1004-n, acquires the information of the sleep buffer containing the packets from the CPU 206, and processes them.

On the other hand, if it is determined that the packet received and stored in the sleep buffer 1004-i is not a specific packet that returns the operation mode to normal operation, for example, in the case of a packet that confirms whether the network device 1000 is in sleep operation. The CPU 206 sends a packet indicating whether the network device 1000 is in the sleep state from the LAN controller 203.

The process of switching the receive buffer between the normal buffer 1003-0 to 1003-n and the sleep buffer 1004-0 to 1004-n when the network device 1000 shifts to the sleep operation will be described below.

First, the processing flow of the data processing apparatus 100 will be described with reference to FIGS. 4 and 6. FIG. 4 is a state transition diagram of the data processing device 100, and FIG. 6 is a flowchart illustrating a process of shifting to an operation mode of the data processing device 100.

First, the CPU 105 of the data processing device 100 operates in the normal operation mode 1103 according to the processing of the network driver 102 in the normal operation state (in this case, the CPU 105 operates in the normal buffer 1003-0 to 1003). -Determine if there are packets in n, get the information of the normal buffer where the packets are, and process them). Here, when the CPU 105 detects that the transition to the sleep mode is instructed by the application or the like of the network device 1000, the CPU 105 starts the processing flow of the network driver 102 shown in FIG. The CPU 105 sends a buffer switching request from the normal buffer to the sleep buffer to the CPU 206 that processes the network driver 201 (step 1401), and shifts to the residual processing mode 1101 (step 1402).

The CPU 105 receives the buffer switching result from the CPU 206 that processes the network driver 201 (step 1403), and determines the result (step 1404). Specifically, the CPU 206 determines whether the LAN controller 203 has a packet to be transmitted to the LAN 600 or a packet received from the LAN 600. If there is a packet to be sent or received to the LAN controller 203, it is determined whether or not the packet cannot perform processing related to the packet in the sleep state (for example, a packet of print data, a packet indicating sleep cancellation described later). Etc.). If the packet cannot be processed in the sleep state (for example, a print data packet, a packet indicating sleep cancellation described later, etc.), it is determined that switching is not possible, and the CPU 105 is notified that switching is not possible. If switching is not possible (step 1404 1417), the CPU 105 performs sleep cancellation processing (step 1417), shifts to the normal operation mode 1103, and returns to the original operation (step 1418). On the other hand, if there is no packet to be sent or received to the LAN controller 203, or if it is possible to perform processing related to the packet in the sleep state (for example, a packet inquiring whether the network device 1000 is in the sleep state, or the packet) In response, a packet notifying that the device is in the sleep state) CPU 206 determines that switching is possible, and notifies CPU 105 that switching is possible. If it can be switched (step 1404 1405), the CPU 105 shifts to sleep-preparing mode 1102 (step 1405) and waits for the sleep processing of other modules in the data processor 100 to complete (step 1406). By controlling the CPU 105 in this way, it is possible to reliably prevent packets from being missed when shifting from the normal operation to the sleep operation.

When all other modules in the data processor 100 have completed sleep processing, CPU 105 transitions to sleep ready mode 1105 (step 1407) and sends a sleep ready notification to CPU 206, which processes network driver 201 (step 1407). 1408). CPU105 waits for the notification of power off or sleep cancellation as it is (loop processing in step 1409).

Normally, the power controller 205 that receives the instruction from the CPU 206 does not supply power to the data processing device 100, so the CPU 105 proceeds with step 1409 end and ends the processing of the data processing device 100 (not shown). ). That is, the power of the data processing device 100 is turned off, and the network device 1000 goes into sleep operation.

On the other hand, when a sleep stop notification comes from the CPU 206 that processes the network driver 201 according to step 1607 described later (for example, when the LAN controller 203 cannot perform processing related to the received packet in the sleep state). ) (Step 1409 1410), the CPU 105 shifts to the return waiting mode 1107 and waits for the switching completion notification from the CPU 206 (step 1411). When the CPU 105 receives the switching completion notification, it shifts to the returning mode 1106 (step 1412).

The CPU 105 then requests the CPU 206 to determine if there are packets in the sleep buffers 1004-0 to 1004-n, obtains information about the sleep buffer containing the packets from the CPU 206, and processes them (steps 1413, 1414). When the processing of the remaining packets in the sleep buffer is completed, the CPU 105 sends a return completion notification to the CPU 206 that processes the network driver 201 (step 1415), shifts to the normal operation mode 1103, and returns to the original operation (step 1416). .. By controlling the CPU 105 in this way, it is possible to reliably prevent packets from being missed when shifting from the sleep operation to the normal operation.

On the other hand, referring to FIG. 4, when the network device 1000 is in the sleep operation and the power controller 205 supplies power to the data processing device 100, the CPU 105 detects the power ON and shifts to the start mode 1104. Performs initialization processing in the data processing device 100. Next, the CPU 105 requests the CPU 206 to determine whether or not there is a packet in the sleep buffers 1004-0 to 1004-n, and if there is a packet, the CPU 105 shifts to the waking mode 1106. By controlling the CPU 105 in this way, it is possible to reliably prevent packets from being missed when shifting from the sleep operation to the normal operation. If there are no packets in the sleep buffer 1004-0 to 1004-n, the CPU 105 shifts to the normal operation mode 1103 and returns to the original operation.

With reference to FIGS. 5, 7 and 8, the processing flow of the input / output processing apparatus 200 will be described next. FIG. 5 is a state transition diagram of the input / output processing device 200, and FIGS. 7 and 8 are flowcharts illustrating the process of shifting the operation mode of the input / output processing device 200.

The processing of the CPU 206 that processes the network driver 201 of the input / output processing device 200 includes the processing that is triggered by the interrupt from the LAN controller 203 shown in FIG. 7 and the processing of the network driver 102 of the data processing device 100 shown in FIG. It is roughly divided into the processing that is performed when the notification from the CPU 105 is received.

The trigger for the operation of the CPU 206 is the reception of the buffer switching request transmitted in step 1401 of the process of the data processing device 100 described above. At this point, the operating mode of the CPU 206 is the normal operating mode 1203, which is the same as that of the data processing device 100.

The CPU 206 first receives the message in step 1601 and determines that the message is a buffer switching request (step 1602). In this case, in step 1603, the CPU 206 instructs the LAN controller 203 to change the setting so that the sleep buffer is being used as the receive buffer, and the LAN controller 203 that receives the instruction sleeps the operation mode flag in the LAN controller 203 described above. Set to and switch to the setting that uses the sleep buffer as the receive buffer.

When the setting switching of the in-use receive buffer in the LAN controller 203 is completed, the buffer switching interrupt is transmitted from the LAN controller 203 to the CPU 206 that processes the network driver 201, and the CPU 206 moves to the interrupt processing in step 1501. Since the CPU 206 is initially operating in the normal operation mode (step 1502 1503), it shifts to the residual processing mode 1201 (step 1503). By controlling the CPU 206 in this way, it is possible to reliably prevent packets from being missed when shifting from the normal operation to the sleep operation.

Next, the CPU 206 requests the CPU 105 to determine whether or not there is a received packet addressed to its own machine (network device 1000) in the normal buffers 1003-0 to 1003-n, and the CPU 105 sends information on the presence or absence of a received packet addressed to its own machine. Acquire and judge (step 1504 1505). If the packet addressed to the own machine exists in the normal buffer, the CPU 206 sends a non-switchable notification to the CPU 105 to stop the sleep processing (step 1509), shifts to the normal operation mode 1203, and ends the interrupt processing. (Step 1510). On the other hand, if the packet addressed to the own machine does not exist in the normal buffer (step 1505 1506 1507), the CPU 206 shifts to the sleep preparation mode 1202 (step 1507) and sends a switching completion notification to the CPU 105 (step 1507). Step 1508). By controlling the CPU 206 in this way, it is possible to reliably prevent packets from being missed when shifting from the normal operation to the sleep operation.

In step 1505, the specific packet means a packet that cannot be processed in relation to the specific packet in the sleep state (for example, a packet of print data, a packet indicating sleep cancellation described later, and the like). If the packet cannot be processed in the sleep state, it is determined that the packet cannot be switched, and the process proceeds to step 1509. On the other hand, a packet that can perform processing related to the specific packet in the sleep state (for example, a received packet inquiring whether the network device 1000 is in the sleep state, and that the device is in the sleep state in response to the packet). If it is a transmission packet to be notified), the process proceeds to step 1601. As a result, the power consumption of the network device 1000 is minimized because the sleep state shifts to the normal operation only when a packet that cannot be processed in relation to the specific packet is received in the sleep state.

Subsequently, the CPU 206 receives the sleep ready notification sent from the CPU 105 that processes the network driver 102 (step 1601 1602 1604), and shifts to the sleep ready mode 1205 (step 1605). Then, the CPU 206 refers to the Flag (Flag = OFF (free) / ON (with data)) of each internal data 1002 of the descriptor blocks 1001-0 to 1001-n, switches to the sleep buffer, and then owns the machine (input / output). It is determined whether the packet addressed to the processing device 200) has been received (step 1606).

If there is no specific packet addressed to the own machine in the sleep buffer (for example, a packet that determines whether processing related to the packet is impossible in the sleep state) (1606 1610), the CPU 206 is powered. Request power control from controller 205 to stop power supply to data processing device 100 and bus 500 (step 1610). Then, the CPU 206 shifts to the sleep mode 1204 and ends the notification reception process (step 1611).

On the other hand, if there is a specific packet addressed to the player in the sleep buffer (for example, a packet that determines whether processing related to the packet is impossible in the sleep state) (1606 1607), CPU206 Sends a wakeup notification to CPU 105, which processes network driver 102 (step 1607). Then, after shifting to the return waiting mode 1207 (step 1608), the CPU 206 instructs the LAN controller 203 to change the setting so that the normal buffer is being used as the receive buffer, and the LAN controller 203 that receives the instruction is the LAN controller 203 described above. Set the operation mode flag in the above to normal operation, switch to the original setting that uses the normal buffer as the receive buffer, and end the notification reception process (step 1609). In the buffer switching, the CPU 105 executes the sleep buffer packet processing shown in step 1413. By controlling the CPU 105 in this way, it is possible to reliably prevent packets from being missed when shifting from the sleep operation to the normal operation.

Further, here, an example of determining whether or not the packet is a specific packet addressed to the own machine has been described, but the present invention is not limited to this. That is, it may be possible to simply determine whether or not there is a packet addressed to the own machine, and if there is a packet addressed to the self-recorded device, the process proceeds to step 1607, and if not, the process proceeds to step 1610. This simplifies the configuration of the input / output device 200.

Restoring the buffer When the setting switching of the in-use receive buffer in the LAN controller 203 is completed, the LAN controller 203 sends a buffer switching interrupt to the CPU 206 that processes the network driver 201. When the CPU 206 receives the buffer switching interrupt (step 1501), it shifts from the return waiting mode 1207 to the returning mode 1206 (step 1511), and then sends a switching completion notification to the CPU 105 (step 1512).

After that, the recovery completion notification is sent from the CPU 105 that processes the network driver 102, so the CPU 206 receives the recovery completion notification (step 1601 1602 1604 1612), shifts to the normal operation mode 1203, and operates normally. Return to (step 1613).

On the other hand, referring to FIG. 5, when the network device 1000 is in sleep operation, that is, when the CPU 206 is in sleep mode 1204, "an internal timer activation event, an event due to a user pressing a specific switch, a specific event" When the LAN controller 203 detects a "packet that cannot be processed in relation to the specific packet" (hereinafter referred to as a specific packet, etc.) in a sleep state such as an incoming packet or an incoming fax, the LAN controller 203 Notifies the CPU 206 that a specific packet or the like has been detected. When the CPU 206 receives the notification that a specific packet or the like is detected, the CPU 206 notifies the power controller 205 to return the operation mode to the normal operation. Upon receiving the notification of returning to the normal operation, the power controller 205 resumes the power supply to the data processing device 100 and the bus 500, which had been stopped in the sleep operation.

Here, when a specific packet or the like is a packet addressed to its own machine, the CPU 206 instructs the LAN controller 203 to change the setting so that the normal buffer is being used as the receive buffer, and the LAN controller 203 that receives the instruction receives the instruction. Set the operation mode flag in the LAN controller 203 described above to normal operation, and switch to the original setting using the normal buffer as the receive buffer. Then, the CPU 206 shifts to the returning mode 1206. When a specific packet or the like is an event other than a packet addressed to the own machine, the CPU 206 shifts to the normal operation mode 1203 and returns to the normal operation.

<u style="single">Other embodiments</u> In addition to the above-described embodiment, the following embodiments can be implemented. 1) A software program for realizing the above-described embodiment functions on a device connected to the various devices or a computer in the system so as to operate various devices so as to realize the functions of the above-described embodiment. The scope of the present invention also includes those carried out by supplying the code and operating the above-mentioned various devices according to a program in which the computer (CPU or MPU) of the system or device is stored.

2) Further, in this case, the program code itself of the software realizes the function of the above-described embodiment, and stores the program code itself and means for supplying the program code to the computer, for example, the program code. The recording medium constitutes the present invention.

3) Examples of recording media for storing the program code include floppy (registered trademark) disks, hard disks, optical disks, magneto-optical disks, CDs (compact disc [disk])-ROMs, magnetic tapes, non-volatile memory cards, and ROMs. Etc. can be used.

4) Also, by executing the program code supplied by the computer, not only the functions of the above-described embodiment are realized, but also the OS (operating system) or other application in which the program code is running on the computer is realized. Needless to say, the program code is included in the embodiment of the present invention even when the function of the above-described embodiment is realized in collaboration with software or the like.

5) After the supplied program code is stored in the memory provided in the function expansion board of the computer or the function expansion unit connected to the computer, it is stored in the function expansion board or function storage unit based on the instruction of the program code. Needless to say, the present invention also includes a case where the provided CPU or the like performs a part or all of the actual processing and the processing realizes the functions of the above-described embodiment.

6) The above-described embodiment has been described for the purpose of exemplifying the present invention, but modifications other than the above-described embodiment are possible. As long as the modification is based on the technical idea of the invention described in the claims, the modification is within the technical scope of the invention.

<u style="single">Effect of embodiment</u> According to the embodiment to which the present invention can be applied as described above, the network device is connected to a communication network and receives input of received data from the communication network in a first operation (normal operation) and a second operation. A network device capable of switching between (sleep operation) and a data processing unit (100) that operates in the first operation, and is a first storage means for storing the input received data. A data processing unit having (1003-0 to 1003-n), a first control means (105, 101, 102) for controlling the data processing unit and converting the received data, and the first A data input processing unit (200) that operates in both the first operation and the second operation, and is a second storage means (1004-0 to 1004-n) for storing the input received data. And the second control means (206, 201) for controlling the data input processing means, the received data is received from the communication network, and the received received data is used in the first operation. It has a communication means (203) that is stored in the first storage means and is stored in the second storage means at the time of transition to the second operation in the first operation or in the second operation. When the first storage means or the second storage means stores the received data at the time of transition to the second operation, the first storage means is provided with a data input processing unit. Both the control means and the second control means cancel the transition to the second operation (remaining processing mode 1101 normal operation mode 1103, remaining processing mode 1201 normal operation mode 1203, sleep ready mode 1105 waiting for return). Mode 1107, sleep ready mode 1205 return waiting mode 1207), the first control means performs conversion processing of the received data stored in the first storage means or the second storage means (step). 1418, loop processing of steps 1413 and 1414).

Further, the control method of the network device is a control method of the network device which is connected to the communication network and can switch between the first operation and the second operation of receiving the input of the received data from the communication network. The network device is a data processing unit that operates in the first operation, controls the first storage means for storing the input received data, and the data processing means, and transmits the received data. A data processing unit having a first control means for performing conversion processing, and a data input processing unit that operates in both the first operation and the second operation, and stores the input received data. A second storage means for controlling the data input processing unit, a second control means for controlling the data input processing unit, and the received data received from the communication network, and the received received data is used as the first operation. In the above, it has a communication means which is stored in the first storage means and is stored in the second storage means at the time of transition to the second operation in the first operation or in the second operation. In the control method including the data input processing unit, the first control means detects an instruction to shift to the second operation in the first operation, and shifts to the second operation. The first transition start step (steps 1401 and 1402), which starts and sends an instruction for transition to the second operation to the second control means, and the second control means are the above in the instruction step. When the second transition start step (step 1601 1603), which receives the instruction and starts the transition to the second operation, and the second control means, the transition to the second operation is performed. A determination step for determining whether or not the received data is stored in the first storage means or the second storage means (step 1504 1506, step 1606), and the second control means make the determination. In the step, when it is determined that the received data is stored in the first storage means or the second storage means, the first control means is notified of the cancellation of the transition to the second operation. Notification step and(1509, 1607 1608), when the second control means determines in the determination step that the received data is stored in the first storage means or the second storage means. The first stop step for canceling the transition to the second operation and the first control means receive the cancellation of the transition to the second operation notified in the notification step. When the receiving step to be performed (step 1404 1417, step 1409 1410) and the first control means receive the notification in the receiving step, the second operation for canceling the transition to the second operation is stopped. The discontinuation step and (steps 1417, 1412), the first control means is stored in the first storage means in response to the discontinuation of the transition to the second operation in the second discontinuation step. It is characterized by including a stored data processing step (step 1418, step 1413 1414) for performing a conversion process of received data or performing a conversion process of the received data stored in the second storage means.It is characterized by having a device (step 1418, step 1413 1414).It is characterized by having a device (step 1418, step 1413 1414).

Further, the program is characterized in that the computer executes each step of the control method of the network device.

Further, the recording medium is characterized in that a program for causing a computer to execute each step of the control method of the network device is recorded.

With the above configuration, a network device that uses a network controller that can switch between two buffers, sleep operation and normal operation, uses a processing procedure that does not drop packets when entering sleep operation, and is fast during normal operation. It provides a system that can perform various packet processing, is prepared for data reception even during sleep operation, and does not drop packets even when switching between both operations.

<figref num="1">It is a block diagram of the network system of the embodiment to which this invention can apply.</figref><figref num="2">It is explanatory drawing of the transmission buffer of embodiment to which this invention can apply.</figref><figref num="3">It is explanatory drawing of the receive buffer of embodiment to which this invention can apply.</figref><figref num="4">It is a state transition diagram of the data processing apparatus of embodiment to which this invention can apply.</figref><figref num="5">It is a state transition diagram of the input / output processing apparatus of embodiment to which this invention can apply.</figref><figref num="6">It is a flowchart explaining the process of shifting the operation mode of the data processing apparatus of the Embodiment to which this invention can apply.</figref><figref num="7">It is a flowchart explaining the process of shifting the operation mode of the input / output processing apparatus of the Embodiment to which this invention can apply.</figref><figref num="8">It is a flowchart explaining the process of shifting the operation mode of the input / output processing apparatus of the Embodiment to which this invention can apply.</figref>

Code description

1000 Network device 100 Data processing device 101 Protocol processing program 102 Network driver 103a, 202a ROM103b, 202b RAM104 Bus controller 105, 206 CPU200 Input / output processing device 201 Network driver 203 LAN controller 204 Bus controller 205 Power controller 500 Bus 600 Network 1001-0 ~ 1001-n Descriptor block for receive buffer 1002 Internal data 1003-0 ~ 1003-n Normal buffer for receive 1004-0 ~ 1004-n Sleep buffer for receive