Semiconductor device

The present invention generally relates to a semiconductor device, and more specifically to a semiconductor device having a structure for cooling or dissipating heat generated from a semiconductor element.

Conventionally, there is known a technique of efficiently dissipating heat generated from a semiconductor integrated circuit by using a material having high thermal conductivity (for example, a metal such as copper) called a heat spreader. In this case, a plate-shaped heat spreader is enclosed so as to come into contact with the back surface of the semiconductor chip housed in the LSI (large scale integration) package. As a result, the heat generated in the semiconductor chip is dissipated to the outside of the package via the heat spreader.

Further, in the case of a semiconductor integrated circuit that generates a larger amount of heat, a metal component (heat conduction such as aluminum or copper) having a fin shape for heat dissipation called a heat sink is formed on the back surface of a semiconductor chip mounted on a ceramic package or a flip chip. It is often made of a high-quality material), and heat is dissipated by air cooling or liquid cooling. However, when the package is sealed using a plastic mold resin, heat dissipation by natural air cooling while mounted on the printed circuit board is a prerequisite. In particular, in the case of microprocessors for PCs (personal computers) and EWS (engineering workstations), heat generation is large, so forced air cooling that combines a heat sink and an electric fan, or a method of cooling by flowing a liquid refrigerant through the heat sink. Has been adopted.

The power consumption in the chip of a semiconductor integrated circuit is the sum of (1) transient through current, (2) charge / discharge of load capacitance, and (3) transistor junction leakage and subthreshold current. It can be considered that there is. Of these, (1) and (2) tend to increase in proportion to the operating frequency of the semiconductor device, and (3) tends to increase with the miniaturization of the transistor. The heat generation is mainly due to Joule heat and is proportional to the product of the square of the current I and the resistance R (QI).²× R).

For this reason, inside a semiconductor chip, specific parts such as IO (input / output) pads, bus buffers, and multipliers through which a large current flows are sources of heat, and are called hot spots. It has become. Considering the heat conduction in the semiconductor chip, the heat generated from these hot spots diffuses to other parts in the chip.

Examples of semiconductor devices for which measures against such heat dissipation are JP-A-2000-306998 (Patent Document 1), JP-A-11-17072 (Patent Document 2), and JP-A-7-22547 (Patent Document 1). Patent Document 3), Japanese Patent Application Laid-Open No. 2001-291793 (Patent Document 4), Japanese Patent Application Laid-Open No. 8-125092 (Patent Document 5), Japanese Patent Application Laid-Open No. 10-199882 (Patent Document 6), Japanese Patent Application Laid-Open No. 2000-243826 Japanese Patent Application Laid-Open No. 7 (Patent Document 7), Japanese Patent Application Laid-Open No. 8-222700 (Patent Document 8), Japanese Patent Application Laid-Open No. 2003-258165 (Patent Document 9), Japanese Patent Application Laid-Open No. 5-166849 (Patent Document 10), Japanese Patent Application Laid-Open No. 8- It is disclosed in Japanese Patent Application Laid-Open No. 274226 (Patent Document 11), Japanese Patent Application Laid-Open No. 2002-289752 (Patent Document 12), Japanese Patent Application Laid-Open No. 2003-188342 (Patent Document 13), and Japanese Patent Application Laid-Open No. 9-283697 (Patent Document 14). ing.

Further, Non-Patent Document 1 below discloses a semiconductor device provided with a heat sink made of a silicon material in addition to the chip for the purpose of cooling the integrated circuit chip. The heat sink is formed with microchannels for passing and circulating the refrigerant.<patcit num="1"><text>Japanese Unexamined Patent Publication No. 2000-306998</text></patcit><patcit num="2"><text>Japanese Unexamined Patent Publication No. 11-17072</text></patcit><patcit num="3"><text>Japanese Unexamined Patent Publication No. 7-22547</text></patcit><patcit num="4"><text>Japanese Unexamined Patent Publication No. 2001-291793</text></patcit><patcit num="5"><text>Japanese Unexamined Patent Publication No. 8-125092</text></patcit><patcit num="6"><text>Japanese Unexamined Patent Publication No. 10-199882</text></patcit><patcit num="7"><text>Japanese Unexamined Patent Publication No. 2000-243826</text></patcit><patcit num="8"><text>Japanese Unexamined Patent Publication No. 8-222700</text></patcit><patcit num="9"><text>Japanese Unexamined Patent Publication No. 2003-258165</text></patcit><patcit num="10"><text>Japanese Unexamined Patent Publication No. 5-166849</text></patcit><patcit num="11"><text>Japanese Unexamined Patent Publication No. 8-274226</text></patcit><patcit num="12"><text>Japanese Unexamined Patent Publication No. 2002-289752</text></patcit><patcit num="13"><text>Japanese Unexamined Patent Publication No. 2003-188342</text></patcit><patcit num="14"><text>Japanese Unexamined Patent Publication No. 9-283697</text></patcit><nplcit num="1"><text>Ken Goodson, Thermal Management of Advanced Electronic Systems, ISSCC 2003 Workshop</text></nplcit>

<p> The main heat dissipation paths from the semiconductor integrated circuit formed on the semiconductor chip are a path that dissipates heat from the back surface of the chip to the outside via a heat spreader by heat conduction and a path that dissipates heat from the chip to the mounting substrate through terminals. Exists. When wire bonding is used, heat is dissipated through the terminals by transferring heat from the bonding pad to the mounting substrate via the bonding wire, the lead frame, and bumps. Further, in the case of a flip chip type semiconductor chip, metal bumps such as solder are formed on the electrode pads of the chip, and the chips are directly connected to the mounting substrate with the metal bumps sandwiched between the metal bumps. Therefore, the heat from the semiconductor chip is directly transferred from the metal bump to the mounting substrate to dissipate heat.</p><p> Generally, the electrode pads and bonding pads formed on the surface of the semiconductor chip are arranged in the peripheral portion of the chip. Therefore, it is necessary to efficiently transfer the heat generated in the central portion of the semiconductor chip to these pads to dissipate heat. However, in state-of-the-art microprocessors and system LSIs, the chip area is increasing more and more due to high integration, and it is gradually becoming difficult to dissipate heat toward the peripheral part of the chip.</p><p> Further, if local heat is generated inside the semiconductor chip and the heat is not sufficiently dissipated, the semiconductor integrated circuit may be thermally destroyed or the performance of the transistor may be deteriorated. Further, in recent years, the situation where the operating frequency and the upper limit of the degree of integration of the semiconductor chip are determined by the power consumption is becoming a reality, and it is strongly desired to solve these problems related to the heat dissipation of the semiconductor chip.</p><p> Therefore, an object of the present invention is to solve the above-mentioned problems, and to provide a semiconductor device capable of efficiently cooling a generated semiconductor element and quickly dissipating heat transferred from the semiconductor element to the outside.</p>

<p> A semiconductor device according to the present invention is formed on a semiconductor substrate having a main surface, an interlayer insulating film formed on the main surface and covering a semiconductor element provided on the main surface, and an interlayer insulating film, and is a cooling fluid. It is provided with a first cooling path through which the fluid flows.</p>

<p> According to the present invention, it is possible to provide a semiconductor device that efficiently cools a heat-generating semiconductor element and quickly dissipates heat transferred from the semiconductor element to the outside.</p>

Embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1) FIG. 1 is a perspective view showing a semiconductor device according to the first embodiment of the present invention. With reference to FIG. 1, the semiconductor device is formed on a semiconductor substrate 1 having a main surface 1a, a semiconductor element (not shown) formed on the main surface 1a that generates heat by driving, and a main surface 1a. , An interlayer insulating film 2 that covers a semiconductor element (not shown) is provided. A cooling passage 3 is formed inside the interlayer insulating film 2. The cooling path 3 has one end 4 and the other end 5 opened at distant positions on the top surface 2a of the interlayer insulating film 2, respectively. The cooling path 3 extends from one end 4 toward the other end 5 so as to pass in the vicinity of the semiconductor element formed on the main surface 1a.

The semiconductor substrate 1 is formed of, for example, a silicon substrate. The semiconductor element (not shown) is typically various transistor elements, but is not limited to this, and any element using a semiconductor may be used. The interlayer insulating film 2 is formed of, for example, a silicon oxide film, PSG (phosphosilicate glass), BSG (borosilicate glass), BPSG (borophosphosilicate glass), TEOS (tetra etyle orthosilicate), SOG (spin on glass), or the like. ing. Further, a low dielectric constant material (Low-k material) may be used as the interlayer insulating film 2.

A liquid or gas (cooling fluid) for cooling the semiconductor element, which is supplied from one end 4 and recovered from the other end 5, flows through the cooling passage 3. Examples of the gas supplied to such a cooling passage 3 include nitrogen gas, chlorofluorocarbon gas, and inert gas such as helium and argon. Further, if the inner wall constituting the cooling passage 3 is covered with a passivation film and sufficient measures against oxidation are taken, dry air can also be used. As the liquid, water (pure water) or chlorofluorocarbon can be used.

FIG. 2 is a perspective view showing a semiconductor package provided with the semiconductor device shown in FIG. In the figure, in order to show the inside of the semiconductor package, a part of the package is drawn in a transparent state.

With reference to FIG. 2, the semiconductor package 20 covers a semiconductor chip 10 composed of the semiconductor device shown in FIG. 1, a heat spreader (heat sink) 12, a pump chip 13 described in detail later, and these members. It is provided with a package resin 11. The heat spreader 12 is made of, for example, copper, iron-nickel alloy, solder, and the like.

Inside the package resin 11, a cooling path 14 having both ends connected to one end 4 and the other end 5 of the cooling path 3 provided in the semiconductor chip 10 is formed. In the middle of the path of the cooling path 14, a portion is provided which is located on the side relatively close to the other end 5 and extends by changing the direction at a predetermined distance. A heat spreader 12 is arranged in the vicinity of that portion. A pump tip 13 is provided in the middle of the cooling path 14 so as to be located relatively close to one end 4.

FIG. 3 is a cross-sectional view showing the structure of the pump tip in FIG. With reference to FIG. 3, the pump chip 13 comprises a pump structure made on a silicon chip by micromachine technology. The pump structure includes a valve portion 26 composed of a valve cylinder 24 and a valve piston 25 arranged in the valve cylinder 24, and a pump portion composed of a pump cylinder 21 and a pump piston 22 arranged in the pump cylinder 21. It is composed of 23. The valve cylinder 24 is connected to a cooling path 14 extending from the other end 5 side by a flow path 28. The valve cylinder 24 and the pump cylinder 21 are connected to each other by a flow path 27. The pump cylinder 21 is connected to a cooling path 14 extending from one end 4 side by a flow path 29.

With reference to FIGS. 1 to 3, the pump piston 22 and the valve piston 25 are reciprocated with a predetermined phase difference by using an electrostatic actuator or the like utilizing the electrostatic force between the electrodes, and the semiconductor chip 10 is formed. The cooling fluid is circulated in the provided cooling passage 3.

The cooling fluid supplied from the pump chip 13 to one end 4 of the cooling passage 3 flows through the cooling passage 3 provided in the semiconductor chip 10. At this time, the cooling fluid takes heat generated from the semiconductor element formed on the main surface 1a, and then is recovered to the other end 5 side. The recovered cooling fluid releases heat to the heat spreader 12 as it passes near the heat spreader 12. The heat is dissipated to the outside of the semiconductor package 20 via the package resin 11.

The means for circulating the cooling fluid is not limited to the mechanism shown in FIG. 2, for example, a tube for passing the air-cooling / liquid-cooling fluid is directly connected to the package resin 11 and connected to the tube and the outside. A mechanism for connecting to a provided pump may also be used. However, as shown in FIG. 2, if the entire cooling system including not only the heat spreader 12 but also the pump chip 13 is sealed in the package resin 11, the semiconductor package 20 can be miniaturized and the semiconductor chip 10 can be dissipated. It can be done efficiently.

The semiconductor device according to the first embodiment of the present invention includes a semiconductor substrate 1 having a main surface 1a, an interlayer insulating film 2 formed on the main surface 1a and covering a semiconductor element provided on the main surface 1a, and an interlayer insulating film. It is provided with a cooling passage 3 as a first cooling passage formed in 2 and through which a cooling fluid flows. The cooling passage 3 is formed so as to circulate inside the interlayer insulating film 2. The cooling passage 3 includes one end 4 to which the cooling fluid is supplied and the other end 5 to which the cooling fluid is discharged.

The semiconductor package 20 as a semiconductor device includes a semiconductor chip 10 including a semiconductor substrate 1, an interlayer insulating film 2, and a cooling path 3, a package resin 11 as a resin member formed so as to cover the semiconductor chip 10, and a package resin 11. It is provided with a pump tip 13 as a pump part provided inside and a heat spreader 12 as a heat dissipation part made of a metal material. The pump tip 13 is connected to one end 4 and the other end 5 to circulate the cooling fluid in the cooling passage 3. The heat spreader 12 dissipates heat from the cooling fluid discharged from the other end 5.

4 to 7 are cross-sectional views showing each step of a method of manufacturing a cooling path in an interlayer insulating film. In the cooling passage 3 having the tunnel structure shown in FIG. 1, a part of the interlayer insulating film is removed later in the laminated structure of the interlayer insulating film and the metal wiring layer deposited on the semiconductor substrate 1 by the semiconductor process. Can be made by. This manufacturing method will be described below with reference to FIGS. 4 to 7.

With reference to FIG. 4, an interlayer insulating film 31p and a metal wiring layer 32p are used on the main surface 1a of the semiconductor substrate 1 by using a CVD (chemical-vapor deposition) method and a sputtering method, respectively, in the same manner as in a normal semiconductor process. Are sequentially formed. Further, an interlayer insulating film 31q is formed so as to cover the metal wiring layer 32p. With reference to FIG. 5, a metal wiring layer 32q having metal plugs 35m and 35n reaching the metal wiring layer 32p is formed on the interlayer insulating film 31q. At this time, the interlayer insulating film 33 remains between the metal plug 35m and the metal plug 35n. The metal wiring layer 32q is patterned to form grooves 34m and 34n at positions separated from each other.

With reference to FIG. 6, an interlayer insulating film 31r that fills the grooves 34m and 34n is formed on the metal wiring layer 32q. After the interlayer insulating film 31r is flattened by the CMP (chemical mechanical polishing) step, a metal wiring layer having metal plugs 35m and 35n reaching the metal wiring layer 32q is provided on the interlayer insulating film 31r in the same manner as in the step shown in FIG. Form 32r. The metal wiring layer 32r is patterned to re-form the grooves 34m and 34n at distances from each other.

With reference to FIG. 7, the process shown in FIG. 6 is repeated to sequentially form the interlayer insulating film 31s and the metal wiring layer 32s having a predetermined shape on the interlayer insulating film 31r. Then, the interlayer insulating film 33 left between the metal plug 35m and the metal plug 35n is removed by performing wet etching using hydrofluoric acid (HF). Through the above steps, a cooling passage 37 having a tunnel structure can be produced in a laminated structure of the interlayer insulating film and the metal wiring layer.

Although FIGS. 4 to 7 have described a case where the cooling path is formed in a laminated structure of an interlayer insulating film and a metal wiring layer, the present invention is not limited to this, and for example, an interlayer insulating film formed by the CVD method. By applying the same manufacturing method to the laminated structure with the silicon film, a cooling path for flowing the cooling fluid can be formed.

FIG. 8 is a perspective view showing a modified example of the semiconductor device shown in FIG. The cross section of the semiconductor device is shown in the figure. With reference to FIG. 8, in this modification, a via hole 41 extending from the top surface 2a side of the interlayer insulating film 2 to the back surface 1b side of the semiconductor substrate 1 is formed as a cooling path shown in FIG. The via hole 41 is formed so that the area of the cross section cut in a plane parallel to the main surface 1a becomes smaller from the top surface 2a toward the back surface 1b.

FIG. 9 is a perspective view showing another modification of the semiconductor device shown in FIG. The cross section of the semiconductor device is shown in the figure. With reference to FIG. 9, in this modification, a via hole 42 extending from the top surface 2a side of the interlayer insulating film 2 to the back surface 1b side of the semiconductor substrate 1 is formed as a cooling path shown in FIG. The via hole 42 is formed so that the area of the cross section cut in a plane parallel to the main surface 1a increases from the top surface 2a toward the back surface 1b. Although not shown in FIGS. 8 and 9, in these modified examples, the flow path for circulating and passing the cooling fluid extending from the via holes 41 and 42 is on the back surface 1b side of the semiconductor substrate 1. It is composed of a covering resin.

According to the semiconductor device configured in this way, the heat generated from the semiconductor element on the main surface 1a can be efficiently dissipated to the outside of the semiconductor device by flowing the cooling fluid through the provided cooling path. As a result, the semiconductor element can be protected from the influence of heat and desired semiconductor characteristics can be obtained. Further, it is possible to reduce the upper limit of the operating frequency of the semiconductor chip and the processing performance of the circuit, which is determined from the temperature rise due to heat generation, and realize a higher performance semiconductor integrated circuit.

In addition, by forming the cooling passage 3 inside the interlayer insulating film 2, the cooling passage can be arranged in a narrow region. As a result, it becomes easy to provide the cooling path 3 in the vicinity of the semiconductor element which is a heating element. Further, the cooling passage 3 has one end 4 and the other end 5 to which the cooling fluid is supplied and collected, and is located inside the package resin 11 between the one end 4 and the other end 5. A heat spreader 12 is placed to remove heat from the cooling fluid. Therefore, the cooling fluid having a low temperature is supplied to the cooling passage 3 one after another. As a result, more efficient heat dissipation can be performed.

(Embodiment 2) FIG. 10 is a cross-sectional view showing a part of the semiconductor device according to the second embodiment of the present invention. The semiconductor device according to the present embodiment further includes a cooling structure described with reference to FIG. 10 in addition to the cooling structure provided with the semiconductor device according to the first embodiment. In the figure, as compared with the semiconductor device according to the first embodiment, the same or corresponding members are assigned the same reference number.

With reference to FIG. 10, a transistor element 45 as a semiconductor element is formed on the main surface 1a of the semiconductor substrate 1. An interlayer insulating film 2 is deposited in multiple layers on the main surface 1a so as to cover the transistor element 45. The interlayer insulating film 2 is formed with a wiring 43 that is connected to the transistor element 45 and actually functions as an electric signal wiring or a power supply wiring. The wiring 43 is composed of a metal wiring 46 provided in each layer of the interlayer insulating film 2 and a via wiring 47 connected to the metal wiring 46. These metal wirings 46 and via wirings 47 provided in each layer of the interlayer insulating film 2 are formed in series between the multilayer layers of the interlayer insulating film 2. The via wiring 47 formed in the uppermost layer of the interlayer insulating film 2 is formed so as to be exposed from the top surface 2a of the interlayer insulating film 2. The bonding pad 16 is formed so as to come into contact with the exposed via wiring 47. A bonding wire 50 is connected to the bonding pad 16.

In the interlayer insulating film 2, in addition to the wiring 43 necessary and sufficient for the current capacity of the signal / power supply, the wiring 44 for the purpose of cooling is formed. Like the wiring 43, the wiring 44 is composed of a metal wiring 51 and a via wiring 52 which are connected between the multilayer layers of the interlayer insulating film 2. The metal pad 17 is formed so as to come into contact with the via wiring 52 exposed from the top surface 2a. A heat spreader 49 connected to the metal pad 17 via the metal bump 48 is provided at a position separated from the top surface 2a of the interlayer insulating film 2.

The transistor element 45 is arranged between the wiring 43 and the wiring 44. The wiring 43 and the wiring 44 can be formed from, for example, metals such as copper, aluminum, titanium, tungsten, cobalt and tantalum, alloys thereof, materials obtained by adding silicon to them, and silicides. These materials have a large thermal conductivity as compared with materials such as a silicon oxide film forming the interlayer insulating film 2.

A material mainly composed of aluminum and copper is used for the metal wiring constituting the wiring 43 and the wiring 44, and tungsten or copper is particularly used for the via wiring. Further, a metal such as cobalt or titanium is used as a salicide wiring in which silicide is formed at an interface with silicon or as an underlayer film of a wiring layer provided as a barrier metal.

The semiconductor device according to the second embodiment of the present invention has a wiring 43 as a first heat radiating member formed on the interlayer insulating film 2 and having a thermal conductivity relatively large with respect to the thermal conductivity of the interlayer insulating film 2. Further provided with wiring 44. Wiring 43 and 44 include via wiring 47 and 52 and metal wiring 46 and 51 as metal wiring. The wiring 43 and the wiring 44 are exposed from the top surface 2a as the surface of the interlayer insulating film 2. The semiconductor device further includes a wiring 43 exposed from the top surface 2a of the interlayer insulating film 2 and a heat spreader 49 as a second heat radiating member connected to the wiring 44, which is arranged outside the interlayer insulating film 2.

According to the semiconductor device configured in this way, the wiring 43 and the wiring 44, which have higher thermal conductivity than the interlayer insulating film 2, can function as a cooling structure in the interlayer insulating film 2. As a result, the heat generated from the transistor element 45 can be efficiently dissipated. Further, since the wiring 43 and the wiring 44 are formed so as to be exposed on the top surface 2a, heat does not stay in the interlayer insulating film 2. In addition, since the wiring 44 is connected to the heat spreader 49 on the top surface 2a, the heat transferred to the top surface 2a via the wiring 44 can be more efficiently dissipated to the outside.

In addition, all or a part of the wiring provided as the electric / signal wiring or the power supply wiring but not actually used may be used as the above-mentioned heat dissipation structure.

FIG. 11 is a cross-sectional view showing a modified example of the semiconductor device shown in FIG. With reference to FIG. 11, in this modification, a trench 56 that opens on the top surface 2a side is formed in the interlayer insulating film 2. The surface of the trench 56 is covered with a metal wiring film 57. The inside of the trench 56 is formed by plating and is filled with a heat radiating member 58 made of, for example, copper. On the top surface 2a of the interlayer insulating film 2, the top surface of the heat radiating member 58 extending at a position protruding from the top surface 2a and the heat spreader 49 are connected. FIG. 12 is a cross-sectional view showing another modification of the semiconductor device shown in FIG. With reference to FIG. 12, in this modification, the metal bump 48 is interposed between the heat radiating member 58 and the heat spreader 49 with respect to the cooling structure shown in FIG.

With these configurations, the same effect as that obtained by the semiconductor device shown in FIG. 10 can be obtained. The trench 56 shown in FIGS. 11 and 12 may be formed so as to reach from the top surface 2a side of the interlayer insulating film 2 to the back surface 1b side of the semiconductor substrate 1.

(Embodiment 3) FIG. 13 is a cross-sectional view showing a part of the semiconductor device according to the third embodiment of the present invention. The semiconductor device according to the present embodiment further includes a cooling structure described with reference to FIG. 13 in addition to the cooling structure provided with the semiconductor device according to the first embodiment. In the drawings, the same or corresponding members are assigned the same reference numbers as compared with the semiconductor devices already described.

With reference to FIG. 13, wirings 66, 67, 68 and 69 corresponding to the wiring 43 or the wiring 44 in the second embodiment are formed in the interlayer insulating film 2 at predetermined intervals. The interlayer insulating film 2 is further formed with a trench 63 located between the wirings 66, 67 and 68 and opening to the top surface 2a side. The trench 63 is filled with a heat radiating member 64 made of, for example, copper. The heat radiating member 64 is in contact with the metal pad 17 formed on the top surface 2a of the interlayer insulating film 2. The interlayer insulating film 2 is further formed with a trench 62 located between the metal wirings 68 and 69 and opening to the top surface 2a side. A cooling liquid passes through and circulates inside the trench 62.

Such a trench can be formed by a dry etching process usually used in a semiconductor wafer manufacturing process. Further, when it is desired to form a larger diameter opening, for example, by applying anisotropic wet etching of a silicon substrate using a potassium hydroxide solution (KOH), a quadrangular pyramid-shaped hole based on a pattern shape can be formed. Can be formed.

According to the semiconductor device configured in this way, in addition to the wirings 66 to 69 formed in the interlayer insulating film 2, the heat radiating member 64 filling the trench 63 and the cooling liquid flowing through the trench 62 are used for cooling. Function. Therefore, the efficiency of heat dissipation can be further improved.

(Embodiment 4) FIG. 14 is a perspective view showing a semiconductor device according to the fourth embodiment of the present invention. The semiconductor device according to the present embodiment further includes a cooling structure described with reference to FIG. 14 in addition to the cooling structure provided with the semiconductor device according to the first embodiment. In the drawings, the same or corresponding members are assigned the same reference numbers as compared with the semiconductor devices already described.

With reference to FIG. 14, the semiconductor device according to the present embodiment constitutes a high-frequency integrated circuit. An inductor 74 that bends and extends in an L shape and an antenna 73 that bends and extends in a spiral shape are formed on the top surface 2a of the interlayer insulating film 2. The inductor 74 and the antenna 73 are made of, for example, a material mainly composed of aluminum or copper. Semiconductor elements 71 and 72 are formed on the main surface 1a. The interlayer insulating film 2 is formed with a wiring 43 composed of a metal wiring 46 and a via wiring 47 connected to the semiconductor elements 71 and 72. The inductor 74 and the antenna 73 are connected to the wiring 43.

In the semiconductor device according to the fourth embodiment of the present invention, the second heat radiating member includes at least one of an inductor 74 as an inductor element and an antenna 73 as an antenna element.

According to the semiconductor device configured in this way, in addition to the wiring 43, the inductor 74 and the antenna 73 can function as a cooling structure. Therefore, the heat transferred to the top surface 2a of the interlayer insulating film 2 via the wiring 43 can be more efficiently dissipated to the outside.

(Embodiment 5) FIG. 15 is a perspective view showing a semiconductor device according to the fifth embodiment of the present invention. The cross section of the semiconductor device is shown in the figure. The semiconductor device according to the present embodiment further includes a heat insulating structure described with reference to FIG. 15 in addition to the cooling structure provided by the semiconductor device according to the first embodiment. In the drawings, the same or corresponding members are assigned the same reference numbers as compared with the semiconductor devices already described.

With reference to FIG. 15, a semiconductor element 81 is formed on the main surface 1a of the semiconductor substrate 1. The semiconductor substrate 1 is formed with a trench 82 that opens on the main surface 1a side and extends so as to surround the semiconductor element 81. The trench 82 is filled with a heat insulating member 85 made of, for example, a silicon oxide film or a silicon nitride film. The material constituting the heat insulating member 85 has a small thermal conductivity as compared with silicon or the like constituting the semiconductor substrate 1.

The semiconductor element 81 is a semiconductor element for which the influence of heat is desired to be suppressed to a small value, for example, a semiconductor element constituting an analog circuit. When a semiconductor element having a large calorific value is formed around the semiconductor element 81 with the heat insulating member 85 interposed therebetween, it is possible to suppress the heat generated from the semiconductor element from being transferred to the semiconductor element 81. As a result, it is possible to prevent the current value flowing through the semiconductor element 81 from fluctuating significantly due to a temperature change.

Further, the semiconductor element 81 and the semiconductor element having a large calorific value may be formed in the region surrounded by the heat insulating member 85. In this case, the heat from the semiconductor element formed outside the region surrounded by the heat insulating member 85 can be blocked, and the temperature inside the region surrounded by the heat insulating member 85 can be kept constant. Also by this, the same effect as the above-mentioned effect can be obtained.

In the semiconductor device according to the fifth embodiment of the present invention, the semiconductor substrate 1 is formed with a trench 82 as a recess that opens on the main surface 1a side so as to surround the semiconductor element 81.

FIG. 16 is a perspective view showing a modified example of the semiconductor device shown in FIG. FIG. 17 is a cross-sectional view taken along the line XVII-XVII in FIG. With reference to FIGS. 16 and 17, in this modification, two trenches 82 having an L-shaped bent shape are formed at positions facing each other with the semiconductor element 81 in between. As described above, the trench formed in the semiconductor substrate 1 does not have to be formed so as to completely surround the semiconductor element 81.

FIG. 18 is a perspective view showing another modification of the semiconductor device shown in FIG. FIG. 19 is a cross-sectional view taken along the line XIX-XIX in FIG. With reference to FIGS. 18 and 19, in this modification, the semiconductor substrate 1 has four trenches 87 extending in one direction on the main surface 1a and extending from the main surface 1a side to the back surface 1b side of the semiconductor substrate 1. Is formed. The four trenches 87 are arranged on the four sides surrounding the semiconductor element 81, respectively. By forming such a trench 87 and separating the semiconductor element 81 from its surroundings, an effect similar to the above-mentioned effect can be obtained. The trench 87 may be filled or filled with a cooling fluid.

According to the semiconductor device configured in this way, it is possible to suppress that the thermal change locally generated in the semiconductor substrate 1 extends to the semiconductor element 81 which is susceptible to the thermal change.

(Embodiment 6) FIG. 20 is a cross-sectional view showing a part of the semiconductor device according to the sixth embodiment of the present invention. The semiconductor device according to the present embodiment further includes a cooling structure described with reference to FIG. 20 in addition to the cooling structure provided with the semiconductor device according to the first embodiment. In the drawings, the same or corresponding members are assigned the same reference numbers as compared with the semiconductor devices already described.

With reference to FIG. 20, a semiconductor element 90 is formed on the main surface 1a of the semiconductor substrate 1. On the main surface 1a, an interlayer insulating film 2 is formed in which a plurality of layers 2p to 2s are laminated. A wiring 44 composed of a metal wiring 51 and a via wiring 52 is formed on the interlayer insulating film 2. The interlayer insulating film 2 further comprises a Peltier element 92 located in layer 2q and composed of two different metals (such as aluminum, copper, tungsten, titanium and cobalt) or different conductive semiconductors (such as silicon and germanium). And 93 are formed alternately in a direction parallel to the main surface 1a. The metal wiring 51 formed on the layer 2r and the metal wiring 51 formed on the layer 2q alternate to connect the Peltier elements 92 and 93 to each other at adjacent positions. A heat spreader 49 is provided on the top surface 2a of the interlayer insulating film 2. The heat spreader 49 and the metal pad 17 in contact with the via wiring 52 are connected via the metal bump 48.

FIG. 21 is an explanatory diagram for explaining the Peltier effect obtained by the semiconductor device shown in FIG. 20. With reference to FIGS. 20 and 21, it is assumed that the Peltier elements 92 and 93 are formed of n-type silicon and p-type silicon, respectively, and a current flows in the directions shown in the drawings. In this case, an endothermic action occurs on the side where the current goes from the Peltier element 92 to the Peltier element 93, and a heat dissipation action occurs on the side where the current goes from the Peltier element 93 to the Peltier element 92. As a result, the heat generated by the semiconductor element 90 formed on the main surface 1a is absorbed to the positions where the Peltier elements 92 and 93 are provided, and further dissipated to the top surface 2a of the interlayer insulating film 2. The heat is dissipated from the heat spreader 49 to the outside via the metal bump 48.

The semiconductor device according to the sixth embodiment of the present invention further includes Peltier elements 92 and 93 formed on the interlayer insulating film 2.

According to the semiconductor device configured in this way, a current in a predetermined direction is passed through the Peltier elements 92 and 93 to obtain a Peltier effect, thereby obtaining a specific portion (in the present embodiment, the semiconductor element 90 on the main surface 1a). ) Can be cooled. As a result, in addition to the effect of the wiring 44, the efficiency of heat dissipation can be further improved.

(Embodiment 7) FIG. 22 is a perspective view showing a semiconductor device according to the seventh embodiment of the present invention. FIG. 23 is a cross-sectional view taken along the line XXIII-XXIII in FIG. The semiconductor device according to the present embodiment further includes a cooling structure described with reference to FIG. 22 in addition to the cooling structure provided with the semiconductor device according to the first embodiment.

With reference to FIGS. 22 and 23, the semiconductor package 101 includes a semiconductor chip 10 composed of the semiconductor device shown in FIG. 1, a heat spreader 104 arranged at a predetermined distance from the semiconductor chip 10, and a semiconductor chip. It comprises 10 and a package resin 110 that covers the heat spreader 104. Inside the package resin 110, a cooling passage 105 having one end 106 for supplying the cooling fluid and the other end 107 for collecting the cooling fluid is formed. The cooling passage 105 extends from one end 106 toward the other end 107 in the vicinity of the heat spreader 104 while changing the direction at predetermined distance intervals.

The semiconductor package 101 as a semiconductor device according to the seventh embodiment of the present invention is a semiconductor chip 10 including a semiconductor substrate 1, an interlayer insulating film 2, and a cooling path 3, and a resin member formed so as to cover the semiconductor chip 10. It includes a package resin 110 and a cooling path 105 formed in the package resin 110 and used as a second cooling path through which a cooling fluid flows.

According to the semiconductor package 101 configured in this way, the heat released to the outside of the chip by the cooling structure provided on the semiconductor chip 10 is transferred to the heat spreader 104 via the package resin 110. In the present embodiment, since the cooling passage 105 is formed in the vicinity of the heat spreader 104, the heat released to the outside of the chip is efficiently dissipated to the outside of the package through the cooling fluid flowing through the cooling passage 105. be able to.

(Embodiment 8) FIG. 24 is a cross-sectional view showing a semiconductor device according to the eighth embodiment of the present invention. The semiconductor device according to the present embodiment further includes a cooling structure described with reference to FIG. 24 in addition to the cooling structure provided with the semiconductor device according to the first embodiment.

With reference to FIG. 24, the semiconductor chip 10 composed of the semiconductor device shown in FIG. 1 has a surface 10a in which a plurality of quadrangular pyramid-shaped holes 116 are formed. The bottom surface of the hole 116 is formed or penetrates in the chip. Due to such holes 116, the surface 10a of the semiconductor chip 10 is formed in a concavo-convex shape.

In the semiconductor chip 10 according to the eighth embodiment of the present invention, the surface 10a of the semiconductor chip 10 is formed in a concavo-convex shape.

According to the semiconductor chip 10 configured in this way, the surface area of the surface 10a can be increased. As a result, the heat generated by the semiconductor elements arranged inside the semiconductor chip 10 can be efficiently dissipated to the outside of the chip.

FIG. 25 is a cross-sectional view showing a modified example of the semiconductor device shown in FIG. 24. With reference to FIG. 25, in this modification, the surface 10a of the semiconductor chip 10 is roughly polished mechanically to be roughened into an uneven shape. The semiconductor chip 10 is provided with a heat radiating member 121 made of, for example, copper, iron-nickel alloy, solder, or the like so as to come into contact with the roughened surface 10a. With such a configuration, the contact area between the heat radiating member 121 and the semiconductor chip 10 can be increased, and efficient heat radiating can be realized.

As another modification, in a semiconductor process for manufacturing a semiconductor chip, an HSG (hemispherical silicon grain) oxidation step may be performed on a part of a polysilicon film deposited for a gate electrode. In this case, an amorphous silicon thin film is further deposited on the deposited polysilicon film. Then, heat treatment is performed at a temperature of about 550 ° C. to grow granular silicon on the polysilicon film. By these steps, a hemispherical uneven shape can be formed on the surface of the polysilicon film.

(Embodiment 9) FIG. 26 is a cross-sectional view showing a semiconductor device according to the ninth embodiment of the present invention. With reference to FIG. 29, the semiconductor package 131 is a multi-chip type semiconductor package in which a plurality of semiconductor chips 132 are mounted inside. The semiconductor package 131 is composed of a plurality of semiconductor chips 132 (132a, 132b and 132c) positioned at predetermined intervals from each other, a metal bump 133 connecting between the plurality of semiconductor chips 132, and a plurality of semiconductor chips 132. It is provided with a heat radiating member 135 made of, for example, copper, which is arranged between them. Although not shown, the semiconductor package 131 is provided with a resin material such as a package resin or polyimide as a filler between the plurality of semiconductor chips 132.

The plurality of semiconductor chips 132 are arranged so that the semiconductor chips 132a and 132c are located at both ends and the semiconductor chips 132b are located between them. Via wiring 134 penetrating the chip is formed in each of the plurality of semiconductor chips 132. By providing the metal bump 133 in contact with the via wiring 134, a plurality of semiconductor chips 132 are connected to each other in a laminated state.

A heat spreader 136 is arranged at a position adjacent to the semiconductor chip 132c with a gap between the heat spreader and the semiconductor chip 132c. The semiconductor chip 132c and the heat spreader 136 are connected by a metal bump 133 that contacts the via wiring 134 formed on the semiconductor chip 132c. A heat radiating member 135 is arranged between the semiconductor chip 132c and the heat spreader 136.

In the present embodiment, the heat radiating member 135 is arranged between the plurality of semiconductor chips 132 and between the semiconductor chip 132c and the heat spreader 136, but the present invention is not limited to this. For example, a cooling path may be formed in the package resin that fills the space between them, and a cooling gas or liquid may flow through the cooling path.

Further, in the present embodiment, the semiconductor chips 132b, which generate a relatively small amount of heat when driven, are positioned at the intermediate portion of the arrangement of the plurality of semiconductor chips 132, and the plurality of semiconductor chips 132a and 132c, which generate a relatively large amount of heat, are present. It is arranged at both ends of the array of semiconductor chips 132 of. Further, preferably, the calorific value of the semiconductor chips 132a and 132b may be smaller than the calorific value of the semiconductor chips 132c provided adjacent to the heat spreader 136.

The multi-chip type semiconductor package 131 according to the ninth embodiment of the present invention has a plurality of semiconductor chips 132 arranged in one direction at intervals from each other, and the plurality of semiconductor chips 132 are in direct contact with each other and are adjacent to each other. A metal bump 133 as a metal wiring for connecting a plurality of semiconductor chips 132 to each other and a heat radiating member 135 as a heat radiating means arranged between a plurality of adjacent semiconductor chips 132 are provided. The amount of heat generated from the semiconductor chip 132b located in the middle of the plurality of semiconductor chips 132 arranged in one direction is generated from the semiconductor chips 132a and 132c located at both ends of the plurality of semiconductor chips 132 arranged in one direction. It is less than the amount of heat to be generated.

The semiconductor package 131 further includes a heat spreader 136 as a heat dissipation plate adjacent to the semiconductor chip 132c located at the end of the plurality of semiconductor chips 132 arranged in one direction and connected to the semiconductor chip 132c. The amount of heat generated from the plurality of semiconductor chips 132a and 132b except for the semiconductor chip 132c to which the heat spreader 136 is connected is smaller than the amount of heat generated from the semiconductor chip 132c to which the heat spreader 136 is connected.

According to the semiconductor package 131 configured in this way, since the plurality of semiconductor chips 132 are connected to each other via the metal bumps 133, the generated heat can be thermally conducted between the chips. As a result, the temperature gradient in the direction in which the plurality of semiconductor chips 132 are arranged is reduced, and the plurality of semiconductor chips 132 are cooled by the heat radiating member 135 arranged between the chips and the heat spreader 136 arranged adjacent to the semiconductor chips 132c. be able to.

Generally, the semiconductor chip is provided with an absolute maximum rating of the junction temperature, and there is a temperature upper limit for preventing element destruction. Further, when the semiconductor element is operated at a high temperature, the transistor performance deteriorates due to the decrease in carrier mobility inside the semiconductor, the driver drive current / driver ability decreases and the operation speed decreases, and the junction leakage current increases sharply. Deterioration of device characteristics such as increased power consumption is caused. Further, if there is a temperature gradient between the chips, it is assumed that the variation in semiconductor characteristics increases and a deviation occurs in the design operation timing. In particular, if the temperature differs between the signal transmitting side and the signal receiving side and the signal timing is deviated, a malfunction may occur. According to the semiconductor package 131 in the present embodiment, these problems can be solved by the above-mentioned effects.

Further, at a position away from the intermediate portion where the plurality of semiconductor chips 132 are arranged and the heat spreader 136, the heat generated from the semiconductor chips is relatively difficult to be dissipated. Therefore, by arranging the semiconductor chip having a large calorific value at such a position, the temperature gradient can be further reduced and the semiconductor chip can be cooled more efficiently.

(Embodiment 10) FIG. 27 is a perspective view showing a semiconductor device according to the tenth embodiment of the present invention. FIG. 28 is a front view showing the semiconductor device seen from the arrow XXVIII shown in FIG. 27.

With reference to FIGS. 27 and 28, the semiconductor package 151 is a multi-chip type semiconductor package in which a plurality of semiconductor chips 152 are mounted inside. The semiconductor package 151 is formed by filling a plurality of semiconductor chips 152 (152a, 152b and 152c) positioned at intervals and a plurality of semiconductor chips 152, and a resin material (not shown) made of a package resin, polyimide, or the like, and a resin material thereof. It is provided with a cooling passage 155 formed of a resin material and through which a cooling gas or liquid flows.

The semiconductor chips 152a and 152c have surfaces 161 and 163, respectively, at positions facing each other. The semiconductor chip 152b has a surface 162 at a position facing the semiconductor chip 152c. The semiconductor chips 152a and 152c are arranged so as to be offset from each other so that the surface 161 has a portion that does not face the surface 163. A space 153 is defined adjacent to the semiconductor chips 152a and 152c in the vicinity of the portion of the surface 161 that does not face the surface 163. Similarly, the semiconductor chip 152b has a portion on the surface 162 that does not face the surface 163 of the semiconductor chip 152c, and a space 153 is defined in the vicinity of the portion adjacent to the semiconductor chips 152b and 152c. .. Further, a space 153 is also defined between the semiconductor chip 152a and the semiconductor chip 152b.

The cooling path 155 is located in the space 153 and extends along the periphery of the semiconductor chip. In addition to the cooling passage 155, a heat radiating member made of copper or the like may be arranged in the space 153.

FIG. 29 is a front view showing a modified example of the semiconductor package shown in FIG. 28. With reference to FIG. 29, in this modification, the semiconductor chips 152b and 152c are arranged in the same manner as the semiconductor package 151 shown in FIG. 28. A cooling passage 155 is provided in the space 153 defined adjacent to the semiconductor chips 152b and 152c.

FIG. 30 is a front view showing another modification of the semiconductor package shown in FIG. 28. With reference to FIG. 30, a semiconductor package is composed of a plurality of semiconductor chips 152 (152d and 152e) positioned at predetermined intervals from each other and a plurality of semiconductor chips 152, and is made of a package resin, polyimide, or the like. It includes a resin material (not shown) and a cooling passage 155 formed in the resin material through which a cooling gas or liquid flows.

The semiconductor chips 152d and 152e have surfaces 181 and 182, respectively, at positions facing each other. The surface 182 is formed in an area larger than the surface 181 and has a portion that does not face the surface 181. A space 153 is defined adjacent to the semiconductor chips 152d and 152e in the vicinity of the portion of the surface 182 that does not face the surface 181. The cooling passage 155 is located in the space 153 and extends along the peripheral edge of the semiconductor chip 152d.

The multi-chip type semiconductor package 151 according to the tenth embodiment of the present invention includes a plurality of semiconductor chips 152 arranged so as to define a space 153 at positions adjacent to each other, and cooling as heat dissipation means provided in the space 153. Equipped with road 155. The plurality of semiconductor chips 152 are two semiconductor chips 152d and 152e having differently sized surfaces 181 and 182 at facing each other, and two semiconductor chips 152a and 152c (152b) staggered at adjacent positions. And 152c) include at least one of them. The heat radiating means includes at least one of a cooling passage 155 through which the cooling fluid flows and a heat radiating member made of a metal material.

According to the semiconductor package 151 configured in this way, since the cooling passage 155 is formed in the space 153 defined between the adjacent semiconductor chips, the semiconductor chip 151 can be efficiently maintained while keeping the semiconductor package 151 compact. Can be cooled. As a result, the number of semiconductor chips mounted on the semiconductor package 151 can be increased, and a high-performance semiconductor integrated circuit can be realized.

The semiconductor device may be configured by appropriately combining the semiconductor devices of the first to tenth embodiments described above. In this case, the effects obtained by the semiconductor devices of the combined embodiment can be comprehensively obtained.

It should be considered that the embodiments disclosed this time are exemplary in all respects and not restrictive. The scope of the present invention is shown by the scope of claims rather than the above description, and it is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

<figref num="1">It is a perspective view which shows the semiconductor device in Embodiment 1 of this invention.</figref><figref num="2">It is a perspective view which shows the semiconductor package provided with the semiconductor device shown in FIG.</figref><figref num="3">It is sectional drawing which shows the structure of the pump tip in FIG.</figref><figref num="4">It is sectional drawing which shows the 1st step of the method of manufacturing a cooling path in an interlayer insulating film.</figref><figref num="5">It is sectional drawing which shows the 2nd step of the method of manufacturing a cooling path in an interlayer insulating film.</figref><figref num="6">It is sectional drawing which shows the 3rd process of the method of manufacturing a cooling path in an interlayer insulating film.</figref><figref num="7">It is sectional drawing which shows the 4th process of the method of manufacturing a cooling path in an interlayer insulating film.</figref><figref num="8">It is a perspective view which shows the modification of the semiconductor device shown in FIG.</figref><figref num="9">It is a perspective view which shows another modification of the semiconductor device shown in FIG.</figref><figref num="10">It is sectional drawing which shows a part of the semiconductor device in Embodiment 2 of this invention.</figref><figref num="11">It is sectional drawing which shows the modification of the semiconductor device shown in FIG.</figref><figref num="12">It is sectional drawing which shows another modification of the semiconductor device shown in FIG.</figref><figref num="13">It is sectional drawing which shows a part of the semiconductor device in Embodiment 3 of this invention.</figref><figref num="14">It is a perspective view which shows the semiconductor device in Embodiment 4 of this invention.</figref><figref num="15">It is a perspective view which shows the semiconductor device in Embodiment 5 of this invention.</figref><figref num="16">It is a perspective view which shows the modification of the semiconductor device shown in FIG.</figref><figref num="17">It is sectional drawing along the line XVII-XVII in FIG.</figref><figref num="18">It is a perspective view which shows another modification of the semiconductor device shown in FIG.</figref><figref num="19">It is sectional drawing along the XIX-XIX line in FIG.</figref><figref num="20">It is sectional drawing which shows a part of the semiconductor device in Embodiment 6 of this invention.</figref><figref num="21">It is explanatory drawing for demonstrating the Peltier effect obtained by the semiconductor device shown in FIG.</figref><figref num="22">It is a perspective view which shows the semiconductor device in Embodiment 7 of this invention.</figref><figref num="23">It is sectional drawing along the line XXIII-XXIII in FIG.</figref><figref num="24">It is sectional drawing which shows the semiconductor device in Embodiment 8 of this invention.</figref><figref num="25">It is sectional drawing which shows the modification of the semiconductor device shown in FIG.</figref><figref num="26">It is sectional drawing which shows the semiconductor device in Embodiment 9 of this invention.</figref><figref num="27">It is a perspective view which shows the semiconductor device in Embodiment 10 of this invention.</figref><figref num="28">It is a front view which shows the semiconductor device seen from the arrow XXVIII shown in FIG. 27.</figref><figref num="29">It is a front view which shows the modification of the semiconductor package shown in FIG. 28.</figref><figref num="30">It is a front view which shows another modification of the semiconductor package shown in FIG. 28.</figref>

Code description

1 Semiconductor substrate, 1a main surface, 2 interlayer insulating film, 2a top surface, 3,105,155 cooling path, 4 one end, 5 other end, 10,132,132a, 132b, 132c, 152,152a, 152b, 152c, 152d, 152e semiconductor chip, 10a , 181,182 Surface, 11,110 Package resin, 12,49,136 Heat spreader, 13 Pump chip, 20,131,151 Semiconductor package, 43,44,66,67,68,69 Wiring, 46,51 Metal wiring, 47,52 Via wiring, 64,135 Heat dissipation member, 73 antennas, 74 inductors, 81 semiconductor devices, 82,87 trenches, 92,93 Peltier elements, 133 metal bumps, 153 spaces.