Network electronic component and manufacturing method thereof

The present invention relates to network electronic components and methods for manufacturing the same.

Some conventional network electronic components include a plurality of thin film resistance elements separated from each other (see, for example, Patent Document 1). In this network electronic component, a plurality of grooves are provided on both side surfaces of the ceramic substrate, and a plurality of pairs of upper electrodes are provided on the portion of the upper surface of the ceramic substrate that does not correspond to the groove, and the portion of the lower surface of the ceramic substrate that does not correspond to the groove. A plurality of pairs of lower electrodes are provided, and a plurality of pairs of side electrodes are provided connected to the corresponding upper electrodes and lower electrodes on the portions of both sides of the ceramic substrate that do not correspond to the grooves, and a thin film is provided between the upper electrodes of each pair. A resistor is provided, and a protective glass layer, an intermediate glass layer, and a coated glass layer are provided on a ceramic substrate including a thin film resistor, and an electrode portion composed of an upper electrode, a lower electrode, and a side electrode exposed in this state. It has a structure in which nickel plating and solder plating are provided on the surface.

<patcit num="1"><text>Japanese Unexamined Patent Publication No. 2000-348914</text></patcit>

By the way, in the case of manufacturing a network electronic component having the above structure, a first break groove and a second break groove are latticed on the upper surface of an aggregate ceramic substrate having an area capable of forming a plurality of completed network electronic components. A through hole for forming a side groove is formed on the aggregated ceramic substrate on the first break groove, an electrode paste is printed on the upper surface of the aggregated ceramic substrate to form an upper electrode, and an electrode is formed on the lower surface of the aggregated ceramic substrate. The paste is printed to form the lower electrode, the resistor paste is printed between the pair of upper electrodes to form the thin film resistor, and the protective glass layer to protect the thin film resistor is printed to form the intermediate. The glass layer and the coated glass layer are printed and formed, and the aggregated ceramic substrate is cut along the first break groove and divided into a plurality of bar-shaped ceramic substrates having grooves on both side surfaces, and both side surfaces of the bar-shaped ceramic substrate are divided. A side electrode is formed by applying electrode paste to the ceramic substrate, and the bar-shaped ceramic substrate is cut along the second break groove to divide the ceramic substrate into a plurality of single ceramic substrates. Nickel plating and solder plating are formed on the surface of the electrode portion.

<p> However, in the network electronic component having the above structure, the electrode portion includes an upper electrode provided on the upper surface of the ceramic substrate in a portion not corresponding to the groove and a lower electrode provided on the lower surface of the ceramic substrate in a portion not corresponding to the groove. Since it is composed of side electrodes provided on both side surfaces of the ceramic substrate in a portion not corresponding to the groove, there is a problem that the structure is complicated and the manufacturing process is extremely complicated. Explaining the manufacturing process, the first break groove and the second break groove forming step, the through hole forming step, the upper electrode forming step, the lower electrode forming step, the thin film resistor forming step, the protective glass layer forming step, the intermediate glass layer and the coating There are many steps such as glass layer forming step, first break groove cutting step, side electrode forming step, second break groove cutting step, nickel plating and solder plating forming step, and the side electrode forming step is the first break. After the groove cutting step, the nickel plating and solder plating forming steps are after the second break groove cutting step, and the manufacturing process becomes extremely complicated.</p><p> Therefore, an object of the present invention is to provide a network electronic component having a simple structure and capable of simplifying a manufacturing process.</p>

<p> In order to achieve the above object, the present invention includes a substrate, a thin film passive element provided on the substrate, and a plurality of externals connected to the thin film passive element on the substrate including the thin film passive element. It is characterized by having a connecting electrode.</p>

<p> According to the present invention, since the external connection electrode is provided only on the substrate, the structure is simple and the manufacturing process can be simplified.</p>

(First Embodiment) FIG. 1 shows an equivalent circuit plan view of a network electronic component as the first embodiment of the present invention. In this network electronic component, two thin film resistance elements (thin film passive elements) 2 are provided separately from each other on a planar square silicon substrate (semiconductor substrate) 1. In this case, both ends of the thin film resistance element 2 are connected to an external connection electrode composed of a columnar electrode 11 described later.

Next, FIG. 2 shows a plan view of the network electronic component shown in FIG. 1, and FIG. 3 shows a cross-sectional view taken along the line III-III of FIG. Explaining with reference to FIG. 3, a strip-shaped thin film resistor 3 made of NiCr, TaN, or the like is provided on the upper surface of the silicon substrate 1. A plurality of connection pads 4 made of an aluminum-based metal or the like are provided on the upper surfaces of both ends of the thin film resistor 3. An insulating film 5 made of silicon oxide or the like is provided on the upper surface of the silicon substrate 1 including the thin film resistor 3 in a region other than the central portion of the connection pad 4, and the central portion of the connection pad 4 is an opening provided in the insulating film 5. It is exposed through part 6.

A protective film (insulating film) 7 made of a polyimide resin, an epoxy resin, or the like is provided on the upper surface of the insulating film 5. In this case, the protective film 7 in the portion of the insulating film 5 corresponding to the opening 6 is provided with the opening 8. A base metal layer 9 made of copper or the like is provided on the upper surface of the protective film 7. A wiring 10 made of copper is provided on the entire upper surface of the base metal layer 9. One end of the wiring 10 including the base metal layer 9 is connected to the connection pad 4 via both openings 6 and 8.

A columnar electrode 11 made of copper is provided on the upper surface of the connection pad portion of the wiring 10. On the upper surface of the protective film 7 including the wiring 10, a sealing film 12 made of an epoxy resin, a polyimide resin, or the like is provided so that the upper surface thereof is flush with the upper surface of the columnar electrode 11. A solder ball 13 is provided on the upper surface of the columnar electrode 11.

By the way, as shown in FIG. 1, two thin film resistance elements 2 are provided separately from each other on a planar square silicon substrate 1, and external connection electrodes composed of four columnar electrodes 11 are provided in two rows and two columns. It is located in. Therefore, as shown in FIG. 2, the columnar electrodes 11 and the solder balls 13 are arranged in 2 rows and 2 columns. Here, to explain an example of some dimensions of the network electronic component, the size of the silicon substrate 1 is 1.0 mm × 1.0 mm, the pitch of the columnar electrodes 11 is 0.5 mm, and the diameter of the columnar electrodes 11 is 0.25. mm.

Next, an example of a method for manufacturing the network electronic component will be described. First, as shown in FIG. 4, a silicon substrate (semiconductor substrate) 1 in a wafer state is prepared. Here, in FIG. 4, the square-shaped and unmarked area surrounded by the vertical line and the horizontal line is the network electronic component forming area 21, and the area marked with x is the alignment mark forming area 22. Therefore, the vertical and horizontal lines are dicing street 23. However, the dicing street 23 is not actually formed on the upper surface of the silicon substrate 1, but is a virtual line in design.

Next, as shown in FIG. 5, a strip-shaped thin film resistor 3 made of NiCr, TaN, or the like is printed and fired on the upper surface of the silicon substrate 1 in a wafer state. In this state, two strip-shaped thin film resistors 3 are formed parallel to each other on the upper surface of the silicon substrate 1 in one square network electronic component forming region 21 shown in FIG. Next, a connection pad 4 made of an aluminum-based metal or the like is formed on the upper surfaces of both ends of the thin film resistor 3.

Next, an insulating film 5 made of silicon oxide or the like is formed on the entire upper surface of the silicon substrate 1 including the thin film resistor 3 and the connection pad 4. Next, an opening 6 is formed in the insulating film 5 at the portion corresponding to the central portion of the connection pad 4. Next, a protective film 7 made of a polyimide resin, an epoxy resin, or the like is formed on the entire upper surface of the smoke screen 5 including the inside of the opening 5. Next, the opening 8 is formed in the protective film 7 at the portion corresponding to the opening 6 of the insulating film 5.

Next, as shown in FIG. 6, the base metal layer 9 is formed on the entire upper surface of the protective film 7 including the upper surface of the connection pad 4 exposed through the openings 6 and 8. In this case, the base metal layer 9 may be only a copper layer formed by electroless plating, may be only a copper layer formed by sputtering, or is a thin film such as titanium formed by sputtering. A copper layer may be formed on the layer by sputtering.

Next, the plating resist film 24 is patterned on the upper surface of the base metal layer 9. In this case, an opening 25 is formed in the plated resist film 24 in the portion corresponding to the wiring 10 forming region. Next, the wiring 10 is formed on the upper surface of the base metal layer 9 in the opening 25 of the plating resist film 24 by performing electrolytic plating of copper using the base metal layer 9 as a plating current path. Next, the plating resist film 24 is peeled off.

Next, as shown in FIG. 7, the plating resist film 26 is patterned on the upper surface of the base metal layer 9 including the wiring 10. In this case, an opening 27 is formed in the plated resist film 26 in the portion corresponding to the columnar electrode 11 forming region. Next, the columnar electrode 11 is formed on the upper surface of the connection pad portion of the wiring 10 in the opening 27 of the plating resist film 26 by performing electrolytic plating of copper using the base metal layer 9 as a plating current path. Next, the plated resist film 26 is peeled off, and then the unnecessary portion of the base metal layer 9 is etched and removed using the wiring 10 as a mask. As shown in FIG. 8, the base metal layer 9 is formed only under the wiring 10. It remains.

Next, as shown in FIG. 9, the entire upper surface of the protective film 7 including the columnar electrode 11 and the wiring 10 is sealed with an epoxy resin, a polyimide resin, or the like by a screen printing method, a spin coating method, a die coating method, or the like. The film 12 is formed so that its thickness is thicker than the height of the columnar electrode 11. Therefore, in this state, the upper surface of the columnar electrode 11 is covered with the sealing film 12.

Next, the upper surface side of the sealing film 12 and the columnar electrode 11 is appropriately polished to expose the upper surface of the columnar electrode 11 and, as shown in FIG. 10, a seal including the upper surface of the exposed columnar electrode 11. Flatten the upper surface of the waterproof film 12. Here, the reason why the upper surface side of the columnar electrode 11 is appropriately polished is that the height of the columnar electrode 11 formed by electrolytic plating varies. Therefore, this variation is eliminated to make the height of the columnar electrode 11 uniform. To make it.

Next, as shown in FIG. 11, a solder ball 13 is formed on the upper surface of the columnar electrode 11. Next, the lower surface of the silicon substrate 1 is attached to a dicing tape (not shown), and as shown in FIG. 12, the alignment mark (not shown) formed in the alignment mark forming region 22 shown in FIG. 4 is used as a reference. , The silicon substrate 1 and the like are cut along the dicing street 23 and peeled off from the dicing tape to obtain a plurality of network electronic components shown in FIG.

The network electronic component thus obtained has a simple structure because the columnar electrode 11 as an electrode for external connection is provided only on the silicon substrate 1. Further, in the above manufacturing method, the thin film resistor 3, the connection pad 4, the wiring 10, the columnar electrode 11 and the solder ball 13 are collectively formed on the plurality of network electronic component forming regions 21 on the silicon substrate 1 in the wafer state. After that, it is divided along the dicing street 23 to obtain a plurality of network electronic components, so that the manufacturing process can be simplified.

(Second Embodiment) FIG. 13 shows an equivalent circuit plan view of a network electronic component as a second embodiment of the present invention. In this network electronic component, an RC element (low-pass filter) composed of one thin film resistance element 2 and one thin film capacitance element (thin film passive element) 31 is provided on a flat square silicon substrate 1. In this case, both ends of the thin film resistance element 2 are connected to the input-side and output-side external connection electrodes 32 and 33, which are columnar electrodes. One end of the thin film capacitance element 31 is connected to the output side of the thin film resistance element 2, and the other end is connected to the input side and output side external connection electrodes 34 and 35 composed of columnar electrodes.

Next, the portion of the thin film resistance element 2 shown in FIG. 13 will be described with reference to FIG. 14, which is a cross-sectional view taken along the line XIV-XIV of FIG. The network electronic component shown in FIG. 14 differs from the network electronic component shown in FIG. 3 in that an interlayer insulating film 41 made of an epoxy resin, a polyimide resin, or the like is provided between the protective film 7 and the sealing film 12. An intermediate wiring 43 made of copper including a base metal layer 42 made of copper or the like provided on the upper surface of the protective film 7 is connected to the connection pad 4 via the insulating film 5 and the openings 6 and 8 of the protective film 7, and is interposed. This is a point in which the wiring 10 including the base metal layer 9 provided on the upper surface of the insulating film 41 is connected to the intermediate wiring 43 via the opening 44 provided in the interlayer insulating film 41.

Next, the portion of the thin film capacitive element 31 shown in FIG. 13 will be described with reference to FIG. 15, which is a cross-sectional view taken along the line XV-XV of FIG. A lower conductive layer 46 made of copper including a base metal layer 45 made of copper or the like is provided on the upper surface of the protective film 7. In this case, the lower conductive layer 46 including the base metal layer 45 is connected to the intermediate wiring 43 including the base metal layer 42 shown in FIG. 14 via a routing wire (not shown). An upper conductive layer 48 made of copper including a base metal layer 47 made of copper or the like is provided on the upper surface of the interlayer insulating film 41.

Here, the upper conductive layer 48 and the lower conductive layer 46 are arranged so as to face each other with the interlayer insulating film 41 interposed between them, forming the thin film capacitive element 31. The upper conductive layer 48 has two connection pad portions, and a columnar electrode 11 is provided on the upper surface of these connection pad portions. A sealing film 12 is provided on the upper surface of the interlayer insulating film 41 including the upper conductive layer 48 so that the upper surface thereof is flush with the upper surface of the columnar electrode 11. A solder ball 13 is provided on the upper surface of the columnar electrode 11.

Further, even in this network electronic component, since the columnar electrode 11 as an electrode for external connection is provided only on the silicon substrate 1, the structure is simple. Further, also in the case of manufacturing this network electronic component, as in the case of the first embodiment, the thin film resistor 3, the connection pad 4, and the intermediate wiring are applied to the plurality of network electronic component forming regions on the silicon substrate 1. 43, the lower conductive layer 46, the wiring 10, the upper conductive layer 48, the columnar electrode 11 and the solder ball 13 are formed all at once, and then divided to obtain a plurality of network electronic components, so that a manufacturing process can be obtained. Can be simplified.

(Third Embodiment) FIG. 16 shows an equivalent circuit plan view of a network electronic component as a third embodiment of the present invention. In this network electronic component, one thin film resistance element 2 and two thin film capacitance elements 31 are provided on the silicon substrate 1. In this case, both ends of the thin film resistance element 2 are connected to an external connection electrode composed of two upper columnar electrodes 11. Both ends of one thin film capacitive element 31 are connected to an external connection electrode composed of two columnar electrodes 11 on the left side. Both ends of the other thin film capacitive element 31 are connected to an external connection electrode composed of two columnar electrodes 11 on the right side.

(Fourth Embodiment) For example, in the first embodiment, a network is cut along all of the dicing street 23 shown in FIG. 4, and as shown in FIG. 1, a network having a planar square shape and two thin film resistance elements 2. We have obtained a plurality of electronic components, but the present invention is not limited to this. For example, in FIG. 4, when cutting is performed along all of the dicing streets 23 composed of vertical lines and every other dicing street 23 composed of horizontal lines is performed, the fourth embodiment of the present invention shown in FIG. As described above, a plurality of network electronic components having a flat rectangular shape and having four thin film resistance elements 2 can be obtained.

(Fifth Embodiment) Further, in FIG. 4, when cutting along every other dicing street 23 consisting of vertical lines and cutting along every other dicing street 23 consisting of horizontal lines, FIG. 18 shows. As shown in the fifth embodiment of the present invention, a plurality of network electronic components having a square planar shape and eight thin film resistance elements 2 can be obtained.

Here, as is clear from the first, fourth, and fifth embodiments, when cutting the silicon substrate 1 in the same wafer state shown in FIG. 4, the network electronic component forming region is simply changed by changing the dicing position. It can be divided so that one 21 is included, or the network electronic component forming region 21 can be divided so as to include two or four, that is, an even number. As described above, such cutting is possible for the thin film resistor 3, the connection pad 4, the wiring 10, and the columnar electrode 11 for the plurality of network electronic component forming regions 21 on the silicon substrate 1 in the wafer state. This is because the solder balls 13 are formed all at once and then divided.

(Sixth Embodiment) FIG. 19 shows a cross-sectional view of a network electronic component as a sixth embodiment of the present invention. This network electronic component differs from the network electronic component shown in FIG. 3 in that a solder layer 13a is provided on the upper surface of the columnar electrode 11 instead of the solder ball 13.

(7th Embodiment) FIG. 20 shows a cross-sectional view of a network electronic component as a 7th embodiment of the present invention. This network electronic component differs from the network electronic component shown in FIG. 3 in that it does not have the columnar electrode 11 and the sealing film 11, and the overcoat film 51 made of a solder resist or the like is formed on the upper surface of the protective film 7 including the wiring 10. An opening 52 is provided in the overcoat film 51 in the portion corresponding to the connection pad portion of the wiring 10, and a solder ball is provided on the connection pad portion (external connection electrode) of the wiring 10 exposed through the opening 52. It is a point that provided.

(Eighth Embodiment) FIG. 21 shows a cross-sectional view of a network electronic component as an eighth embodiment of the present invention. This network electronic component differs from the network electronic component shown in FIG. 20 in that the base metal layer 53 made of copper or the like and copper are formed on the upper surface of the overcoat film 51 in and near the opening 52 of the overcoat film 51. The upper layer connection pad (external connection electrode) 54 is provided by being connected to the connection pad portion of the wiring 10, and the solder ball 13 is provided on the upper layer connection pad 54 including the base metal layer 53.

<figref num="1">The equivalent circuit plan view of the network electronic component as the 1st Embodiment of this invention.</figref><figref num="2">Top view of the network electronic components shown in FIG.</figref><figref num="3">Sectional view taken along line III-III of FIG.</figref><figref num="4">Top view of the silicon substrate in the wafer state initially prepared when manufacturing the network electronic components shown in FIGS. 1 to 3.</figref><figref num="5">Sectional drawing of the process following FIG.</figref><figref num="6">Sectional drawing of the process following FIG.</figref><figref num="7">Sectional drawing of the process following FIG.</figref><figref num="8">Sectional drawing of the process following FIG.</figref><figref num="9">Sectional drawing of the process following FIG.</figref><figref num="10">Sectional drawing of the process following FIG.</figref><figref num="11">Sectional drawing of the process following FIG.</figref><figref num="12">Sectional drawing of the process following FIG.</figref><figref num="13">An equivalent circuit plan view of a network electronic component as a second embodiment of the present invention.</figref><figref num="14">Sectional view taken along line XIV-XIV in FIG.</figref><figref num="15">Sectional view taken along line XV-XV in FIG.</figref><figref num="16">An equivalent circuit plan view of a network electronic component as a third embodiment of the present invention.</figref><figref num="17">An equivalent circuit plan view of a network electronic component as a fourth embodiment of the present invention.</figref><figref num="18">FIG. 5 is an equivalent circuit plan view of a network electronic component as a fifth embodiment of the present invention.</figref><figref num="19">FIG. 6 is a cross-sectional view of a network electronic component as a sixth embodiment of the present invention.</figref><figref num="20">Sectional drawing of the network electronic component as the 7th Embodiment of this invention.</figref><figref num="21">Sectional drawing of the network electronic component as the 8th Embodiment of this invention.</figref>

Code description

1 Silicon substrate 2 Thin film resistor 3 Thin film resistor 4 Connection pad 5 Insulation film 7 Protective film 10 Wiring 11 Columnar electrode 12 Encapsulating film 13 Solder ball