Semiconductor memory device

【0001】

[Technical field to which the invention belongs]

The present invention relates to a semiconductor storage device, and more particularly to an electrically rewritable non-volatile semiconductor memory integrated circuit (hereinafter referred to as EEPROM). In addition, it has a test operation mode that is different from the normal operation mode, and is equipped with a circuit that can switch to the test operation mode by applying a voltage higher than the voltage recommended in the normal operation mode to a predetermined external terminal. Regarding semiconductor storage devices.

【0002】

[Explanation of prior art]

Some semiconductor storage devices have a function of switching to a test operation mode by applying a high voltage to an external terminal. The high voltage shown here indicates a voltage higher than the power supply voltage in the range applied in the normal operation mode. For example, if the maximum operating power supply voltage of the IC is 5V, it indicates a voltage exceeding 5V. Generally, a voltage of about 10V is applied.

【0003】

In order to realize the function, a voltage detection circuit for detecting a high voltage is built in. In the above example, the voltage detection circuit detects a signal by applying a voltage of 10V to a predetermined external terminal by setting the detection voltage of the voltage detection circuit to be more than 5V and less than 10V (generally 9V). Can be output and switched to the test operation mode. Since the detected voltage is determined by the specifications of the maximum operating power supply voltage and the device characteristics of the semiconductor process used, it is possible that the voltage conditions other than those described above may be met.

【0004】

The external terminal to which a high voltage is applied is a dedicated terminal having only the purpose of detecting the test operation mode and having no other function. Further, the external terminal is a power supply voltage application terminal, and can be a terminal that also has a purpose of applying a power supply voltage and a voltage detection function for switching to a test operation mode. Further, the external terminal is an input terminal, an output terminal, or an input / output terminal, and can be a terminal that has both the function assigned to the terminal and the voltage detection function for switching to the test operation mode (for example,). , See Patent Document 1.).

【0005】

[Patent Document 1]

Japanese Unexamined Patent Publication No. 2002-15599 (2-4 tribute, Fig. 1) [0006]

[Problems to be Solved by the Invention]

The voltage detection circuit has the following problems because of the conventional test operation mode detection.

【0007】

FIG. 2 is a block diagram showing an external terminal 21 having a test operation mode detection function, a test operation mode voltage detection circuit 23, and a protection transistor 22 for protecting the IC when electrostatic noise is applied. ..

【0008】

FIG. 3 is a circuit diagram showing a general conventional voltage detection circuit. It consists of a pad 31, which applies a high voltage to switch to the test operation mode, n MOSFET transistors 32, a resistor 33, and an inverter 34. An NMOS transistor 32 and a resistor 33 are connected in series between the pad 31 and the ground voltage, and the high voltage side of the resistor 33 is the input of the inverter 34. In this circuit, when a voltage higher than the total threshold voltage (n × Vth) of n stages of NMOS transistors 32 connected in series to the pad 31 is applied, the inverter 34 is inverted and the output changes from H level to L level. It changes and switches to the test operation mode.

【0009】

The protection transistor 22 shown in FIG. 2 is generally an OSPF, which is an off-transistor in which the gate voltage and the source voltage are connected to the ground and the drain voltage is connected to the pad. The MOS structure of the protection transistor breaks down with the protection transistor before the internal transistor to be protected by using a transistor with a MOS structure that has a lower drain breakdown breakdown voltage of the off-transistor than the NMOS transistor used in the voltage detection circuit. It has a function to protect the circuit.

【0010】

The drain voltage of the protection transistor is also connected to the drain of the NMOS connected to the pad of the voltage detection circuit as described above.

【0011】

Therefore, the drain breakdown withstand voltage of the protection transistor needs to be set to a voltage lower than the detection voltage of the voltage detection circuit. If the detection voltage is set higher than the drain breakdown withstand voltage of the protection transistor, even if a voltage higher than the breakdown withstand voltage is applied, the protection transistor will break down and no voltage higher than the breakdown withstand voltage will be applied. It cannot be detected, which means that it is not possible to switch to the test operating mode.

【0012】

FIG. 4 is a graph showing the relationship between the voltage applied to the pad and the current flowing through the NMOS transistors connected in series with the voltage detection circuit.

【0013】

When the voltage applied to the pad is increased, a current corresponding to the voltage flows in the voltage detection circuit, and when the detected voltage (n × Vth) is applied, the operation mode is switched to the test operation mode as described above. At a voltage lower than the detection voltage, a current less than the detection current flows through the voltage detection circuit.

【0014】

In the power supply voltage range of the normal operation mode, the current becomes a leakage current of the terminal, and generally, the leakage current needs to be a constant current value or less as the IC specification of EEPROM. Especially at low temperature, the leak current becomes large, so the leak current in the power supply voltage range in the normal operation mode is an important factor for the product.

【0015】

Further increasing the detection voltage reduces the leakage current at the maximum operating voltage, and lowering the detection voltage increases the leakage current at the maximum operating voltage. That is, in order to reduce the leakage current, it is indispensable to set the detection voltage as high as possible.

【0016】

Since the upper limit of the settable detection voltage of the voltage detection circuit is limited by the drain breakdown withstand voltage of the protection off-transistor, it is necessary to increase the drain breakdown withstand voltage.

【0017】

However, the drain breakdown withstand voltage is determined by the semiconductor process such as the gate oxide film thickness of the MOS, the diffusion concentration of the drain, and the field concentration, and is easily determined when the already formed semiconductor process is used. It is impossible to increase only the drain breakdown withstand voltage.

【0018】

The problem of a large leakage current is often a problem for ICs that have a wide operating temperature range and can operate at low temperatures.

【0019】

In addition, the power supply voltage range in the normal operation mode is wide, which often causes a problem especially in an IC having a high maximum operating voltage.

【0020】

Further, when the drain breakdown withstand voltage of the off-transistor used as the protection transistor is low, it often becomes a problem.

【0021】

Further, when the subthreshold current of the NMOS transistor constituting the voltage detection circuit is large, it often becomes a problem.

【0022】

[Means for solving problems]

Therefore, the present invention uses the following means to solve the above problems. The semiconductor storage device according to the present invention detects the voltage of the external terminal to which the voltage for switching to the test operation mode is applied, the protection transistor connected between the external terminal and the ground potential, and the voltage of the external terminal. The protection transistor includes a voltage detection circuit that outputs a signal for switching to a test operation mode, and the protection transistor is characterized in that a drain region is surrounded by a gate electrode.

【0023】

Further, the voltage detection circuit has a plurality of MOS transistors connected in series between the external terminal and the ground potential, and outputs the signal from a connection point between the MOS transistors connected in series. The MOS transistor connected to the external terminal is a high withstand voltage MOS transistor.

【0024】

BEST MODE FOR CARRYING OUT THE INVENTION [Embodiments of the present invention]

Embodiments of the present invention will be described. FIG. 1 is a plan view of a protection transistor for the purpose of increasing the drain breakdown withstand voltage.

【0025】

In the transistor shown in FIG. 1, contacts 14 are arranged in the drain region 10 and the source region 11 electrically separated by the gate electrode 13 electrically connected to the metal electrode 12, and the drain region 10 and the source region 11 are separated from each other. , Each of which is connected to the metal electrode 12 via the contact 14 to obtain desired electrical characteristics.

【0026】

Since this transistor is directly connected to an external terminal, noise from the outside is directly applied and has excellent noise immunity.

【0027】

In the present invention, the drain region 10 is surrounded by the gate electrode 13. By using this configuration, the electrical separation between the drain region 10 and the element separation region is maintained by the junction diode having the electric field effect of the gate electrode 13 at the end in the channel length direction, so that the current path of noise and static electricity is maintained. Uniformity is obtained. As a result, the drain breakdown withstand voltage can be improved.

【0028】

By adopting the transistor layout according to the present invention for the protection transistor of the external terminal provided with the voltage detection circuit for switching the test operation mode, the detection voltage of the voltage detection circuit can be set high, and the voltage can be extended. Therefore, it is possible to realize a circuit in which the terminal leakage current is reduced.

【0029】

According to the present invention, a terminal leakage current can be realized by an easy means as a result of a simple modification for changing the layout of the gate region of the protection transistor. The purpose can be achieved without changing the process bias of the semiconductor process at all.

【0030】

FIG. 5 shows an example to which the present invention is applied. Figure 5 shows an external terminal 51 that applies a high voltage to switch to the test operation mode, a protection transistor 52 that protects the IC when electrostatic noise connected to the external terminal 51 is applied, and the test operation mode. It is composed of a voltage detection circuit 53 for detecting a high voltage for switching.

【0031】

In the voltage detection circuit 53, the drain of the NMOS transistor 54 is connected to the external terminal, the saturated MOSFET transistor 55 is connected to the source of the NMOS transistor 54, and the drain of the MOSFET transistor 55 is connected to the MOSFET. A transistor 56 is connected, and the gate voltage of the MOSFET transistor 56 is ground. An MIMO depletion transistor 57 is connected to the drain of the MIMO transistor 56, and the gate voltage of the MIMO depletion transistor 57 is ground, so that a constant current 59 can flow. In the NMOS transistor 56, the voltage generated by the NMOS transistor 54 and the MIMO transistor 55 becomes the back gate voltage, and the threshold voltage of the MOSFET transistor 56 becomes high. When a voltage equal to or higher than the threshold value of the MIMO transistor 56 considering the back gate effect is applied to the external terminal, an on-current flows through the MIMO transistor 56. When the on-current becomes larger than the constant current 59, the output of the inverter 58 changes from the H level to the L level and switches to the test operation mode.

【0032】

The NMOS transistor 54 is composed of a high withstand voltage MOS, and the drain junction breakdown withstand voltage of the transistor is generally as high as about 20 V.

【0033】

The protection transistor 52 is composed of a low withstand voltage MOS, and generally, the drain junction breakdown withstand voltage of the transistor is about 12V. By using the protection transistor using the layout configuration according to the present invention, the drain junction breakdown withstand voltage can be improved by about 1V or 3V.

【0034】

[Effect of the invention]

As described above, according to the present invention, it is possible to provide a semiconductor storage device in which the terminal leakage current in the test operation mode is reduced.

[Simple explanation of drawings]

FIG. 1 is a diagram showing a plan view of a protective transistor of the present invention.

FIG. 2 is a diagram showing a block diagram constituting the present invention.

FIG. 3 is a diagram showing a conventional voltage detection circuit.

FIG. 4 is a diagram showing a characteristic graph of a voltage detection circuit.

FIG. 5 is a diagram showing a configuration of a first embodiment of the present invention.

[Explanation of symbols]

11 Source area 12 Metal electrode 13 Gate area 14 Contact area