Power amplifier including bias current control circuit

【0001】

[Technical field to which the invention belongs]

The present invention relates to a power amplifier, and more particularly, the present invention includes a bias current control circuit that can improve the power added efficiency (PAE) by effectively reducing the operating current of the amplifier. Regarding amplifiers.

【0002】

[Conventional technology]

As is well known, a power amplifier is one of the components that consume a large amount of power in a wireless communication terminal. Figures 1 and 2 show conventional power amplifier modules used in conventional CDMA wireless communication terminals.

【0003】

The power amplifier of FIG. 1 has a structure in which a bias circuit 101 is added to an amplifier circuit. The amplifier circuit consists of an amplifier transistor Q1 whose emitter is grounded, an inductor L whose one end is supplied with Vcc and the other end is connected to the collector of Q1, and between the collector of Q1 and the RF_OUT terminal. Includes the output capacitor Co at and the input capacitor Ci between the RF_IN terminal and the base of Q1.

【0004】

The bias circuit 101 has a current mirror structure and includes bias transistors Q2 and Q3, resistors Rbias, R2 and R3. The reference voltage Vref is supplied to the collector of Q2, the emitter of Q3 is grounded, Vref is supplied to one end of Rbias, and the other end of Rbias is connected to the base of Q2 and the collector of Q3. , One end of R2 is connected to the base of Q3, the other end of R2 is connected to the emitter of Q2, and one end of R3 is connected to the node between Ci and the base of Q1. , The other end of R3 is connected to the emitter of Q2.

【0005】

The power amplifier of FIG. 2 has a structure in which a bias circuit 102 is added to the amplifier circuit of FIG. The bias circuit 102 has a current mirror structure, and includes a bias transistor Qbias, emitter base diodes (bipolar transistors in which a collector and a base are connected) D1 and D2, and a resistor Rbias. The Qbias collector is supplied with Vref, the D1 anode is connected to the Qbias base, the D2 anode is connected to the D1 cathode, the D2 cathode is grounded, and at one end of the Rbias. Is supplied with Vref and the other end of Rbias is connected to the anode of D1.

【0006】

With reference to FIGS. 1 and 2, when Vref has a constant value, the bias current of Q1 (DC component of the base current of Q1) I_BIs fixed regardless of the output power. In other words, the quiescent current that becomes the operating current of Q1 when the bias circuit 101 or 102 supplies a constant bias current regardless of the output power, that is, the DC component I of the collector current of Q1._CIs also constant.

【0007】

Maximum output power is one of the most important performance characteristics of such power amplifiers. However, such power amplifiers rarely operate at maximum output power (eg, 28 dBm) and primarily operate at low output levels (eg, 16 dBm or less). Therefore, in order to increase the power added efficiency (PAE) of a CDMA power amplifier, it is necessary to control the operating current so that the operating current decreases at a low output level.

【0008】

Various methods are known to increase PAE by adding a circuit to control the bias. For example, T. Sato et al., Intelligent RF power module using automatic bias control (ABC) system for PCS CDMA applications, IEEE MTT-S Int. Microwave Simp. Dig., 1998, pp.201-204 An ABC (automatic bias control) system has been presented that adjusts the Vref to reduce the bias current at low output levels. However, since the ABC system requires an additional ABC chip in addition to the MMIC (monolithic microwave integrated circuit) in which the power amplifier is built, the size of the power amplifier module will increase.

【0009】

As another example, a method of adjusting the dynamic power supply voltage and current based on envelope detection has been proposed, which is an additional method such as a dc-dc converter, an envelope detector and a coupler. Components are required (eg M. Ranjan et al., Microwave power amplifiers with digitally-controlled power supply voltage for high efficiency and high linearity, IEEE MTT-S Int. Microwave Simp. Dig., 2000, pp. 493 -496, and Yang Kyounghoon et al., High efficiency class-A power amplifiers with a dual-bias-control scheme, IEEE Trans. Microwave Theory Tech., Vol. 47, pp. 1426-1432, Aug. See 1999). However, for such configurations, due to the size and complexity of the components, additional components (ie, dc-dc converters, envelope detectors and couplers) are integrated in the MMIC with a power amplifier. Is difficult.

【0010】

As mentioned above, the prior art of controlling the bias of a CDMA power amplifier has the problem that it requires additional factors that increase chip size and power consumption.

【0011】

[Problems to be Solved by the Invention]

Therefore, an object of the present invention is to provide a power amplifier module including a bias current control circuit for a mobile communication terminal that hardly increases the size of a chip and power consumption.

【0012】

[Means for solving problems]

In order to realize such an object, the power amplifier for a mobile communication terminal according to the present invention includes an amplification transistor, a bias circuit and a bias current control circuit, and the amplification transistor generates an output signal of the mobile communication terminal. However, the bias circuit includes a bias transistor and outputs a bias current that biases the amplification transistor, and the bias current control circuit controls the operating current of the amplification transistor by adjusting the bias current according to the control signal. The control signal is determined by the power level of the output signal of the mobile communication terminal.

【0013】

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 3 shows the power amplifier according to the present invention, and the bias current control circuit 103 according to the first embodiment of the present invention is added to the power amplifier of FIG. The bias current control circuit 103 has a current mirror structure, and includes a control transistor Q4, an auxiliary transistor Q5, and resistors Rmode1 and Rmode2. The collector of Q4 is connected to the node between R1 and Q3, the emitter of Q5 is grounded, the control voltage Vmode is supplied to one end of Rmode1, and the other end of Rmode1 is the base of Q4 and It is connected to the collector of Q5, one end of Rmode2 is connected to the emitter of Q4 and the base of Q5, and the other end of Rmode2 is grounded. The collector of Q4 acts like adding a new current path to the bias circuit 101 by being connected to the node between the collectors of R1 and Q3. Bypass current I flowing from the bias circuit 101 to the bias current control circuit 103_Q4Is defined by Vmode, Rmode1 and Rmode2.

【0014】

Since the control voltage Vmode is supplied by the mobile station modem (MSM) chip built into a normal CDMA mobile communication terminal, it is added to supply the control voltage Vmode to the bias current control circuit 103. Circuit is not necessary. For example, the V mode shown in FIGS. 5 and 6 is low when the output power Pout is higher than 16 dBm (high output power mode), that is, about 0 V to 0.45 V, and when the output power Pout is 16 dBm or less ( The low output mode) is high, that is, about 2.85V to 3.3V.

【0015】

When Pout goes into high output power mode, Vmode goes to logic low (about 0V ~ 0.45V), so transistors Q4 and Q5 go off (OFF). In this case, since no current flows from the bias circuit 101 to the bias current control circuit 103, the power amplifier of FIG. 3 is equivalent to the conventional power amplifier shown in FIG.

【0016】

When Pout goes into low output power mode, Vmode goes to logic high (about 2.85V ~ 3.3V), so transistors Q4 and Q5 turn on. In this case, the bias current control circuit 103 is connected to the current I from the bias circuit 101._Q4Current flowing through resistor R1 by pulling_R1Increases, and the voltage drop between both ends of R1 increases. Therefore, as the base potential of Q2 drops, the current applied to the base of Q2 decreases, resulting in I._BAnd I_CDecreases.

【0017】

FIG. 4 shows the power amplifier according to the present invention, and the bias current control circuit 103 according to the first embodiment of the present invention is added to the power amplifier of FIG. The bias current control circuit 103 of FIG. 4 is the same as the bias current control circuit 103 of FIG. As shown, the collector of Q4 is connected to the node between Rbias and D1. As will be described later, the power amplifier of FIG. 4 operates in the same manner as the power amplifier of FIG.

【0018】

When Pout becomes high output, Vmode applies a low voltage (about 0V to 0.45V), so transistors Q4 and Q5 are turned off. In this case, since no current flows from the bias circuit 102 to the bias current control circuit 103, the power amplifier shown in FIG. 4 is equivalent to the conventional power amplifier shown in FIG.

【0019】

When Pout becomes low output, Vmode applies a high voltage (about 2.85V ~ 3.3V), so transistors Q4 and Q5 are turned on. In this case, the bias current control circuit 103 is connected to the current I from the bias circuit 102._Q4Current flowing through the resistor Rbias by pulling I_RIncreases, and the voltage drop between both ends of Rbias increases. Therefore, as the base potential of Qbias drops, the current applied to the base of Qbias decreases, resulting in I._BAnd I_CDecreases.

【0020】

FIG. 7 shows the power amplifier according to the present invention, and the bias current control circuit 104 according to the second embodiment of the present invention is added to the power amplifier of FIG.

【0021】

The bias current control circuit 104 has a current mirror structure and includes control transistors Q6, emitter base diodes D3 and D4, and resistors Rmode3 and Rmode4. The collector of Q6 is connected between R1 and Q3, the anode of D3 is connected to the base of Q6, the anode of D4 is connected to the cathode of D3, and the cathode of D4 is grounded. , The control voltage Vmode is supplied to one end of Rmode3, the other end of Rmode3 is connected to the base of Q6 and the anode of D3, and one end of Rmode4 is connected to the emitter of Q6. The ends are grounded. By connecting the collector of Q6 to the node between the collectors of R1 and Q3, it plays the same role as adding a new current path to the bias circuit 101. Current I flowing from the bias circuit 101 to the bias current control circuit 104_Q6Is defined by Vmode, Rmode3 and Rmode4.

【0022】

Similar to the power amplifier in Figure 3, when Pout is high output and Vmode is low (about 0V to 0.45V), transistor Q6 is turned off. In this case, since no current flows from the bias circuit 101 to the bias current control circuit 104, the power amplifier of FIG. 7 is equivalent to the conventional power amplifier shown in FIG.

【0023】

Similarly, in the low output power mode, the Vmode is high (about 2.85V to 3.3V), so the transistor Q6 is turned on. In this case, the bias current control circuit 104 is the current I from the bias circuit 101._Q6Current flowing through resistor R1 by pulling_R1Increases, and the voltage drop between both ends of R1 increases. Therefore, as the base potential of Q2 drops, the current applied to the base of Q2 decreases, resulting in I._BAnd I_CDecreases.

【0024】

FIG. 8 shows the power amplifier according to the present invention, and the bias current control circuit 104 according to the second embodiment of the present invention is added to the power amplifier of FIG. The bias current control circuit 104 of FIG. 8 is the same as the bias current control circuit 104 of FIG. In Figure 8, the collector for Q6 is linked to the node between Rbias and D1. As will be described later, the power amplifier of FIG. 8 operates in the same manner as the power amplifier of FIG.

【0025】

When Vmode is low (about 0V ~ 0.45V), transistor Q6 is turned off. In this case, since no current flows from the bias circuit 102 to the bias current control circuit 104, the power amplifier of FIG. 8 is equivalent to the conventional power amplification shown in FIG. 2 while the high output power mode is maintained.

【0026】

When Vmode is high (about 2.85V ~ 3.3V), transistor Q6 is turned on. In this case, the bias current control circuit 104 is the current I from the bias circuit 102._Q6Current flowing through the resistor Rbias by pulling I_RIncreases, and the voltage drop between both ends of Rbias increases. Therefore, as the Qbias base potential drops, the current applied to the Qbias base decreases, resulting in I in low output power mode._BAnd I_CDecreases.

【0027】

As described above, the present invention provides a power amplifier that includes a bias current control circuit, which results in reducing the bias current and operating current of the amplification transistor when the output power level is low. Improve PAE. Since the bias current control circuit according to the present invention can be realized using only two resistors and two or three transistors, it does not increase the chip size and power consumption so much, and can be used in a normal MMIC chip. It can be integrated with a power amplifier.

【0028】

FIG. 9 is a graph showing the PAE of an MMIC power amplifier including a bias current control circuit according to the present invention. In this graph, PAE increases 1.3 times when the output power is 16 dBm.

【0029】

The control voltage Vmode applied by a typical MSM chip does not maintain a constant value while the high output power mode (or low output power mode) is maintained, but fluctuates within the range of 0.45V. .. It is preferable that the quiescent current of Q1 is not so affected by such fluctuations. Experiments have shown that in the power amplifier according to the invention, when the Vmode fluctuates within the range of 0.45V, I_CThe fluctuation range of has a small value of 1.5 mA or less.

【0030】

The control voltage Vmode can be set by a method different from the above. For example, depending on the configuration of the mobile communication terminal, it is possible to set Vmode to be logic low in the low output power mode and Vmode to be logic high in the high output power mode. The logic low and logic high voltage ranges can also be set to differ from 0V to 0.45V and 2.85V to 3.3V in the above-described embodiment. Similarly, the boundary value between the low output power mode and the high output power mode does not necessarily have to be 16 dBm, and may have other values. The maximum value of the output power can also have a value different from 28 dBm.

【0031】

For example, changes such as adding an inverter to the Vmode terminal or using a P-type transistor in the bias current control circuit can be easily conceived by those skilled in the art from the above-described embodiment of the present invention.

【0032】

Although preferred embodiments of the present invention have been described above, those skilled in the art will be able to make various modifications without departing from the claims of the present invention.

【0033】

[Effect of the invention]

Therefore, the present invention provides a power amplifier including a bias current control circuit, which reduces the bias current and operating current of the amplification transistor when the output power level is low, resulting in PAE. Improve. Since the bias current control circuit according to the present invention can be realized using only two resistors and two or three transistors, it does not increase the chip size and power consumption so much, and can be used in a normal MMIC chip. It can be integrated with a power amplifier.

[Simple explanation of drawings]

FIG. 1 shows a bias current I in the amplification transistor Q1._BIt is a circuit diagram which shows the conventional power amplifier which includes the bias circuit 101 which applies.

FIG. 2 shows a bias current I in the amplification transistor Q1._BIt is a circuit diagram which shows the other conventional power amplifier including the bias circuit 102 which applies.

FIG. 3 is a circuit diagram showing a power amplifier including a bias current control circuit 103 according to a first embodiment of the present invention.

FIG. 4 is a circuit diagram showing a power amplifier including a bias current control circuit 103 according to a first embodiment of the present invention.

FIG. 5 is a quiescent current I of a power amplifier according to the present invention._CIs a graph showing the function for the output power Pout.

FIG. 6 is a graph showing the control voltage Vmode of the power amplifier according to the present invention as a function with respect to the output power Pout.

FIG. 7 is a circuit diagram showing a power amplifier including a bias current control circuit 104 according to a second embodiment of the present invention.

FIG. 8 is a circuit diagram showing a power amplifier including a bias current control circuit 104 according to a second embodiment of the present invention.

FIG. 9 is a graph illustrating the PAE improvement according to the present invention.

[Explanation of symbols]

101, 102 ... Bias circuit 103, 104 ... Bias current control circuit