Nitride-based semiconductor light-emitting device and manufacturing method thereof

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to a light emitting device using a nitride semiconductor of a group III-V compound, and particularly to an improvement of a nitride semiconductor light emitting device in which current injection electrodes are provided on both main surfaces of a conductive substrate. It is a thing.

【0002】

[Conventional technology]

In the conventional gallium nitride based semiconductor light emitting device, an insulating substrate such as sapphire is used. When the substrate is insulating, it is not possible to inject current into the light emitting layer through the insulating substrate. Therefore, in general, both the p-type layer and the n-type layer are on the same main surface side of the substrate on which the semiconductor layers are laminated. Electrodes are formed. In that case, it is necessary to secure an area for forming both electrodes on one side of the substrate, and it is formed per unit area of the substrate as compared with the case where each electrode is formed on both main surfaces of the substrate. The number of possible light emitting elements is reduced. In addition, the sapphire substrate is expensive, hard and not easy to process. Under these circumstances, it has been studied to form a gallium nitride based semiconductor light emitting device on a conductive Si substrate.

【0003】

However, even if the Si substrate is conductive, AlN and AlGaN used as an intermediate layer (buffer layer) for epitaxially growing the gallium nitride based semiconductor layer are compared with the conductive Si substrate and the n-type GaN layer. It has high resistance and is close to an insulator. Therefore, when the p-type and n-type electrodes are provided on the front surface side and the back surface side of the Si substrate, a large voltage drop occurs in the intermediate layer, and the operating voltage of the light emitting element increases.

【0004】

FIG. 13 shows a schematic cross-sectional view of the nitride semiconductor light emitting device disclosed in Japanese Patent Application Laid-Open No. 11-40850. This nitride-based semiconductor light emitting device includes an n-type intermediate layer 702 sequentially laminated on the surface of an n-type Si substrate 701, an n-type superlattice layer 703 for alleviating strain, an n-type high carrier concentration layer 704, and multiplex. It includes a quantum well light emitting layer 705, a p-type clad layer 706, a p-type contact layer 707, and a translucent electrode 709, as well as an electrode 708 formed on the back surface of the substrate 701. That is, the p-type electrode 709 is formed on the front surface side of the conductive Si substrate 701, and the n-type electrode 708 is formed on the back surface side.

【0005】

[Problems to be Solved by the Invention]

In the above-mentioned light emitting device of JP-A-11-40850, the intermediate layer 702 on the n-type Si substrate 701 is Si-doped Al._0.15Ga_0.85It is made of N: Si. However, compared to the n-type Si substrate 701 and the n-type GaN layer 704 in the light emitting device structure, Al_0.15Ga_0.85N: Si intermediate layer 702 has high resistance. Therefore, when a current is injected into the light emitting layer 705 from the electrodes 708 and 709 on both sides of the substrate 701, a voltage drop occurs in the intermediate layer 702 and the operating voltage of the light emitting element becomes high.

【0006】

In view of the above-mentioned situation of the prior art, an object of the present invention is to reduce the operating voltage of a nitride semiconductor light emitting device in which electrodes for current injection are formed on both main surfaces of the conductive substrate. There is.

【0007】

[Means for solving problems]

According to the present invention, the nitride semiconductor light emitting device comprises a conductive semiconductor substrate having first and second main surfaces and a high resistance or insulating intermediate layer formed on the first main surface of the substrate. And Al formed on the intermediate layer_xB_yIn_zGa_1-xyzA plurality of nitride semiconductor layers consisting of N (0 <x 1, 0 y <1, 0 z 1, x + y + z = 1) are included, and these plurality of nitride semiconductor layers include. It contains at least one first conductive type layer, a light emitting layer, and at least one second conductive type layer laminated on the intermediate layer in order, and is intermediate so as to connect the first conductive type layer in contact with the intermediate layer to the conductive substrate. It further includes a metal film that penetrates or bypasses the layer, a first electrode formed on the second conductive layer, and a second electrode formed on the second main surface of the conductive substrate, which occurs in the intermediate layer. It is characterized in that the operating voltage is reduced by avoiding the voltage drop with a metal film.

【0008】

In addition, as an intermediate layer, Al_xB_yIn_zGa_1-xyzN (0 <x 1, 0 y <1, 0 z 1, x + y + z = 1) can be used. The thickness of the intermediate layer is preferably 10 nm or more.

【0009】

It is desirable that the metal film is in ohmic contact with both the first conductive type layer in contact with the intermediate layer and the conductive substrate. The melting point of the metal film is preferably 900 ° C. or higher. As the metal film, at least one of Sc, Ti, V, Cr, Mn, Cu, Y, Nb, Mo, Ru, Hf, Ta, and W can be used.

【0010】

The nitride-based semiconductor light emitting device may further include a dielectric film for preventing the metal film from coming into contact with the light emitting layer and the second conductive type layer. As the dielectric film, SiO₂, Si₃N₄, Sc₂O₃, Zr₂O₃, Y₂O₃, Gd₂O₃, L₂O₃, Ta₂O₅, ZrO₂, LaAlO₃, ZrTiO₄, And HfO₂At least one of can be used.

【0011】

The metal film can be formed in stripes, and the striped metal films can be arranged at intervals in the range of 1 μm to 500 μm. The striped metal film can be formed in one direction or along two or more different directions.

【0012】

The light emitting layer is preferably formed in a region divided by a dividing stripe having a width of 1 μm or more formed on the substrate. A dielectric film can be used as the dividing stripe. As the dielectric film, SiO₂, Si₃N₄, Sc₂O₃, Zr₂O₃, Y₂O₃, Gd₂O₃, L₂O₃, Ta₂O₅, ZrO₂, LaAlO₃, ZrTiO₄, And HfO₂One or more of can be used. One or more metals such as Sc, Ti, V, Cr, Mn, Cu, Y, Nb, Mo, Ru, Hf, Ta, and W can also be used as the dividing stripe.

【0013】

As the conductive semiconductor substrate, Si, ZnO, or GaP containing a dopant can be used.

【0014】

In the method for manufacturing a nitride semiconductor light emitting device according to the present invention, at least an intermediate layer is formed on a conductive semiconductor substrate in a film forming apparatus, and a wafer having at least an intermediate layer formed on the substrate is once placed in the atmosphere. It may include a step of forming an opening penetrating the intermediate layer, forming a metal film in the opening, and introducing the wafer into the film forming apparatus again to form a plurality of nitride semiconductor layers.

【0015】

Further, in the method for manufacturing a nitride semiconductor light emitting device, a dividing stripe made of a dielectric is formed on a substrate, an intermediate layer is formed, a plurality of nitride semiconductor layers are formed, and the dividing stripe is removed. , An insulating film is formed to prevent the light emitting layer and the second conductive type layer from coming into contact with the metal film, and then the metal film connecting the first conductive type layer and the conductive substrate is applied to the end face of the intermediate layer. It may include a step of passing through and forming.

【0016】

Further, in the method for manufacturing a nitride semiconductor light emitting element, a part of the conductive substrate is removed by the first etching while using the intermediate layer as the etching stop layer, and the conductive substrate is exposed by the first etching. A step of removing a portion of the intermediate layer by a second etching and forming a metal film connecting the first conductive type layer to the conductive substrate through a region in which the intermediate layer is partially removed by the second etching. Can include.

【0017】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described based on some more specific examples.

【0018】

(Example 1) In the schematic cross-sectional views of FIGS. 1 and 2, the manufacturing process of the nitride semiconductor light emitting device according to the first embodiment of the present invention is illustrated. In each drawing of the present application, the dimensional relations such as thickness and width are appropriately changed for the purpose of clarifying and simplifying the drawings, and do not represent the actual dimensional relations.

【0019】

In FIG. 1 (a), an n-type Si substrate 101 washed with an aqueous solution of hydrofluoric acid (HF) of 5% was used. This Si substrate had a crystallographic {111} plane main surface. In the metalorganic vapor phase growth (MOCVD) device, after mounting the Si substrate 101 on the susceptor, H at 1100 ° C.₂The substrate was baked in an atmosphere. After that, H as a carrier gas at the same substrate temperature.₂Trimethylaluminium (TMA) and ammonia (NH) while using₃) To form the AlN intermediate layer 102 to a thickness of 10 nm or more, and trimethylgallium (TMG) and NH.₃The n-type GaN layer 103 was formed so as to have a thickness of 500 nm.

【0020】

Next, the wafer of FIG. 1 (a) is taken out into the atmosphere, and as shown in FIG. 1 (b), a groove for forming a metal film is formed in the crystallographic <1-10 of the Si substrate 101. > Formed by photolithography so that they are parallel to the direction. At that time, reactive ion etching (RIE) was used to form a groove having a search until it reached the Si substrate 101.

【0021】

Then, as shown in FIG. 1 (c), a tungsten (W) film 104 was formed on the groove by sputtering or the like to a thickness of 800 nm. Further, in order to prevent the metal film from being short-circuited between the active layer and the p-type semiconductor layer contained in the light emitting element, SiO is placed on the W film 104.₂Membrane 105 was formed to a thickness of 4 nm. W film 104 and SiO₂The total thickness of the film 105 was greater than the depth from the surface of the n-type GaN layer 103 to the bottom of the RIE-etched groove. The width of the groove at this time was 150 μm, and the distance between the grooves was 200 μm.

【0022】

Furthermore, as shown in Fig. 2 (a), the substrate temperature was rapidly raised to 1100 ° C in the MOCVD equipment again, and TMG and NH₃The n-type GaN layer 106 was formed to a thickness of 300 nm. At this time, the deposited n-type GaN layer 106 is the SiO formed on the groove.₂It was formed so as to cover the edge of the film 105. Then, at a substrate temperature of 750 ° C, trimethylindium (TMI), TMG, and NH₃In_0.08Ga_0.92An MQW (multiple quantum well) active layer 107 containing four pairs of an N well layer and a GaN barrier layer was laminated. Next, at a substrate temperature of 1100 ° C, TMG and NH₃, And pentadienylmagnesium as a dopant (Cp)₂Mg-doped p-type Al using Mg)_0.15Ga₀_.85The N-clad layer 108 was formed. And under the same substrate temperature, TMG, NH₃, And Cp₂Mg-doped p-type GaN contact layer 109 was formed using Mg.

【0023】

Next, the wafer of FIG. 2 (a) is taken out into the atmosphere, and as shown in FIG. 2 (b), the translucent electrode 110 of Pd is placed on the p-type GaN contact layer 109 by utilizing vapor deposition. And Au pad electrodes 111 were formed, and an n-type electrode 112 was formed on the back surface of the Si substrate 101. After that, SiO that protects the electrodes and covers multiple semiconductor layers₂A dielectric film (not shown) was formed. Note that FIG. 2B shows only the region corresponding to one light emitting element chip in the wafer.

【0024】

After that, the wafer is divided by a scribing or dicing device so that it becomes a rectangular chip having one side passing through the groove parallel to the above-mentioned <1-10> direction and the other side perpendicular to the side, and the nitride semiconductor light emitting device chip. Got

【0025】

FIG. 12 is a graph showing the current-operating voltage characteristics of the nitride semiconductor light emitting device. In this graph, the curve 61 shows the characteristics of the light emitting device according to JP-A-11-40850, and the curve 62 shows the characteristics of the light emitting device according to the first embodiment.

【0026】

As is clear from FIG. 12, the light emitting element of the first embodiment operates at a lower voltage than that of the conventional example, and the current-operating voltage characteristic is improved. When electrodes are formed on both sides of the Si substrate, in the conventional example, the current injected from the outside of the light emitting element must pass through the high resistance intermediate layer. However, since the current injected from the outside of the light emitting element of Example 1 can pass through the metal film while avoiding the high resistance intermediate layer, the operating voltage does not drop due to the high resistance intermediate layer. Can be reduced.

【0027】

If W and Si that are in contact with each other are heat-treated at a high temperature, VDDWSi can be seen from the interface.₂Is conventionally known to be generated. Silicide, which is a wiring material for LSIs (large-scale integrated circuits) and the like, becomes relatively high in resistance by high-temperature heat treatment. Also in the first embodiment, since the W film 104 in contact with the Si substrate 101 is exposed to a high temperature, there is a possibility that silicide is formed at least at the interface thereof. However, since the scale of the light emitting element is sufficiently larger than the scale of the LSI, the resistance of VDD has almost no effect on the operating voltage of the light emitting element.

【0028】

In Example 1, the distance between the striped W films 104 was 200 μm. However, as a result of further studies, it was confirmed that the light emitting element having the structure of Example 1 can be formed and light emission can be generated if the W film spacing is 10 μm or more.

【0029】

(Example 2) In the schematic cross-sectional views of FIGS. 3 and 4, the manufacturing process of the nitride semiconductor light emitting device according to the second embodiment of the present invention is illustrated. In Fig. 3 (a), the {111} Si substrate 201 washed with an aqueous solution of HF 5% was attached to the susceptor in the MOCVD equipment, and H was H at 1100 ° C.₂The substrate was baked in an atmosphere. After that, at the same substrate temperature, H as a carrier gas₂TMA and NH while using₃To form the AlN intermediate layer 202 to a thickness of 10 nm or more, and to use TMG and NH.₃The n-type GaN layer 203 was formed to a thickness of 500 nm. After that, the wafer of FIG. 3 (a) is taken out into the atmosphere, and SiO parallel to the <1-10> direction of the Si substrate is formed in order to form a region where the metal film is in contact with the substrate 201 by etching.₂Mask stripes (not shown) were formed.

【0030】

Then NH₃And HF and CH₃Grooves were formed by etching to a depth reaching the Si substrate 201 using a mixed solution of COOH.

【0031】

Then, as shown in FIG. 3 (c), a W film 204 is formed to a thickness of 800 nm by sputtering or the like, and SiO is formed on the W film 204.₂Membrane 205 was formed to a thickness of 4 nm. At this time, the W film 204 was formed to have a thickness larger than the depth from the surface of the n-type GaN layer 203 to the bottom of the groove etched by RIE. The width of the groove at this time was 1 μm, and the width between the grooves was 5 μm.

【0032】

After that, as shown in FIG. 4, the substrate temperature was rapidly raised to 1100 ° C in the MOCVD apparatus again, and TMG and NH were used.₃The n-type GaN layer 206 was formed to a thickness of 4 μm. At this time, the n-type GaN layer 206 is set to SiO.₂Membrane 205 was deposited to a thickness that completely covered it. Then, at a substrate temperature of 750 ° C, TMI, TMG, and NH₃In using_0.08Ga_0.92An MQW active layer 207 containing 4 pairs of N well layer and GaN barrier layer was formed. Next, at a substrate temperature of 1100 ° C, TMG, NH₃, And the dopant agent Cp₂Mg-doped p-type Al using Mg_0.15Ga_0.85The N-clad layer 208 was formed. Then, at the same substrate temperature, TMG, NH₃, And Cp₂Mg-doped p-type GaN contact layer 209 was formed using Mg.

【0033】

Then, the wafer was taken out into the atmosphere, and the translucent electrode 210 of Pd and the Au pad electrode 211 on the wafer were formed by vapor deposition, and the n-type electrode 212 was formed on the back surface of the Si substrate 201. Next, SiO is used to protect the electrodes and cover multiple semiconductor layers.₂A dielectric film (not shown) was formed.

【0034】

Then, using a scribing or dicing device, the wafer was divided into a rectangular nitride-based semiconductor device chip having one side parallel to the <1-10> direction of the Si substrate and the other side perpendicular to the side.

【0035】

In FIG. 12, the current-operating voltage characteristic of the light emitting element of the second embodiment is shown as a curve 63. According to FIG. 12, the light emitting element of the second embodiment has improved current-operating voltage characteristics as compared with the first embodiment. This is because a thick n-type GaN layer 206 was formed on the metal film 204, so that the dislocation density in the vicinity of the active layer 207 was reduced and the crystallinity was improved, whereby the current-operating voltage was further increased as compared with Example 1. It is considered that the characteristics have been improved.

【0036】

In Example 2, the interval between the striped W films 204 was 5 μm. However, as a result of further studies, it was confirmed that if the distance between the W films is 1 μm or more and 10 μm or less, the light emitting element having the structure of Example 2 can be formed and light emission can be generated.

【0037】

Further, the light emitting element of FIG. 4 can also be obtained through a process of FIG. 5 which is different from the manufacturing process of FIG. In the step of FIG. 5, as shown in FIG. 5 (a), SiO was placed on the {111} Si substrate 201 washed with an aqueous solution of HF 5%.₂Mask stripe 205 was formed. Next, as shown in FIG. 5 (b), the AlN intermediate layer 202 and the n-type GaN layer 203 on the AlN intermediate layer 202 were formed by the MOCVD method. Then, the wafer of FIG. 5 (b) is taken out into the atmosphere, and as shown in FIG. 5 (c), SiO₂A groove is formed from which the mask stripe has been removed. After that, as shown in FIG. 5 (d), a W film 204 is vapor-deposited in the groove using photolithography, and SiO is sputtered on the W film 204.₂Membrane 205 was formed. After that, the same light emitting device as in FIG. 4 was obtained in the same process as described with reference to FIG. 4, and the same improvement in current-operating voltage characteristics was obtained.

【0038】

(Example 3) In the schematic cross-sectional views of FIGS. 6 and 7, the manufacturing process of the nitride semiconductor light emitting device according to the third embodiment of the present invention is illustrated. In Fig. 6 (a), the {111} Si substrate 301 washed with an aqueous solution of HF 5% was attached to the susceptor in the MOCVD equipment, and H at 1100 ° C.₂The substrate was baked in an atmosphere. After that, at the same substrate temperature, H as a carrier gas₂TMA and NH while using₃AlN intermediate layer 302 is formed to a thickness of 10 nm or more using TMG and NH.₃The n-type GaN layer 303 was formed to have a thickness of 2 μm. Then, at a substrate temperature of 750 ° C, TMI, TMG, and NH₃In using_0.08Ga_0.92An MQW active layer 304 containing 4 pairs of N well layer and GaN barrier layer was formed. Next, at a substrate temperature of 1100 ° C, TMG and NH₃, And the dopant agent Cp₂Mg-doped p-type Al using Mg_0.15Ga_0.85An N-clad layer 305 was formed. Then, under the same substrate temperature, TMG, NH₃, And Cp₂Mg-doped p-type GaN contact layer 306 was formed using Mg.

【0039】

After that, on the back surface of the Si substrate 301, SiO for forming an opening in the substrate is formed.₂A mask (not shown) was formed. And in the presence of that mask, NH₃And HF and CH₃By etching the Si substrate 301 with a mixed solution of COOH, an opening was formed in the substrate as shown in FIG. 6 (b). At this time, while etching itself is difficult with a sapphire substrate or a SiC substrate, the AlN intermediate layer 302 plays a role of an etch stop layer in etching the Si substrate 301. Then, as shown in FIG. 6 (c), the AlN intermediate layer 302 was etched using RIE.

【0040】

Then, as shown in FIG. 7A, a laminated film in the order of Ti / Al is deposited as an n-type electrode 307 that contacts the conductive Si substrate 301, the AlN intermediate layer 302, and the n-type GaN layer 301. Formed by

【0041】

Then, as shown in FIG. 7 (b), a translucent electrode 308 of Pd was formed on the p-type GaN contact layer 306, and an Au pad electrode 309 was formed on the translucent electrode 308. In addition, SiO protects the electrodes and covers multiple semiconductor layers.₂A dielectric film (not shown) was formed. Then, the wafer was divided by a scribing or dicing apparatus to obtain a nitride semiconductor light emitting device chip.

【0042】

In FIG. 12, the current-operating voltage characteristic of the light emitting device of the third embodiment is shown as a curve 64. According to FIG. 12, the light emitting device of the third embodiment has further improved current-operating voltage characteristics as compared with the first and second embodiments. That is, in the light emitting element of Example 3, the metal film 307 acts not only to avoid the high resistance of the intermediate layer 302 but also to avoid the resistance of the Si substrate 301, so that the resistivity of the light emitting element is increased. It can be reduced, and the operating voltage is further reduced as compared with Examples 1 and 2.

【0043】

(Example 4) In the schematic cross-sectional views of FIGS. 8 and 9, the manufacturing process of the nitride semiconductor light emitting device according to the fourth embodiment of the present invention is illustrated. In Fig. 8 (a), after mounting the {111} Si substrate 401 washed with an aqueous solution of HF 5% on the susceptor in the MOCVD equipment, H at 1100 ° C.₂The substrate was baked in an atmosphere. After that, at the same substrate temperature, H as a carrier gas₂TMA and NH while using₃AlN intermediate layer 402 is formed to a thickness of 10 nm or more using TMG and NH.₃The n-type GaN layer 403 was formed to have a thickness of 2 μm. Then, at a substrate temperature of 750 ° C, TMI, TMG, and NH₃In using_0.08Ga_0.92An MQW active layer 404 containing 4 pairs of N well layer and GaN barrier layer was formed. Next, at a substrate temperature of 1100 ° C, TMG and NH₃, And Cp as a dopant₂Mg-doped p-type Al using Mg_0.15Ga_0.85An N-clad layer 405 was formed. Then, under the same substrate temperature, TMG, NH₃, And Cp₂Mg-doped p-type GaN contact layer 406 was formed using Mg.

【0044】

After that, the wafer of FIG. 8 (a) was taken out into the atmosphere, and as shown in FIG. 8 (b), a groove extending from the p-type GaN contact layer 406 to the n-type GaN layer 403 was formed using RIE. did. At this time, the distance between the grooves was set to 200 μm in consideration of facilitating chip division of the light emitting element. Note that FIG. 8B shows a region corresponding to one light emitting element chip divided with a groove as a boundary.

【0045】

Then, as shown in FIG. 9 (a), SiO₂Membrane 407 was formed. Next, using photolithography, a groove was formed from the exposed surface of the n-type GaN layer 403 to the Si substrate 401. Then, a metal film 408 was formed so as to connect the n-type GaN layer 403 and the conductive Si substrate 401. Here, SiO₂The film 407 is provided to prevent the metal film 408 from coming into contact with the active layer 404 and the p-type layers 405 and 406. Then, the n-type electrode 409 was formed by depositing a Ti / Al laminate by vapor deposition.

【0046】

Then, as shown in FIG. 9 (b), a translucent electrode 410 of Pd and an Au pad electrode 411 on it were formed. Next, SiO is used to protect the electrodes and cover multiple semiconductor layers.₂A dielectric film (not shown) was formed. Then, the wafer was divided by a scribe or dicing device to obtain a nitride semiconductor light emitting device chip.

【0047】

The current-operating voltage characteristics of the light emitting device according to Example 4 were the same as those of Example 1 represented by the curve 62 in FIG. In the fourth embodiment, the distance between the grooves is set to 200 μm, but the size of the light emitting element chip can be changed by changing the distance between the grooves. For example, the distance between the grooves may be set to 300 μm or 400 μm.

【0048】

(Example 5) In the schematic cross-sectional views of FIGS. 10 and 11, the manufacturing process of the nitride semiconductor light emitting device according to the fifth embodiment of the present invention is illustrated. As shown in FIG. 10 (a), on a {111} Si substrate 501 washed with an aqueous solution of HF 5%, it intersects vertically to form a light emitting element in a square compartment region having a side of 200 μm. SiO₂The partition stripe 502 was formed using photolithography and spattering. At this time, SiO₂The spacing between the stripes was 200 μm and the stripe width was 5 μm. In addition, in FIG. 10A, only the region corresponding to one light emitting element chip is shown.

【0049】

After cleaning the wafer of FIG. 10 (a), the wafer is mounted on the susceptor in the MOCVD apparatus in FIG. 10 (b), and H at 1100 ° C.₂The wafer was baked in an atmosphere. After that, at the same substrate temperature, H as a carrier gas₂TMA and NH while using₃AlN intermediate layer 503 is formed to a thickness of 10 nm or more using TMG and NH.₃The n-type GaN layer 504 was formed to have a thickness of 2 μm. Then, at a substrate temperature of 750 ° C, TMI, TMG, and NH₃In using_0.08Ga_0.92An MQW active layer 505 containing 4 pairs of N, a well layer and a GaN barrier layer was formed. Next, at a substrate temperature of 1100 ° C, TMG and NH₃, And Cp as a dopant₂Mg-doped p-type Al using Mg_0.15Ga_0.85An N-clad layer 506 was formed. Then, under the same substrate temperature, TMG, NH₃, And Cp₂Mg-doped p-type GaN contact layer 507 was formed using Mg. After that, the wafer is taken out into the atmosphere, and using an aqueous solution of HF5% or the like, SiO₂Separation stripe 502 was removed.

【0050】

Then, as shown in FIG. 11 (a), after removing a part of the plurality of nitride semiconductor layers 504 to 507 using photolithography and RIE, SiO is then used.₂Membrane 508 was formed by sputtering.

【0051】

Then, as shown in FIG. 11 (b), in order to connect the n-type GaN layer 504 and the conductive Si substrate 501, a metal film composed of a Ti / Al laminate using photolithography and thin film deposition. Formed 509. Here, SiO₂The film 508 is provided to prevent the metal film 509 from coming into contact with the active layer 505 and the p-type layers 506 and 507. After that, the translucent electrode 510 of Pd and the Au pad electrode 511 on it were formed, and the n-type electrode 512 was formed on the back surface of the Si substrate 501.

【0052】

Next, SiO is used to protect the electrodes and cover multiple semiconductor layers.₂A dielectric film (not shown) was formed. Then, the wafer was divided by a scribe or dicing device to obtain a nitride semiconductor light emitting device chip. The current-operating voltage characteristics of the light emitting device according to Example 5 were the same as those of Example 1 represented by the curve 62 in FIG.

【0053】

In addition, in Example 5, SiO was used as the division stripe 502.₂Was used, but Si is a dielectric₃N₄, Sc₂O₃, Zr₂O₃, Y₂O₃, Gd₂O₃, L₂O₃, Ta₂O₅, ZrO₂, LaAlO₃, ZrTiO₄, And HfO₂It may be one or more of Sc, Ti, V, Cr, Mn, Cu, Y, Nb, Mo, Ru, Hf, and TaW which are metal films. Further, both the dielectric and the metal may be used to form a partition stripe.

【0054】

In Examples 1 and 2 described above, W was used as the metal films 104 and 204. This is because W has a melting point higher than the growth temperature of GaN, so Al after metal film formation_xB_yIn_zGa_1-xyzThis is because even if the N (0 <x 1, 0 y <1, 0 z 1, x + y + z = 1) layer is grown, the metal film is not easily affected by heat. As a result of further studies, it was found that a metal having a melting point of 900 ° C or higher, which is higher than the growth temperature of the GaN layer, should be selected. Therefore, the metal film is not limited to W, and one or more of Sc, Ti, V, Cr, Mn, Cu, Y, Nb, Mo, Ru, Hf, and Ta can be used.

【0055】

Further, in Examples 1 and 2, SiO is used as the dielectric film formed on the metal films 104 and 204.₂Was used, but Si₃N₄, Sc₂O₃, Zr₂O₃, Y₂O₃, Gd₂O₃, L₂O₃, Ta₂O₅, ZrO₂, LaAlO₃, ZrTiO₄, And HfO₂One or more of can be used.

【0056】

In Examples 1 and 2, AlN was used as the intermediate layers 102 and 202, but Al was used instead of AlN._xB_yIn_zGa_1-xyzA DBR (Distributed Bragg Reflection) layer consisting of N (0 <x 1, 0 y <1, 0 z 1, x + y + z = 1) may be used, and the AlN layer and the DBR above it may be used. Layers may be used.

【0057】

In Examples 3, 4, and 5, the metal films 307, 408, and 509 are not exposed to the high temperature during formation of the nitride semiconductor layer as in Examples 1 and 2, and thus are at 900 ° C. or higher. It does not have to be a refractory metal, and may be a metal that exhibits ohmic contact with the conductive Si substrate and the n-type GaN layer, or a compound containing the metal.

【0058】

In Examples 1-5, the active layers 107, 207, 304, 404, 505 may be formed to include either single or multiple quantum well layers and may be non-doped with Si, As, or P. It may be doped. Further, the well layer and the barrier layer in the multiple quantum well layer can be formed by using only InGaN, or can be formed by using InGaN and GaN.

【0059】

In Examples 1 to 5, {111} Si substrates were used as the conductive semiconductor substrates 101, 201, 301, 401, 501, but {111} planes and {100} planes were used for {100} Si substrates and Si substrates. The same effect was obtained by using a substrate having a principal plane orientation slightly inclined with respect to the above. Further, another conductive semiconductor substrate such as a ZnO substrate or a GaP substrate may be used.

【0060】

In Examples 1 to 5, AlN was used as the intermediate layers 102, 202, 302, 402, and 503, but Al_xB_yIn_zGa_1-xyzSimilar effects were obtained using N (0 <x 1, 0 y <1, 0 z 1, x + y + z = 1).

【0061】

In Examples 1 to 4, Al in contact with the intermediate layer_xB_yIn_zGa_1-xyzA groove was formed as a region for forming a metal film connecting the N (0 <x 1, 0 y <1, 0 z 1, x + y + z = 1) layer and the conductive substrate. However, those grooves do not have to be along one direction and may be formed along two or more directions.

【0062】

[Effect of the invention]

As described above, according to the present invention, it is possible to reduce the operating voltage of a nitride semiconductor light emitting device in which current injection electrodes are formed on both main surface sides of the substrate.

[Simple explanation of drawings]

[Figure 1]

It is a schematic cross-sectional view which shows the manufacturing process of the light emitting diode according to Example 1 of this invention.

[Figure 2]

It is a schematic cross-sectional view which shows the manufacturing process which follows FIG.

[Fig. 3]

It is a schematic cross-sectional view which shows the manufacturing process of the light emitting diode according to Example 2.

[Fig. 4]

It is a schematic cross-sectional view which shows the manufacturing process which follows FIG.

[Fig. 5]

FIG. 3 is a schematic cross-sectional view showing a manufacturing process that can be substituted for FIG.

[Fig. 6]

It is a schematic cross-sectional view which shows the manufacturing process of the light emitting diode according to Example 3.

[Fig. 7]

It is a schematic cross-sectional view which shows the manufacturing process which follows FIG.

[Fig. 8]

It is a schematic cross-sectional view which shows the manufacturing process of the light emitting diode according to Example 4.

[Fig. 9]

It is a schematic cross-sectional view which shows the manufacturing process which follows FIG.

[Fig. 10]

It is a schematic cross-sectional view which shows the manufacturing process of the light emitting diode according to Example 5.

[Fig. 11]

It is a schematic cross-sectional view which shows the manufacturing process which follows FIG.

[Fig. 12]

It is a graph which shows the current-operating voltage characteristic in the light emitting diode of each Example.

[Fig. 13]

It is a schematic cross-sectional view which shows the light emitting diode by the prior art.

[Explanation of symbols]

101, 201, 301, 401, 501, 701 Si substrate, 102, 202, 302, 402, 503, 702 intermediate layer, 103, 106, 203, 206, 303, 403, 504 n-type GaN layer, 104, 204, 307, 408, 509 metal film, 105, 205, 407, 502, 508 SiO₂Membrane, 107, 207, 304, 404, 505, 705 MQW active layer, 108, 208, 305, 405, 506 p type Al_0.15Ga_0.85N-clad layer, 109, 209, 306, 406, 507 p-type GaN contact layer, 110, 210, 308, 410, 510, 709 translucent electrode, 111, 211, 309, 411, 511 Au pad electrode, 112, 212, 307, 409, 512 n type electrodes, 703 superlattice layer, 704 high carrier concentration layer, 706 clad layer, 707 contact layer, 708 electrode.