Ferrodielectric material memory device and method of manufacturing the same

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention has a lower electrode, a capacitive insulating film made of a ferroelectric film, and an upper electrode sequentially formed on a semiconductor substrate, and a plurality of ferroelectrics arranged in a matrix in the word line direction and the bit line direction. The present invention relates to a ferroelectric memory device provided with a body capacitor and a method for manufacturing the same.

【0002】

[Conventional technology]

In recent years, as a semiconductor memory device, for example, SrBi₂Ta₂O₉(Hereafter referred to as SBT) or Pb (Zr, Ti) O₃A non-volatile ferroelectric memory device having a capacitive insulating film made of a ferroelectric material film having hysteresis characteristics such as (hereinafter referred to as PZT) has been developed. Ferroelectric materials such as SBT and PZT used in such ferroelectric memory devices are ferroelectric oxides.

【0003】

Therefore, after forming aluminum wiring on a plurality of strong dielectric capacitors via an interlayer insulating film, in an atmosphere containing hydrogen, which is performed to ensure the characteristics of the MOS transistor formed on the semiconductor substrate. In the CVD method performed to embed a tungsten film in a contact hole having a high aspect ratio due to heat treatment or miniaturization of a semiconductor memory device, when the dielectric oxide is exposed to a reducing atmosphere, particularly a hydrogen atmosphere, it is strong. The dielectric oxide is reduced. For this reason, the crystal composition of the ferroelectric oxide is destroyed, so that the insulating characteristics of the capacitive insulating film or the characteristics of the ferroelectric oxide are significantly deteriorated.

【0004】

Therefore, even if the ferroelectric capacitor is heat-treated in a hydrogen atmosphere after being formed, the capacitive insulating film of the ferroelectric capacitor is not exposed to hydrogen and reduced. As described above, a hydrogen barrier film that prevents hydrogen from entering the capacitive insulating film is formed so as to cover the ferroelectric capacitor.

【0005】

However, when a hydrogen barrier film is provided between the ferroelectric capacitor and the interlayer insulating film formed on the ferroelectric capacitor, in order to block the invasion of hydrogen from the horizontal direction, the hydrogen barrier film is used. The area needs to be at least several μm larger than the area of the ferroelectric capacitor. Further, since the hydrogen barrier film is also formed on the contact plug embedded in the interlayer insulating film, when the contact plug is formed by the tungsten film formed by the CVD method, the capacitance insulating film of the hydrogen barrier film is formed. The effect of preventing hydrogen from entering the membrane is reduced.

【0006】

In particular, in recent years, the area of the ferroelectric capacitor has been reduced (1 μm) with the miniaturization of the ferroelectric memory device.²However, for the reason described above, it is not possible to reliably prevent hydrogen from entering the capacitive insulating film simply by covering the ferroelectric capacitor with a hydrogen barrier film.

【0007】

Therefore, Japanese Patent Application Laid-Open No. 11-135736 proposes a ferroelectric memory device having a structure as shown in FIG.

【0008】

Hereinafter, the ferroelectric memory device shown in FIG. 6 will be described as a conventional example.

【0009】

An element separation region 11 is formed on the surface of the silicon substrate 10, and an impurity diffusion layer 12 serving as a source or drain is formed. A gate electrode 13 is formed between the impurity diffusion regions 12 on the silicon substrate 10 via a gate insulating film, and the gate electrode 13 and the impurity diffusion layer 12 form a field effect transistor. ..

【0010】

A first interlayer insulating film 14 is formed on the field effect transistor and the element separation region 11, and a first insulating property is formed above the element separation region 11 on the first interlayer insulating film 14. A hydrogen barrier film 15 is formed. A ferroelectric capacitor composed of a lower electrode 16, a capacitive insulating film 17 made of a ferroelectric film, and an upper electrode 18 is formed on the first insulating hydrogen barrier film 15. A conductive hydrogen barrier film 19 is formed on the upper electrode 18, and a second insulation is formed so as to cover the upper surface of the conductive hydrogen barrier film 19 and the side surfaces of the lower electrode 16, the capacitance insulating film 17, and the upper electrode 18. The acidic hydrogen barrier film 20 is formed, and the strong dielectric capacitor is completely covered with the first insulating hydrogen barrier film 15, the conductive hydrogen barrier film 19, and the second insulating hydrogen barrier film 20. ..

【0011】

A second interlayer insulating film 21 is formed on the first interlayer insulating film 14 and the second insulating hydrogen barrier film 20. A metal wiring 22 is formed on the second interlayer insulating film 21, and the metal wiring 22 is connected to the contact plug 23 embedded in the first interlayer insulating film 14 and the second interlayer insulating film 21. doing.

【0012】

[Problems to be Solved by the Invention]

As described above, since the strong dielectric capacitor is completely covered by the first insulating hydrogen barrier film 15, the conductive hydrogen barrier film 19, and the second insulating hydrogen barrier film 20, the capacitive insulating film 17 The situation where hydrogen invades can be prevented.

【0013】

However, in the conventional ferroelectric memory device, the side portion of the second insulating hydrogen barrier film 20 disappears due to mask misalignment when patterning the second insulating hydrogen barrier film 20. A situation occurs in which the film thickness becomes thin.

【0014】

Therefore, it is necessary to increase the film thickness of the second insulating hydrogen barrier film 20 and increase the margin of the mask for patterning the second insulating hydrogen barrier film 20.

【0015】

Therefore, since it is necessary to increase the distance between the ferroelectric capacitors, there is a problem that it becomes difficult to miniaturize the ferroelectric memory device.

【0016】

In view of the above, it is an object of the present invention to ensure both prevention of hydrogen intrusion into the capacitive insulating film of the ferroelectric capacitor and miniaturization of the ferroelectric memory device.

【0017】

[Means for solving problems]

In order to achieve the above object, the capacitor memory device according to the present invention has a lower electrode sequentially formed on an interlayer insulating film on a semiconductor substrate, a capacitance insulating film made of a capacitor film, and an upper electrode. However, the target is a dielectric memory device provided with a plurality of strong dielectric capacitors arranged in the word line direction and the bit line direction, and among the plurality of strong dielectric capacitors, the word line direction and the bit line direction. A first insulating hydrogen barrier film is embedded between the lower electrodes of a plurality of strong dielectric capacitors arranged in one direction, and the lower electrodes of the plurality of strong dielectric capacitors arranged in one direction and the first one. A capacitive insulating film common to a plurality of strong dielectric capacitors arranged in one direction is formed on the insulating hydrogen barrier film, and a plurality of strong dielectrics arranged in one direction are formed on the common capacitive insulating film. A common upper electrode is formed on the body capacitor, and a second insulating hydrogen barrier film is formed so as to cover the common upper electrode.

【0018】

According to the ferroelectric memory device according to the present invention, a first insulating hydrogen barrier film is embedded between the lower electrodes of a plurality of ferroelectric capacitors arranged in one of the word line direction and the bit line direction. Therefore, it is not necessary to pattern the region between the lower electrodes of the plurality of ferroelectric capacitors arranged in one direction in the first insulating hydrogen barrier film. Therefore, it is not necessary to secure a dimensional margin between the lower electrodes in consideration of the misalignment of the mask for patterning. Therefore, the distance between the ferroelectric capacitors is narrowed, and the memory cell array and thus the ferroelectric are used. The area of the body memory device can be reduced.

【0019】

Further, since the second insulating hydrogen barrier film is formed so as to cover the common upper electrode, when the ferroelectric capacitor is formed and then heat-treated in a hydrogen atmosphere, the ferroelectric capacitor is formed. Since hydrogen that invades the capacitive insulating film from above can be prevented, the reduction of the ferroelectric film constituting the capacitive insulating film can be prevented.

【0020】

In the ferroelectric memory device according to the present invention, it is preferable that the second insulating hydrogen barrier film is formed separately for each capacitor row composed of a plurality of ferroelectric capacitors arranged in one direction.

【0021】

In this way, it is not necessary to pattern the region between the lower electrodes of the plurality of ferroelectric capacitors arranged in one direction in the second insulating hydrogen barrier film, so that the position of the mask for patterning is not required. Since it is not necessary to secure a dimensional margin between the lower electrodes in consideration of the deviation, the distance between the ferroelectric capacitors can be narrowed, and the area of the memory cell array and thus the ferroelectric memory device can be reduced. ..

【0022】

In the ferroelectric memory device according to the present invention, the second insulating hydrogen barrier film is formed in the other direction of the word line direction and the bit line direction in the capacitor sequence composed of a plurality of ferroelectric capacitors arranged in one direction. It is preferably formed so as to cover a pair of capacitors adjacent to each other.

【0023】

In this way, it is not necessary to secure a dimensional margin between a pair of capacitor rows composed of a plurality of ferroelectric capacitors arranged in one direction in the second insulating hydrogen barrier film, so that the pair of capacitor rows are used with each other. The space between the capacitors can be narrowed to reduce the area of the memory cell array and thus the ferroelectric memory device. Further, since there is a region in which the hydrogen barrier film is not formed in the vicinity of the selection transistor of the ferroelectric memory device, heat treatment in a hydrogen atmosphere is performed to restore the characteristics of the transistor after forming the metal wiring. In, a path for hydrogen to diffuse into the selective transistor can be secured.

【0024】

In the ferroelectric memory device according to the present invention, it is preferable that a conductive hydrogen barrier film is formed between the contact plug formed in the interlayer insulating film and the lower electrode.

【0025】

In this way, when heat treatment is performed in a hydrogen atmosphere after forming the ferroelectric capacitor, hydrogen that invades the capacitive insulating film of the ferroelectric capacitor from below can be prevented, so that the capacitive insulating film can be prevented. It is possible to prevent the reduction of the ferroelectric film constituting the above.

【0026】

When the ferroelectric memory device according to the present invention is provided with a conductive hydrogen barrier film, a capacitor array composed of a plurality of ferroelectric capacitors arranged in one direction includes a conductive hydrogen barrier film and a first insulating hydrogen. It is preferably completely covered by a barrier film and a second insulating hydrogen barrier film.

【0027】

In this way, even if the ferroelectric capacitor is formed and then heat-treated in a hydrogen atmosphere, it is possible to reliably prevent hydrogen from entering the capacitive insulating film of the ferroelectric capacitor, so that the capacitive insulating film can be prevented. Since the reduction of the ferroelectric film constituting the above is prevented, deterioration of the characteristics of the capacitive insulating film can be reliably prevented.

【0028】

In the ferroelectric memory device according to the present invention, a step relaxation film for alleviating the step formed on the peripheral edge of the common upper electrode is formed between the common upper electrode and the second insulating hydrogen barrier film. Is preferable.

【0029】

By doing so, the angular step formed at the peripheral end of the patterned upper electrode is relaxed, so that the coverage at the peripheral end of the upper electrode of the second insulating hydrogen barrier film can be improved. ..

【0030】

In the ferroelectric memory device according to the present invention, the first insulating hydrogen barrier film is Si.₃N₄Membrane, SiON Membrane, Al₂O₃Membrane, TiO₂A film, an oxide film of an alloy of Ti and Al, or an oxynitride film can be used.

【0031】

In the ferroelectric memory device according to the present invention, the second insulating hydrogen barrier film is Si.₃N₄Membrane, SiON Membrane, Al₂O₃Membrane, TiO₂A film, a TiN film, an alloy film of Ti and Al, an oxide film of an alloy of Ti and Al, a nitride film, or an oxynitride film can be used.

【0032】

In the ferroelectric memory device according to the present invention, as the conductive hydrogen barrier film, an alloy film of Ti and Al, a nitride film or an oxynitride film of an alloy of Ti and Al, or a TiN film may be used. it can.

【0033】

The method for manufacturing a capacitor memory device according to the present invention has a lower electrode sequentially formed on an interlayer insulating film on a semiconductor substrate, a capacitance insulating film made of a capacitor film, and an upper electrode, and has a word line direction. A step of forming lower electrodes of a plurality of strong dielectric capacitors on an interlayer insulating film for a method of manufacturing a strong dielectric memory device having a plurality of strong dielectric capacitors arranged in the bit line direction. After depositing the first insulating hydrogen barrier film on the interlayer insulating film and the lower electrode, the first insulating hydrogen barrier film is flattened, and among the plurality of strong dielectric capacitors, the word line direction and The process of embedding a first insulating hydrogen barrier film between the lower electrodes of a plurality of strong dielectric capacitors arranged in one direction of the bit line direction, and the lower electrodes of a plurality of strong dielectric capacitors arranged in one direction. And a step of forming a common capacitive insulating film for a plurality of strong dielectric capacitors arranged in one direction on the first insulating hydrogen barrier film, and a plurality of unidirectionally arranged capacitive insulating films on the common capacitive insulating film. It includes a step of forming a common upper electrode in a strong dielectric capacitor and a step of forming a second insulating hydrogen barrier film on the common upper electrode so as to cover the common upper electrode.

【0034】

According to the method for manufacturing a ferroelectric memory device according to the present invention, the first insulating hydrogen barrier film is embedded between the lower electrodes of a plurality of ferroelectric capacitors arranged in one direction. In the insulating hydrogen barrier film, it is not necessary to pattern in the region between the lower electrodes of the plurality of ferroelectric capacitors arranged in one direction. Therefore, it is not necessary to secure a dimensional margin between the lower electrodes in consideration of the misalignment of the mask for patterning. Therefore, the distance between the ferroelectric capacitors is narrowed, and the memory cell array and thus the ferroelectric are used. The area of the body memory device can be reduced.

【0035】

In addition, since it is provided with a step of forming a second insulating hydrogen barrier film so as to cover the common upper electrode, it is strong when heat treatment is performed in a hydrogen atmosphere after forming a ferroelectric capacitor. Since hydrogen can be prevented from entering the capacitive insulating film of the dielectric capacitor from above, reduction of the ferroelectric film constituting the capacitive insulating film can be prevented.

【0036】

In the method for manufacturing a ferroelectric memory device according to the present invention, it is preferable that the second insulating hydrogen barrier film is separately formed for each capacitor row composed of a plurality of ferroelectric capacitors arranged in one direction. ..

【0037】

In this way, it is not necessary to pattern the region between the lower electrodes of the plurality of ferroelectric capacitors arranged in one direction in the second insulating hydrogen barrier film, so that the position of the mask for patterning is not required. Since it is not necessary to secure a dimensional margin between the lower electrodes in consideration of the deviation, the distance between the ferroelectric capacitors can be narrowed, and the area of the memory cell array and thus the ferroelectric memory device can be reduced. ..

【0038】

In the method for manufacturing a ferroelectric memory device according to the present invention, the second insulating hydrogen barrier film is a capacitor array composed of a plurality of ferroelectric capacitors arranged in one direction, in the word line direction and the bit line direction. It is preferably formed so as to cover a pair of capacitors adjacent to each other in the other direction.

【0039】

In this way, it is not necessary to secure a dimensional margin between a pair of capacitor rows composed of a plurality of ferroelectric capacitors arranged in one direction in the second insulating hydrogen barrier film, so that the pair of capacitor rows are used with each other. The space between the capacitors can be narrowed to reduce the area of the memory cell array and thus the ferroelectric memory device. Further, since there is a region in which the hydrogen barrier film is not formed in the vicinity of the selection transistor of the ferroelectric memory device, heat treatment in a hydrogen atmosphere is performed to restore the characteristics of the transistor after forming the metal wiring. In, a path for hydrogen to diffuse into the selective transistor can be secured.

【0040】

In the method for manufacturing a ferroelectric memory device according to the present invention, a conductive hydrogen barrier film interposed between a contact plug formed in an interlayer insulating film and a lower electrode is formed before a step of forming a lower electrode. It is preferable to further include a step of forming.

【0041】

In this way, when heat treatment is performed in a hydrogen atmosphere after forming the ferroelectric capacitor, hydrogen that invades the capacitive insulating film of the ferroelectric capacitor from below can be prevented, so that the capacitive insulating film can be prevented. It is possible to prevent the reduction of the ferroelectric film constituting the above.

【0042】

When the method for manufacturing a ferroelectric memory device according to the present invention includes a step of forming a conductive hydrogen barrier film, a capacitor array composed of a plurality of ferroelectric capacitors arranged in one direction is a conductive hydrogen barrier film. , It is preferable that the capacitor is completely covered by the first insulating hydrogen barrier film and the second insulating hydrogen barrier film.

【0043】

In this way, even if the ferroelectric capacitor is formed and then heat-treated in a hydrogen atmosphere, it is possible to reliably prevent hydrogen from entering the capacitive insulating film of the ferroelectric capacitor, so that the capacitive insulating film can be prevented. Since the reduction of the ferroelectric film constituting the above is prevented, deterioration of the characteristics of the capacitive insulating film can be reliably prevented.

【0044】

The method for manufacturing a ferroelectric memory device according to the present invention has a common upper electrode and a second insulating property between a step of forming a common upper electrode and a step of forming a second insulating hydrogen barrier film. It is preferable to further include a step of forming a step relaxation film that is interposed between the hydrogen barrier film and alleviates the step formed on the peripheral edge of the common upper electrode.

【0045】

By doing so, the angular step formed at the peripheral end of the patterned upper electrode is relaxed, so that the coverage at the peripheral end of the upper electrode of the second insulating hydrogen barrier film can be improved. ..

【0046】

In the method for manufacturing a ferroelectric memory device according to the present invention, the first insulating hydrogen barrier film is Si.₃N₄Membrane, SiON Membrane, Al₂O₃Membrane, TiO₂A film, an oxide film of an alloy of Ti and Al, or an oxynitride film can be used.

【0047】

In the method for manufacturing a ferroelectric memory device according to the present invention, the second insulating hydrogen barrier film is Si.₃N₄Membrane, SiON Membrane, Al₂O₃Membrane, TiO₂A film, a TiN film, an alloy film of Ti and Al, an oxide film of an alloy of Ti and Al, a nitride film, or an oxynitride film can be used.

【0048】

In the method for manufacturing a ferroelectric memory device according to the present invention, the conductive hydrogen barrier film uses an alloy film of Ti and Al, a nitride film or an oxynitride film of an alloy of Ti and Al, or a TiN film. be able to.

【0049】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, the structure of the ferroelectric memory device according to the embodiment of the present invention will be described with reference to FIGS. 1 and 2.

【0050】

The ferroelectric memory device according to an embodiment of the present invention includes a memory cell array composed of a plurality of memory cells arranged in a matrix in the word line direction and the bit line direction. FIG. 1 shows the cross-sectional structure of the surface parallel to the word line in the ferroelectric memory device, and FIG. 2 shows the cross-sectional structure of the surface parallel to the bit line in the ferroelectric memory device.

【0051】

As shown in FIGS. 1 and 2, an element separation region 101 is formed on the surface of the semiconductor substrate 100 made of silicon, and the region surrounded by the element separation region 101 on the semiconductor substrate 100 is gate-insulated. The gate electrode 102 is formed through the film. First high-concentration impurity diffusion layers 103A and 103B serving as sources or drains are formed on both sides of the gate electrode 102 on the surface of the semiconductor substrate 100, and the gate electrodes 102 and the first impurity diffusion layers 103A and 103B are formed. The field effect transistor is configured by. A second high-concentration impurity diffusion layer 104 is formed on the peripheral edge of the memory cell array on the surface of the semiconductor substrate 100.

【0052】

A first interlayer insulating film 105 is formed on the semiconductor substrate 100 so as to cover the field-effect transistor. A first contact plug 106 and a second contact plug 107 are embedded in the first interlayer insulating film 105, respectively, and the lower end of the first contact plug 106 is connected to the first high-concentration impurity diffusion layer 103A. The lower end of the second contact plug 107 is connected to the second high-concentration impurity diffusion layer 104.

【0053】

A conductive hydrogen barrier film 108 is formed on the first interlayer insulating film 105 so as to connect to the upper end of the first contact plug 106 or the upper end of the second contact plug 107, respectively, and the first A lower electrode 109 is formed on the conductive hydrogen barrier film 108 located on the contact plug 106, and an upper part is formed on the conductive hydrogen barrier film 108 located on the second contact plug 107. An electrode relay portion 110 is formed.

【0054】

A first insulating hydrogen barrier film 111 is formed on the first interlayer insulating film 105 so as to surround the lower electrode 109 and the upper electrode relay portion 110, and is formed on the upper surface of the lower electrode 109 and the upper electrode relay portion. The upper surface of 110 and the upper surface of the first insulating hydrogen barrier film 111 are formed substantially flush with each other. In the present embodiment, as shown in FIG. 1, the first insulating hydrogen barrier film 111 is embedded without a gap between the lower electrodes 109 arranged in the word line direction, but as shown in FIG. , A gap is formed between the first insulating hydrogen barrier films 111 formed between the lower electrodes 109 arranged in the bit line direction.

【0055】

A ferroelectric film is formed on the lower electrode 109 and the first insulating hydrogen barrier film 111 arranged in the ward line direction, and a capacitive insulating film 112 common to the ferroelectric capacitors arranged in the ward line direction is formed. An opening is formed above the upper electrode relay portion 110 in the capacitive insulating film 112. An upper electrode 113 common to the ferroelectric capacitors arranged in the word line direction is formed on the capacitive insulating film 112, and the upper electrode 113 and the upper electrode relay portion 110 are formed through an opening of the capacitive insulating film. You are connected. The ferroelectric capacitor is composed of the lower electrode 109, the capacitive insulating film 112, and the upper electrode 113 described above, and the capacitive insulating film 112 and the upper electrode 113 are made of a plurality of ferroelectric capacitors arranged in the word line direction. It is commonly provided in the capacitor train.

【0056】

A second insulating hydrogen barrier film 115 is formed on the upper electrode 113 via a step relaxation film 114, and the peripheral portion of the second insulating hydrogen barrier film 115 is a first insulating hydrogen. It is connected to the upper surface of the barrier film 111. As a result, the capacitor array consisting of a plurality of ferroelectric capacitors arranged in the word line direction is completely covered by the conductive hydrogen barrier film 108, the first insulating hydrogen barrier film 111, and the second insulating hydrogen barrier film 115. It has been.

【0057】

A second interlayer insulating film 116 is formed on the first interlayer insulating film 105 so as to cover the second insulating hydrogen barrier film 115, and a first interlayer insulating film 116 is formed on the second interlayer insulating film 116. Metal wiring 117 and a second metal wiring 118 are formed. The first metal wiring 117 and the first high-concentration impurity diffusion layer 103B are connected by a third contact plug 119 embedded in the first interlayer insulating film 105 and the second interlayer insulating film 116. , The second metal wiring 118 and the second high-concentration impurity diffusion layer 104 are connected by a fourth contact plug 120 embedded in the first interlayer insulating film 105 and the second interlayer insulating film 116.

【0058】

According to the ferroelectric memory device according to the embodiment of the present invention, the first insulating hydrogen barrier film 111 is embedded between the lower electrodes 109 of the plurality of ferroelectric capacitors arranged in the word line direction. It is a structure, and it is not necessary to pattern in the region between the lower electrodes 109 of the plurality of ferroelectric capacitors arranged in the word line direction in the first insulating hydrogen barrier film 111. Therefore, it is not necessary to secure a dimensional margin between the lower electrodes 109 in consideration of the displacement of the mask for patterning, so that the space between the ferroelectric capacitors is narrowed to reduce the area of the memory cell array. Can be reduced.

【0059】

Further, the capacitor row composed of a plurality of ferroelectric capacitors arranged in the word line direction is completely covered by the conductive hydrogen barrier film 108, the first insulating hydrogen barrier film 111, and the second insulating hydrogen barrier film 115. Therefore, even if heat treatment is performed in a hydrogen atmosphere after the ferroelectric capacitor is formed, it is possible to reliably prevent hydrogen from entering the capacitive insulating film 112 of the ferroelectric capacitor. Therefore, since the reduction of the ferroelectric film constituting the capacitive insulating film 112 is prevented, deterioration of the characteristics of the capacitive insulating film 112 can be prevented.

【0060】

Hereinafter, the ferroelectric memory device according to the modified example of the embodiment of the present invention will be described with reference to FIG. In the modified example, the members common to the embodiment of the present invention are designated by the same reference numerals, and the description thereof will be omitted.

【0061】

In one embodiment of the present invention, as shown in FIG. 2, a gap is formed between capacitor rows made of ferroelectric capacitors arranged in the word line direction, and a second interlayer insulating film is formed in the gap. The structure was such that 116 was embedded, but in the modified example, no gap was formed between the pair of capacitor rows adjacent to each other in the bit line direction without passing through the third contact plug 119. The first insulating hydrogen barrier film 111, the step relaxation film 114, and the second insulating hydrogen barrier film 115 are continuous between the pair of capacitor rows.

【0062】

According to the ferroelectric memory device according to the modification of one embodiment of the present invention, patterning is also performed between the lower electrodes 109 of the ferroelectric capacitors adjacent to each other in the bit line direction in the first insulating hydrogen barrier film 111. do not have to. Therefore, the area of the memory cell array can be further reduced by reducing the distance between the lower electrodes 109 adjacent to each other in the bit line direction.

【0063】

Further, since there is a region in which the hydrogen barrier film is not formed in the vicinity of the selection transistor of the ferroelectric memory device, heat treatment in a hydrogen atmosphere is performed to restore the characteristics of the transistor after forming the metal wiring. In, a path for hydrogen to diffuse into the selective transistor can be secured. In particular, in the case of a stack-type ferroelectric memory device in which a ferroelectric capacitor is formed on a transistor, it is possible to provide a path for hydrogen to diffuse into the selection transistor in the vicinity of the transistor formation region. For this reason, in the heat treatment in a hydrogen atmosphere performed to restore the characteristics of the transistor after forming the metal wiring, the path for hydrogen to diffuse to the selected transistor can be surely secured, so that the characteristics of the transistor can also be secured. it can.

【0064】

Hereinafter, a method for manufacturing a ferroelectric memory device according to an embodiment of the present invention will be described with reference to FIGS. 4 (a) to 4 (c) and FIGS. 5 (a) to 5 (c).

【0065】

First, as shown in FIG. 4A, an element separation region 101 is formed on the surface of a semiconductor substrate 100 made of silicon by a well-known STI (Shallow Trench Isolation) technology or the like, and then a semiconductor is formed by a well-known CMOS process. A gate electrode 102 is formed on the substrate 100 via a gate insulating film in a region surrounded by the element separation region 101 (see FIG. 2), and then on both sides of the gate electrode 102 on the surface portion of the semiconductor substrate 100. The first high-concentration impurity diffusion layers 103A and 103B serving as sources or drains are formed, and the second high-concentration impurity diffusion layer 104 is formed on the peripheral edge of the memory cell array on the surface of the semiconductor substrate 100. As a result, a field effect transistor composed of the gate electrode 102 and the first impurity diffusion layers 103A and 103B is formed.

【0066】

Next, a first interlayer insulating film 105 made of a BPSG film is formed on the semiconductor substrate 100 so as to cover the field effect transistor, and then the lower end is the first height on the first interlayer insulating film 105. The first contact hole connected to the concentration impurity diffusion layer 103A and the lower end form a second contact hole connected to the second high concentration impurity diffusion layer 104. Next, after sequentially depositing a titanium film having a thickness of 10 nm by the sputtering method and a titanium nitride film having a thickness of 10 nm by the CVD method on the wall surface and the bottom surface of the first contact hole and the second contact hole. , A tungsten film is deposited over the entire surface inside the first and second contact holes and on the first interlayer insulating film 105 by the CVD method, and then by the CMP method, the first interlayer insulation in the tungsten film is performed. The first contact plug 106 and the second contact plug 107 are formed by polishing back the exposed portion on the film 105.

【0067】

Next, a nitride film of an alloy of Ti and Al having a thickness of, for example, 40 nm is deposited on the first interlayer insulating film 105 by a sputtering method, and then a nitride film of an alloy of Ti and Al having a thickness of 40 nm is deposited on the nitride film by a sputtering method. For example, Ir film with a thickness of 100 nm, IrO with a thickness of 50 nm₂A laminated film consisting of a film and a Pt film having a thickness of 100 nm is deposited, and then the laminated film and the nitride film are patterned to nitride an alloy of Ti and Al as shown in FIG. 4 (b). Conductive hydrogen barrier film 108, Ir film, IrO made of physical film₂A lower electrode 109 and an upper electrode relay portion 110 made of a laminated film of a film and a Pt film are formed. As the film to be the conductive hydrogen barrier film 108, instead of the nitride film of the alloy of Ti and Al, the alloy film of Ti and Al, the oxynitride film of gold alloy of Ti and Al, or TiN. A membrane may be used.

【0068】

Next, by the CVD method, Si having a thickness of 400 nm over the entire surface on the lower electrode 109, the upper electrode relay portion 110, and the first interlayer insulating film 105.₃N₄After depositing the film, the SiN film is flattened by the CMP method, and as shown in FIG. 4 (c), the first insulation is provided between the lower electrodes 109 and between the lower electrode 109 and the upper electrode relay portion 110. While embedding the sex hydrogen barrier film 111, the upper surface of the first insulating hydrogen barrier film 111 is made substantially flush with the upper surface of the lower electrode 109 and the upper surface of the upper electrode relay portion 110. The first insulating hydrogen barrier film 111 is Si.₃N₄Instead of membrane, SiON membrane, Al₂O₃Membrane, TiO₂A film, an oxide film of an alloy of Ti and Al, or an oxynitride film can be used.

【0069】

Next, as shown in FIG. 5A, the lower electrode 109, the upper electrode relay portion 110, and the first insulating hydrogen barrier film 111 are made of, for example, an SBT film and have a thickness of 100 nm by a spin coating method. By patterning the dielectric film after depositing the dielectric film having the above, the upper electrode is commonly formed on the lower electrode 109 and the first insulating hydrogen barrier film 111 arranged in the word line direction. A capacitive insulating film 112 having an opening is formed on the relay portion 110. Next, a Pt film having a thickness of 100 nm is deposited on the capacitive insulating film 112 by a sputtering method, and then the Pt film is patterned to form the upper electrode 113 on the capacitive insulating film 112. As a result, a capacitor row in which the ferroelectric capacitors composed of the lower electrode 109, the capacitive insulating film 112, and the upper electrode 113 are arranged in the word line direction is formed, and the capacitive insulating film 112 and the upper electrode 113 common to the capacitor rows are formed. It is formed.

【0070】

Next, as shown in FIG. 5 (b), an NSG film having a thickness of 150 nm is deposited over the entire surface on the upper electrode 113 and the first insulating hydrogen barrier film 111, and then the NSG film is formed. , The step-relief film made of NSG film is patterned so as to completely cover the capacitor array made of strong dielectric capacitors in which the NSG film is lined up in the word line direction and the upper electrode relay portion 110 located at the end of the capacitor array. Form 114.

【0071】

Next, after depositing a second insulating hydrogen barrier film 115 having a thickness of 100 nm over the entire surface on the step relaxation film 114 and the first insulating hydrogen barrier film 111, the second insulating property The hydrogen barrier film 115 and the first insulating hydrogen barrier film 111 are patterned so as to cover a capacitor array composed of strong dielectric capacitors arranged in the word line direction and an upper electrode relay portion 110 located at the end of the capacitor array. To do. In this way, the peripheral edge of the patterned second insulating hydrogen barrier film 115 and the peripheral edge of the patterned first insulating hydrogen barrier film 111 are connected so that they are aligned in the word line direction. The capacitor array composed of the strong dielectric capacitors is completely covered with the conductive hydrogen barrier film 108, the second insulating hydrogen barrier film 115, and the first insulating hydrogen barrier film 111.

【0072】

The second insulating hydrogen barrier film 115 is a film capable of preventing the invasion of hydrogen, for example, Si.₃N₄Membrane, SiON Membrane, Al₂O₃Membrane, TiO₂A film, a TiN film, an alloy film of Ti and Al, an oxide film of an alloy of Ti and Al, a nitride film, or an oxynitride film can be used.

【0073】

By the way, the step-relieving film 114 relaxes the angular step formed at the peripheral end of the capacitive insulating film 112 and the upper electrode 113 formed by patterning, and is the capacitive insulating film of the second insulating hydrogen barrier film 115. It is provided to improve the coverage at the peripheral end of the 112 and the upper electrode 113.

【0074】

Therefore, as the second insulating hydrogen barrier film 115, SiN film, SiON film, Al₂O₃When a film having excellent coverage such as a film, a TiO film, or an oxide film of an alloy of Ti and Al is used, the step relaxation film 114 can be omitted.

【0075】

Next, as shown in FIG. 5 (c), a second interlayer insulating composed of an NSG film so as to cover the patterned second insulating hydrogen barrier film 115 on the first interlayer insulating film 105. After depositing the film 116, the second interlayer insulating film 116 is flattened.

【0076】

Next, the first interlayer insulating film 105 and the second interlayer insulating film 116 are connected to the first high-concentration impurity diffusion layer 103B (see FIG. 2) with a third contact hole and a second high-concentration. After forming the fourth contact hole connected to the impurity diffusion layer 104, a tungsten film is embedded in the third contact hole and the fourth contact hole, and the third contact plug 119 (see FIG. 2) and the third contact hole are formed. Form 4 contact plugs 120.

【0077】

Next, after depositing an Al alloy film on the second interlayer insulating film 116, the Al alloy film is patterned to form the first metal wiring 117 and the second metal film 118. A ferroelectric memory device according to an embodiment can be obtained.

【0078】

In one embodiment of the present invention, among the plurality of strong dielectric capacitors, the first insulating hydrogen barrier film 111 is embedded between the lower electrodes 109 of the plurality of strong dielectric capacitors arranged in the word line direction. On the lower electrodes 109 and the first insulating hydrogen barrier film 111 of the plurality of strong dielectric capacitors arranged in the ward line direction, the capacitance insulating film 112 common to the plurality of strong dielectric capacitors arranged in the ward line direction is formed. A second insulating hydrogen barrier is formed on the common capacitive insulating film 112 so as to form a common upper electrode 113 for a plurality of strong dielectric capacitors arranged in the word line direction and cover the common upper electrode 1113. The film 115 was formed, but instead of this, a first insulating hydrogen barrier film was formed between the lower electrodes 109 of the plurality of strong dielectric capacitors arranged in the bit line direction among the plurality of strong dielectric capacitors. Capacitive insulation common to a plurality of strong dielectric capacitors arranged in the bit line direction on the lower electrode 109 of the plurality of strong dielectric capacitors arranged in the bit line direction and the first insulating hydrogen barrier film 111 in which 111 is embedded. A film 112 is formed, and on the common capacitive insulating film 112, an upper electrode 113 common to a plurality of strong dielectric capacitors arranged in the bit line direction is formed, and a second insulation is formed so as to cover the common upper electrode 1113. It may have a structure in which the sex hydrogen barrier film 115 is formed.

【0079】

[Effect of the invention]

According to the ferroelectric memory device and the manufacturing method thereof according to the present invention, since the first insulating hydrogen barrier film is embedded between the lower electrodes of a plurality of ferroelectric capacitors arranged in one direction, the first It is not necessary to pattern in the region between the lower electrodes of the plurality of ferroelectric capacitors arranged in one direction in the insulating hydrogen barrier film of the above. Therefore, it is not necessary to secure a dimensional margin between the lower electrodes in consideration of the misalignment of the mask for patterning. Therefore, the distance between the ferroelectric capacitors is narrowed, and the memory cell array and thus the ferroelectric are used. The area of the body memory device can be reduced.

[Simple explanation of drawings]

[Figure 1]

It is sectional drawing in the word line direction of the ferroelectric memory apparatus which concerns on one Embodiment of this invention.

[Figure 2]

It is sectional drawing in the bit line direction of the ferroelectric memory apparatus which concerns on one Embodiment of this invention.

[Fig. 3]

It is sectional drawing in the bit line direction of the ferroelectric memory apparatus which concerns on the modification of one Embodiment of this invention.

[Fig. 4]

(a) to (c) are cross-sectional views showing each step of the manufacturing method of the ferroelectric memory device according to the embodiment of the present invention.

[Fig. 5]

(a) to (c) are cross-sectional views showing each step of the manufacturing method of the ferroelectric memory device according to the embodiment of the present invention.

[Fig. 6]

It is sectional drawing of the conventional ferroelectric memory apparatus.

[Explanation of symbols]

100 semiconductor substrate 101 element separation area 102 Gate electrode 103A, 103B First high-concentration impurity diffusion layer 104 Second high-concentration impurity diffusion layer 105 First interlayer insulating film 106 1st contact plug 107 Second contact plug 108 Conductive hydrogen barrier film 109 Lower electrode 110 Upper electrode relay 111 First Insulating Hydrogen Barrier Membrane 112 Capacitive insulating film 113 Top electrode 114 Step relief film 115 Second Insulating Hydrogen Barrier Membrane 116 Second interlayer insulating film 117 First metal wiring 118 Second metal wiring 119 Third contact plug 120 4th contact plug