Etching method

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to an etching method, and more particularly to a method of etching an organic Low-k film layer used as a resist layer for forming a wiring pattern, an antireflection film layer, and an interlayer insulating film in, for example, a multilayer wiring forming step.

【0002】

[Conventional technology]

With the increasing integration of semiconductor integrated circuits, the manufacture of semiconductor devices having a multi-layer wiring structure is rapidly developing. In the case of a semiconductor device having a multi-layer wiring structure, it is necessary to form a via hole wiring that connects each element that is vertically stacked together with a trench wiring that connects each element that develops in the horizontal direction. A dual damascene structure is adopted as such a multi-layer wiring structure. At that time, in order to increase the speed of the integrated circuit, recently, copper or the like is used as a metal having low resistance and excellent electromigration resistance as a wiring material, and organic low-which can secure a low dielectric constant as an interlayer insulating material. There is a tendency to use, for example, SiLK (a product of Dow Chemical Co., Ltd. in the United States) as the k material.

【0003】

By the way, for example, (a) to (c) of FIG. 6 show an example of a step of forming a shoulder portion of a via hole having a dual damascene structure by using a photoresist layer (PR layer) for forming a via hole. When forming a dual damascene structure, for example, a silicon oxide film layer (SiO) is formed on a wafer as shown in (a) of the figure.₂A film layer (101), a silicon nitride film layer (SiN film layer) 102, an organic Low-k film layer (for example, SiLK film layer) 103, a SiN film layer 104, and a copper wiring layer (Cu layer) 105 having a lower circuit pattern are formed. The SiLK film layer 106 is formed. Here, SiO₂The film layer 101 and the silicon nitride film layer (SiN film layer 102) are formed as a first hard mask layer and a second hard mask layer for forming vias and trenches, respectively, and the SiLK film layer 103 is an interlayer insulating film layer. The lower SiN film layer 104 is formed as a stopper when forming a via hole. A photoresist film layer (PR layer) 107 having a pattern for forming a via hole is formed on the uppermost layer.

【0004】

When a via hole is formed in the SiLK layer 103, a gas having etching properties with respect to the SiN film layer 102 and the SiLK film layer 103 (for example, CF4 gas, Ar gas, O)₂After etching the SiN layer 102 according to the via hole pattern 108 of the PR layer 107 as shown in (a) of FIG. 6 using a gas mixed gas), the SiLK film layer 103 is provided with a predetermined thickness, for example, a shoulder having a dual damascene structure. Overetch to the depth corresponding to the part (see (b) in the figure). Continue to SiO₂Etching gas showing a high selectivity with respect to the film layer 101 and the SiN layer 102 (for example, N)₂Gas and H₂There is a step of etching (ashing) the PR layer 107 using a mixed gas of gas). In this step, as shown in (c) of the figure, the PR layer 107 is removed and SiO is added.₂Using the film layer 101 and the SiN layer 102 as a hard mask, the SiLK layer 103 is etched to further dig into the via hole 108.

【0005】

[Problems to be Solved by the Invention]

However, conventionally N₂Gas and H₂When the PR layer 107 for forming a via hole and the SiLK layer 103, which is an interlayer insulating film layer, are simultaneously etched using a mixed gas of gas, SiO is shown in FIG. 6 (c).₂Since the resist residue D remains on the trench portion (SiN film layer 102) 110 formed by etching the film layer 101, the shape of the etching of the SiN film layer 102 due to the resist residue is defective in the subsequent etching step of the SiN film layer 102. There is a problem that it causes an etching residue of the SiLK film layer 103 in the subsequent etching. In particular, when an antireflection film layer, which is an organic film layer, is provided under the PR layer 107, the resist residue tends to remain remarkably.

【0006】

The present invention has been made to solve the above problems, and does not leave a resist residue when etching an organic film layer such as a resist film layer or an organic interlayer insulating film layer in a wiring forming step, and an organic interlayer insulating film. It is an object of the present invention to provide an etching method capable of etching a layer into a desired shape.

【0007】

[Means for solving problems]

The etching method according to claim 1 of the present invention is a method for etching an organic film layer, in which N is used as an etching gas.₂Gas, H₂It is characterized by using a mixed gas of gas and CF-based gas.

【0008】

Further, the etching method according to claim 2 of the present invention is a method for etching an organic film layer, in which the etching gas includes a gas containing N and H, a CF gas and O.₂It is characterized by using a mixed gas of gas.

【0009】

Further, the etching method according to claim 3 of the present invention is the invention according to claim 1 or 2, wherein an organic film layer for forming a wiring pattern and a hard mask formed under the organic film layer. In the step of forming a via hole structure based on the layer and the organic Low-k film layer formed under the hard mask layer, the organic film layer and the organic Low-k film layer are etched with the etching gas. It is characterized by that.

【0010】

Further, the etching method according to claim 4 of the present invention is the invention according to claim 1 or 2, wherein an organic film layer for forming a wiring pattern and a hard mask formed under the organic film layer. In the step of forming a trench structure based on the layer and the organic Low-k film layer formed under the hard mask layer, the organic film layer and the organic Low-k film layer are etched with the etching gas. It is characterized by that.

【0011】

Further, the etching method according to claim 5 of the present invention is the invention according to claim 1 or 2, wherein an organic film layer for forming a wiring pattern and a hard mask formed under the organic film layer. The organic film layer and the organic Low-k film layer are etched with the etching gas in the step of forming the dual damascene structure based on the layer and the organic Low-k film layer formed under the hard mask layer. It is characterized by doing.

【0012】

Further, in the etching method according to claim 6 of the present invention, in the invention according to any one of claims 1 to 5, the organic film layer includes a resist film layer and an antireflection film layer. It is characterized by.

【0013】

Further, the etching method according to claim 7 of the present invention is characterized in that, in the invention according to any one of claims 3 to 6, the hard mask layer includes a silicon nitride film layer. Is.

【0014】

Further, the etching method according to claim 8 of the present invention uses CH as the CF-based gas in the invention according to any one of claims 1 to 7.₃It is characterized by using F gas.

【0015】

Further, the etching method according to claim 9 of the present invention is the invention according to any one of claims 2 to 8, wherein NH is used as the gas containing N and H.₃It is characterized by using gas.

【0016】

Further, the etching method according to claim 10 of the present invention is the present invention according to any one of claims 2 to 9, wherein the etching gas is NH.₃/ CH₃F / O₂Using a mixed gas of O₂/ NH₃It is characterized in that the flow rate ratio of is larger than 10/1500 and smaller than 300/1500.

【0017】

Further, the etching method according to claim 11 of the present invention is characterized in that, in the invention according to any one of claims 1 to 10, the organic film layer is removed without residue. ..

【0018】

Further, the etching method according to claim 12 of the present invention is characterized in that, in the invention according to any one of claims 3 to 11, a via hole is formed in the organic Low-k film layer. It is something to do.

【0019】

Further, the etching method according to claim 13 of the present invention is characterized in that, in the invention according to claim 12, a part of the via hole is left.

【0020】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, the present invention will be described based on the embodiments shown in FIGS. 1 to 5. FIG. 1 is a cross-sectional view schematically showing a plasma processing apparatus used when carrying out the etching method of the present invention. As shown in FIG. 1, this plasma processing apparatus includes a processing container (chamber) 1 which is safely grounded, a lower electrode 2 which constitutes a susceptor arranged in the chamber 1 so as to be able to move up and down, and the lower electrode 2. A hollow upper electrode 3 that forms the ceiling portion of the chamber 1 and a supply portion of the etching gas above the chamber 1, and a plurality of types of etching gas that are connected to the gas introduction portion 3A at the center of the upper surface of the upper electrode 3 It is configured as a parallel flat plate type equipped with a gas supply system 4 for supplying gas and an exhaust device (not shown) connected to the exhaust portion 1B of the chamber 1, and an appropriate etching gas is supplied from the gas supply system 4 into the chamber 1. And while keeping the inside of the chamber 1 at a predetermined degree of vacuum through the exhaust device, a plasma of etching gas is generated between the upper and lower electrodes 2 and 3, and the wafer W on the lower electrode 2 is etched.

【0021】

For example, a 2 MHz first high-frequency power source 5 is connected to the lower electrode 2 via a matching unit 5A, a predetermined high-frequency power is applied from the first high-frequency power source 5 to the lower electrode 2, and the lower electrode 2 is topped with a predetermined high-frequency power. A bias potential is generated in the wafer W of the above. For example, a second high frequency power supply 6 of 60 MHz is connected to the upper electrode 3 via a matching unit 6A, a predetermined high frequency power is applied from the second high frequency power supply 6 to the upper electrode 3, and the lower electrode is as described above. A plasma of etching gas is generated between 2 and the upper electrode 3.

【0022】

A ceramic electrostatic chuck 7 having a built-in electrode plate 7A is arranged on the upper surface of the lower electrode 2, and a 2.5 kV high-voltage DC power supply 7B is connected to the electrode plate 7A, for example. Then, a high-voltage DC power supply 7B applies a high-voltage DC voltage to the electrode plate 7A, and the Coulomb force generated on the surface of the electrostatic chuck 7 electrostatically attracts the wafer W. A focus ring 8 surrounding the electrostatic chuck 7 is arranged on the upper surface of the lower electrode 2, and plasma is collected on the wafer W surface of the lower electrode 2 via the focus ring 8. Further, the lower electrode 2 incorporates a cooling means and a heating means (both not shown), and controls the lower electrode 2 from -20 ° C to + 80 ° C via these cooling and heating means. Further, a gas flow path (not shown) for discharging a backside gas such as helium gas is formed in the lower electrode 2 and the electrostatic chuck 7, and the gas flow path is formed on the back surface of the wafer W on the electrostatic chuck 7. The backside gas is discharged toward the wafer to increase the heat transfer coefficient between the lower electrode 2 and the wafer W. Further, a large number of discharge holes 3B are uniformly dispersed and formed on the entire lower surface of the upper electrode 3, and the etching gas introduced into the upper electrode 3 from the gas supply system 4 is transferred from the plurality of discharge holes 3B into the entire chamber 1. Evenly supplied to. The upper electrode 3 is insulated from the chamber 1 via an insulating member 9.

【0023】

As shown in FIG. 1, the gas supply system 4 includes a gas supply source 41 for supplying a plurality of types of etching gases, and a flow rate adjusting valve 42 and an on-off valve 43 corresponding to these gas supply sources 41. .. In this embodiment, for example, the gas supply source 41 is N.₂Gas source 41A, H₂Gas supply sources 41B and CH₃It has an F gas supply source 41C and also has NH₃Gas source 41D, O₂It has a gas supply source 41E and other gas supply sources 41F. Further, the flow rate adjusting valve 42 has a flow rate adjusting valve 42A to 42F corresponding to each gas supply source 41A to 41F, and the on-off valve 43 has a valve 43A to 43F corresponding to each gas supply source 41A to 41F. .. Then, each gas supply source 41 is appropriately switched according to the etching target to supply a predetermined etching gas.

【0024】

Therefore, when the etching method of the present invention is carried out, a photoresist film layer (PR layer) for forming a via hole is formed in a step of forming a dual damascene structure in an organic Low-k film layer (for example, SiLK film layer). ) And the SiLK film layer, as described later, from the gas supply source 41, gas containing N and H, CF gas and O₂The mixed gas of is supplied as an etching gas. Or gas source 41 to N₂Gas, H₂A mixed gas of gas and CF gas is supplied as an etching gas. In addition, the oxide film layer (SiO)₂When etching a hard mask layer such as a film layer) or a nitride film layer (SiN film layer), another gas supply source 42F is used. In FIG. 1, a plurality of types of etching gases used for etching other than the etching method of the present invention are collectively described as other gas supply sources 41F.

【0025】

Next, an embodiment of the etching method of the present invention using the plasma processing apparatus will be described with reference to FIGS. 2 to 5. FIGS. 2 to 5 show the steps of forming trenches and via holes having a dual damascene structure. In the etching method of this embodiment, the PR layer is ashed and the SiLK film is shown in FIGS. 3 (b) and 3 (c). It is characterized by the process of further etching and digging the via holes formed in the layer. Therefore, the process of forming the trench and the via hole of the dual damascene structure will be described below.

【0026】

For example, as shown in FIG. 2 (a), the wafer forming the dual damascene structure has SiO as the first and second hard mask layers from the upper layer to the lower layer.₂Membrane layer (thickness: 100 nm, for example) 201, SiN film layer (thickness: 50 nm, for example) 202, organic Low-k film layer as interlayer insulating film layer (for example, SiLK film layer) (thickness: 550 nm, for example) 203 The SiN film layer 204 as a stopper and the SiLK film layer 206 on which the copper wiring layer (Cu layer) 205 of the lower circuit pattern is formed are formed with the respective film thicknesses.

【0027】

By the way, the material of the organic Low-k film layer is not limited to a specific material, and other than SiLK, for example, for example, polyfluorinated naphthalene polymer, maleimide benzocyclobutene polymer, polyperfluorocyclobutene aromatic ether, etc. Polyimide, polyallyl ether, parylene, hydrogenated diamond, polytetrafluoroethylene and the like can be preferably used. Further, as the material of the organic Low-k film layer 203, a divinylsiloxane benzocyclobutene polymer in which silica is partially substituted in the organic polymer, a silica-added polyimide, or the like can be preferably used. The low-k film refers to a film made of a material having a relative permittivity smaller than that of silicon dioxide having a relative permittivity of 4. Further, the material of the first hard mask layer is not limited to a specific material, and in addition to silicon oxide, for example, insulating materials such as silicon nitride film, porous silica, silicon carbide, and silicon oxynitride, and nitriding. Metal nitrides such as titanium and tantalum nitride, titanium carbide and the like can be preferably used. The material of the second hard mask layer is not limited to a specific material, and other than silicon nitride, for example, silicon oxide, silicon carbide, porous silicon nitride, silicon oxynitride, aluminum nitride, silica. Insulating materials, metal nitrides such as titanium nitride and tantalum nitride, titanium carbide and the like can be preferably used. However, when a conductive nitride film such as a titanium nitride film or a tantalum nitride film is used, it is necessary to remove the conductive nitride film by CMP or dry etching after embedding copper in the trench and the via hole.

【0028】

Therefore, SiO of the wafer shown in (a) of FIG. 2₂A PR layer (thickness: for example, 450 nm) 207 for forming a trench is formed on the film layer 201, and a pattern 208 for forming a trench is formed by a predetermined lithography process as shown in FIG. 2 (b). Then, an etching gas showing high selectivity for the SiN film layer 202 (for example, C).₅F₈/ O₂Using a mixed gas of / Ar), SiO according to pattern 208 for trench formation₂When the film layer 201 is etched, the SiN film layer 202 is exposed and a trench pattern is formed. Continue to use etching gas, for example, O₂After switching to gas and ashing the PR layer 207, SiO as shown in (c) of the figure.₂An antireflection film layer (BARC (BOTTOM ANTI REFLECTION COATING) layer) (film thickness: for example, 60 nm) 209 is formed on the film layer 201. The material of this BARC layer 209 is not limited to a specific material, for example, AR2-600, AR3-200 (manufactured by Shipley Far East Co., Ltd.) or SEK-ex4 (manufactured by Tokyo Ohka Kogyo Co., Ltd.). And other organic materials can be preferably used.

【0029】

Next, after forming the PR layer 210 on the BARC layer 209, a pattern 211 for forming a via hole is formed by a predetermined lithography process as shown in FIG. 3A. Then, the etching gas shows a high selectivity with respect to the PR layer 210 (for example, CF).₄/ Ar / O₂SiN film layer 202 is etched according to the pattern 211 for forming via holes, and the SiLK film layer 203 is further etched to a predetermined depth (for example, at least a depth corresponding to the shoulder portion of the dual damascene structure) by overetching. Etch up to).

【0030】

After that, the PR layer 210 and the BARC layer 209 are removed by an etching step using the etching method of the present invention. In this process, SiO₂A gas showing a high selectivity with respect to the membrane layer 201 and the SiN membrane layer 202, that is, a gas containing N and H (for example, NH).₃), CF gas (for example, CH₃F, CH₂F₂, CHF₃, C₄F₆, C₄F₈, C₅F₈Etc.) and O₂First mixed gas mixed with, or N₂Gas, H₂Gas and CF gas (eg CH₃F, CH₂F₂, CHF₃, C₄F₆, C₄F₈, C₅F₈Etc.) was used as the etching gas to ash the PR layer 210 and the BARC layer 209 as shown in FIG. 3 (c), and the via hole 212 formed in the SiLK film layer 203 was further added. Dig into it. By using the first mixed gas or the second mixed gas, the PR layer 210 and the BARC layer 209 can be reliably removed without generating a resist residue in the trench portion of the SiN film layer 202 as in the conventional case. At the same time, the SiLK film layer 203 can be etched in a desired shape.

【0031】

NH as the first mixed gas₃/ CH₃F / O₂When using, in the mixed gas, O₂/ NH₃The flow rate ratio of is preferably greater than 10/1500 and less than 300/1500. Also, CH₃F / NH₃The flow rate ratio of is more preferably in the range of 1/1500 to 10/1500. O₂/ NH₃If the flow rate ratio is 10/1500 or less, etching residue may be generated, and if it exceeds 300/1500, Boeing may be formed. Also, as a second mixed gas, N₂/ H₂/ CH₃When F is used, CH in the mixed gas₃F / (N₂+ H₂) Is preferably in the range of 1/1800 to 10/1800.

【0032】

After removing the PR layer 210 and the BARC layer 209, the etching gas is changed to SiO.₂A mixed gas showing a high selectivity for membrane layer 201 (eg CH₂F₂/ Ar / O₂Or CF₄/ CH₂F₂/ Ar / O₂) And SiO₂Using the film layer 201 as a hard mask, the SiN film layer 202 is etched to form the trench pattern 213, and the via hole 212 of the SiLK film layer 203 is dug down, and SiO is shown in FIG. 4 (a).₂A hard mask for forming a trench composed of the film layer 201 and the SiN film layer 202 is formed. Continue to SiO₂Etching gas showing high selectivity for film layer 201 and SiN film layer 202 (eg, N₂/ H₂), And as shown in (b) of the figure, SiO₂Using the film layer 201 and the SiN film layer 202 as a hard mask, the SiLK film layer 203 is etched to further dig down the trench 213 and the via hole 212 until it reaches the lower SiN film layer 204.

【0033】

Subsequently, as shown in (c) of FIG. 4, a mixed gas showing a high selectivity with respect to the hard mask, SiLK film layer 203 and Cu layer 205 (for example, CH).₂F₂/ Ar / O₂) Is used to etch the SiN film layer 204 on the Cu layer 205 to penetrate the via hole 212. At this time, the trench 213 of the SiLK film layer 203 also becomes deeper.

【0034】

FIG. 5 summarizes the above etching processing steps. The numbers in FIG. 5 indicate the order of the etching steps. In this series of etching steps, via holes 212 and trench 213 having a dual damascene structure having a desired shape can be formed in the SiLK film layer 203. The wiring process is completed by embedding a wiring material such as copper in these via holes 212 and trench 213.

【0035】

As described above, according to the present embodiment, the hard mask layer (SiO) formed under the organic film layer (PR layer 210, BARC layer 209) for forming the via hole.₂In the step of forming a dual damascene structure based on the film layer 201 and the SiN film layer 202) and the SiLK film layer 203 formed under the hard mask layer, the organic film layer composed of the PR layer 210 and the BARC layer 209 and the organic film layer As the etching gas of the SiLK film layer 203, a gas containing N and H (for example, NH)₃), CF gas (for example, CH₃F, CH₂F₂, CHF₃, C₄F₆, C₄F₈, C₅F₈Etc.) and O₂First mixed gas mixed with, or N₂Gas, H₂Gas and CF gas (eg CH₃F, CH₂F₂, CHF₃, C₄F₆, C₄F₈, C₅F₈Etc.) was used, so that the PR layer 210 and BARC layer 209 were reliably removed without generating a resist residue in the trench portion of the SiN film layer 202, and at the same time, the SiLK film layer 203 was used. The via hole 212 having a desired shape can be etched. Therefore, in the subsequent etching of the trench portion of the SiN film layer 202, it is possible to suppress the shape defect of the SiN film layer 202 etching due to the resist residue and the residue during the subsequent etching of the SiLK film layer 203.

【0036】

Further, since the organic film layer includes the PR layer 210 and the BARC layer 209 formed on the lower surface of the PR layer 210, the pattern 211 for forming a via hole can be formed with high accuracy in the photolithography process. Can be done. Moreover, since the hard mask layer contains the SiN film layer 202, SiO₂The SiN film layer 202 can be etched with an etching gas having a high selectivity with respect to the film layer 201 to form the trench 213 with high accuracy. NH as the first mixed gas₃/ CH₃F / O₂Using, O₂/ NH₃Is set to be greater than 10/1500 and less than 300/1500 so that the PR layer 210 and the BARC layer 209 can be removed more reliably.

【0037】

Next, examples of the steps shown in FIGS. 3 (b) and 3 (c) will be concretely shown. Example 1 In this embodiment, a plasma processing device compatible with a 300 mm wafer is used, and a first mixed gas (NH) is used as the etching gas.₃/ CH₃F / O₂) Was set to the following process conditions, and the process was performed for 26 seconds to ash the PR layer 210 and etch the SiLK film layer 203 to form a part of the via hole 212. As a result, no resist residue was observed on the SiN film layer 202 in the trench portion. The etching rates of the SiLK film layer and the PR layer are 6830 angstroms / minute and 8605 angstroms / minute, respectively, and the in-plane uniformity of etching of the PR layer 210 is ± 5.2%, the etching rate is high, and the PR layer. It was found that the etching of 210 was excellent in in-plane uniformity.

[Process conditions] 1. Chamber pressure: 400m Torr 2. First high frequency power supply: 2MHz, 3000W 3. Second high frequency power supply: 60MHz, 3000W 4. Gap between upper and lower electrodes: 50mm 5. B / T / W temperature: 0 ° C / 60 ° C / 60 ° C However, B is the temperature of the lower electrode, T is the temperature of the upper electrode, and W is the temperature of the chamber wall surface. 6. Backside gas pressure (central / peripheral): 10/35 Torr 7. Etching gas: NH₃/ CH₃F / O₂= 1500/3/20 sccm [0038]

Example 2 In this embodiment, a plasma processing device compatible with a 300 mm wafer is used, and a second mixed gas (N) is used as the etching gas.₂/ H₂/ CH₃Using F), set the flow rate to N₂/ H₂/ CH₃The PR layer 210 and the SiLK film layer 203 were etched for 42 seconds under the same process conditions as in Example 1 except that F = 1500/300 / 3sccm was set and the pressure in the chamber was set to 300 to 400 mTorr. As a result, no resist residue was observed on the SiN film layer 202 in the trench portion. The etching rates of the SiLK film layer and the PR layer were 3171 angstroms / minute and 3265 angstroms / minute, respectively, and the in-plane uniformity of etching of the PR layer 210 was ± 27.2%.

【0039】

Comparative example 1 In this comparative example, the etching gas is O than in the case of Example 1.₂Using the first mixed gas with a reduced flow rate of, the flow rate of each gas is NH₃/ CH₃F / O₂The PR layer 210 and the SiLK film layer 203 were etched for 23 seconds under the same process conditions as in Example 1 except that the value was set to = 1500/3/10 sccm. As a result, a resist residue was observed on the SiN film layer 202 in the trench portion. The etching rates of the SiLK film layer 203 and the PR layer 310 were 6887 angstroms / minute and 8331 angstroms / minute, respectively, and the etching in-plane uniformity of the PR layer 210 was ± 6.6%.

【0040】

Comparative example 2 In this comparative example, O of the mixed gas of Example 1 is used as the etching gas.₂NH excluding₃And CH₃Using a mixed gas of F, set the flow rate of each gas to NH₃/ CH₃The PR layer 210 and the SiLK film layer 203 were etched for 27 seconds under the same process conditions as in Example 1 except that F = 1500 / 3sccm was set. As a result, a resist residue was observed in the trench. The etching rates of the SiLK film layer 203 and the PR layer 210 were 6975 angstroms / minute and 8111 angstroms / minute, respectively, and the in-plane uniformity of etching of the PR layer was ± 12.6%.

【0041】

Comparative example 3 In this comparative example, a plasma processing device compatible with a 200 mm wafer is used, and a conventional mixed gas (N) is used as the etching gas.₂, H₂The PR layer 210 and the SiLK film layer 203 were etched for 45 seconds using the mixed gas) under the following process conditions. As a result, a resist residue was observed on the SiN film layer 202 in the trench portion. Further, it was found that the etching rates of the SiLK film layer and the PR layer were 2200 angstroms / minute and 3700 angstroms / minute, respectively, and the etching rates were extremely low as compared with Example 1. The in-plane uniformity of etching of the PR layer 210 was 10%.

[Process conditions] 1. Chamber pressure: 100m Torr 2. First high frequency power supply: 2MHz, 800W 3. Second high frequency power supply: 60MHz, 1500W 4. Dimension between lower electrode and upper electrode: 45mm 5. B / T / W temperature: 0 ° C / 30 ° C / 50 ° C 6. Backside gas pressure (central / peripheral): 10/35 Torr 7. Etching gas: N₂/ H₂= 300 / 300sccm [0042]

The present invention is not limited to the above embodiment. In this embodiment, the case where the present invention is applied to the step of forming the via hole 212 has been described, but the organic film layer for forming the wiring pattern formed on the hard mask layer and the organic Low-k film layer are simultaneously etched. The present invention can be applied as long as it is a step of completely removing the organic film layer for forming wiring, and the present invention can also be applied when forming a trench structure. Further, for example, the material of each film layer having a dual damascene structure can be appropriately changed as needed. The antireflection film layer may be formed on the PR layer.

【0043】

[Effect of the invention]

According to the inventions of claims 1 to 13 of the present invention, when the organic film layer such as the resist film layer and the organic interlayer insulating film layer is etched in the wiring forming step, no resist residue is left and the organic interlayer is formed. It is possible to provide an etching method capable of etching the insulating film layer into a desired shape.

[Simple explanation of drawings]

[Figure 1]

It is sectional drawing which shows an example of the plasma processing apparatus used in the etching method of this invention.

[Figure 2]

It is a process diagram which shows the process of forming a hard mask for a trench using the plasma processing apparatus shown in FIG.

[Fig. 3]

It is a process diagram which shows the process of forming a hard mask for a via hole using the plasma processing apparatus shown in FIG.

[Fig. 4]

It is a process diagram which shows the process of forming a via hole and a trench by using the plasma processing apparatus shown in FIG.

[Fig. 5]

It is a process diagram which shows the process shown in FIGS. 2 to 4 collectively.

[Fig. 6]

It is a process drawing which shows the process of forming a hard mask for a via hole by a conventional etching method.

[Explanation of symbols]

201 SiO₂Membrane layer (hard mask layer) 202 SiN film layer (hard mask layer) 203 SiLK film layer (organic Low-k film layer, organic film layer) 209 BARC layer (organic film layer) 210 PR layer (organic film layer) 212 beer hall