Thin film capacitor element and its manufacturing method
Abstract
(57) A summary and subject While being able to prevent the short circuit of an electrode certainly, offer a thin film capacitor element with little restriction of the substrate which can realize high Q value-ization and can be used. Solution means By exfoliating the resist pattern 10 and removing the unnecessary charge 9 of a base sheet, after forming the resist pattern 10 on the charge 9 of a base sheet formed as a film on the surface of the substrate 1 and carrying out electrolysis plating of the conductive material 11 on the surface of this charge 9 of a base sheet, The lamination object of the request-shaped foundation layer 8 and the conductive material 11 is formed on the substrate 1. Subsequently, after forming the insulating material 12 as a film on the substrate 1 so that this lamination object may be covered, the upper surface forms the 1st and 2nd electrode parts 2 and 3 and insulator layers 4 that were made flat on the substrate 1 by grinding the conductive material 11 and the insulating material 12. The 1st top electrode 6 that carries out pattern formation of the dielectric layer 5 to the 1st electrode part 2 after an appropriate time on the upper surface of the insulator layer 4, and is finally connected to the upper surface of the 1st electrode part 2, By forming the 2nd top electrode 7 connected to the upper surface of the 2nd electrode part 3 through the surface of the dielectric layer 5, the thin film capacitor element which the 1st electrode part 2 and the 2nd top electrode 7 counter through the dielectric layer 5 is obtained.

Term
Term ended
Projected expiry passed 2 July 2021, 5.2 years ago.
- Priority and filed
- Published
- Projected expiry
- Today
5 claims: 2 independent, 3 dependent
- 1[Claims] 1. The first and second lower electrodes separated by an insulator layer are formed on a substrate, and the upper surfaces of the insulator layer and the first and second lower electrodes are formed as flat surfaces. The end of the dielectric layer formed on the first lower electrode is extended to at least the insulator layer, and the upper electrode formed on the dielectric layer is laminated on the upper surface of the second lower electrode. Thin film capacitor element. 【特許請求の範囲】 【請求項1】 基板上に絶縁体層によって分離された第1および第2の下部電極を形成すると共に、これら絶縁体層と第1および第2の下部電極の上面を平坦面となし、前記第1の下部電極上に形成した誘電体層の端部を少なくとも前記絶縁体層まで延出し、この誘電体層上に形成した上部電極を前記第2の下部電極の上面に積層したことを特徴とする薄膜キャパシタ素子。
- 3A lower electrode forming step of plating and forming a pair of lower electrodes separated by a gap on a substrate, an insulator layer forming step of forming an insulator layer inside the gap, and both lower electrodes. A flattening treatment step of making the upper surface of the insulator layer flush with the same plane, a dielectric layer forming step of forming a dielectric layer from the upper surface of the one lower electrode to at least the upper surface of the insulator layer, and the dielectric layer. A method for manufacturing a thin film capacitor element, which comprises an upper electrode forming step of plating and forming the upper electrode from the upper surface of the layer to the upper surface of the other lower electrode. 【請求項3】 基板上にギャップによって分離された一対の下部電極をめっき形成する下部電極形成工程と、前記ギャップの内部に絶縁体層を成膜する絶縁体層形成工程と、前記両下部電極および前記絶縁体層の上面を同一平面にする平坦化処理工程と、前記一方の下部電極の上面から少なくとも前記絶縁体層の上面にかけて誘電体層を形成する誘電体層形成工程と、前記誘電体層の上面から前記他方の下部電極の上面にかけて上部電極をめっき形成する上部電極形成工程とを具備することを特徴とする薄膜キャパシタ素子の製造方法。
Independent claims2
83 paragraphs in 1 section, as filed
Description: TECHNICAL FIELD [Detailed description of the invention]
【0001】
[Technical field to which the invention belongs]
The present invention relates to a thin film capacitor element used in various small electronic circuits and a method for manufacturing the same.
【0002】
[Conventional technology]
FIG. 5 is a cross-sectional view of a conventionally known thin film capacitor element, which has a laminated structure of a lower electrode 101, a dielectric layer 102, and an upper electrode 103 sequentially formed on a substrate 100. ..
【0003】
The substrate 100 is a glazed alumina substrate in which the entire surface of the alumina 100a is coated with a glass film 100b, and the surface thereof is smoothed by the glass film 100b. The lower electrode 101 is formed by etching Cu or the like formed on the substrate 100 by a sputtering method or a plating method into a desired pattern shape, and a taper is formed at the end of the lower electrode 101. The dielectric layer 102 is a SiO formed on the substrate 100 and the lower electrode 101 by a sputtering method or a CVD method.<sub>2</sub>The dielectric layer 102 after patterning extends through the surface of the lower electrode 101 and the tapered surface at the end to the substrate 100. The upper electrode 103 is formed by etching Cu or the like formed on the substrate 100 and the dielectric layer 102 by a sputtering method or a plating method into a desired pattern shape, and the upper electrode 103 after patterning is the surface of the dielectric layer 102. It extends over the substrate 100 through the tapered surface at the end.
【0004】
In the thin film capacitor element configured in this way, since the end portion of the lower electrode 101 is a tapered surface, the dielectric layer 102 is formed to have a uniform film thickness from the surface of the lower electrode 101 to the substrate 100. This makes it possible to prevent a short circuit between the lower electrode 101 and the upper electrode 103.
【0005】
[Problems to be Solved by the Invention]
In the conventional thin film capacitor element configured as described above, since the end portion of the lower electrode 101 is a tapered surface, the dielectric layer 102 is formed to have a uniform film thickness from the surface of the lower electrode 101 to the substrate 100. This makes it possible to prevent a short circuit between the lower electrode 101 and the upper electrode 103. However, in order to make the film thickness of the dielectric layer 102 uniform, it is necessary to make the taper angle of the lower electrode 101 as gentle as possible, and there is a problem that such a taper treatment involves difficulty in the manufacturing process. Further, in order to form such a gentle taper of the inclination angle, the film thickness of the lower electrode 101 must be set thin, and as a result, there is a problem that the Q value of the capacitor is lowered. Further, since the film thickness of the lower electrode 101 must be reduced, it is necessary to use a glazed alumina substrate having a smoothed surface as the substrate 100, and there is also a restriction that an inexpensive alumina substrate cannot be used.
【0006】
The present invention has been made in view of the actual conditions of the prior art, and an object of the present invention is that short circuits of electrodes can be reliably prevented, a high Q value can be realized, and there are few restrictions on usable substrates. The purpose is to provide a thin film capacitor element.
【0007】
[Means for solving problems]
In order to achieve the above object, in the thin film capacitor element according to the present invention, the first and second lower electrodes separated by the insulator layer are formed on the substrate, and the insulator layer and the first and second lower electrodes are formed. The upper surface of the lower electrode is a flat surface, the end of the dielectric layer formed on the first lower electrode is extended to at least the insulator layer, and the upper electrode formed on the dielectric layer is the second. It is characterized by being laminated on the upper surface of the lower electrode of.
【0008】
In the thin film capacitor element configured in this way, the insulator layer and the upper surfaces of the first and second lower electrodes are flattened on the same plane, and the dielectric layer and the upper electrode are flattened on this flat surface. Since the layers are sequentially laminated, the lower electrodes can be thickened, short circuits between the electrodes can be reliably prevented, and an inexpensive alumina substrate can be used.
【0009】
In the above configuration, the capacitance value of the thin film capacitor element is determined by the overlapping range of the first lower electrode and the upper electrode facing each other via the dielectric layer, but the first lower electrode is also upper than the upper electrode. It is preferable to connect the electrodes.
【0010】
Further, in order to achieve the above object, in the method for manufacturing a thin film capacitor element according to the present invention, a lower electrode forming step of plating and forming a pair of lower electrodes separated by a gap on a substrate and an insulator inside the gap. An insulator layer forming step of forming a layer, a flattening treatment step of making both lower electrodes and the upper surface of the insulator layer flush with each other, and from the upper surface of one of the lower electrodes to at least the upper surface of the insulator layer. It is characterized by comprising a dielectric layer forming step of forming a dielectric layer and an upper electrode forming step of plating and forming an upper electrode from the upper surface of the dielectric layer to the upper surface of the other lower electrode.
【0011】
According to such a configuration, by forming a thick-film lower electrode by plating, it is possible to realize a low resistance and a high Q value of the electrode, and moreover, a pair of lower electrodes and an insulator layer. The upper surface of the is flattened to the same plane, the dielectric layer and the upper electrode are sequentially laminated on the flat surface, and the lower electrode connected to the upper electrode and the lower electrode located directly under the dielectric layer are insulated. Since it is insulated via the body layer, short-circuiting between the electrodes can be reliably prevented.
【0012】
In the above configuration, as an upper electrode forming step, it is preferable that another upper electrode is simultaneously plated and formed on the lower electrode directly below the dielectric layer in addition to the upper electrode laminated on the dielectric layer.
【0013】
Further, in the above configuration, as a lower electrode forming step, after forming a base layer on the substrate, a resist pattern is formed on the surface of the base layer and a metal material is plated, and then the resist pattern is peeled off. It is preferable to adopt the step of removing the exposed base layer because the lower electrode and the insulator layer having a desired shape can be easily formed.
【0014】
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view of the thin film capacitor element according to the embodiment of the present invention, and FIGS. 2 and 3 show a manufacturing process of the thin film capacitor element. It is a figure.
【0015】
As shown in FIG. 1, the thin film capacitor element according to the present embodiment includes a first electrode portion 2, a second electrode portion 3, an insulator layer 4, and a flat upper surface thereof formed on the substrate 1. It is composed of a dielectric layer 5 formed in the above, a first upper electrode 6 and a second upper electrode 7, and the first and second electrode portions 2 and 3 are on the substrate 1 via the base layer 8. Is formed in. The first electrode portion 2 and the second electrode portion 3 are separated by an insulator layer 4, and the first upper electrode portion 6 extends from the first electrode portion 2 to the upper surface of the insulator layer 4 to the left of the first electrode portion 2. It is formed. The dielectric layer 5 is formed from the first electrode portion 2 to the upper surface of the insulator layer 4 to the right of the first electrode portion 2, and the second upper electrode 7 is formed from the dielectric layer 5 to the upper surface of the second electrode portion 3. Has been done. The first electrode portion 2 and the first upper electrode 6 function as the lower electrode of the thin film capacitor element, and the second electrode portion 3 and the second upper electrode 7 function as the upper electrode of the thin film capacitor element. The capacitance value of this thin film capacitor element is defined by the overlapping portion of the first electrode portion 2 and the second upper electrode 7 facing each other via the dielectric layer 5.
【0016】
A glazed alumina substrate or an alumina substrate without glaze is used for the substrate 1, and since an alumina substrate having a purity of 99.5% is used in this embodiment, the surface roughness (Ra) of the surface of the substrate 1 is 30 to 100 nm. It has a rough surface. Cr / Cu, Ti / Cu, Cr / Au, Ti / Au, etc. are used as the base layer 8, and these materials are formed on the surface of the substrate 1 by a sputtering method, a vapor deposition method, an ion beam sputtering, or the like. Formed by In this case, the thickness of Cr and Ti in the lower layer, which is the adhesion layer to the substrate 1, is preferably about 5 to 50 nm, and the thickness of Cu and Au in the upper layer is preferably about 50 to 200 nm.
【0017】
Conductor materials such as Cu, Au, Cu / Ni, and Cu / Ni-P are used for the first and second electrode portions 2 and 3, and these conductor materials are electroplated on the surface of the base layer 8. It is formed. The base layer 8 and the first and second electrode portions 2 and 3 are formed in the same shape. In this case, after forming a resist pattern of a desired shape on the surface of the base layer 8 formed on the substrate 1, after forming a resist pattern of a desired shape. If the above-mentioned conductor material is electroplated on the surface of the base layer 8 and then the resist is peeled off, the first and second electrode portions 2 and 3 having desired shapes are formed. Then, after the resist is peeled off, if the base layer 8 covered with the resist pattern is removed by the ion milling method, the base layer 8 having the same shape as the first and second electrode portions 2 and 3 is formed. .. Al on the insulator layer 4<sub>2</sub>O<sub>3</sub>Insulation material such as, etc. is used, and after forming a film on the substrate 1 so as to cover the first and second electrode portions 2 and 3 by a sputtering method or a CVD method, the first and second electrode portions are used. It is formed by flattening a few and the surface of the insulating material using the CMP (Chemical Mechanical Polish) method.
【0018】
SiO on the dielectric layer 5<sub>2</sub>, Ta<sub>2</sub>O<sub>5</sub>, AlSiO<sub>2</sub>Insulating materials such as the above are used, and these insulating materials are formed by forming a film by a sputtering method or a CVD method and then patterning the insulating material into a desired shape. More specifically, first, SiO is formed on the surfaces of the first and second electrode portions 2 and 3 and the insulator layer 4.<sub>2</sub>, Ta<sub>2</sub>O<sub>5</sub>, AlSiO<sub></sub><sub>2</sub>After forming an insulating material such as the above, a resist is applied onto the insulating material, and the resist is exposed / developed to form a resist pattern having a desired shape. After that, using this resist pattern as a mask, CF in the RIE method<sub>4</sub>Gas or C<sub>3</sub>F<sub>8</sub>Or O to them<sub>2</sub>The insulating material is etched with the gas to which the above is added, the insulating material is etched by the ion milling method using Ar gas other than the RIE method, and then the resist pattern is peeled off to form the dielectric layer 5 having a desired shape. Will be done.
【0019】
The first and second upper electrodes 6 and 7 are formed by the same method as the first and second electrode portions 2 and 3. That is, a base layer is formed on the surfaces of the first and second electrode portions 2 and 3 including the dielectric layer 5 and the insulator layer 4, and the surface of the base layer has a shape corresponding to both upper electrodes 6 and 7. After forming the resist pattern, conductor materials such as Cu, Au, Cu / Ni, and Cu / Ni-P are electroplated on the surface of the base layer, and then the resist is peeled off to use the ion milling method for the unnecessary base layer. When removed, the first and second upper electrodes 6 and 7 having a desired shape are formed.
【0020】
Next, the manufacturing process of the thin film capacitor element configured in this way will be described mainly with reference to FIGS. 2 and 3.
【0021】
First, as a lower electrode forming step, as shown in FIG. 2A, a base material such as Cr / Cu, Ti / Cu, Cr / Au, Ti / Au or the like is formed on the surface of the substrate (alumina substrate or glazed alumina substrate) 1. After forming 9 by a sputtering method, a vapor deposition method, ion beam sputtering, or the like, as shown in FIG. 2 (b), the photoresist applied on the base material 9 is exposed and developed into a desired pattern shape to form a resist. Form pattern 10. Next, as shown in FIG. 2C, a conductor material 11 such as Cu, Au, Cu / Ni, or Cu / Ni-P is electroplated on the surface of the base material 9 on which the resist pattern 10 is formed. The conductor material 11 forms the first and second electrode portions 2 and 3, and the film thickness thereof is determined by the circuit design, but the film thickness is preferably about 1.5 to 5.0 μm. Next, as shown in FIG. 2 (d), after the resist pattern 10 is peeled off, Ar ions are incident at an angle of 0 to 30 degrees by the ion milling method as shown in FIG. 2 (e), and the resist is resisted. When the base material 9 exposed by the peeling of the pattern 10 is removed, the base layer 8 having the same shape as the first and second electrode portions 2 and 3 is formed.
【0022】
Next, as an insulator layer forming step, as shown in FIG. 3 (a), Al<sub>2</sub>O<sub>3</sub>Insulation material 12 such as, etc. is formed on the substrate 1 by a sputtering method or a CVD method, and after the conductor material 11 is completely covered by this insulation material 12, the conductor material 11 and the insulation material 12 are CMP as a flattening treatment step. Polish to the position of the broken line in the figure by the method. As a result, the upper surfaces of the conductor material 11 and the insulating material 12 were flattened in the same plane, and as shown in FIG. 3 (b), the first and second electrode portions 2, whose upper surfaces were flattened on the substrate 1, 3 and the insulator layer 4 are formed.
【0023】
Next, as a dielectric layer forming step, SiO is placed on the surfaces of the flattened first and second electrode portions 2 and 3 and the insulator layer 4.<sub>2</sub>, Ta<sub>2</sub>O<sub>5</sub>, AlSiO<sub>2</sub>As shown in FIG. 3 (c), the first electrode portion 2 and the insulator layer 4 are formed by forming an insulating material such as the above into a film by a sputtering method or the like and then patterning the insulating material into a desired shape using a photolithography technique. A dielectric layer 5 is formed on the upper surface of the surface. The dielectric layer 5 needs to be formed from at least the upper surface of the first electrode portion 2 to the upper surface of the insulator layer 4, but extends beyond the insulator layer 4 to the upper surface of the second electrode portion 3. Is also good.
【0024】
Next, as an upper electrode forming step, as shown in FIG. 3D, a first upper electrode 6 connected to the upper surface of the first electrode portion 2 and a second upper electrode 6 are passed through the surface of the dielectric layer 5. A second upper electrode 7 connected to the upper surface of the electrode portion 3 is formed. Since the upper electrode forming step is the same process as the lower electrode forming step described above, detailed description thereof will be omitted here.
【0025】
As described above, in the thin film capacitor element according to the present embodiment, the first electrode portion 2 and the second electrode portion 3 of the thick film are formed by plating, and the lower electrode of the thin film capacitor element is the first electrode. Since it has a two-layer structure of part 2 and the first upper electrode 6, and the upper electrode of the thin film capacitor element also has a two-layer structure of the second electrode part 3 and the second upper electrode 7, the resistance of the electrode is lowered and the height is increased. Q value conversion can be realized. Further, the first and second electrode portions 2 and 3 and the upper surface of the insulator layer 4 are flattened on the same plane, and the dielectric layer 5 and the second upper electrode 7 are sequentially laminated on the flat surface. , The first electrode portion 2 located directly below the dielectric layer 5 and the second electrode portion 3 connected to the second upper electrode 7 are insulated via the insulator layer 4, so that the thin film capacitor element It is possible to reliably prevent a short circuit between the upper electrode and the lower electrode.
【0026】
In the above embodiment, the first upper electrode 6 is formed so as to partially overlap the lead-out portion of the first electrode portion 2, but the second electrode portion 3 and the second upper portion are formed. Similar to the connection structure of the electrode 7, the first upper electrode 6 may be formed so as to completely overlap the first electrode portion 2, and with such a configuration, the resistance of the electrode can be lowered and the Q can be increased. Value conversion can be further promoted.
【0027】
FIG. 4 is a cross-sectional view showing an example of application to an electronic circuit board, and this electronic circuit board is used as various high-frequency devices. As shown in the figure, thin film circuit elements such as a thin film capacitor element 20, a thin film resistance element 30, and a thin film inductor element 40 are formed on the substrate 1 of this electronic circuit board, and these thin film circuit elements 20, A large number of 30,40 are formed in the effective area on the substrate 1 according to the required circuit configuration. Since the thin film capacitor element 20 is configured in the same manner as in the above-described embodiment, the duplicate description will be omitted here.
【0028】
The thin film resistance element 30 includes a heat sink portion 31 formed on the substrate 1, a pair of electrode portions 32, an insulator layer 33, and an insulating film 34, a resistance film 35, and a protective film 36 sequentially laminated on these flat upper surfaces. The heat sink portion 31 and the pair of electrode portions 32 are separated by an insulator layer 33. The heat sink portion 31 and the pair of electrode portions 32 are made of the same material as the first and second electrode portions 2 and 3 of the thin film capacitor element 20, and these are formed in the same process. Further, the insulator layer 33 is made of the same material as the insulator layer 4 of the thin film capacitor element 20, and these are also formed in the same process. The insulating film 34 covers the upper surface of the heat sink portion 31 and extends to the insulating layers 33 on both sides thereof, and the insulating film 34 extends to AlSiO, AlSiN, AlSiON, AlN, Al.<sub>2</sub>O<sub>3</sub>, SiO<sub>2</sub>The insulating material is formed by forming a film by a sputtering method, a CVD method, or the like, and then patterning the insulating material into a desired shape. The resistance film 35 covers the insulating film 34 and extends to the upper surface of the pair of electrode portions 32. The resistance film 35 is formed by forming a resistance material such as TaN or TaSiO by a sputtering method or the like, and then patterning this into a desired shape. It is formed by doing. The protective film 36 covers the resistance film 35, and the protective film 36 is an organic insulating material such as polyimide or resist, or SiO.<sub>2</sub>, Al<sub>2</sub>O<sub>3</sub>It is formed by forming a film of an inorganic insulating material such as the above by a sputtering method or the like and then patterning it into a desired shape.
【0029】
The thin film inductor element 40 is composed of a conductor layer 41 and an insulator layer 42 formed on the substrate 1, an insulating layer 43 formed on the flat upper surface of the conductor layer 41 and the insulator layer 42, and the conductor layer 41. It is composed of an inner electrode 44 that leads from the upper surface of the inner end portion over the insulating layer 43 to the outside, and an outer electrode 45 that is routed from the upper surface of the outer end portion of the conductor layer 41 through the insulating layer 43. , The conductor layer 41 is formed in a spiral shape in a plan view. The conductor layer 41 is made of the same material as the two electrode portions 2 and 3 of the thin film capacitor element 20, the heat sink portion 31 of the thin film resistance element 30, and both electrode portions 32, and these are formed in the same process. The insulator layer 42 is made of the same material as the insulator layer 4 of the thin film capacitor element 20 and the insulator layer 33 of the thin film resistance element 30, and these are also formed in the same process. The insulating layer 43 is AlSiO.<sub>2</sub>, SiO<sub>2</sub>, Ta<sub>2</sub>O<sub>5</sub>Inorganic insulating material such as, etc. is formed on the conductor layer 41 and the insulating layer 42 by a sputtering method or the like, and then patterned into a desired shape, or an organic insulating material such as a resist is formed by photolithography technology. The insulating layer 43, which has been cured at a high temperature, has a shape that exposes the upper surface of the inner end portion and the upper surface of the outer end portion of the conductor layer 41 after patterning. The inner electrode 44 and the outer electrode 45 are made of conductor materials such as Cu, Cu / Ni, Cu / Ni-P, Cu / Ni / Au, Cu / Ni-P / Au, and Au. It is formed by electrolytic plating on the surface of the insulating layer 43 in the same process as above.
【0030】
In the electronic circuit board configured as described above, the first and second electrode portions 2 and 3 of the thin film capacitor element 20, the heat insulating portion 31 of the thin film resistance element 30, the both electrode portions 32, and the insulator layer 33 are included. The conductor layer 41 and the insulator layer 42 of the thin film inductor element 40 are formed by the lower electrode forming step shown in FIGS. 2 (a) to 2 (e) and the insulator layer forming step shown in FIG. 3 (a). Since it can be formed by the same process by the flattening processing step shown in 3 (b), the manufacturing process of the electronic circuit board can be simplified. Further, since the resistance film 35 of the thin film resistance element 30 is formed on the flat surface of the heat sink portion 31, both electrode portions 32, and the insulator layer 33 via the insulating film 34, the heat sink portion 31 of the thick film is formed by plating. By forming both electrode portions 32, it is possible to reduce the resistance of the electrodes, reduce the variation in resistance value due to the unevenness of the resistance film forming surface, and generate heat from the resistance film 35. Efficient heat dissipation can be achieved by the heat sink portion 31 directly below. Further, since the insulating layer 43 and the inner electrode 44 of the thin film inductor element 40 are laminated and formed on the upper surface of the flattened conductor layer 41 and the insulator layer 42, the thick conductor layer 41 is formed by plating. By forming the Q value, a high Q value can be realized, and the manufacturing process of the insulating layer 43, the inner electrode 44, and the outer electrode 45 can be simplified.
【0031】
[Effect of the invention]
The present invention is carried out in the manner described above, and has the effects described below.
【0032】
By forming a thick film lower electrode on the substrate by plating, it is possible to realize low resistance and high Q value of the electrode, and moreover, the pair of lower electrodes and the upper surface of the insulator layer are flush with each other. Since the dielectric layer and the upper electrodes are sequentially laminated on these flat surfaces, not only can short circuits between the electrodes be reliably prevented, but also an inexpensive alumina substrate can be used. Become.
[Simple explanation of drawings]
[Figure 1]
It is sectional drawing of the thin film capacitor element which concerns on embodiment of this invention.
[Figure 2]
It is explanatory drawing which shows the manufacturing process of the thin film capacitor element.
[Fig. 3]
It is explanatory drawing which shows the manufacturing process of the thin film capacitor element.
[Fig. 4]
It is sectional drawing of the electronic circuit board to which this invention was applied.
[Fig. 5]
It is sectional drawing of the thin film capacitor element which concerns on a prior art example.
[Explanation of symbols]
1 board 2 First electrode part 3 Second electrode part 3 4 Insulator layer 5 Dielectric layer 6 First upper electrode 7 Second upper electrode 8 Underlayer 9 Base material 10 resist pattern 11 Conductor material 12 Insulation material 20 Thin film capacitor element 30 Thin film resistor element 40 Thin film inductor element
2 sheets
Sheet 1 Sheet 2
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US7608881B2 | Cited by | United States of America | Applicant |
| JP2007165581A | Cited by | Japan | Examiner |
| US7875956B2 | Cited by | United States of America | Applicant |
| US7875956B2 | Cited by | United States of America | Search report |
| US7667951B2 | Cited by | United States of America | Applicant |
| CN113851326A | Cited by | China | Search report |
| US7473981B2 | Cited by | United States of America | Applicant |
| TWI427653B | Cited by | Taiwan Province of China | Examiner |
| US7973246B2 | Cited by | United States of America | Applicant |
| US8569142B2 | Cited by | United States of America | Applicant |
| JP2007010553A | Cited by | Japan | Examiner |
| US7859080B2 | Cited by | United States of America | Applicant |
| US7652349B2 | Cited by | United States of America | Applicant |
| JP2007024578A | Cited by | Japan | Examiner |
2 priority claims, no other members on record
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 2001201036 | Japan | A | |
| JP20010201036 | – | – | – |
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|---|---|---|
| Cancellation because of no payment of annual feesLAPS | LAPS | |
| Certificate of patent or registration of utility modelR150 | R150 | |
| First payment of annual fees (during grant procedure)A61 | A61 | |
| Written decision to grant a patent or to grant a registration (utility model)A01 | A01 | |
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| Written request for application examinationA621 | A621 |
Numbers
- Publication
- 2003-17366
- Publication, DOCDB
- 2003017366
- Publication, EPODOC
- JP2003017366
- Application
- 201036
- Application, DOCDB
- 2001201036
- Application, EPODOC
- JP20010201036
Titles2
- Japanese
- 【発明の名称】薄膜キャパシタ素子およびその製造方法
- English
- [Title of Invention] Thin film capacitor element and method for manufacturing the same
Classification
- IPC, 1
- H01G4 33