Data transmission method, data transmission system, transmitter and receiver
Abstract
[Task] It realizes high-quality variable rate data transmission based on accurate rate detection while reducing overhead based on the concept of blind rate detection that does not transmit rate information.
Solution.On the transmitting side, in each frame, if there is transmission data, frame data including the transmission data and the calculated error detection code is generated, and if there is no transmission data, the transmission data and the frame data not including the error detection code are generated. Generate and send. On the receiving side, in each frame, the final bit position of the frame data is assumed at one or more points, the transmission data and the error detection code are assumed, respectively, and the error detection code of the assumed transmission data is calculated. If there is a position where the assumed error detection code and the error detection code calculated based on the assumed transmission data match, that position is determined as the final bit position, and if there is no matching position, there is no transmission data or there is no transmission data. It is determined that the received frame data has an error.

Term
Term ended
Projected expiry passed 17 November 2020, 5.9 years ago.
- Priority and filed
- Published
- Projected expiry
- Today
14 claims: 7 independent, 7 dependent
- 1【特許請求の範囲】 【請求項1】 一定時間長の各フレームに可変長の送信データを収めて伝送するデータ伝送方法であって、 送信側において、 各フレームにおいて、送信データがある場合にのみ、送信データの誤り検出符号を算出するステップと、 各フレームにおいて、送信データがある場合には、送信データおよび算出した誤り検出符号を含むフレーム・データを生成し、送信データがない場合には、送信データおよび誤り検出符号を含まないフレーム・データを生成するステップと、 生成したフレーム・データを送信するステップとを備え、 受信側において、 フレーム・データを受信するステップと、 受信したフレーム・データに対し、各フレームにおいて、フレーム・データの所定の位置を最終ビット位置として、送信データおよび誤り検出符号を決定し、決定した送信データの誤り検出符号を算出するステップと、 各フレームにおいて、決定した誤り検出符号と、決定した送信データに基づき算出した誤り検出符号とが一致する場合には、送信データがあるものと判定し、一致しない場合には、送信データがない、または受信したフレーム・データに誤りがあるものと判定するステップと、 各フレームにおいて、該判定結果に基づいて送信データを取得するステップとを備えることを特徴とするデータ伝送方法。
- 2【請求項2】 一定時間長の各フレームに可変長の送信データを収めて伝送するデータ伝送方法であって、 送信側において、 各フレームにおいて、送信データがある場合にのみ、送信データの誤り検出符号を算出するステップと、 各フレームにおいて、送信データがある場合には、送信データおよび算出した誤り検出符号を含むフレーム・データを生成し、送信データがない場合には、送信データおよび誤り検出符号を含まないフレーム・データを生成するステップと、 生成したフレーム・データを送信するステップとを備え、 受信側において、 フレーム・データを受信するステップと、 受信したフレーム・データに対し、各フレームにおいて、フレーム・データの最終ビット位置を1か所以上仮定して、送信データおよび誤り検出符号をそれぞれ仮定し、仮定した送信データの誤り検出符号を算出するステップと、 各フレームにおいて、仮定したフレーム・データの最終ビット位置のうち、仮定した誤り検出符号と、仮定した送信データに基づき算出した誤り検出符号とが一致する位置がある場合には、その位置をフレーム・データの最終ビット位置と判定し、一致する位置がない場合には、送信データがない、または受信したフレーム・データに誤りがあるものと判定するステップと、 各フレームにおいて、該判定結果に基づいて送信データを取得するステップとを備えることを特徴とするデータ伝送方法。
- 3【請求項3】 請求項1または2に記載のデータ伝送方法であって、送信側において、前記フレーム・データを生成するステップは、誤り検出符号を対応する送信データの後ろに配置し、送信データと誤り検出符号とでビットの並びを逆順にしたフレーム・データを生成することを特徴とするデータ伝送方法。
- 4【請求項4】 請求項1ないし3のいずれかに記載のデータ伝送方法であって、 送信側において、 生成したフレーム・データに対して誤り訂正符号化を行うステップと、 誤り訂正符号化を行ったフレーム・データに対してインタリーブを行うステップとをさらに備え、 受信側において、 受信したフレーム・データに対してデインタリーブを行うステップと、 デインタリーブを行ったフレーム・データに対して誤り訂正復号化を行うステップとをさらに備えることを特徴とするデータ伝送方法。
- 5【請求項5】 請求項1ないし4のいずれかに記載のデータ伝送方法であって、送信側において、各フレーム毎に、送信データのビット数を表す伝送レート情報を算出するステップをさらに備え、前記フレーム・データを生成するステップは、算出した伝送レート情報を含むフレーム・データを生成することを特徴とするデータ伝送方法。
- 6【請求項6】 請求項1ないし5のいずれかに記載のデータ伝送方法であって、1フレーム内に送信データが存在する場合、その長さは1~Xビットのいずれかであり、その送信データに対する誤り検出符号の長さはYビットであり、XおよびYの組合せは、(X,Y)=(8,8),(244,12),(4080,16),(1048576,24)のいずれかであることを特徴とするデータ伝送方法。
- 7【請求項7】 一定時間長の各フレームに、1つ以上のチャネルからなる第1チャネル群の各チャネルの可変長送信データ、および1つ以上のチャネルからなる第2チャネル群の各チャネルの送信データを多重化して伝送するデータ伝送方法であって、第1チャネル群の各チャネルの可変長送信データを、請求項1ないし6のいずれかに記載のデータ伝送方法により伝送することを特徴とするデータ伝送方法。
- 8【請求項8】 請求項7に記載のデータ伝送方法であって、データ伝送について、インナループ送信電力制御とアウタループ送信電力制御とで構成される2重閉ループ送信電力制御を行い、該アウタループ送信電力制御の制御基準として、第1チャネル群のチャネルは用いず、第2チャネル群の1つ以上のチャネルを用いることを特徴とするデータ伝送方法。
- 9【請求項9】 請求項8に記載のデータ伝送方法であって、多重化される各チャネル間の誤り訂正符号化時の符号化率の相対比、および多重化される各チャネル間の送信電力の相対比は一定であることを特徴とするデータ伝送方法。
- 10【請求項10】 一定時間長の各フレームに可変長の送信データを収めて伝送するデータ伝送システムであって、 送信側装置において、 各フレームにおいて、送信データがある場合にのみ、送信データの誤り検出符号を算出する手段と、 各フレームにおいて、送信データがある場合には、送信データおよび算出した誤り検出符号を含むフレーム・データを生成し、送信データがない場合には、送信データおよび誤り検出符号を含まないフレーム・データを生成する手段と、 生成したフレーム・データを送信する手段とを備え、 受信側装置において、 フレーム・データを受信する手段と、 受信したフレーム・データに対し、各フレームにおいて、フレーム・データの所定の位置を最終ビット位置として、送信データおよび誤り検出符号を決定し、決定した送信データの誤り検出符号を算出する手段と、 各フレームにおいて、決定した誤り検出符号と、決定した送信データに基づき算出した誤り検出符号とが一致する場合には、送信データがあるものと判定し、一致しない場合には、送信データがない、または受信したフレーム・データに誤りがあるものと判定する手段と、 各フレームにおいて、該判定結果に基づいて送信データを取得する手段とを備えたことを特徴とするデータ伝送システム。
- 11【請求項11】 一定時間長の各フレームに可変長の送信データを収めて伝送するデータ伝送システムであって、 送信側装置において、 各フレームにおいて、送信データがある場合にのみ、送信データの誤り検出符号を算出する手段と、 各フレームにおいて、送信データがある場合には、送信データおよび算出した誤り検出符号を含むフレーム・データを生成し、送信データがない場合には、送信データおよび誤り検出符号を含まないフレーム・データを生成する手段と、 生成したフレーム・データを送信する手段とを備え、 受信側装置において、 フレーム・データを受信する手段と、 受信したフレーム・データに対し、各フレームにおいて、フレーム・データの最終ビット位置を1か所以上仮定して、送信データおよび誤り検出符号をそれぞれ仮定し、仮定した送信データの誤り検出符号を算出する手段と、 各フレームにおいて、仮定したフレーム・データの最終ビット位置のうち、仮定した誤り検出符号と、仮定した送信データに基づき算出した誤り検出符号とが一致する位置がある場合には、その位置をフレーム・データの最終ビット位置と判定し、一致する位置がない場合には、送信データがない、または受信したフレーム・データに誤りがあるものと判定する手段と、 各フレームにおいて、該判定結果に基づいて送信データを取得する手段とを備えたことを特徴とするデータ伝送システム。
- 12【請求項12】 一定時間長の各フレームに可変長の送信データを収めて送信する送信装置であって、 各フレームにおいて、送信データがある場合にのみ、送信データの誤り検出符号を算出する手段と、 各フレームにおいて、送信データがある場合には、送信データおよび算出した誤り検出符号を含むフレーム・データを生成し、送信データがない場合には、送信データおよび誤り検出符号を含まないフレーム・データを生成する手段と、 生成したフレーム・データを送信する手段とを備えたことを特徴とする送信装置。
- 13【請求項13】 一定時間長の各フレームにおいて、送信データがある場合には、その送信データ、およびその送信データについて算出された誤り検出符号を含み、送信データがない場合には、送信データおよび誤り検出符号を含まないフレーム・データを受信する受信装置であって、 フレーム・データを受信する手段と、 受信したフレーム・データに対し、各フレームにおいて、フレーム・データの所定の位置を最終ビット位置として、送信データおよび誤り検出符号を決定し、決定した送信データの誤り検出符号を算出する手段と、 各フレームにおいて、決定した誤り検出符号と、決定した送信データに基づき算出した誤り検出符号とが一致する場合には、送信データがあるものと判定し、一致しない場合には、送信データがない、または受信したフレーム・データに誤りがあるものと判定する手段と、 各フレームにおいて、該判定結果に基づいて送信データを取得する手段とを備えたことを特徴とする受信装置。
- 14【請求項14】 一定時間長の各フレームにおいて、送信データがある場合には、その送信データ、およびその送信データについて算出された誤り検出符号を含み、送信データがない場合には、送信データおよび誤り検出符号を含まないフレーム・データを受信する受信装置であって、 フレーム・データを受信する手段と、 受信したフレーム・データに対し、各フレームにおいて、フレーム・データの最終ビット位置を1か所以上仮定して、送信データおよび誤り検出符号をそれぞれ仮定し、仮定した送信データの誤り検出符号を算出する手段と、 各フレームにおいて、仮定したフレーム・データの最終ビット位置のうち、仮定した誤り検出符号と、仮定した送信データに基づき算出した誤り検出符号とが一致する位置がある場合には、その位置をフレーム・データの最終ビット位置と判定し、一致する位置がない場合には、送信データがない、または受信したフレーム・データに誤りがあるものと判定する手段と、 各フレームにおいて、該判定結果に基づいて送信データを取得する手段とを備えたことを特徴とする受信装置。
Independent claims14
279 paragraphs in 1 section, as filed
Description: TECHNICAL FIELD [Detailed description of the invention]
【0001】
[Technical field to which the invention belongs]
The present invention relates to a data transmission method, a data transmission system, a transmission device, and a reception device that store and transmit variable-length transmission data in each frame having a fixed time length.
【0002】
[Conventional technology]
In a data transmission method in which information such as an audio signal is converted into digital data and transmitted, the amount of information of the signal to be transmitted is not always constant in terms of time, and generally changes from moment to moment. Is.
【0003】
Therefore, if the transmission data is divided into frames with a fixed time length and data transmission with a variable number of bits is performed for each frame, the transmission rate can be changed over time, which is necessary for each frame cycle. Information can be transmitted efficiently. At this time, the transmitting device does not need to perform unnecessary transmission, and the power consumption of the device can be kept low.
【0004】
In order to perform data transmission by changing the data transmission rate, it is usually necessary for the receiving side to know information indicating what the transmission rate of each frame is by using some means on the receiving side. At this time, a method of directly transmitting the rate information as a part of the frame data and determining the rate based on this information on the receiving side and a communication quality added to the transmission data without sending the rate information are shown. A method of determining a rate on the receiving side (blind rate detection method) using an error detection code (for example, a CRC (Cyclic Redundancy Check) code) has been conventionally considered (for example, the application of the applicant). International publication number WO 96/26582).
【0005】
On the other hand, in a communication environment where many transmission errors occur, such as data transmission via a wireless transmission line, it is common to improve transmission quality by performing error correction (FEC: Forward Error Correction) of the transmission data. It is done in. As the error correction code and the error correction decoding, for example, the most probable decoding method such as the convolutional code and the Viterbi decoding is used.
【0006】
By the way, in the method of determining the rate on the receiving side by using the error detection code added to the transmission data to indicate the communication quality without sending the rate information, the determination error rate in the rate determination is the term of the error detection code. It depends on the length, and even if the transmission error is reduced, it does not fall below a certain rate judgment error rate (probability of determining that there is no transmission error at an incorrect rate).
【0007】
On the other hand, when the rate information is transmitted from the transmitting side to the receiving side, if an error occurs during transmission, the effective data length in the receiving frame cannot be determined, and even if there is no error in the data part. It becomes difficult for the receiving side to correctly reproduce the transmitted data.
【0008】
Therefore, a method of improving the rate determination error rate and more reliably changing the transmission rate for each frame during communication by using the likelihood information at the time of the most likely decoding has been conventionally considered (for example, the present application). International Publication No. WO 97/50219 for a person's application).
【0009】
In the above-mentioned WO96 / 26582 and WO97 / 50219, in order to improve the rate detection performance on the receiving side (to reduce the false detection probability of the rate), the CRC bit (this) that was conventionally added after the transmission data on the transmitting side. In that case, it is stated that the position of the CRC bit in the frame changes depending on the bit length of the transmitted data) is placed at a fixed position in the frame (for example, placed at the beginning of the frame) for transmission. ing.
【0010】
FIG. 1 is a diagram showing an example of a conventional transmission bit order.
【0011】
In the conventional method of arranging the CRC bit after the transmission data bit (conventional postfix), for example, when detecting a position one bit less than the correct rate position, the sequence of codewords on the receiving side is D1, D0, C4 to C1. Even when no transmission bit error has occurred, there is a 50% chance that the CRC judgment result will be OK (that is, false positive). After that, the judgment result by CRC is OK with a probability of 25% at the position 2 bits less and 12.5% at the position 3 bits less.
【0012】
In order to solve the problem that the probability of false detection increases as the rate position approaches the correct rate position, a method of arranging the CRC bit at the beginning of the frame has been devised in the above-mentioned WO96 / 26582 and WO97 / 50219. It was. In this method, as shown in Fig. 1 (prefix), the sequence of codewords on the receiving side is discontinuous with D1 and C4 to C1, so the above problem does not occur and the detection is close to the correct rate position. It is possible to consistently obtain a low false positive probability determined by the word length of the CRC code up to the detection position away from the position.
【0013】
However, in order to actually place the CRC bit at the beginning of the frame, that is, before the transmission data for transmission on the transmitting side, all the bits of the transmission data are temporarily set until the calculation of the error detection code for the transmission data is completed. Need to be stored in memory. The scale of such a buffer memory increases in proportion to the number of transmission data bits for one frame, and when transmitting a huge amount of transmission data, the hardware scale becomes a problem.
【0014】
[Problems to be Solved by the Invention]
In order to solve the above problem, in the international application number PCT / JP00 / 03650, an error detection code (for example, CRC bit) is placed after the transmission data, and the transmission data and the error detection code are transmitted by reversing the bit arrangement. It is stated to do.
【0015】
FIG. 2 is a diagram showing an example of a conventional transmission bit order and a transmission bit order according to the invention described in PCT / JP00 / 03650. As can be seen from the figure, according to the arrangement (new postfix) according to the invention described in PCT / JP00 / 03650, the detection position is the correct rate because the sequence of codewords on the receiving side is discontinuous with D1, D0, and C0. There is no problem that the probability of false detection increases as the position approaches, and the word length of the CRC code extends from the detection position close to the correct rate position to the detection position far from the detection position, as when placed in front of the transmitted data. It is possible to obtain a constant low false positive probability determined by.
【0016】
Further, in the arrangement according to the invention described in PCT / JP00 / 03650, since the CRC is arranged after the transmission data, a buffer for temporarily storing the transmission data while maintaining the high rate detection performance as described above. It is not necessary to provide hardware, and hardware can be realized on a small circuit scale.
【0017】
Further, in the invention described in PCT / JP00 / 03650, in consideration of the case where the number of bits of the transmission data is 0, when the number of bits of the transmission data is 0 on the transmitting side, a predetermined bit pattern is obtained. Can be used to generate frame data as an error detection code. On the receiving side, the position where the number of bits of the transmitted data becomes 0 is also assumed as the final bit position of the frame data, and the error detection code when this assumption is made and the above-mentioned predetermined bit pattern are used. If they match, the position where the number of bits of the transmission data becomes 0 can be determined as the final bit position of the frame data.
【0018】
In actual data transmission, the number of transmission data bits to be transmitted may be 0, such as in a silent section (while the sender is not speaking) when transmitting audio information, and the rate on the receiving side. It is preferable that the detection is performed correctly including such a case (that is, when the apparent transmission rate = 0) (on the receiving side, the decoding circuit of the voice codec (CODEC) is a silent section. (Because it may perform processing different from the sounded section, such as generating background noise).
【0019】
As the predetermined bit pattern, for example, a bit corresponding to the parity bit of the error detection code (a bit corresponding to the initial state of the error detection coding circuit because there is no data: for example, all 0) can be used. On the transmitting side, when the number of bits of the transmission data is 0, the bit corresponding to the parity bit of the error detection code is transmitted (since there is no data, only the bit corresponding to this parity bit is error-corrected and encoded and transmitted). On the receiving side, the final bit position when the number of data bits is 0 (error detection at this time does not require calculation (recoding) of the error detection code for the received data, and the reception parity bit equivalent bit is predetermined. Perform rate detection including (just compare with the bit pattern). If a bit corresponding to the parity bit of the error detection code is used as the predetermined bit pattern, it is not necessary to add a circuit for generating the predetermined bit pattern.
【0020】
The length of the bit pattern can be made the same as the length of the parity bit of the error detection code (or CRC) given when the number of other data bits is not 0, so that the circuit can be standardized. , May be different lengths as needed.
【0021】
As for the bit pattern, it is necessary to predetermine at least one type of pattern, but multiple types of patterns are defined and used in combination with other uses (transmission of various control information corresponding to (mapping) each bit pattern). It is also possible to do.
【0022】
However, according to the invention described in PCT / JP00 / 03650, it is blocked by an outer loop transmission power control (a partial mechanism of a double closed loop transmission power control configured in combination with an inner loop transmission power control) such as a control signal transmission channel. Or, it is inappropriate to use it as a control standard for frame error rate quality maintenance control), that is, even if the channel does not need to calculate the frame (block) error rate, the error detection code (for example, CRC bit) It was necessary to make the performance at the time of blind rate detection satisfactory by always giving the data even when the data does not exist, or to transmit the rate information itself.
【0023】
Adding the CRC bit even during the period when no data exists means that when information transmission is performed intermittently as in a control signal transmission channel, deterioration of transmission efficiency due to overhead cannot be ignored.
【0024】
Therefore, an object of the present invention is to realize high-quality variable rate data transmission based on accurate rate detection while reducing overhead based on the concept of blind rate detection that does not transmit rate information.
【0025】
[Means for solving problems]
In order to achieve the above object, the invention according to claim 1 is a data transmission method in which variable length transmission data is stored in each frame having a fixed time length and transmitted, and transmission is performed in each frame on the transmitting side. Only when there is data, the step of calculating the error detection code of the transmission data, and in each frame, if there is transmission data, the transmission data and the frame data including the calculated error detection code are generated, and the transmission data If there is no such as, the step of generating the frame data not including the transmission data and the error detection code, the step of transmitting the generated frame data, and the step of receiving the frame data on the receiving side are provided. With respect to the received frame data, in each frame, the transmission data and the error detection code are determined with the predetermined position of the frame data as the final bit position, and the error detection code of the determined transmission data is calculated. In the frame, if the determined error detection code and the error detection code calculated based on the determined transmission data match, it is determined that there is transmission data, and if they do not match, there is no transmission data, or It is characterized by including a step of determining that the received frame data has an error, and a step of acquiring transmission data based on the determination result in each frame.
【0026】
The invention according to claim 2 is a data transmission method in which variable length transmission data is stored in each frame having a fixed time length and transmitted, and transmission is performed only when there is transmission data in each frame on the transmission side. The step of calculating the error detection code of the data, and in each frame, if there is transmission data, the transmission data and frame data including the calculated error detection code are generated, and if there is no transmission data, the transmission data A step of generating frame data not including an error detection code and a step of transmitting the generated frame data are provided, and the receiving side receives the frame data and the received frame data with respect to the received frame data. In each frame, the step of assuming one or more final bit positions of the frame data, assuming the transmission data and the error detection code, and calculating the error detection code of the assumed transmission data, and the assumption in each frame. If there is a position in the final bit position of the frame data that matches the assumed error detection code and the error detection code calculated based on the assumed transmission data, that position is used as the final bit position of the frame data. If there is no matching position, it is determined that there is no transmission data or there is an error in the received frame data, and in each frame, transmission data is acquired based on the determination result. It is characterized by having a step.
【0027】
The invention according to claim 3 is the data transmission method according to claim 1 or 2, wherein on the transmitting side, the step of generating the frame data places an error detection code after the corresponding transmission data. However, it is characterized in that frame data is generated in which the order of bits is reversed between the transmission data and the error detection code.
【0028】
The invention according to claim 4 is the data transmission method according to any one of claims 1 to 3, wherein the transmitting side performs error correction coding for the generated frame data, and error correction. It further includes a step of interleaving the encoded frame data, and on the receiving side, a step of deinterleaving the received frame data and a step of deinterleaving the deinterleaved frame data. It is characterized by further including a step of performing error correction and decoding.
【0029】
The invention according to claim 5 is the data transmission method according to any one of claims 1 to 4, wherein the transmission side calculates transmission rate information representing the number of bits of transmission data for each frame. The step of generating the frame data is characterized in that the frame data including the calculated transmission rate information is generated.
【0030】
The invention according to claim 6 is the data transmission method according to any one of claims 1 to 5, and when the transmission data exists in one frame, the length thereof is any one of 1 to X bits. Yes, the length of the error detection code for the transmitted data is Y bits, and the combination of X and Y is (X, Y) = (8,8), (244,12), (4080,16), ( It is characterized by being one of 1048576, 24).
【0031】
The invention according to claim 7 is a variable-length transmission data of each channel of the first channel group consisting of one or more channels, and a second channel group consisting of one or more channels in each frame having a fixed time length. A data transmission method for multiplexing and transmitting transmission data of each channel, wherein the variable-length transmission data of each channel of the first channel group is transmitted by the data transmission method according to any one of claims 1 to 6. It is characterized by.
【0032】
The invention according to claim 8 is the data transmission method according to claim 7, wherein the data transmission is performed by performing double closed loop transmission power control including inner loop transmission power control and outer loop transmission power control. the Au as a control criterion for Tarupu transmission power control, the channel of the first channel group without, is characterized by using one or more channels of the second channel group.
【0033】
The invention according to claim 9 is the data transmission method according to claim 8, wherein the relative ratio of the coding rate at the time of error correction coding between the multiplexed channels and each multiplexed channel. The relative ratio of the transmission power between them is constant.
【0034】
The invention according to claim 10 is a data transmission system in which variable length transmission data is stored in each frame having a fixed time length and transmitted, and only when there is transmission data in each frame in the transmitting side device. Means for calculating the error detection code of the transmission data, and in each frame, if there is transmission data, the transmission data and frame data including the calculated error detection code are generated, and if there is no transmission data, transmission is performed. A means for generating frame data that does not include data and an error detection code and a means for transmitting the generated frame data are provided, and the receiving device has a means for receiving the frame data and a means for receiving the frame data. On the other hand, in each frame, the means for determining the transmission data and the error detection code with the predetermined position of the frame data as the final bit position and calculating the error detection code of the determined transmission data, and the determined error in each frame. If the detection code matches the error detection code calculated based on the determined transmission data, it is determined that there is transmission data, and if they do not match, there is no transmission data or the received frame data It is characterized by including means for determining that there is an error and means for acquiring transmission data based on the determination result in each frame.
【0035】
The invention according to claim 11 is a data transmission system in which variable length transmission data is stored in each frame having a fixed time length and transmitted, and only when there is transmission data in each frame in the transmitting side device. Means for calculating the error detection code of the transmission data, and in each frame, if there is transmission data, the transmission data and frame data including the calculated error detection code are generated, and if there is no transmission data, transmission is performed. A means for generating frame data that does not include data and an error detection code and a means for transmitting the generated frame data are provided, and the receiving device has a means for receiving the frame data and a means for receiving the frame data. On the other hand, in each frame, a means for calculating the error detection code of the assumed transmission data by assuming one or more final bit positions of the frame data, assuming the transmission data and the error detection code, respectively, and in each frame. , If there is a position in the final bit position of the assumed frame data that matches the assumed error detection code and the error detection code calculated based on the assumed transmission data, that position is the final of the frame data. If it is determined to be a bit position and there is no matching position, there is no transmission data, or there is an error in the received frame data. In each frame, the transmission data is determined based on the determination result. It is characterized by having a means to acquire it.
【0036】
The invention according to claim 12 is a transmission device that stores variable-length transmission data in each frame having a fixed time length and transmits the data, and only when there is transmission data in each frame, an error detection code for the transmission data. And in each frame, if there is transmission data, the frame data including the transmission data and the calculated error detection code is generated, and if there is no transmission data, the transmission data and the error detection code are generated. It is characterized by having a means for generating frame data that is not included and a means for transmitting the generated frame data.
【0037】
The invention according to claim 13 includes transmission data, if there is transmission data, and an error detection code calculated for the transmission data in each frame having a fixed time length, and if there is no transmission data, the invention includes the transmission data. , A receiving device that receives frame data that does not include transmission data and an error detection code, a means for receiving frame data, and a predetermined position of the frame data in each frame with respect to the received frame data. Is the final bit position, the transmission data and the error detection code are determined, and the means for calculating the error detection code of the determined transmission data, the determined error detection code in each frame, and the error calculated based on the determined transmission data. If they match the detection code, it is determined that there is transmission data, and if they do not match, there is no transmission data, or there is an error in the received frame data. It is characterized in that it is provided with a means for acquiring transmission data based on the determination result.
【0038】
The invention according to claim 14 includes transmission data, if there is transmission data, and an error detection code calculated for the transmission data in each frame having a fixed time length, and if there is no transmission data, the invention includes the transmission data. , A receiving device that receives frame data that does not include transmission data and an error detection code, and means that the frame data is received, and the last bit position of the frame data in each frame with respect to the received frame data. Is assumed at one or more locations, the transmission data and the error detection code are assumed, respectively, and the means for calculating the error detection code of the assumed transmission data and the final bit position of the assumed frame data in each frame. If there is a position where the assumed error detection code and the error detection code calculated based on the assumed transmission data match, that position is determined as the last bit position of the frame data, and if there is no matching position. Is characterized in that it is provided with a means for determining that there is no transmission data or an error in the received frame data, and a means for acquiring transmission data based on the determination result in each frame.
【0039】
According to the above configuration, it is possible to realize high quality variable rate data transmission based on accurate rate detection while reducing the overhead based on the concept of blind rate detection that does not transmit rate information.
【0040】
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings.
【0041】
(First Embodiment) FIG. 3 shows an example of a block configuration of a transmitter and a receiver according to the first embodiment of the present invention.
【0042】
In FIG. 3, the transmission data series added to the terminal 1 is sent to the error detection coding circuit 4 and the multiplexing circuit 6. The error detection coding circuit 4 calculates an error detection code (CRC parity bit (CRC bit) in this embodiment) for one frame of the transmission data only when there is transmission data in the frame. In the present embodiment, the word length of the CRC bit is a fixed length.
【0043】
In the present embodiment, the sum of the length of the transmission data and the length of the error detection code (CRC bit) in one frame is a maximum of 4096 bits. The length of the error detection code is 16 bits. Therefore, the length of the transmitted data is either 0 (when the transmitted data does not exist) or 1 to 4080 bits. In the present embodiment, the error detection code is not transmitted when there is no transmission data, the overhead is reduced, and the length of the error detection code is lengthened to achieve more accurate rate detection (that is, high quality). Variable rate transmission) is possible. However, the maximum value of the length of the transmitted data and the length of the error detection code can be set to other values. For example, the maximum length of the transmitted data can be 8 bits, 244 bits, and 1048576 bits, and the length of the error detection code at that time can be 8 bits, 12 bits, and 24 bits, respectively.
【0044】
Next, when the transmission data is in the frame, the multiplexing circuit 6 arranges the error detection code (CRC bit) calculated in the error detection coding circuit 4 after the transmission data. Here, the order of the bits is reversed between the transmission data and the error detection code. In the present embodiment, the error detection coding circuit 4 outputs the error detection code bits in the reverse order of the normal order.
【0045】
In this embodiment, since error correction coding is performed by the convolutional code, in the multiplex circuit 6, a terminal bit required for error correction and decoding is further added to the transmission data and the error detection code, and the terminal bits are sequentially added for each frame. Output. However, the terminal bit may be added by the error correction coding circuit 8.
【0046】
The multiplex circuit 6 does not output any of the transmission data, the error detection code, and the termination bit when there is no transmission data in the frame.
【0047】
Figure 4 shows an example of the data series output from the multiplex circuit 6. Here, FIG. 4 (a) shows the case where the transmission rate of the transmitted data (simply referred to as data in FIG. 4) is the maximum, and FIGS. 4 (b) and 4 (c) show that the transmission rate is less than the maximum rate. When transmitting below the maximum rate, there is free time (time without data) in the frame. Further, FIGS. 4 (a) and 4 (b) show the case where there is transmission data, and FIG. 4 (c) shows the case where there is no transmission data. The length of the transmitted data contained in each frame changes with time, and the data series output from the multiplex circuit 6 is, for example, as shown in FIG. 4 (a) at one time and in FIG. 4 (a) at another time. It becomes as shown in b), and at another time, it becomes as shown in Fig. 4 (c).
【0048】
The data series output from the multiplex circuit 6 is convolutionally coded in the error correction coding circuit 8 and sent to the interleaving circuit 10 for interleaving processing. However, if there is no transmission data in the frame, convolutional coding is not performed.
【0049】
FIG. 5 shows an example of interleaving processing in the interleaving circuit 10. The data series for one frame is output in a direction different from the input direction, that is, the transmission data input in the row direction is output in the column direction. As another example of the interleaving process, the interleaving process described in Japanese Patent Application No. 11-129056 filed by the applicant can be mentioned. The data series output from the interleave circuit 10 is written to the frame memory 12.
【0050】
Figure 6 shows an example of the frame configuration of the data series obtained from the frame memory 12. The data section corresponding to the column of the interleave circuit 10 is called a slot, and here it is assumed that one slot is composed of N bits and one frame is composed of M slots. The number of bits in one frame is N × M bits.
【0051】
The output data sequence of the frame memory 12 is modulated in the radio circuit 14 and transmitted via the antenna 16. Here, as the modulation method, for example, spread spectrum modulation, QPSK modulation, or the like is used. Note that modulation is not performed at the data position corresponding to the empty data in the slot. As described above, the transmitter transmits data having a variable number of bits in a fixed frame time.
【0052】
Next, the receiver demodulates the received signal input from the antenna 20 in the wireless circuit 22, and then sequentially inputs the received signal to the deinterleaved circuit 24. The deinterleaved circuit 24 has a memory inside, and the procedure of reversing the input and output in the interleaved circuit 10 on the transmitting side, that is, writing to the memory for each column (for each slot) and reading for each row. Do. By such an operation, the original data sequence for one frame is reproduced, and the encoded transmission data sequence and the error detection code appear. The above-mentioned interleaving process and the above-mentioned deinterleaving process aim to further enhance the effect of error correction by preventing continuous burst-like errors.
【0053】
The deinterleaved data sequence is sent to the error correction decoding circuit 26 for error correction decoding by the most likely decoding method, and the decoded data sequence is separated into an error detection code and a data sequence in the separation circuit 28. The error detection code is input to the comparison circuit 34.
【0054】
On the other hand, the data series is output as received data from the terminal 2 and input to the error detection coding circuit 30. In the error detection coding circuit 30, the same error detection coding as that of the transmitter is performed again on the input data series. The error detection code obtained by recoding is compared for each sign bit in the comparison circuit 34, and when all the sign bits match, a matching signal is output. Since the error correction code bits in the received frame are in the reverse order of the normal, in the present embodiment, the error detection coding circuit 30 also outputs the error correction code bits in the reverse order of the normal.
【0055】
Here, the error correction / decoding and the calculation of the error detection code are performed by sequentially assuming the final bit position of the frame data that can be transmitted for each frame. At this time, the error correction decoding circuit 26 sends the likelihood information for the decoding result up to each assumed final bit position to the rate determination circuit 36, and the rate determination circuit 36 is used as a matching signal between the likelihood information and the error detection code. Based on this, the final bit position, that is, the transmission rate of the frame is determined.
【0056】
FIG. 7 shows an example of the decoded data series at the time of the most likely decoding, and FIG. 8 shows an example of the rate determination process (algorithm). Here, the Viterbi decoding is assumed as the most probable decoding.
【0057】
First, after the start of Viterbi decoding, a plurality of decoded data sequences surviving in each state at the assumed final bit position (#L in the examples of FIGS. 7 and 8) (K reaching states 1 to K in the example of FIG. 7). The likelihoods of the transmitted data series (of the decoded data series) are obtained, and the maximum values of these likelihoods and the decoded data series obtained by terminating the decoding process (state 0 in the example of FIG. 7) are reached. Find the difference between the likelihood and the likelihood of the transmission data series (series) (S1 to S4).
【0058】
If this likelihood difference is within a certain range (within Δ in the example of FIG. 8), the selected decoded data series is output by traceback and error detection coding (CRC coding) is performed (S5, S6). ..
【0059】
In the present embodiment, the word length of the CRC code is a fixed length, and the frame configuration is such that the transmission data is placed immediately before the CRC code. Therefore, the (assumed) transmission data (part) with respect to the assumed final bit position. And the (assumed) error detection code (part) is obtained. That is, by assuming the final bit position, the transmission data (part) and the error detection code (part) are assumed. Then, the obtained (hypothetical) transmission data is (re) error-detected coded (CRC coded).
【0060】
If the comparison result of this re-encoded CRC and the received CRC ((assumed) error detection code) matches, the decoding is terminated, and it is determined that the assumed final bit position is the final bit position of the transmitted frame data. Acquire (restore) transmission data. Since the bits of the transmitted data in the frame and the error detection code are arranged in the reverse order, the probability that the CRC comparison results will erroneously match is very small.
【0061】
If the likelihood difference exceeds Δ or the CRC comparison results do not match, the Viterbi decoding is continued assuming the next position. When the Viterbi decoding and the calculation of the error detection code are performed for the assumed final bit position, when the likelihood difference is within Δ and a plurality of positions where the comparison results of the error detection codes match are detected. Can also determine that the position where the likelihood difference is the smallest is the final bit position of the transmission frame data. This will be described later.
【0062】
In the example of FIG. 7, if no error occurs in the middle of transmission, the sequence that reaches state 0 at the second position (L = 2) has the maximum likelihood (likelihood difference = 0). Furthermore, the comparison results of the error detection codes for this decoding series should match.
【0063】
On the other hand, if an error occurs in the middle of transmission, the sequence that reaches state 0 does not always have the maximum likelihood. Therefore, by setting Δ to an appropriate value, the generated error is corrected. The same effect of reducing the rate determination error rate as when there is no transmission error can be obtained for the decoding sequence. In the region where the value of Δ is less than or equal to a certain value, the average rate judgment error can be further reduced by setting Δ to a smaller value, but the average frame error rate (CRC comparison results match). Probability of not doing + rate judgment error rate) increases.
【0064】
Therefore, for example, for data transmission that requires an extremely low rate determination error rate such as control data, it is better to reduce Δ even if the frame error rate is sacrificed to some extent.
【0065】
In consideration of the tendency of errors that occur during transmission with respect to Δ, Δ is obtained by multiplying a constant value by the difference between the maximum and minimum likelihood values obtained at each assumed final bit position as a coefficient. You can also.
【0066】
If the recoded CRC and the received CRC do not match at all the assumed final bit positions, it is determined that there is no transmitted data or the received frame data is incorrect.
【0067】
When data is transmitted using the transmitter / receiver having the above configuration, the number of transmission bits in the frame (that is, the number of transmission bits in the frame) is not sent directly from the transmitting side to the receiving side. Even if the apparent transmission rate) is changed on the transmitting side, it can be received on the receiving side.
【0068】
Further, it is possible to reduce the probability of false detection of the rate on the receiving side at the time of variable rate data transmission, and to eliminate the need to provide a buffer for temporarily storing the transmission data on the transmitting side.
【0069】
Furthermore, by adopting the rate judgment method that also uses the likelihood information at the time of Viterbi decoding, it is possible to reduce the possibility of outputting transmission data of the wrong length in the frame based on the wrong rate judgment result. , Highly reliable variable rate data transmission is possible.
【0070】
Further, since the error detection code is not transmitted for the frame without the transmission data, the overhead can be reduced.
【0071】
As described above, when the Viterbi decoding and the calculation of the error detection code are performed for the assumed final bit position, a plurality of positions where the likelihood difference is within Δ and the comparison results of the error detection codes match are detected. If so, the position where the likelihood difference is the smallest can be determined to be the final bit position of the transmission frame data.
【0072】
FIG. 9 shows another example of the rate determination process (algorithm). In the example of FIG. 9, assuming that the assumed bit position is L, it is determined whether or not the investigation from the assumed first position (L = 1) to the assumed last position (the assumed last position in step S31 has been completed) has been completed. After a thorough investigation, the position with the smallest likelihood difference is determined to be the final bit position. At that time, the variable S for storing the minimum likelihood difference<sub>min</sub>, And the variable L'to store its position.
【0073】
However, it is also possible that the likelihood difference is within Δ and no position where the comparison results of the error detection codes match is detected. In that case, L'= -1 (value set in step S21) is still set at the stage of step S33. In that case, there is no transmission data or there is an error in the received frame data. Judge that there is. If the value of Δ is set to infinity, it is possible to avoid a situation in which no position where the likelihood difference is within Δ is detected.
【0074】
In the present embodiment, error correction coding is performed by a convolutional code, but error correction coding may be performed by another method, for example, a turbo code. Further, as in WO97 / 50219 described above, the frame data may be divided into a plurality of blocks, and error correction coding by a block code may be performed on each block.
【0075】
Further, in the present embodiment, error correction coding and interleaving and deinterleaving and error correction decoding are performed on the frame data, but even if these are not performed, rate erroneous detection in variable rate data transmission is performed. It is possible to eliminate the need to provide a buffer for temporarily storing transmission data while lowering the probability of. In that case, without using the likelihood information, simply, among the final bit positions of the assumed frame data, the position where the assumed error detection code and the error detection code calculated based on the assumed transmission data match. , It may be determined as the last bit position of the frame data.
【0076】
Also, if the length of the transmitted data is known to be X (X 0) or 0, the processing on the receiving side can be further simplified. That is, in each frame, it is not necessary to assume the final bit position one by one, and the transmission data (length: X) and the error detection code are set based on the final bit position when the length of the transmission data is X. It is determined, and the error detection code of the determined transmission data is calculated. Then, if the determined error detection code and the error detection code calculated based on the determined transmission data match, it is determined that there is transmission data, and if they do not match, there is no transmission data or reception. It may be determined that there is an error in the frame data.
【0077】
(Second Embodiment) FIG. 10 shows an example of a block configuration of a transmitter and a receiver according to the second embodiment of the present invention.
【0078】
In the configuration of FIG. 10, transmission of information indicating the rate of transmitted data is added to the configuration of FIG. 3, and the receiving side also uses this rate information to perform rate determination. In FIG. 10, the same number is used for the configuration and common parts in FIG. The following describes the operation of the parts different from those in Fig. 3.
【0079】
First, the information (transmission rate information) representing the rate of the transmission data added to the terminal 5 is sent to the rate information memory 40. Here, the content of the rate information memory 40 is the rate information of the transmission data, that is, the information representing the number of bits. The multiplex circuit 6'is an information representing the rate of the transmission data read from the rate information memory 40, the transmission data sent from the terminal 1, and the error detection calculated for the transmission data in the error detection coding circuit 4. The code and end bit are output sequentially for each frame. However, when there is no transmission data in the frame, the multiplex circuit 6'does not output any of the transmission data, the error detection code, and the termination bit, and outputs only the transmission rate information. Here, too, the error detection code is placed after the transmission data, and the bit arrangement is reversed between the transmission data and the error detection code. In this embodiment, the transmission rate information is arranged at the beginning of the frame.
【0080】
Also in this embodiment, the sum of the length of the transmission data and the length of the error detection code (CRC bit) in one frame is set to a maximum of 4096 bits. The length of the error detection code is 16 bits. However, the maximum value of the length of the transmitted data and the length of the error detection code can be set to other values.
【0081】
FIG. 11 shows an example of a data series output from the multiplex circuit 6'. FIG. 11 (a) shows the case where the transmission rate of the transmission data is the maximum, FIG. 11 (b) shows the case where the transmission rate is less than the maximum rate and there is transmission data, and FIG. 11 (c) shows the case where there is no transmission data. Each is shown.
【0082】
In the present embodiment, the error correction coding circuit 8 performs error correction coding with a block code for the transmission rate information (examples of specific error correction codes include a double orthogonal code, a read-maler code, and a BCH code. Etc., and error correction coding other than the error correction coding by the block code may be used), and the transmission data, the error detection code, and the termination bit are error-corrected and coded by the convolution code. Further, the interleaving circuit 10 interleaves these error-correcting encoded data independently or collectively. In the error correction coding circuit 8, the transmission rate information, the transmission data, the error detection code, and the end bit can all be collectively performed by the convolutional code for error correction coding.
【0083】
On the other hand, in the receiver, when the transmission rate information is subjected to error correction coding independent of the transmission data and others by using a block code or the like, the error correction / decoding circuit 26'indicates the transmission rate information portion. After performing appropriate error correction decoding, the decoding result is held in the rate information memory 42. On the other hand, when the transmission rate information, the transmission data, etc. are collectively convolutionally coded, the error correction decoding circuit 26'cuts off the sequential Viterbi decoding starting from the beginning of the frame in the middle. The decoding result of the rate information bit portion placed at the beginning of the frame is once obtained, and this decoding result is held in the rate information memory 42.
【0084】
FIG. 12 shows an example of rate determination processing (algorithm) in the receiver of the present embodiment. The error correction decoding circuit 26'was obtained by assuming that the position indicated by the contents of the rate information memory 42 is the final bit, continuously performing Viterbi decoding of the frame data up to that position, and terminating the decoding process. The decoded data series is output by traceback and error detection coding (CRC coding) is performed (S11 to S15).
【0085】
If the comparison result of the recoded CRC and the received CRC match, the decoding is completed (S16), the position indicated by the contents of the rate information memory is determined to be the final bit position of the transmission frame data, and the transmission data is acquired. (Restore. Since the bits of the transmitted data in the frame and the error detection code are arranged in the reverse order, the probability that the CRC comparison results will erroneously match is very small.
【0086】
When the CRC comparison results do not match, in the present embodiment, error correction decoding and error detection code are sequentially assumed by sequentially assuming the final bit position of the frame data that can be transmitted other than the final bit position indicated by the contents of the rate information memory. Is calculated, and the rate is determined using the likelihood information at the time of bitabi decoding and the comparison result of the error detection code (S17, the same processing as S1 to S8 in FIG. 8).
【0087】
In addition, between steps S13 and S14, the maximum likelihood is determined (S3), the likelihood difference is obtained (S4), and whether or not the likelihood difference is within a certain range, as in the first embodiment. It is also possible to judge (S5). If the likelihood difference is within a certain range, the process proceeds to step S14, and if the likelihood difference is not within a certain range, the process proceeds to step S17. When such processing (S3 to S5) is performed, the number of processing is increased as compared with the case where such processing is not performed, but the rate determination error rate can be further improved. The Δ used in step S5 between steps S13 and S14 and the Δ used in step S5 in step S17 may have the same value or different values.
【0088】
If the recoded CRC and the received CRC do not match at all the assumed final bit positions, it is determined that there is no transmitted data or the received frame data is incorrect.
【0089】
Even when data is transmitted using the transmitter and receiver with the above configuration, the transmitted data on the transmitting side is temporarily stored while reducing the probability of false detection of the rate on the receiving side during variable rate data transmission. It is possible to eliminate the need to provide a buffer for the purpose.
【0090】
Further, while the rate information is surely detected by the receiver when there is no transmission error, even if the rate information is incorrect in the middle of transmission, the likelihood information and the error detection code at the time of Viterbi decoding are surely detected in the receiver. The rate determination can be made using the comparison result of the above, the final frame error rate is improved, and a low rate determination error rate is achieved. Variable rate data transmission with higher reliability can be performed.
【0091】
Further, since the error detection code is not transmitted for the frame without the transmission data, the overhead can be reduced.
【0092】
In the above description, the reliability of the bitabi decoding result of the rate information bit portion can be increased as the input signal stored in the decoder, that is, the subsequent coded data sequence length is longer, so that the error detection code other than the transmission data can be increased. It is desirable to arrange a fixed-length data series such as, etc. consecutively immediately after the rate information bit as much as possible.
【0093】
On the other hand, a terminal bit is inserted after the rate information bit in the transmitter, the decoding operation in the receiver is once completed here, the reception rate information is obtained, and then the decoding operation is started again to the frame up to the final bit. -It is also possible to decrypt the data.
【0094】
Also in this embodiment, when the length of the transmitted data is known to be X (X 0) or 0, the processing on the receiving side can be further simplified. That is, in step S12 of FIG. 12, when the rate information indicates the transmission data length 0, it is determined that there is no transmission data, and the process ends. If the rate information indicates the transmission data length X, the processing after step S13 is performed, and if the received CRC and the re-encoded CRC match in step S16, it is determined that there is transmission data and they do not match. In that case, it may be determined that there is no transmission data or there is an error in the received frame data.
【0095】
Even if the rate information indicates the transmission data length Y (Y 0, Y X) (in this case, the rate information is incorrect), when the transmission data length is X. When the transmission data and error detection code (received CRC) are determined based on the last bit position, the error detection code (recoded CRC) of the determined transmission data is calculated, and the received CRC and recoded CRC match. May determine that there is transmission data, and if they do not match, it may determine that there is no transmission data or that there is an error in the received frame data.
【0096】
Further, even when the rate information indicates the transmission data length Y = 0, the transmission data and the error detection code (received CRC) are determined based on the final bit position when the transmission data length is X. Then, the error detection code (re-encoded CRC) of the determined transmission data is calculated, and if the received CRC and the re-encoded CRC match, it is determined that there is transmission data, and if they do not match, the transmission is transmitted. It may be determined that there is no data or that the received frame data is incorrect.
【0097】
In the first embodiment and the second embodiment, when determining whether or not the likelihood difference is within a predetermined range (on the receiving side) (step S5 in FIG. 8), the predetermined range (FIG. 8). In other words, the value of Δ) can be changed (different) depending on the final bit position of the assumed frame data.
【0098】
When the present invention is applied in an actual wireless communication environment, desired detection performance is obtained for each final bit position (different number of transmission data bits in a frame) depending on the tendency of transmission bit error in the transmission line. Appropriate values for Δ may differ. In such a case, if one value is used in common as Δ, the rate detection performance will change depending on the final bit position, and if the ratio of the transmission frequency for each transmission rate (final bit position) changes, the rate will change. The problem arises that the average variable rate data transmission quality, including detection performance, changes.
【0099】
Therefore, instead of setting one type of Δ for threshold value determination, different values (Δ1, Δ2, ..., ΔL, ..., ΔN) are set for each final bit position (each transmission rate). It is conceivable to make it possible to make a judgment. Here, the value of each ΔL may be changed so as to always be an optimum value according to a change in the communication environment during communication. Further, if necessary, the same value may be partially duplicated.
【0100】
(Third Embodiment) The transmission data of a plurality of channels is multiplexed (stored) in each frame, and the data transmission shown in the first embodiment or the second embodiment is performed only for some channels (variable length data). The method can also be applied. For example, when a control signal transmission channel is included in the multiplexing channel, it is conceivable to apply the method of the first embodiment or the second embodiment only to the control signal transmission channel. ..
【0101】
FIG. 16 is a diagram showing an example in which transmission data of two channels are stored in one frame. In FIG. 16, the data transmission method shown in the second embodiment is applied to one of the two channels (here, the first channel). For the other channel (that is, the second channel), for example, one of the data transmission methods described in PCT / JP00 / 03650 (in the second embodiment described above, an error detection code is added even when there is no transmission data. How to do) is applied. However, a data transmission method for determining the transmission rate using only the transmission rate information may be applied to the second channel without using (adding) an error detection code. Further, when the transmission data of the second channel has a fixed length, a data transmission method that does not determine the transmission rate may be applied to the second channel.
【0102】
In the example of FIG. 16, in one frame, the transmission rate information of the first channel (first transmission rate information) and the transmission rate information of the second channel (second transmission rate information) are stored first. After that, the allocation area (fixed length) of the first channel and the allocation area (fixed length) of the second channel are provided, and each allocation area contains the transmission data, the error detection code, and the termination bit of each channel. Be done. However, for the first channel, if there is no transmission data in the frame, none of the transmission data, the error detection code, and the end bit will be stored in the allocation area of the first channel. The first transmission rate information and the second transmission rate information can be stored in the allocated area of each channel.
【0103】
The transmission rate information of each channel can be combined into one transmission rate information.
【0104】
FIG. 17 is a diagram showing a case where the information of two transmission rates is combined into one transmission rate information in FIG. For example, there are five types of transmission rates that can be taken by the first channel: 0kbps, 10kbps, 20kbps, 30kbps, and 40kbps, and there are three types of transmission rates that can be taken by the second channel: 0kbps, 50kbps, and 100kbps. To do. In this case, if individual transmission rate information is adopted as shown in FIG. 16, 3 bits are required as the first transmission rate information and 2 bits are required as the second transmission rate information, for a total of 5 bits. On the other hand, when the combined transmission rate information is adopted as shown in FIG. 17, the transmission rate of the first channel / the transmission rate of the second channel is 0kbps / 0kbps, 10kbps / 0kbps, 20kbps / 0kbps, ..., 20kbps / 100kbps, It can be expressed in 15 (= 5 × 3) types of 30kbps / 100kbps and 40kbps / 100kbps, and 4 bits are sufficient for the combination transmission rate information. Therefore, adopting the combination transmission rate information has the effect of reducing the overhead.
【0105】
The transmission rate information may be transmitted only for the first channel, only for the second channel, or not transmitted at all (both channels). it can. For example, the transmission rate information of the first channel is not transmitted, and instead of the method of the second embodiment (the method of transmitting including the transmission rate information) for the first channel, the transmission rate information of the first embodiment is used. It is conceivable to apply a method (a method of transmitting without including transmission rate information). When the transmission rate information of the second channel is not transmitted, one of the data transmission methods described in, for example, PCT / JP00 / 03650 (even if there is no transmission data in the above first embodiment) for the second channel. Method of adding an error detection code) is applied.
【0106】
It is considered that the transmission rate information may be transmitted for all channels or not transmitted for all channels due to the circuit of the transmission / reception device or the like. It is due to the following reasons. That is, the error correction code (for example, block coding) is also applied to the transmission rate information, but the error correction coding (for example, convolution coding) of the part including the error detection code has a relatively error correction capability. In some cases (that is, the transmission quality of the transmission rate information is relatively poor), even if there is transmission rate information, it does not rely on it, but relies on the error detection code. In some cases, the detection accuracy can be improved by detecting the transmission rate. Here, when the combination transmission rate information is adopted, it may be considered that the transmission rate information does not need to be included in the combination transmission rate information for the channel to which the method of the second embodiment is applied. In the above example, if the transmission rate information of the first channel is not included in the combined transmission rate information, only the transmission rate information of the second channel needs to be used as the combined transmission rate information, so that only 2 bits are required. .. However, finely adjusting the transmission format (using a variable format) so as to transmit the required number of transmission rate information bits generally complicates the circuit, so it is not always a good idea.
【0107】
In the above example, the case where the method of the first embodiment or the method of the second embodiment is applied and one channel is not applied is described as an example, but two or more channels may be applied. , There may be two or more channels that do not apply.
【0108】
Regarding error correction coding, it is conceivable that the transmission rate information part is block coded and the allocation area of each channel is convolutional coded. For example, the transmission rate information part is also convolutional coded. May be good. In that case, the transmission rate information part and the allocated area of the first channel may be convolutionally coded separately, or may be convolutionally coded together.
【0109】
(Fourth Embodiment) In the third embodiment, it is conceivable to perform double closed loop transmission power control composed of inner loop transmission power control and outer loop transmission power control for data transmission. At that time, as the control standard for outer loop transmission power control (hereinafter, simply referred to as control standard), the channel to which the method of the first embodiment or the second embodiment is applied is not used, and one of the other channels is used. It is conceivable to use one or more channels.
【0110】
For example, when a control signal transmission channel is included in the multiplexing channel, the control signal transmission channel is not used as the control reference, but one or more of the other channels are used as the control reference. Can be considered. Since information transmission is generally performed intermittently in the control signal transmission channel, for example, outer loop transmission power control (block or frame error rate quality maintenance control) based on the result of the received CRC determination cannot be performed accurately. ..
【0111】
The outer loop transmission power control is premised on performing the inner loop transmission power control at the same time, and as a specific outer loop transmission power control, the target SIR (signal power to interference and noise power ratio) used in the inner loop transmission power control is used. ) Is separately measured on the receiving side. Adjust the frame (block) error rate quality so that it reaches the target value. Here, the inner loop transmission power control is when the reception side compares the reception SIR of the reception signal with the preset (target) SIR and the reception SIR is lower than the target SIR (that is, the reception quality is the target quality). When it is below the target SIR, the receiver sends a control signal to the transmitter to increase the transmit power, and conversely, when the receive SIR on the receiver exceeds the target SIR (ie, the reception quality is the target). It is a control that sends a control signal from the receiving side to the transmitting side to reduce the transmission power (when the quality is higher than the quality).
【0112】
In general, the outer loop transmission power control is controlled relatively loosely with respect to the inner loop transmission power control (double closed loop control). In addition, when a plurality of channels are multiplexed and transmitted and a target frame (block) error rate quality is set for each channel, an inner loop is performed so as to satisfy all the target frame (block) error rate qualities. Adjust the target SIR used in transmit power control.
【0113】
The relative ratio of the coding rate at the time of error correction coding between the multiplexed channels and the relative ratio of the transmission power between the multiplexed channels can be constant. The relative ratio may be determined in consideration of the required quality of each channel.
【0114】
When the relative ratio of the transmission power is constant, if the transmission power of the channel that serves as the control reference is determined by the outer loop transmission power control, the transmission power of the channel that does not serve as the control reference is also determined. That is, it is possible to indirectly control the transmission power of a channel that does not serve as a control reference.
【0115】
It is considered that the transmission power may be changed according to the rate. In that case, for example, the maximum rate R of the channel that serves as the control reference.<sub>1, M</sub>Transmission power and maximum rate R of non-control channel<sub>2,M</sub>The relative ratio Q with the transmission power of is set to a certain value. Also, the rate R with the channel that serves as the control reference.<sub>1, J</sub>Transmission power and maximum rate R<sub>1, M</sub>Relative ratio to the transmission power of S (R)<sub>1, J</sub>), Rate R with channels that are not control criteria<sub>2,K</sub>Transmission power and maximum rate R<sub>2,M</sub>Relative ratio to the transmission power of S (R)<sub>2,K</sub>) Shall be given respectively. And the rate R with the channel that serves as the control reference<sub>1, J</sub>Transmission power is P<sub>1, J</sub>Rate R with channels that do not serve as control criteria when determined<sub>2,K</sub>Transmission power P<sub>2,K</sub>Is P<sub>1, J</sub>× Q × S (R<sub>2,K</sub>) / S (R)<sub>1, J</sub>) Can be determined.
【0116】
(Others) The techniques described in the first to fourth embodiments are in the case of postfix / same order (the error detection code is placed after the transmission data, and the bit arrangement is arranged between the transmission data and the error detection code. It can also be applied to the case of the same order) and the case of the prefix (when the error detection code is placed before the transmission data (the order of the bits of both may be the same order or the reverse order)).
【0117】
FIG. 13 shows an example of a frame configuration of transmission data in the case of postfix / same order, and FIG. 14 shows an example of a frame configuration of transmission data in the case of postfix / same order. 13 (a) and 14 (a) show the case where the transmission rate of the transmission data is the maximum, and FIGS. 13 (b) and 14 (b) show the case where the transmission rate is lower than the maximum rate and there is transmission data. Figures 13 (c) and 14 (c) show the case where there is no transmitted data, respectively. The configuration examples, processing examples, etc. of the transmitter and receiver used in the case of postfix / same order and the case of prefix are the same as those described in the first to fourth embodiments. In the case of the prefix, as shown in FIG. 15, for example, a frame memory 40 is provided between the terminal 1 and the multiplex circuit 6, the transmission data is temporarily held, and error detection coding is performed between them. It is conceivable to calculate the error detection code in the circuit 4. Further, for example, an error detection code memory 42 is provided between the separation circuit 28 and the comparison circuit 34 to temporarily hold the assumed error detection code, and in the meantime, the transmission data assumed by the error detection coding circuit 30. It is conceivable to calculate the error detection code.
【0118】
[Effect of the invention]
According to the above configuration, it is possible to realize high quality variable rate data transmission based on accurate rate detection while reducing the overhead based on the concept of blind rate detection that does not transmit rate information.
[Simple explanation of drawings]
[Figure 1]
It is a figure which shows the example of the conventional transmission bit order.
[Figure 2]
It is a figure which shows the example of the conventional transmission bit order and the transmission bit order by the invention described in PCT / JP00 / 03650.
[Fig. 3]
It is a block diagram which shows the structural example of the transmitter and the receiver in the 1st Embodiment of this invention.
[Fig. 4]
It is a figure which shows the frame structure example of transmission data in 1st Embodiment of this invention.
[Fig. 5]
It is a figure explaining the processing example of the interleave circuit in 1st Embodiment of this invention.
[Fig. 6]
It is a figure which shows the frame structure example of transmission data in 1st Embodiment of this invention.
[Fig. 7]
It is a figure which shows the decoding data series example at the time of the most probable decoding in the 1st Embodiment of this invention.
[Fig. 8]
It is a flowchart of the rate determination processing example in 1st Embodiment of this invention.
[Fig. 9]
It is a flowchart of another example of rate determination processing in 1st Embodiment of this invention.
[Fig. 10]
It is a block diagram which shows the structural example of the transmitter and the receiver in the 2nd Embodiment of this invention.
[Fig. 11]
It is a figure which shows the frame structure example of transmission data in the 2nd Embodiment of this invention.
[Fig. 12]
It is a flowchart of the rate determination processing example in 2nd Embodiment of this invention.
[Fig. 13]
It is a figure which shows the frame structure example of the transmission data in the case of postscript and the same order.
[Fig. 14]
It is a figure which shows the frame structure example of transmission data in the case of a prefix.
[Fig. 15]
It is a figure which shows the example which adds the frame memory and the error detection code memory in the case of a prefix.
[Fig. 16]
It is a figure which shows the example which contained the transmission data of two channels in one frame.
[Fig. 17]
FIG. 16 is a diagram showing a case where information of two transmission rates is combined into one transmission rate information in FIG.
[Explanation of symbols]
4 Error detection coding circuit 6, 6'Multiple circuit 8 Error correction coding circuit 10 interleaved circuit 12, 40 frame memory 14 wireless circuit 16 antenna 20 antenna 22 wireless circuit 24 Deinterleaved circuit 26, 26 Error correction decoding circuit 28 Separation circuit 30 Error detection and decoding circuit 34 Comparison circuit
2 sheets
Sheet 1 Sheet 2
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US8099653B2 | Cited by | United States of America | Applicant |
| KR100553072B1 | Cited by | Republic of Korea | Search report |
| WO2006106864A1 | Cited by | World Intellectual Property Organization (WIPO) | Applicant |
| JP2007184697A | Cited by | Japan | Search report |
| US7680057B2 | Cited by | United States of America | Applicant |
| WO2006106864A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| WO2006123542A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US7139243B2 | Cited by | United States of America | Applicant |
| JP2016201770A | Cited by | Japan | Search report |
| WO2004040775A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US8010878B2 | Cited by | United States of America | Applicant |
| WO2006123542A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
14 members in 6 offices
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 2000351884 | Japan | A | |
| JP20000351884 | – | – | – |
Members14
| Document | Office | Kind | |
|---|---|---|---|
| EP1207659A2 | European Patent Office (EPO) | A2 | |
| KR20020038556A | Republic of Korea | A | |
| JP2002158642AThis record | Japan | A | |
| CN1354574A | China | A | |
| US2002075964A1 | United States of America | A1 | |
| KR100475153B1 | Republic of Korea | B1 | |
| CN1242584C | China | C | |
| JP3795743B2 | Japan | B2 | |
| US7139243B2 | United States of America | B2 | |
| US2007133423A1 | United States of America | A1 | |
| EP1207659A3 | European Patent Office (EPO) | A3 | |
| US7680057B2 | United States of America | B2 | |
| EP1207659B1 | European Patent Office (EPO) | B1 | |
| DE60143183D1 | Germany | D1 |
33 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Cancellation because of completion of termEXPY | EXPY | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Notification of resignation of power of attorneyJAPANESE INTERMEDIATE CODE: R3D04RD04 | RD04 | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Notification of acceptance of power of attorneyJAPANESE INTERMEDIATE CODE: R3D02RD02 | RD02 | |
| Certificate of patent or registration of utility modelJAPANESE INTERMEDIATE CODE: R150R150 | R150 | |
| Certificate of patent or registration of utility modelJAPANESE INTERMEDIATE CODE: R150R150 | R150 | |
| First payment of annual fees (during grant procedure)JAPANESE INTERMEDIATE CODE: A61A61 | A61 | |
| Written decision to grant a patent or to grant a registration (utility model)JAPANESE INTERMEDIATE CODE: A01A01 | A01 | |
| Decision of grant or rejection writtenTRDD | TRDD | |
| Written amendmentJAPANESE INTERMEDIATE CODE: A523A521 | A521 | |
| Notification of resignation of power of attorneyJAPANESE INTERMEDIATE CODE: A7424RD04 | RD04 | |
| Notification of reasons for refusalJAPANESE INTERMEDIATE CODE: A131A131 | A131 | |
| Report on retrievalJAPANESE INTERMEDIATE CODE: A971007A977 | A977 |
Numbers
- Publication
- 2002-158642
- Publication, DOCDB
- 2002158642
- Publication, EPODOC
- JP2002158642
- Application
- 351884
- Application, DOCDB
- 2000351884
- Application, EPODOC
- JP20000351884
Titles2
- Japanese
- 【発明の名称】データ伝送方法、データ伝送システム、送信装置および受信装置
- English
- INDUSTRIAL APPLICABILITY: Data transmission method, data transmission system, transmission device and reception device
Classification
- CPC, 6
- H04L1/0071
- H04L1/00
- H04L1/0046
- H04L1/0054
- H04L1/0061
- H04L1/0075
- IPC, 4
- H03M13 09
- H03M13 27
- H04J3 00
- H04L1 00