Device and method for correcting layout pattern data, method for manufacturing semiconductor device, and recording medium

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to a layout pattern data correction device, a correction method, a method for manufacturing a semiconductor device, and a recording medium for correcting pattern distortion generated in a pattern forming process such as lithography or etching used for manufacturing a semiconductor device.

【0002】

[Conventional technology]

Currently, the design rules for semiconductor devices have reached the 0.15 μm level, which is smaller than the light source wavelength of the stepper for transferring it (0.248 μm when using a KrF excimer laser). In such a situation, the resolution is extremely deteriorated, so that the resolution performance is improved by a special transfer technique such as a deformed lighting technique.

【0003】

When this special transfer technique is used, the resolution is improved, but the fidelity of the pattern is deteriorated. Further, in other processes such as the etching process, the dimensional variation of the pattern occurs due to the difference in density of the pattern due to the miniaturization of the pattern.

【0004】

In order to deal with these problems, OPC (optical proximity effect correction) technology that transforms the design layout pattern so as to obtain the desired pattern is widely used, and three types of OPC methods are conventionally known. Has been done. That is, the design takes into consideration the model-based OPC that deforms the pattern based on the simulation result and the graphic characteristics of the design layout pattern (width of each pattern, distance between adjacent patterns, distance from the corner part). This is a method in which a rule-based OPC that transforms a design layout pattern based on a specification (OPC rule) that transforms a layout pattern is set in advance, and these two OPCs are used in combination.

【0005】

[Problems to be Solved by the Invention]

By the way, in recent years, with the miniaturization of patterns, complicated OPC processing has become necessary. Along with this, preset OPC rules have become complicated in order to implement the above-mentioned rule-based OPC. Table 1 shows an example of the specifications of the conventional rule-based OPC.

[table 1]

<img file="JP2002107902A_D0001.tif" />Table 1 shows the amount of correction based on the line width of the pattern to be corrected and the distance between the adjacent patterns. For example, for a certain pattern, if the line width is 0.60 μm or more and the distance from the adjacent pattern is 0.20 μm or more and less than 0.25 μm, the correction amount is -0.04 μm, and this amount is used. Based on this, the edge of the pattern is moved by 0.04 μm in a predetermined direction, and the correction is performed.

【0006】

In a rule-based OPC, in order to make such a correction process into a rule, as shown in Table 1, the correction amount differs depending on the width of the pattern and the distance between the adjacent patterns, thereby resulting in an enormous amount of OPC. It is necessary to describe the rules. As the pattern becomes finer, it becomes necessary to correct the pattern distortion more finely, so that the OPC rule becomes more complicated and the description thereof increases further. When the OPC rule becomes complicated and the description thereof increases in this way, a problem such as an increase in the creation time of the OPC rule arises.

【0007】

The present invention has been made in view of the above technical problems, and an object of the present invention is to provide a layout pattern data correction device capable of reducing the description of OPC rules required for layout pattern data correction.

【0008】

[Means for solving problems]

The first invention of the present invention defines a pattern dividing means for dividing a circuit layout pattern into a plurality of region patterns based on a predetermined division rule, and a plurality of region patterns divided by the pattern dividing means. It is characterized by having a pattern classification means for classifying each different mask based on the classification rule of.

【0009】

Further, the second invention of the present application is characterized in that, in the first invention, the pattern dividing means divides the layout pattern into a plurality of region patterns having a width of a predetermined range. ..

【0010】

Further, the third invention of the present application is characterized in that, in the first invention, the pattern dividing means divides the layout pattern into a plurality of region patterns having an area of a predetermined range. ..

【0011】

Further, in the fourth invention of the present application, in the first invention, the pattern classification means divides a plurality of region patterns by the pattern dividing means into a set of patterns having a predetermined interval or more from each other. It is characterized by being classified into.

【0012】

Further, in the fifth invention of the present application, in the first invention, the pattern classification means divides a plurality of region patterns by the pattern dividing means, and the pattern density in the predetermined region is within a predetermined range. It is characterized by classifying into a set of patterns that fits in.

【0013】

Further, the sixth invention of the present application is a pattern division step for dividing a circuit layout pattern into a plurality of region patterns based on a predetermined division rule, and a plurality of regions divided in the pattern division step. It is characterized by having a pattern classification step of classifying patterns for each different mask based on a predetermined classification rule.

【0014】

Further, the seventh invention of the present application is characterized in that, in the sixth invention, the pattern division step divides the layout pattern into a plurality of region patterns having a width of a predetermined range. Is.

【0015】

Further, the eighth invention of the present application is characterized in that, in the sixth invention, the pattern dividing step divides the layout pattern into a plurality of region patterns having an area of a predetermined range. Is.

【0016】

Further, in the ninth invention of the present application, in the sixth invention, the pattern classification step is a set of patterns in which a plurality of region patterns divided in the pattern division step are spaced apart from each other by a predetermined value or more. It is characterized by being classified into.

【0017】

Further, in the tenth invention of the present application, in the sixth invention, the pattern classification step divides a plurality of region patterns in the pattern division step, and the pattern density in the predetermined region is within a predetermined range. It is characterized by classifying into a set of patterns that fits in.

【0018】

Further, the eleventh invention of the present application is a pattern dividing step for dividing a circuit layout pattern into a plurality of region patterns based on a predetermined division rule, and a plurality of regions divided in the pattern division step. It is characterized by having a pattern classification step of classifying patterns for each different mask based on a predetermined classification rule.

【0019】

Further, the twelfth invention of the present application is characterized in that, in the eleventh invention, the pattern division step divides the layout pattern into a plurality of region patterns having a predetermined range width. Is.

【0020】

Further, the thirteenth invention of the present application is characterized in that, in the eleventh invention, the pattern division step divides the layout pattern into a plurality of region patterns having an area of a predetermined range. Is.

【0021】

Further, in the fourteenth invention of the present application, in the eleventh invention, the pattern classification step is a set of patterns in which a plurality of region patterns divided by the pattern division step are spaced apart from each other by a predetermined value or more. It is characterized by being classified into.

【0022】

Further, in the fifteenth invention of the present application, in the eleventh invention, the pattern classification step divides a plurality of region patterns by the pattern division step, and the pattern density in the predetermined region is within a predetermined range. It is characterized by classifying into a set of patterns that fits in.

【0023】

Further, the 16th invention of the present application is a recording medium in which a program for controlling a layout pattern data correction device for correcting pattern distortion generated in a semiconductor device manufacturing process is recorded, and a circuit layout pattern is defined. A procedure for dividing into a plurality of area patterns based on the division rule of the above, and a procedure for classifying a plurality of area patterns divided in the procedure for dividing the pattern into different masks based on a predetermined classification rule. The feature is that the program for causing the correction device to execute is recorded.

【0024】

Further, the 17th invention of the present application is characterized in that, in the 16th invention, the layout pattern is divided into a plurality of region patterns having a predetermined range width in the procedure for dividing the pattern. It was done.

【0025】

Further, the eighteenth invention of the present application is characterized in that, in the above sixteenth invention, in the procedure for dividing the pattern, the layout pattern is divided into a plurality of region patterns having an area within a predetermined range. It was done.

【0026】

Further, in the nineteenth invention of the present application, in the sixteenth invention, in the procedure for classifying the patterns, a plurality of region patterns divided by the procedure for dividing the patterns are spaced apart from each other by a predetermined value or more. It is characterized by classifying into a set of patterns having.

【0027】

Further, in the 20th invention of the present application, in the 16th invention, in the procedure for classifying the patterns, a plurality of region patterns divided by the procedure for dividing the patterns are divided into pattern densities within a predetermined region. Is classified into a set of patterns that fall within a predetermined range.

【0028】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. Embodiment 1. FIG. 1 is a diagram showing a configuration of a layout pattern data correction device according to a first embodiment of the present invention. The correction device 10 is held by the layout pattern data holding unit 1 that holds the layout pattern, the dividing rule holding unit 2 that holds the rules in which the conditions for dividing the pattern are described, and the dividing rule holding unit 2. The pattern division unit 3 that divides the pattern based on the divided patterns, the classification rule holding unit 4 that holds the rules for classifying the divided patterns, and the classification rule holding unit 4 that holds the rules are different. A pattern classification unit 5 that classifies the layout pattern data of the mask, a plurality of division / classification layout pattern data holding units 6 that hold the layout pattern data after division / classification, and an OPC rule for correcting the layout pattern data. An OPC rule holding unit 7 to hold, an OPC processing unit 8 that performs OPC based on the OPC rule held in the OPC rule holding unit 7, and a plurality of post-OPC layout pattern data holding units that hold layout pattern data after OPC. Has 9 and.

【0029】

The layout pattern data correction device 10 can be configured by, for example, an information processing device having a hardware configuration as shown in FIG. In this case, when the CPU 502 of the information processing device executes a predetermined control program, the functions of each part shown in FIG. 2, that is, the operation of the layout pattern data correction device described later can be realized. In this case, the program executed by the CPU 502 is provided by an information recording medium such as a CD-ROM520.

【0030】

In FIG. 2, the layout pattern data correction device 10 has a CPU (central processing unit) 502 that executes a control program, and the CPU 502 includes a RAM (random access memory) 503 that stores programs and data via a bus 501. ROM (read-only memory) 505, display unit 513 that displays information, operation unit 511 that consists of a keyboard, mouse, etc. and is operated by the user, network interface unit 515 for connecting to network 200 such as LAN, external information equipment It is configured to be connected to the external interface unit 517 for connecting to. Further, the correction device 10 includes a hard disk device 507 as an auxiliary storage device and a CD drive 509 which is a device for reading programs and data from a CD-ROM which is an information recording medium.

【0031】

FIG. 3 is a flowchart of OPC processing by the layout pattern data correction device having such a configuration. When the OPC process starts, the layout pattern is first divided into a plurality of area patterns based on a predetermined division rule (S10). Next, it is confirmed whether or not the division of all layout patterns is completed (S11), and if it is determined that the division is completed (YES), the process proceeds to S12. On the other hand, if it is determined that the division has not been completed (NO), the process returns to S10 and the layout pattern is continuously divided.

【0032】

In S12, a plurality of area patterns are classified into a group consisting of one or a plurality of area patterns for each different mask based on a predetermined classification rule. Next, it is confirmed whether or not the classification of all area patterns is completed (S13). If it is determined that the classification is not completed (NO), the process returns to S12, and the area pattern is continuously classified. On the other hand, if it is determined that the classification is completed (YES), the OPC process is executed for each group based on the predetermined OPC rule (S14). This completes the OPC process.

【0033】

Next, the above OPC process will be described by taking the layout pattern of the metal wiring shown in FIG. 4 as an example. The layout pattern 15 is composed of first, second and third patterns 16, 17 and 18 separated by predetermined intervals. First, these patterns 16, 17 and 18 are divided into a plurality of region patterns. At the time of this division, a predetermined division rule held in the division rule holding unit 2 is referred to. In the first embodiment, based on the referenced division rule, the patterns 16, 17 and 18 are divided so as to be composed of region patterns having the same line width. Here, each pattern is divided with reference to the line width of the first pattern 16. The line width is a width along the width direction (horizontal direction in the drawing) of the patterns 16, 17 and 18.

【0034】

FIG. 5 shows a layout pattern after division, which is composed of a plurality of region patterns having the same line width. The first pattern 16 is composed of region patterns 19, the second pattern 17 is composed of region patterns 20 and 21, and the third pattern 18 is composed of region patterns 22, 23, 24. ing. Subsequently, these region patterns 19 to 24 are classified into a group consisting of one or a plurality of region patterns for each different mask. In this classification, a predetermined classification rule held in the classification rule holding unit 4 is referred to.

【0035】

Figures 6 (a) and 6 (b) show the first and second groups classified according to the referenced classification rules, respectively. These first and second groups consist of region patterns that are not adjacent to each other, the first group is composed of region patterns 19, 21, 22 and 24, and the second group is region pattern 20. , 23. Subsequently, these first and second groups are OPC-processed. In this OPC processing, a predetermined OPC rule held in the OPC rule holding unit 7 is referred to. Table 2 shows the correction amount based on the line width of the pattern to be corrected and the distance from the adjacent pattern as such an OPC rule. The distance from the adjacent pattern is the distance from the side edge portion of the pattern to be corrected to the side edge portion of the adjacent pattern.

[Table 2]

<img file="JP2002107902A_D0002.tif" />As can be clearly seen from Table 2, in the first embodiment, the line widths of the area patterns constituting the first and second groups are the same, so that only the interval between the adjacent area patterns is used during the OPC processing. You can consider it. Table 2 shows the correction amount corresponding to the distance (0.20 μm or more) from the adjacent region pattern for the region pattern whose line width is 0.20 μm or more and less than 0.25 μm. From Table 2, the correction amount corresponding to the interval between the adjacent area patterns is acquired for each area pattern, and each area pattern is corrected in the width direction based on the acquired correction amount.

【0036】

Figures 7 (a) and 7 (b) show the first and second groups after OPC processing of each region pattern, respectively. The correction amount acquired for each area pattern from Table 2 is a positive value. Therefore, correction patterns 25 to 34 corresponding to the correction amount are added to both sides or one side of each area pattern. After OPC, mask drawing data is created based on each pattern constituting the first and second groups shown in FIG. 6, and two different masks are created. Then, by exposing and etching with these masks, a target pattern is formed on the wafer.

【0037】

As described above, in the first embodiment, the original layout pattern 15 is divided into a plurality of area patterns having the same line width and then corrected. Therefore, in the OPC processing, the area pattern to be corrected is determined. Only the spacing between adjacent patterns needs to be considered, which simplifies the description of the OPC rule that should be held in the OPC rule holding unit 7.

【0038】

Hereinafter, another embodiment of the present invention will be described. Embodiment 2. In the above-described first embodiment, the original layout pattern is divided so that the line widths of the area patterns are the same. , The width of the area pattern may not be the same, such as when duplication of the area patterns after division is prohibited. In the second embodiment, in order to deal with this, the width of the region pattern is divided into several types, and the region patterns are classified so as to secure a predetermined interval or more.

【0039】

FIG. 8 shows a pattern in which the layout pattern 15 shown in FIG. 4 is divided into region patterns having two types of widths. In this pattern, the pattern corresponding to the third pattern 18 is the area pattern based on the width of the area pattern 47 corresponding to the first pattern 16 and the width of the area pattern 48 corresponding to the second pattern 17. It is divided into a region pattern 49 having a width range equal to 47 (0.20 μm or more and less than 0.25 μm) and a region pattern 50 having a width range equal to region pattern 48 (0.35 μm or more and less than 0.40 μm). Subsequently, these region patterns 47 to 50 are classified into a group consisting of one or a plurality of region patterns for each different mask. In this classification, a predetermined classification rule held in the classification rule holding unit 4 is referred to. In the second embodiment, the area patterns 47 to 50 are classified based on the referenced classification rule so that the space between the area patterns is secured at a predetermined time or more.

【0040】

Figures 9 (a) and 9 (b) show the first, second, and third groups that are classified based on the referenced classification rules, respectively. These first, second, and third groups are composed of region patterns in which intervals of a predetermined value or more are secured, the first group is composed of region patterns 47 and 50, and the second group is. , The area pattern 48, and further, the third group is composed of the area pattern 49. Subsequently, these first, second, and third groups are OPC-processed. In this OPC processing, a predetermined OPC rule held in the OPC rule holding unit 7 is referred to. Table 3 shows the correction amount based on the line width of the pattern to be corrected and the distance from the adjacent pattern as such an OPC rule.

[Table 3]

<img file="JP2002107902A_D0003.tif" />As can be clearly seen from Table 3, in the second embodiment, the width of the region pattern is limited to two types, and the spacing between the region patterns constituting the first and second groups is secured at a predetermined value or more. , In the OPC processing, it is sufficient to consider only the region pattern having an interval of a predetermined distance or more from the adjacent pattern. Table 3 shows the correction amount corresponding to the interval of 0.50 μm or more for the region pattern in which the line width is 0.20 μm or more and less than 0.25 μm and 0.35 μm or more and less than 0.40 μm. From Table 3, the correction amount corresponding to the interval between the adjacent area patterns is acquired for each area pattern, and each area pattern is corrected in the width direction based on the acquired correction amount.

【0041】

Figures 10 (a), (b) and (c) show the first, second and third groups after OPC processing of each region pattern, respectively. The correction amount acquired for each area pattern from Table 3 is a positive value. Therefore, correction patterns 51 to 58 corresponding to the correction amount are added to both sides of each area pattern. After OPC, mask drawing data is created based on each pattern constituting the first, second, and third groups shown in FIG. 10, and three different masks are created. Then, by exposing and etching with these masks, a target pattern is formed on the wafer.

【0042】

As described above, in the second embodiment, the original layout pattern 15 is divided into a plurality of region patterns, further classified into a group composed of region patterns having a predetermined interval or more, and then corrected. In the OPC processing, only the adjacent patterns and the patterns having a predetermined interval or more need to be considered, which makes it possible to simplify the description of the OPC rule to be held in the OPC rule holding unit 7.

【0043】

Embodiment 3. FIG. 11 shows the area pattern after the layout pattern division according to the third embodiment of the present invention. In the third embodiment, the first, second and third patterns 16, 17 and 18 (see FIG. 4) have the same area for each pattern and the pattern length direction (vertical in the figure). It is divided into area patterns arranged in the direction). That is, the area patterns 67,68 that form the first pattern 16, the area patterns 69,70,71 that form the second pattern 17, and the area patterns 72,73,74, that form the third pattern 18. The 75 and 76 have the same area, although they differ in shape from each other. Subsequently, these region patterns 67 to 76 are classified into a group consisting of a plurality of region patterns for each different mask. In this classification, a predetermined classification rule held in the classification rule holding unit 4 is referred to.

【0044】

Figures 12 (a) and 12 (b) show the first and second groups classified according to the referenced classification rules, respectively. These first and second groups consist of region patterns that are not adjacent to each other, the first group consists of region patterns 67,69,71,72,74,76, and the second group , Area pattern 68,70,73,75. Subsequently, these first and second groups are OPC-processed. In this OPC processing, a predetermined OPC rule held in the OPC rule holding unit 7 is referred to. Table 4 shows the amount of correction based on the area of the pattern to be corrected as such an OPC rule.

[Table 4]

<img file="JP2002107902A_D0004.tif" />As can be clearly seen from Table 4, in the third embodiment, the original layout pattern is divided into region patterns having the same area, and therefore the correction amount is determined based only on the area. Table 4 shows the area of 0.12 μm.²More than 0.14 μm²A correction amount of -0.01 is shown for region patterns that are less than. From this Table 4, the same correction amount is acquired for all region patterns 67 to 76 constituting the first and second groups shown in FIGS. 12 (a) and 12 (b), and each correction amount is obtained based on the acquired correction amount. The region pattern is corrected for its length and width directions.

【0045】

13 (a) and 13 (b) show the first and second groups after OPC processing of each region pattern, respectively. The correction amount obtained for the area patterns 67 to 76 from Table 4 is a negative value. Therefore, in the OPC processing, the area patterns 87 to 96 are smaller in the length direction and the width direction than the area patterns 67 to 76. It is corrected so as to be. After OPC, mask drawing data is created based on the area patterns 87 to 96 constituting the first and second groups shown in FIG. 13, and two different masks are created. Then, by exposing and etching with these masks, a target pattern is formed on the wafer.

【0046】

As described above, in the third embodiment, since the original layout pattern 15 is divided into the area patterns having the same area and then corrected, the description of the OPC rule to be held in the OPC rule holding unit 7 is simplified. can do.

【0047】

Embodiment 4. FIG. 14 shows layout patterns 97 and 98 of the gold wire wiring according to the fourth embodiment of the present invention. The plurality of square blocks around the layout patterns 97 and 98 are the density increasing patterns 99 set to improve the pattern density. As shown in FIG. 15, each of these layout patterns 97 and 98 is divided so as to be composed of a region pattern 100 composed of the smallest rectangular blocks. Subsequently, as shown in FIGS. 16A and 16B, block regions having pattern densities, each of which falls within a predetermined range, are set, and the region pattern 100 is included in the block regions 101 and 103 including the region pattern 100. , Classified by different masks. At this time, patterns for improving density that do not require dimensional accuracy are used in duplicate to ensure a constant pattern density. After that, the patterns shown in FIGS. 16 (a) and 16 (b) are OPC-processed. In this OPC processing, a predetermined OPC rule held in the OPC rule holding unit 7 is referred to. Table 5 shows the amount of correction based on the density of each block area as such an OPC rule.

【0048】

[Table 5]

<img file="JP2002107902A_D0005.tif" />As can be clearly seen from Table 5, in the fourth embodiment, the correction amount is determined based on the density within a predetermined range. Table 5 shows the correction amount of -0.010 for the block area where the density is greater than 10% and less than 40%. From Table 5, a correction amount is acquired for each block region, and the region pattern 100 and the density improving pattern 99 are corrected in the length direction and the width direction based on the acquired correction amount.

【0049】

Figures 17 (a) and 17 (b) show the first and second groups after OPC processing of each region pattern, respectively. The correction amount obtained for each block area from Table 5 is a negative value. Therefore, in the OPC processing, the area pattern 104 and the area pattern 104 which are smaller in the length direction and the width direction than the area pattern 100 and the density improvement pattern 99. It is corrected so that it becomes the density improvement pattern 105. After OPC, mask drawing data is created based on each region pattern 104 and density improvement pattern 105 shown in FIG. 17, and two different masks are created. Then, by exposing and etching with these masks, a target pattern is formed on the wafer.

【0050】

As described above, in the fourth embodiment, in order to classify the area patterns constituting the original layout pattern so as to have a density within a predetermined range, the description of the OPC rule to be held in the OPC rule holding unit 7 is simplified. Can be transformed into.

【0051】

It goes without saying that the present invention is not limited to the illustrated embodiments, and various improvements and design changes can be made without departing from the gist of the present invention.

【0052】

[Effect of the invention]

According to the invention of claim 1 of the present application, a pattern dividing means for dividing a circuit layout pattern into a plurality of area patterns based on a predetermined division rule, and a plurality of area patterns divided by the pattern dividing means. Is provided with a pattern classification means for classifying each different mask based on a predetermined classification rule, so that the description of the OPC rule can be simplified.

【0053】

Further, according to the invention of claim 2 of the present application, the pattern dividing means divides the layout pattern into a plurality of region patterns having a width of a predetermined range, so that the description of the OPC rule can be simplified. it can.

【0054】

Further, according to the invention of claim 3 of the present application, the pattern dividing means divides the layout pattern into a plurality of area patterns having an area of a predetermined range, so that the description of the OPC rule can be simplified. it can.

【0055】

Further, according to the invention of claim 4 of the present application, the pattern classification means classifies a plurality of region patterns divided by the pattern dividing means into a set of patterns having a predetermined interval or more from each other. , The description of OPC rules can be simplified.

【0056】

Further, according to the invention of claim 5 of the present application, the pattern classification means is a pattern in which the pattern density in a predetermined region is within a predetermined range for a plurality of region patterns divided by the pattern dividing means. Since it is classified into groups, the description of OPC rules can be simplified.

【0057】

According to the invention of claim 6 of the present application, a pattern division step of dividing a circuit layout pattern into a plurality of region patterns based on a predetermined division rule, and a plurality of region patterns divided in the pattern division step. Has a pattern classification step for classifying each different mask based on a predetermined classification rule, so that the description of the OPC rule can be simplified.

【0058】

Further, according to the invention of claim 7, the pattern division step divides the layout pattern into a plurality of area patterns having a width of a predetermined range, so that the description of the OPC rule can be simplified. it can.

【0059】

Further, according to the invention of claim 8 of the present application, the pattern division step divides the layout pattern into a plurality of area patterns having an area of a predetermined range, so that the description of the OPC rule can be simplified. it can.

【0060】

Further, according to the invention of claim 9 of the present application, the pattern classification step classifies a plurality of region patterns divided in the pattern division step into a set of patterns having a predetermined interval or more from each other. , The description of OPC rules can be simplified.

【0061】

Further, according to the invention of claim 10 of the present application, the pattern classification step is a pattern in which the pattern density in a predetermined region is within a predetermined range for a plurality of region patterns divided by the pattern division step. Since it is classified into groups, the description of OPC rules can be simplified.

【0062】

According to the invention of claim 11 of the present application, a pattern division step for dividing a circuit layout pattern into a plurality of region patterns based on a predetermined division rule, and a plurality of region patterns divided in the pattern division step. Has a pattern classification step for classifying each different mask based on a predetermined classification rule, so that the description of the OPC rule can be simplified.

【0063】

Further, according to the invention of claim 12, the pattern division step divides the layout pattern into a plurality of area patterns having a width of a predetermined range, so that the description of the OPC rule can be simplified. it can.

【0064】

Further, according to the invention of claim 13, the pattern division step divides the layout pattern into a plurality of area patterns having an area of a predetermined range, so that the description of the OPC rule can be simplified. it can.

【0065】

Further, according to the invention of claim 14 of the present application, the pattern classification step classifies a plurality of region patterns divided in the pattern division step into a set of patterns having a predetermined interval or more from each other. , The description of OPC rules can be simplified.

【0066】

Further, according to the invention of claim 15 of the present application, the pattern classification step is a pattern in which the pattern density in a predetermined region is within a predetermined range for a plurality of region patterns divided by the pattern division step. Since it is classified into groups, the description of OPC rules can be simplified.

【0067】

According to the invention of claim 16 of the present application, it is a recording medium on which a program for controlling a layout pattern data correction device for correcting pattern distortion generated in a semiconductor device manufacturing process is recorded, and a circuit layout pattern is set to a predetermined value. A procedure for dividing into a plurality of area patterns based on a division rule and a procedure for classifying a plurality of area patterns divided by the procedure for dividing the pattern into different masks based on a predetermined classification rule. Since the program to be executed by the correction device is recorded, the description of the OPC rule can be simplified.

【0068】

Further, according to the invention of claim 17 of the present application, in the procedure for dividing the pattern, the layout pattern is divided into a plurality of area patterns having a width of a predetermined range, so that the description of the OPC rule is simplified. be able to.

【0069】

Further, according to the invention of claim 18 of the present application, in the procedure for dividing the pattern, the layout pattern is divided into a plurality of area patterns having an area of a predetermined range, so that the description of the OPC rule is simplified. be able to.

【0070】

Further, according to the invention of claim 19 of the present application, in the procedure for classifying the patterns, a set of patterns having a predetermined interval or more between a plurality of region patterns divided by the procedure for dividing the patterns. Since it is classified into, the description of the OPC rule can be simplified.

【0071】

Further, according to the invention of claim 20 of the present application, the pattern density in a predetermined region is within a predetermined range for a plurality of region patterns divided by the procedure for dividing the pattern in the pattern classification step. Since it is classified into a set of patterns, the description of the OPC rule can be simplified.

[Simple explanation of drawings]

[Figure 1]

It is a figure which shows the structure of the layout pattern data correction apparatus which concerns on Embodiment 1 of this invention.

[Figure 2]

It is a hardware block diagram of the said layout pattern data correction apparatus.

[Fig. 3]

This is a flow chart of correction processing by the layout pattern data correction device.

[Fig. 4]

It is a figure which shows the layout pattern of a metal wiring.

[Fig. 5]

It is a figure which shows the layout pattern after pattern division.

[Fig. 6]

(a) It is a figure which shows the 1st layout pattern after classification. (b) It is a figure which shows the 2nd layout pattern after classification.

[Fig. 7]

(a) It is a figure which shows the 1st layout pattern after OPC. (b) It is a figure which shows the 2nd layout pattern after OPC.

[Fig. 8]

It is a figure which shows the layout pattern after pattern division which concerns on Embodiment 2 of this invention.

[Fig. 9]

(a) It is a figure which shows the 1st layout pattern after classification which concerns on Embodiment 2 above. (b) It is a figure which shows the 2nd layout pattern after classification which concerns on Embodiment 2 above. (c) It is a figure which shows the 3rd layout pattern after classification which concerns on Embodiment 2 above.

[Fig. 10]

(a) It is a figure which shows the 1st layout pattern after OPC which concerns on Embodiment 2 above. (b) It is a figure which shows the 2nd layout pattern after OPC which concerns on Embodiment 2 above. (c) It is a figure which shows the 3rd layout pattern after OPC which concerns on Embodiment 2 above.

[Fig. 11]

It is a figure which shows the layout pattern after pattern division which concerns on Embodiment 3 of this invention.

[Fig. 12]

(a) It is a figure which shows the 1st layout pattern after classification which concerns on Embodiment 3 above. (b) It is a figure which shows the 2nd layout pattern after classification which concerns on Embodiment 3 above.

[Fig. 13]

(a) It is a figure which shows the 1st layout pattern after OPC which concerns on Embodiment 3 above. (b) It is a figure which shows the 2nd layout pattern after OPC which concerns on Embodiment 3 above.

[Fig. 14]

It is a figure which shows the layout pattern of the metal wiring which concerns on Embodiment 4 of this invention.

[Fig. 15]

It is a figure which shows the layout pattern after the pattern division which concerns on the said Embodiment 4.

[Fig. 16]

(a) It is a figure which shows the 1st layout pattern after classification which concerns on Embodiment 4 above. (b) It is a figure which shows the 2nd layout pattern after classification which concerns on Embodiment 4 above.

[Fig. 17]

(a) It is a figure which shows the 1st layout pattern after OPC which concerns on Embodiment 4 above. (b) It is a figure which shows the 2nd layout pattern after OPC which concerns on Embodiment 4 above.

[Explanation of symbols]

1 layout pattern holding part, 2 division rule holding part, 3 pattern dividing part, 4 classification rule holding part, 5 pattern classification part, 6 division and post-classification layout pattern data holding part, 7 OPC rule holding part, 8 OPC processing part, 9 Layout pattern data holder after OPC, 10 Layout pattern correction device, 520 CD-ROM