Infrared sensor and its manufacturing method

Description: TECHNICAL FIELD [Detailed description of the invention]

The present invention relates to an infrared sensor and a method for manufacturing the same, and more particularly to a low-cost, high-sensitivity uncooled infrared sensor and a method for manufacturing the same.

【0001】

[Technical field to which the invention belongs]

【0002】

[Conventional technology]

Infrared imaging has the features of being able to image day and night, having higher transparency to smoke and fog than visible light, and also being able to obtain temperature information of the subject, so it can be used in the defense field as well. It has a wide range of applications as a surveillance camera and a fire detection camera.

【0003】

In recent years, the development of an "uncooled infrared solid-state image sensor" that does not require a cooling mechanism for low-temperature operation, which is the biggest drawback of the conventional quantum-type infrared solid-state image sensor, has become active. .. In a non-cooling type, that is, a thermal type infrared solid-state imaging device, incident infrared rays having a wavelength of about 10 μm are converted into heat by an absorption structure, and then the temperature change of the heat-sensitive part caused by this weak heat is electrically converted by some thermoelectric conversion means. Infrared image information is obtained by converting to a signal and reading out this electrical signal.

【0004】

In order to improve the sensitivity of such an uncooled infrared sensor, there are roughly three types of methods.

【0005】

The first method is a method of improving the ratio of the infrared power dP incident on the infrared detection unit, that is, dP / dTs, to the temperature change dTs of the subject. This method mainly improves the sensitivity by the optical system, such as increasing the diameter of the infrared lens, using an antireflection film coating, using a low absorption lens material, improving the infrared absorption rate of the infrared detector, and improving the infrared absorption area. Corresponds to this. With the recent increase in the number of pixels of uncooled infrared sensors, the size of a unit pixel is mainly about 40 μm × 40 μm, and among the above items, improving the infrared absorption area in the infrared detector is a relatively important issue. Was left as. However, it has been reported that the infrared absorption area was improved to about 90% of the pixel area by laminating the infrared absorption layer on the upper part of the pixel (Tomohiro Ishikawa, et al., Proc. SPIE Vol.3698, p.556). , 1999), it is difficult to obtain a further significant improvement in sensitivity by optical means.

【0006】

The second method is to improve the ratio of the incident infrared power dP to the temperature change dTd of the infrared detector, that is, dTd / dP. It can be said that it is a thermal method. Generally, in an uncooled infrared sensor mounted on a vacuum package, heat transport from the infrared detection unit to the support substrate currently has a support structure that supports the infrared detection unit on a hollow structure inside the support substrate. It is dominated by heat conduction through infrared rays. Therefore, leg-shaped support structures made of materials with low thermal conductivity are laid out as thinner and longer as possible by design (for example, Tomohiro Ishikawa, et al., Proc.SPIE Vol). .3698, p.556, 1999).

【0007】

Further, an infrared sensor having a leg-shaped support structure will be described. FIG. 22 is a cross-sectional view for explaining the cross-sectional structure of the infrared detection pixel in the infrared sensor having the conventional support leg structure. As shown in this figure, SOI (Silicon On) composed of a silicon substrate 506, an embedded oxide film 508, and a single crystal silicon film 509. In the Insulator) substrate, an infrared detector is formed on the patterned single crystal silicon film 509. This infrared detector uses a silicon pn junction, which will be described later. A part of the single crystal silicon film 509 under the single crystal silicon film pattern 509 is removed by etching to form a hollow structure 507. An insulating film 510 is formed on the single crystal silicon film 509, and a laminated structure composed of a reflective layer 501, an insulating layer 502, and an infrared absorber layer 503 is formed on the silicon oxide film 510. In this laminated structure, infrared rays are absorbed and converted into heat, the heat generated here is transmitted to the infrared detection unit of the single crystal silicon film 509, and the temperature change due to heat is converted into a voltage change. The electrical signal generated by the voltage change is transmitted to the wiring 517 of the peripheral circuit via the wiring 516. In FIG. 22, the wiring 516 and the insulating film 510 surrounding the wiring 516 form a support leg structure, and the single crystal silicon film pattern 509 is supported on the substrate by this support leg structure.

【0008】

However, while the pixel size is being miniaturized to about 40 μm × 40 μm, we have already performed microfabrication at the silicon LSI process level, and by devising the layout of the support structure, we will realize a further significant improvement in sensitivity. It's difficult. Similarly, it is difficult to further reduce the thermal conductivity, which is a material property of the support structure. In particular, the wiring for outputting an electric signal from the infrared detector has a similar mechanism. There are conflicting requirements for heat conduction, and it is difficult to achieve a significant improvement in sensitivity in terms of materials.

【0009】

The third method is a means for improving the ratio of the temperature change dTd of the infrared detector to the electric signal change dS generated by the thermoelectric conversion means, that is, dS / dTd, which is an electrical method. Unlike the other two methods, it is very important to reduce various electrical noises that occur at the same time while aiming for simple high sensitivity, that is, improvement of dS / dTd. So far, various thermoelectric conversion means have been studied.

【0010】

For example, a thermopile that converts a temperature difference into a potential difference by the Seebeck effect (for example, Toshio Kanno, et al., Proc. SPIE Vol.2269, pp.450-459, 1994). Bolometers that convert to (eg, A.Wood, Proc. IEDM, pp.175-177, 1993), charcoal elements that convert temperature changes into charges by the electrothermal effect (eg, Charles Hanson, et al., Proc. SPIE Vol.2020, pp.330-339, 1993), and a silicon pn junction that converts temperature changes into voltage changes with a constant forward current (eg, Tomohiro Ishikawa, et al., Proc. SPIE Vol.3698, p. 556, 1999) etc. have been reported.

【0011】

Of these, an infrared detection element using a silicon pn junction will be further described. FIG. 23 is a perspective view for explaining the structure of the infrared detection pixel using the lateral type pn junction. As shown in this figure, a silicon layer pattern 609 is formed on a laminated structure of a silicon substrate 607 and an insulating film 608, and a pn junction is formed in each silicon layer pattern 609. A connection wiring 617 is provided between these silicon layer patterns 609, and the pn junction of the silicon layer pattern 609 is connected in series by the connection wiring 617. According to such a structure, a larger voltage change can be obtained by connecting the pn junction in series, and the detection sensitivity can be improved.

【0012】

However, in reality, when comparing each method, it cannot be said that there is a method that is decisively superior to other methods in terms of its thermoelectric conversion characteristics, noise characteristics, and manufacturing method. At present, the bolometer is excellent in terms of temperature resolution, but in the manufacturing process, the silicon pn junction that can be manufactured only by the silicon LSI process is excellent.

【0013】

[Problems to be Solved by the Invention]

As described above, as one of the methods for increasing the sensitivity of the uncooled infrared sensor, the ratio of the incident infrared power dP to the temperature change dTd of the infrared detector, that is, dTd / dP is improved. There are various methods. In general, heat transport from the infrared detector to the support substrate is dominated by heat conduction through the support structure that supports the infrared detector on the hollow structure inside the support substrate, and is a material with low thermal conductivity. The leg-shaped support structure consisting of the above is being laid out as thinner and longer as possible by design, but as the pixel size is being miniaturized to about 40 μm × 40 μm, it is more than this. It is becoming difficult to achieve a significant improvement in sensitivity.

【0014】

Further, in order to read out a signal from the infrared detection unit, it is necessary to form a unique wiring layer made of a low thermal conductivity material in the support wiring formed inside the support structure. For example, the support wiring using a titanium material is used. The effectiveness of the structure is known.

【0015】

However, when this titanium itself is used, a step of forming only the support wiring structure is required separately from the wiring forming step in the element peripheral circuit, and the process is inevitably complicated.

【0016】

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a low-cost, high-sensitivity uncooled infrared sensor and a method for manufacturing the same by a simpler process.

【0017】

[Means for solving problems]

(Structure) In order to solve the above-mentioned problems, the first aspect of the present invention is an infrared absorbing portion formed on a substrate and absorbing infrared rays, and a temperature due to infrared rays formed on the substrate and absorbed by the infrared absorbing portion. Each has a thermoelectric conversion unit that converts a change into an electric signal, and a support structure that supports the thermoelectric conversion unit on the substrate via a gap and has a wiring for outputting the electric signal from the thermoelectric conversion unit. Then, the plurality of infrared detection pixels arranged on the substrate, the pixel selection means for selecting the pixel to which the electric signal should be output from the plurality of infrared detection pixels, and the selected infrared detection pixels are described. An infrared sensor including an output means for outputting an electric signal via the wiring. At least one of the pixel selection means and the output means is composed of a circuit having a MOS type transistor, and the wiring is the MOS. Provided is an infrared sensor characterized in that it is formed in the same layer as the gate of a type transistor.

【0018】

In the first aspect of the present invention, it is desirable to have the following configuration.

【0019】

(1) The wiring and the gate are each composed of a laminated structure including a polycrystalline silicon layer and a metal silicide layer.

【0020】

(2) The wiring and the gate are each composed of a laminated structure including a polycrystalline silicon layer and a metal layer.

【0021】

(3) A side wall insulating film is formed on the side wall of the gate layer of the MOS transistor, and a first insulating film is formed so as to cover the side surface and the upper surface of the wiring of the support structure. It shall be formed in the same layer as the side wall insulating film of the MOS transistor.

【0022】

The second aspect of the present invention is an infrared absorbing unit formed on a substrate and absorbing infrared rays, and a thermoelectric conversion unit formed on the substrate and converting a temperature change due to infrared rays absorbed by the infrared absorbing unit into an electric signal. The thermoelectric conversion unit is supported on the substrate via a gap, and the thermoelectric conversion unit has a support structure having a wiring for outputting the electric signal from the thermoelectric conversion unit, and the thermoelectric conversion unit is arranged on the substrate. A pixel selection means for selecting a plurality of infrared detection pixels, a pixel to which the electric signal should be output from the plurality of infrared detection pixels, and the electric signal being output from the selected infrared detection pixels via the wiring. An infrared sensor including an output means, wherein at least one of the pixel selection means and the output means is composed of a circuit having a MOS transistor, and a side wall insulating film is provided on the side wall of the gate layer of the MOS transistor. The insulating film of the support structure is formed and has a first insulating film covering the side surface and the upper surface of the wiring, and the first insulating film is formed in the same layer as the side wall insulating film of the MOS transistor. Provided is an infrared sensor characterized by being a transistor.

【0023】

In the second aspect of the present invention, a first insulating film is formed so as to cover the side surface and the upper surface of the wiring of the support structure, and further, the said invention is formed on at least one side of the first insulating film and below the wiring. It is desirable that a second insulating film having a width narrower than that of the first insulating film is formed.

【0024】

The third aspect of the present invention is an infrared absorbing unit formed on a substrate and absorbing infrared rays, and a thermoelectric conversion unit formed on the substrate and converting a temperature change due to infrared rays absorbed by the infrared absorbing unit into an electric signal. And, the thermoelectric conversion unit is supported on the substrate via a gap, and each has a support structure having a wiring for outputting the electric signal from the thermoelectric conversion unit, and the thermoelectric conversion unit is arranged on the substrate. A pixel selection means for selecting a plurality of infrared detection pixels, a pixel to which the electric signal should be output from the plurality of infrared detection pixels, and the selected infrared detection pixel to output the electric signal via the wiring. An infrared sensor including an output means, wherein the insulating film of the support structure has a first insulating film covering the side surface and the upper surface of the wiring, and further on the first insulating film and under the wiring. An infrared sensor characterized by having a second insulating film narrower than the first insulating film on at least one side.

【0025】

In the second and third aspects of the present invention, it is desirable that the first insulating film is made of silicon nitride and the second insulating film is made of silicon oxide.

【0026】

Furthermore, it is desirable to have the following configurations in the first to third aspects of the present invention described above.

【0027】

(1) The substrate comprises a single crystal silicon support substrate, a silicon oxide layer formed on the single crystal silicon support substrate, and a single crystal silicon layer formed on the silicon oxide layer. The conversion part shall be formed on the single crystal silicon layer.

【0028】

(2) The bottom surface of the wiring of the support structure is exposed to the gap on the substrate.

【0029】

(3) The thermoelectric conversion unit is exposed to the voids on the substrate.

【0030】

(4) The thermoelectric conversion unit is formed in a single crystal semiconductor layer, and is composed of a pn junction between a first conductive type region and a second conductive type region formed in the single crystal semiconductor layer.

【0031】

(5) The infrared absorber shall be formed by laminating a silicon nitride film on a silicon oxide film.

【0032】

(6) The second insulating film on the first insulating film is formed of the same layer as the silicon oxide film of the infrared absorbing portion.

【0033】

Further, the fourth aspect of the present invention is to provide a substrate with a plurality of infrared detection pixels each having an infrared absorbing unit that absorbs infrared rays and a thermoelectric conversion unit that converts a temperature change due to infrared rays absorbed by the infrared absorbing unit into an electric signal. A step of arranging and forming the conductive film on the substrate, a step of forming a conductive film on the substrate, and patterning the conductive film to form a first conductive layer pattern from the conductive film in the formation region of the infrared detection pixel. At the same time, a step of forming a second conductive layer pattern from the conductive film in a region other than the formation region of the infrared detection pixel, and etching a portion of the substrate under the first conductive layer pattern to perform the plurality of. A support structure is formed in which the thermoelectric conversion unit of each infrared detection pixel is supported on the substrate via a gap, and the first conductive layer pattern is provided as a wiring for outputting the electric signal from the infrared detection pixel. A step of forming a MOS transistor using the second conductive layer pattern as a gate, and a step of forming the MOS transistor by using the MOS transistor to select a pixel to output the electric signal from the plurality of infrared detection pixels. Provided is a method for manufacturing an infrared sensor, which comprises a step of forming a pixel selection means and an output means for outputting the electric signal from the selected infrared detection pixel via the wiring.

【0034】

In the fourth aspect of the present invention, it is desirable to have the following configuration.

【0035】

(1) The conductive film is formed by a laminated structure including a polycrystalline silicon layer and a metal silicide layer, and the wiring and the gate are formed by a laminated structure including the polycrystalline silicon layer and the metal silicide layer, respectively. ..

【0036】

(2) The conductive film is formed by a laminated structure including a polycrystalline silicon layer and a metal layer, and the wiring and the gate are formed by a laminated structure including the polycrystalline silicon layer and the metal layer, respectively.

【0037】

(3) A step of forming a side wall insulating film on the side wall of the gate layer of the MOS transistor and a step of forming a first insulating film by covering the side surface and the upper surface of the wiring of the support structure are provided. The first insulating film is formed in the same layer as the side wall insulating film of the MOS transistor.

【0038】

Further, the fifth aspect of the present invention is to provide a substrate with a plurality of infrared detection pixels each having an infrared absorber that absorbs infrared rays and a thermoelectric converter that converts a temperature change due to infrared rays absorbed by the infrared absorber into an electric signal. A step of arranging and forming on the top, and a step of forming the first conductive layer pattern in the formation region of the infrared detection pixel and forming the second conductive layer pattern in a region other than the formation region of the infrared detection pixel. And the step of forming the first insulating film by covering the side surface and the upper surface of the first conductive layer pattern and the second conductive layer pattern, and etching the portion of the substrate under the first conductive layer pattern. The thermoelectric conversion unit of each of the plurality of infrared detection pixels is supported on the substrate via a gap, and the first conductive layer pattern is used as a wiring for outputting the electric signal from the infrared detection pixels. A MOS type in which a side wall insulating film is formed on the side wall of the second conductive layer pattern by etching the first insulating film and the side wall insulating film is formed and the second conductive layer pattern is used as a gate. A step of forming a transistor, a pixel selection means for selecting a pixel to which the electric signal should be output from the plurality of infrared detection pixels by using the MOS type transistor, and the electric signal from the selected infrared detection pixels. Provided is a method for manufacturing an infrared sensor, which comprises a step of forming an output means for outputting the infrared ray through the wiring.

【0039】

In the fifth aspect of the present invention, a step of forming a recess in the formation region of the infrared detection pixel of the substrate and forming an element-separating insulating film in the recess, and the first conductive layer on the element-separating insulating film. The step of forming a pattern, the step of forming a second insulating film on the first insulating film, and the element separation insulating film and the second insulating film being selectively selected with respect to the first insulating film. To remove at least one of the element separation insulating film and the second insulating film, or to make the width of these insulating films narrower than the width of the first insulating film. Is desirable.

【0040】

Further, in the sixth aspect of the present invention, a plurality of infrared detection pixels each having an infrared absorbing unit that absorbs infrared rays and a thermoelectric conversion unit that converts a temperature change due to infrared rays absorbed by the infrared absorbing unit into an electric signal are provided on a substrate. A step of arranging and forming on the substrate, a step of forming a recess in the formation region of the infrared detection pixel of the substrate and forming an element separation insulating film in the recess, and a first conductivity on the element separation insulating film. A step of forming a layer pattern, a step of forming a first insulating film by covering the side surface and the upper surface of the first conductive layer pattern, and a step of forming a second insulating film on the first insulating film. Then, the portion of the substrate under the first conductive layer pattern is etched to support the thermoelectric conversion unit of each of the plurality of infrared detection pixels on the substrate via a gap, and the first The step of forming a support structure having the conductive layer pattern of the above as a wiring for outputting the electric signal from the infrared detection pixel, and the element separation insulating film and the second insulating film are selected for the first insulating film. To remove at least one of the element separation insulating film and the second insulating film, or to make the width of these insulating films narrower than the width of the first insulating film, and the above-mentioned step. A step of forming a pixel selection means for selecting a pixel to which the electric signal should be output from a plurality of infrared detection pixels, and an output means for outputting the electric signal from the selected infrared detection pixel via the wiring. Provided is a method for manufacturing an infrared sensor, which comprises the above.

【0041】

In the fifth and sixth aspects of the present invention, it is desirable to have the following configurations.

【0042】

(1) A silicon nitride film is used as the first insulating film, and a silicon oxide film is used as the second insulating film.

【0043】

(2) Use a mixed solution of acetic acid and ammonium fluoride as an etching for etching the silicon oxide film as the second insulating film.

【0044】

Furthermore, it is desirable that the fourth to sixth aspects of the present invention described above have the following configurations.

【0045】

(1) The substrate comprises a single crystal silicon support substrate, a silicon oxide layer formed on the single crystal silicon support substrate, and a single crystal silicon layer formed on the silicon oxide layer. Forming the conversion part on the single crystal silicon layer.

【0046】

(2) The thermoelectric conversion unit shall be formed by forming a first conductive type region and a second conductive type region on a single crystal semiconductor layer to form a pn junction.

【0047】

(3) The infrared absorbing portion is formed by laminating a silicon nitride film on a silicon oxide film.

【0048】

(4) The second insulating film is formed in the same layer as the silicon oxide film of the infrared absorbing portion.

【0049】

(5) The single crystal support substrate is a single crystal silicon substrate, and as an etchant for etching the single crystal support substrate in the step of forming the support structure, a single crystal silicon is anisotropically wet-etched. To use.

【0050】

(Action) According to the present invention, it is possible to reduce the cross-sectional area of the support structure between the infrared detection unit and the support substrate even if the layout on a plane limited by the microfabrication level or the like is the same. Is. Therefore, it is possible to significantly reduce the heat conduction of the support structure, which controls the heat transport between the infrared detection unit and the support substrate, and as a result, a highly sensitive uncooled infrared sensor can be obtained.

【0051】

Further, according to the present invention, the width of the support structure is reduced in order to reduce the cross-sectional area of the support structure, and it is necessary to support the infrared sensor unit due to the reduction in the cross-sectional area of the support structure. There is no problem such as a decrease in mechanical strength, and there is no problem that the acceleration resistance is significantly reduced.

【0052】

Further, according to the present invention, the bottom surface of the infrared detection unit and a part or the bottom surface of the support wiring are exposed. Materials such as single crystal silicon that is an infrared detector, metal materials such as titanium that are support wiring, and polycrystalline silicon are the silicon oxide film and silicon nitride film that exist at the bottom of the diaphragm structure and support structure in the conventional structure. In comparison, the infrared emissivity in the 10 μm band is extremely low, and therefore, according to the above-mentioned bottom surface exposure structure, heat transport due to radiation from the bottom surface can be significantly reduced. In the trend of digitization of pixels and miniaturization of support structures with the progress of micromachining technology, heat transport by radiation from the silicon oxide film and silicon nitride film existing at the bottom of the above-mentioned diaphragm structure and support structure is not used. It is predicted that the level will be the same level as the heat conduction of the support structure, and the high sensitivity due to simple miniaturization has the sensitivity limit due to the heat transport by radiation described above. Therefore, the above-mentioned bottom exposed structure makes it possible to obtain a non-cooled infrared sensor with higher sensitivity in the miniaturization trend.

【0053】

Further, according to the present invention, the support wiring formed inside the support structure for reading the signal from the infrared detection unit is formed in the same layer as the gate electrode of the MOS transistor formed in the element peripheral circuit. Since the process of forming a unique support wiring layer, which has been required in the past, can be eliminated, the manufacturing process can be shortened, and the element manufacturing yield can be improved, a low-cost uncooled infrared sensor can be obtained. .. Further, forming the same layer as the above-mentioned MOS transistor gate electrode enables further miniaturization of the support wiring structure, and by using a polyside structure or a polymetal structure having low resistance, the element characteristics are also improved. It is possible to obtain high sensitivity characteristics.

【0054】

Further, according to the present invention, a first insulating film can be formed on the support wiring, and the support wiring can be protected against etching by the insulating film. Therefore, when the substrate is etched or the second insulating film (element separation insulating film, interlayer insulating film on the substrate, SOI embedded insulating film, etc.) formed above or below the support wiring is etched, the etching is performed. It is possible to protect the support wiring from the above, and it is possible to prevent the problem that the support wiring becomes thinner than necessary and its resistance increases, or that a defect occurs due to the disconnection of the support wiring.

【0055】

Furthermore, the first insulating film can be formed at the same time as the gate side wall insulating film formed on the gate side wall of the MOS transistor of the peripheral circuit. That is, an insulating film such as a silicon nitride film may be formed on the gate side wall of the MOS transistor of the peripheral circuit and selectively left on the gate side wall by etching the insulating film or the like. A second insulating film can be formed on the support wiring (in the same layer) at the same time as the process. In this case as well, the number of steps can be shortened. In particular, by using both the step of forming the insulating film and the step of forming the same layer as the gate electrode of the MOS transistor of the peripheral circuit described above, a highly sensitive support structure can be obtained by maximizing the consistency of the process. It can be manufactured with good yield and low cost.

【0056】

As described above, according to the present invention, it is possible to obtain a low-cost, high-sensitivity uncooled infrared sensor.

【0057】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

【0058】

(First Embodiment) FIG. 1 is an overall configuration diagram of an infrared sensor according to the present embodiment. Infrared detection pixels 1 that convert incident infrared rays into electrical signals are two-dimensionally arranged on the semiconductor substrate, and vertical address circuits and horizontal address circuits for pixel selection are arranged adjacent to the infrared detection pixel array 2 and selected. It has an output unit for sequentially outputting signals from the pixels. The infrared detection pixel 1 in FIG. 1 is a forward-biased pn junction, and a constant current source for forward-biasing the pn junction of the pixels is also arranged adjacent to the infrared detection pixel array 2. Here, in FIG. 1, an array of 4 pixels in 2 rows × 2 columns is shown as the infrared detection pixel array 2.

【0059】

In the infrared detection pixel line selected by the vertical address circuit, the forward bias current supplied from the constant current source flows through the current paths of the vertical signal line 3, the selected pixel 1, and the horizontal address line 4, and becomes the vertical signal line 3. The generated signal voltage is sequentially selected and output by the horizontal address circuit.

【0060】

In FIG. 1, as the simplest example, a structure is shown in which the signal voltage generated in the vertical signal line 3 is directly output via the column selection transistor 5 sequentially selected by the horizontal address circuit. This signal is shown. Since the voltage is weak, for example, by providing a structure in which the signal voltage is read out in column units, amplified, and held for a period of 1H, the signal voltage can be amplified and noise can be reduced by limiting the signal band. More preferred.

【0061】

FIG. 2 shows an equivalent circuit of the infrared detection pixel of FIG. To increase the sensitivity, n pn junctions are connected in series, and an additional resistor Ra exists in series with the pn junction. The additional resistance Ra is the internal wiring resistance Rl between the pn junction and the horizontal address line 4 and the pn junction and the vertical signal line 3, the contact resistance Rc between this wiring and the pn junction, and the p and n regions of the pn junction. Consists of resistance Rs.

【0062】

FIG. 3 is a schematic configuration diagram for explaining the cross-sectional structure and the planar structure of the infrared detection pixel shown in FIG. The infrared detection pixels are formed on the hollow structure 7 formed inside the single crystal silicon support substrate 6, the infrared absorption layers 201 and 202, the pn junction inside the SOI layer 9 formed for thermoelectric conversion, and this SOI layer. A sensor unit 10 composed of an embedded silicon oxide film layer 8 supporting 9 and a support unit for supporting the sensor unit 10 on the hollow structure 7 and outputting an electric signal from the sensor unit 10 and the support unit. It consists of a connection unit (not shown) that connects the sensor unit 10, the vertical signal line 4, and the horizontal address line 5.

【0063】

The support portion includes a support wiring structure and a support insulation structure 301, 302, 303 that protects the support wiring structure, and the support wiring structure is a laminated structure of polycrystalline silicon 102 and metal silicide 103.

【0064】

By providing the sensor unit 10 and the support unit on the hollow structure 7, the structure is such that the temperature of the sensor unit 10 is efficiently modulated by the incident infrared rays. Figure 3 shows the structure when n = 2.

【0065】

The manufacturing process of the infrared detection pixel shown in FIG. 3 will be described below separately for the process before forming the hollow structure and the process for forming the hollow structure.

【0066】

First, the process before the formation of the hollow concept will be described with reference to FIGS. 4 and 5. In FIGS. 4 and 5, the cross-sectional structure of the MOS transistor used in the circuit around the sensor element and the cross-sectional structure of the support structure that supports the sensor unit on the hollow structure are shown together, and the support wiring structure is the MOS transistor. It will be described that it is formed in the same layer as the gate electrode of.

【0067】

First, as a semiconductor substrate, a so-called SOI substrate in which an embedded silicon oxide film layer 8 and a single crystal silicon layer 9 are sequentially laminated on a single crystal silicon support substrate 6 is prepared. The STI (Shallow-Trench-Isolation) process is performed as an example of element separation in a general LSI manufacturing process. That is, the element separation region is defined by using a technique such as photolithography, and the single crystal silicon layer 9 in the element separation region is etched and removed by a technique such as RIE (Reactive-Ion-Etching), and then the element separation silicon oxidation is performed. The film 11 is embedded by a technique such as CVD (Chemical-Vapor-Deposition) and flattened by a technique such as CMP (Chemical-Mechanical-Polishing). At this time, it goes without saying that the region of the support structure is also defined as the device separation region, and the device separation silicon oxide film 11 is embedded.

【0068】

Next, a support wiring structure is formed at the same time as a MOS transistor for use in peripheral circuits such as an address circuit, an output unit, and a constant current source. That is, after the gate insulating layer (oxide film) 12 and the polysilicon layer 101 are formed, the gate electrode 101 of the MOS transistor is processed by photolithography and RIE, and at the same time, the support wiring 101 is also processed. Then, the LDD (Lightly-Doped-Drain) impurity region 13 is self-consistently formed with respect to the gate electrode 101 by ion implantation (FIG. 4 (a)).

【0069】

Next, sidewall formation and source / drain impurity region formation, which are general LDD structure formation steps, are performed. First, the silicon nitride film 14 to be the sidewall is formed on the entire surface of the substrate by CVD (Fig. 4 (b)). Therefore, the support wiring 101 is also covered with the silicon nitride film 14. Next, by etching the silicon nitride film 14 with RIE in an appropriate amount, the etching of the flat portion is completed due to the effect of anisotropic etching of RIE, and the side of the step portion by the gate electrode 101 and the support wiring 101 is sided. The wall 14 is formed. In this state, the source-drain impurity region 13 ́ is self-consistently formed by ion implantation (Fig. 4 (c)).

【0070】

Next, a polyside forming step is performed to reduce the resistance of the gate electrode 101 and the support wiring 101. In the following, the case of the salicide step, which is a self-aligned polyside structure forming step, will be described.

【0071】

First, using the gate electrode 101, the support wiring 101, and the sidewall 14 as masks, the gate insulating film 12 is etched with dilute phosphoric acid or the like to expose the silicon layer 9 in the source / drain region of the MOS transistor. Next, the metal film 102 for forming the metal silicide is deposited on the entire surface (Fig. 4 (d)).

【0072】

From this state, by performing an appropriate annealing treatment, the exposed silicon in the gate electrode 101, the support wiring 101, and the source / drain region reacts with the metal film 102 to form the metal silicide layer 103 (FIG. 4 (e)). ). Here, as the metal film 102, it is preferable to use a refractory metal such as titanium or tungsten.

【0073】

Next, the metal layer 102 in the region where the silicide does not react is removed by an etching solution selective for the metal silicide layer 103 (FIG. 5 (f)). For example, when titanium is used for the metal film 102, the metal film 102 can be selectively removed from a mixed solution of sulfuric acid and hydrogen peroxide solution.

【0074】

Next, a silicon nitride film 15 is deposited on the entire surface of the substrate in order to protect the polyside gate electrode, the polyside support wiring, and the metal silicide layer 103 formed in the source / drain region (FIG. 5 (g)). For the salicide step of forming the polyside structure and the polymetal structure capable of further reducing the resistance, for example, the methods and structures of JP-A-7-15196 and JP-A-7-202189 can be adopted.

【0075】

In this embodiment, an example in which the gate electrode and the support wiring are formed by the polyside structure is shown, but a polymetal structure (laminated structure of polycrystalline silicon layer and metal layer) capable of further lowering the resistance can also be applied. It is more preferable because the thermal noise caused by the electric resistance of the support wiring portion can be further reduced and the sensitivity can be increased. In this case, as the laminated structure of the gate electrode and the support wiring, for example, a titanium nitride film as a barrier metal and a tungsten film for reducing resistance are laminated on the polycrystalline silicon layer 101 instead of the metal silicide layer 103. It is possible to form.

【0076】

Then, as the insulating layer 16, a silicon oxide film is deposited by CVD and flattened by CMP (Fig. 5 (h)). At this time, the silicon nitride film 15 can be used as a stopper for the CMP.

【0077】

Next, the contact hole 16 is formed by RIE, and the plug 16 is embedded in the contact hole. For example, the plug 16 can be embedded by depositing a tungsten film on the entire surface of the substrate by CVD and performing CMP. Although not shown, contact holes are similarly formed and plugs 16 are embedded in the gate electrodes 101, 103 and the support wirings 101, 103.

【0078】

Then, for example, after forming aluminum or an aluminum alloy as the metal wiring 17, an infrared absorber layer that also serves as a passivation of a MOS transistor or the like is formed. In the figure, the silicon oxide film 201 and the silicon nitride film 202 are laminated and formed as an infrared absorber layer (FIG. 5 (i)). According to the structure of FIG. 5 (i), infrared rays are efficiently absorbed by the passivation layers 201 and 202.

【0079】

FIG. 6 shows the infrared absorption characteristics of the silicon nitride film and the silicon oxide film in the vicinity of 10 μm. As is clear from FIG. 6, the silicon nitride film 202 on the surface side (Fig. 6 (a)) has an absorption peak of Si-N bond near 12 μm, and the silicon oxide film 201 on the substrate side (Fig. 6 (b)). ) Indicates the absorption peak of Si-O bond near 10 μm. Therefore, by forming these layers having different absorption peaks in a laminated manner, it is possible to efficiently absorb the incident infrared rays and convert them into heat. Note that FIG. 6 (c) shows the absorption peak of the silicon oxide film due to thermal oxidation of silicon.

【0080】

The above manufacturing steps are common steps, but there are several methods in the steps after FIG. 5 (i), that is, the steps before and after forming the hollow structure.

【0081】

7 (a) to 9 (e) are views for explaining the manufacturing process of the infrared sensor according to the first embodiment of the present invention, and are supported by MOS transistors in peripheral circuits as in FIGS. 4 and 5. The cross-sectional structure of the structure is also shown. Further, although the bonding pad is formed in the wiring layer directly above the source / drain region, it is naturally possible to adopt a structure other than such a structure.

【0082】

Further, in the present embodiment, as shown in FIGS. 7 (a) to 9 (e), the metal wiring layer 17 is formed in one layer, but a multilayer metal wiring is formed, and the metal wiring in the uppermost layer thereof is bonded to the bonding pad. Of course, it is also possible.

【0083】

First, the silicon nitride film 202 and the silicon oxide film 201 are etched by RIE to form the bonding pad opening 401 (FIG. 7 (a)). The reason why the bonding pad opening 401 is performed prior to the silicon anisotropic etching for forming the hollow structure, which will be described later, is that the resist for forming the bonding pad opening 401 is applied after the hollow structure is formed. Because it is difficult. In this step, it is also possible to simultaneously etch the silicon nitride film 202 and the silicon oxide film 201 on the surface side of the support structure (Fig. 7 (a)). By such a method, the cross-sectional area of the support structure can be reduced and the sensitivity can be increased. Of course, it goes without saying that the surface-side support insulating layer of only the support structure can be etched in a process different from the formation of the pad opening 401.

【0084】

Next, in silicon anisotropic etching for forming a hollow structure, a silicon oxide film 402 is deposited on the entire surface of the substrate by CVD as a protective layer for preventing the bonding pad 17 from being etched (FIG. 7 (b)).

【0085】

Then, an etching hole 19 for forming a hollow structure is formed by RIE to expose the single crystal silicon support substrate 6 (FIG. 8 (c)). At this time, all the regions other than the etching hole 19 are covered with the protective silicon oxide film 402.

【0086】

Next, silicon anisotropic etching is performed to form a hollow structure. Hollow structure inside the single crystal silicon support substrate 6 by performing anisotropic etching of the single crystal silicon using a chemical solution such as TMAH (Tetra-Methyl-Ammonium-Hydroxide) as the anisotropic etchant of the single crystal silicon. 7 is formed (Fig. 8 (d)).

【0087】

Finally, the protective oxide film 402 is etched to expose the bonding pad. At this time, in order to increase the selectivity of the bonding pad 17 with aluminum, it is preferable to use a mixed solution of acetic acid and ammonium fluoride as the etchant.

【0088】

In the etching of the protective oxide film 402, the silicon oxide films 201, 18, 11, and 8 constituting the support structure are also etched, but the silicon nitride film 15 is not etched, and the cross-sectional shape of FIG. 9 (e) is obtained. become. FIG. 3 shows a plan view and a cross-sectional view of the infrared detection pixel at this time. The silicon nitride films 14 and 15 correspond to the support insulating structure 302, the silicon oxide films 201 and 18 correspond to the support insulating structure 303, and the silicon oxide films 11 and 8 and the gate insulating layer (oxide film) 12 correspond to the support insulating structure 301, respectively. .. In the etching at this time, the silicon nitride film 202 plays a role of protecting the silicon oxide film 201, and it is possible to suppress a decrease in the film thickness as an infrared absorber.

【0089】

At this time, since the surface and side surfaces of the metal silicide layer 103 having weak chemical resistance to ammonium fluoride are protected by the silicon nitride film 15 and the bottom surface is protected by polysilicon 101, the support wiring is not etched. There is no.

【0090】

According to this structure, the width of the support structure can be narrowed beyond the limit of miniaturization by lithography or the like, and the sensitivity can be increased by the effect of reducing the cross-sectional area. At the same time, forming the same layer as the gate electrode of the MOS transistor also enables extremely fine processing, and it is possible to increase the sensitivity due to the effect.

【0091】

Further, since low resistance materials such as polyside and polymetal are used, thermal noise caused by the electrical resistance of the support wiring can be suppressed, and high sensitivity can be achieved from the effect.

【0092】

Furthermore, since the silicon nitride film 15 can be formed in the same layer as the silicon nitride film 15 formed on the gate side wall of the MOS transistor of the peripheral circuit, the effect of shortening the number of steps is remarkable. In particular, by using both the step of forming the silicon nitride film 15 and the step of forming the same layer as the gate electrode of the MOS transistor of the peripheral circuit described above, the process consistency is maximized and the highly sensitive support structure is used. Can be manufactured at low cost with good yield.

【0093】

(Second Embodiment) Next, the second embodiment of the present invention will be described.

【0094】

7 (a) to 9 (f) are views for explaining the manufacturing process of the infrared sensor according to the second embodiment of the present invention, and are supported by MOS transistors in peripheral circuits as in FIGS. 4 and 5. The cross-sectional structure of the structure is also shown. Further, although the bonding pad is formed in the wiring layer directly above the source / drain region, it is naturally possible to adopt a structure other than such a structure.

【0095】

Further, in the present embodiment, as shown in FIGS. 7 (a) to 9 (f), the metal wiring layer 17 is formed in one layer, but a multilayer metal wiring is formed, and the metal wiring in the uppermost layer thereof is bonded to the bonding pad. Of course, it is also possible.

【0096】

The manufacturing process of this embodiment is exactly the same as that of the first embodiment described above for FIGS. 7 (a) to 9 (f), and thus the description thereof will be omitted. When the silicon oxide film etching is further advanced with respect to FIG. 9 (e), which is the final structure of the first embodiment, the structure of FIG. 9 (f) is obtained. The silicon nitride films 14 and 15 correspond to the support insulating structure 302.

【0097】

In the bonding pad opening 401, the side etching of the silicon oxide film 201 proceeds, and the overhang shape of the silicon nitride film 202 appears. However, in this figure, for convenience, the wiring 17 directly above the source / drain region of the MOS transistor is represented as a bonding pad, so the overhang shape is emphasized as compared with the actual one, and the actual bonding pad dimensions are used. Is a sufficiently negligible and acceptable range.

【0098】

On the other hand, looking at the support structure, the silicon oxide films 201,18,11,8 that made up the support insulating layer are completely etched, and the support wirings 101 and 103 with a polyside structure and the silicon nitriding that protects them. It has a structure of only membranes 14 and 15. This structure can be realized by a cross-sectional structure in which the metal silicide layer 103 is completely protected by silicon nitride films 14, 15 and polycrystalline silicon 101.

【0099】

The pixel structure at this time is shown in FIG. As is clear from the figure, the cross-sectional area of the support structure is significantly reduced, and it is possible to significantly increase the sensitivity by significantly reducing the thermal conductivity of the support structure.

【0100】

According to this structure, not only the width of the support structure is narrowed beyond the limit of miniaturization by lithography or the like, but also the heat conduction of the support structure is practically reduced to a level controlled only by the support wiring. Due to the effect of significantly reducing the cross-sectional area, it is possible to significantly increase the sensitivity. At the same time, forming the same layer as the gate electrode of the MOS transistor also enables extremely fine processing, and it is possible to increase the sensitivity due to the effect.

【0101】

Further, since low resistance materials such as polyside and polymetal are used, thermal noise caused by the electrical resistance of the support wiring can be suppressed, and high sensitivity can be achieved from the effect.

【0102】

Other than that, the same effect as that of the first embodiment can be obtained.

【0103】

(Third Embodiment) Next, regarding the method for manufacturing an infrared sensor according to the third embodiment of the present invention, using FIGS. 11 (a) to 12 (d), focusing on the steps before and after the silicon etching step. explain.

【0104】

11 (a) to 12 (d) are views for explaining the manufacturing process of the infrared sensor according to the third embodiment of the present invention, and are supported by MOS transistors in peripheral circuits as in FIGS. 4 and 5. The cross-sectional structure of the structure is also shown. Further, although the bonding pad is formed in the wiring layer directly above the source / drain region, it is naturally possible to adopt a structure other than such a structure.

【0105】

Further, in the present embodiment, as shown in FIGS. 11 (a) to 12 (d), the metal wiring layer 17 is formed in one layer, but a multilayer metal wiring is formed, and the metal wiring in the uppermost layer thereof is used as a bonding pad. Of course, it is also possible.

【0106】

First, the silicon nitride film 202 and the silicon oxide film 201 are etched by RIE to form the bonding pad opening 401, but by controlling the etching amount, the RIE is formed in a state where the pad 17 is not exposed from the opening 401. Although stopped, in general, the silicon oxide film 201 is also partially etched in order to perform an appropriate amount of overetching (FIG. 11 (a)).

【0107】

At this time, it is also possible to simultaneously etch the silicon nitride film 202 and the silicon oxide film 201 on the surface side of the support structure portion, thereby reducing the cross-sectional area of the support structure and increasing the sensitivity. FIG. 11 (a) shows such a case. Of course, it goes without saying that the surface-side support insulating layer of only the support structure can be etched in a process different from the formation of the pad opening 401.

【0108】

Then, an etching hole 19 for forming a hollow structure is formed by RIE to expose the single crystal silicon support substrate 6 (FIG. 11 (b)). At this time, all the regions other than the etching hole 19 are covered with the silicon oxide film 201 and the silicon nitride film 202.

【0109】

Next, silicon anisotropic etching is performed to form a hollow structure. Hollow structure inside the single crystal silicon support substrate 6 by performing anisotropic etching of the single crystal silicon using a chemical solution such as TMAH (Tetra-Methyl-Ammonium-Hydroxide) as the anisotropic etchant of the single crystal silicon. 7 is formed (Fig. 12 (c)).

【0110】

Finally, the silicon oxide film 201 is etched to expose the bonding pad. At this time, in order to increase the selectivity of the bonding pad 17 with aluminum, it is preferable to use a mixed solution of acetic acid and ammonium fluoride as the etchant.

【0111】

In the etching of the protective oxide film 201, the silicon oxide films 201, 18, 11, and 8 constituting the support structure are also etched, but the silicon nitride film 15 is not etched, and the cross-sectional shape shown in FIG. 12 (d) is obtained. become. The plan view and the cross-sectional view of the infrared detection pixel at this time are shown in FIG.

【0112】

At this time, since the surface and side surfaces of the metal silicide layer 103 having weak chemical resistance to ammonium fluoride are protected by the silicon nitride film 15 and the bottom surface is protected by polysilicon 101, the support wiring is not etched. There is no.

【0113】

According to this structure, the width of the support structure can be narrowed beyond the limit of miniaturization by lithography or the like, and the sensitivity can be increased by the effect of reducing the cross-sectional area. At the same time, forming the same layer as the gate electrode of the MOS transistor also enables extremely fine processing, and it is possible to increase the sensitivity due to the effect.

【0114】

Further, since low resistance materials such as polyside and polymetal are used, thermal noise caused by the electrical resistance of the support wiring can be suppressed, and high sensitivity can be achieved from the effect.

【0115】

Other than that, the same effect as that of the first embodiment can be obtained.

【0116】

(Fourth Embodiment) Next, the fourth embodiment of the present invention will be described.

【0117】

11 (a) to 13 are views for explaining the manufacturing process of the infrared sensor according to the fourth embodiment of the present invention, and are the cross sections of the MOS transistor and the support structure of the peripheral circuit as in FIGS. 4 and 5. The structure is also shown. Further, although the bonding pad is formed in the wiring layer directly above the source / drain region, it is naturally possible to adopt a structure other than such a structure.

【0118】

Further, in the present embodiment, as shown in FIGS. 11A to 13, the metal wiring layer 17 is formed in one layer. However, a multilayer metal wiring is formed, and the metal wiring in the uppermost layer thereof is used as a bonding pad. Of course it is possible.

【0119】

The manufacturing process of this embodiment is exactly the same as that of the first embodiment described above with respect to FIGS. 11 (a) to 12 (d), and thus the description thereof will be omitted. When the silicon oxide film etching is further advanced with respect to FIG. 12 (d), which is the final structure of the third embodiment, the structure of FIG. 13 is obtained.

【0120】

In the bonding pad opening 401, the side etching of the silicon oxide film 201 proceeds, and the overhang shape of the silicon nitride film 202 appears. However, in this figure, for convenience, the wiring 17 directly above the source / drain region of the MOS transistor is represented as a bonding pad, so the overhang shape is emphasized as compared with the actual one, and the actual bonding pad dimensions are used. Is a sufficiently negligible and acceptable range.

【0121】

On the other hand, looking at the support structure, the silicon oxide films 201,18,11,8 that made up the support insulating layer are completely etched, and the support wirings 101 and 103 with a polyside structure and the silicon nitriding that protects them. It has a structure of only membranes 14 and 15. This structure can be realized by a cross-sectional structure in which the metal silicide layer 103 is completely protected by silicon nitride films 14, 15 and polycrystalline silicon 101.

【0122】

The pixel structure at this time is as shown in FIG. As is clear from the figure, the cross-sectional area of the support structure is significantly reduced, and it is possible to significantly increase the sensitivity by significantly reducing the thermal conductivity of the support structure.

【0123】

According to this structure, not only the width of the support structure is narrowed beyond the limit of miniaturization by lithography or the like, but also the heat conduction of the support structure is practically reduced to a level controlled only by the support wiring. Due to the effect of significantly reducing the cross-sectional area, it is possible to significantly increase the sensitivity. At the same time, forming the same layer as the gate electrode of the MOS transistor also enables extremely fine processing, and it is possible to increase the sensitivity due to the effect.

【0124】

Further, since low resistance materials such as polyside and polymetal are used, thermal noise caused by the electrical resistance of the support wiring can be suppressed, and high sensitivity can be achieved from the effect.

【0125】

Other than that, the same effect as that of the first embodiment can be obtained.

【0126】

(Fifth and Sixth Embodiments) Next, the infrared sensor according to the fifth and sixth embodiments of the present invention will be described.

【0127】

FIG. 14 shows a cross-sectional structure and a planar structure of a pixel portion of an infrared sensor according to a fifth embodiment of the present invention.

【0128】

FIG. 14 has a cross-sectional structure similar to that of the first embodiment shown in FIG. 3, but the embedded oxide film 8 of the SOI substrate does not exist at the bottom of the infrared sensor unit 10, and the SOI layer 9 has a hollow structure 7. The exposed parts are different because they are in direct contact with.

【0129】

According to this structure, heat transport due to radiation from the back surface of the sensor unit 10 is suppressed, and the limit of high sensitivity due to miniaturization of the support structure can be shifted to the higher sensitivity side. The reason is as follows.

【0130】

According to the conventional structure of FIG. 22 and the structure of FIG. 3, a silicon oxide film or a silicon nitride film is always formed on the bottom surface of the sensor unit. By the way, as already described, the silicon oxide film and the silicon nitride film show absorption in the 10 μm band due to the presence of Si-O bond and Si-N bond, respectively, as shown in FIG. From the opposite point of view, this is nothing but a high emissivity in the 10 μm band, and the temperature of the sensor unit 10 raised by the incident infrared rays is the heat generated by the radiation from the silicon oxide film and silicon nitride film on the bottom surface. It will be reduced by transportation.

【0131】

Due to the miniaturization of the support structure, the thermal conductance of the support structure is 10^-7A value of about [W / m / K] has been achieved, but the above thermal conductance is 10 in the future miniaturization trend.^-8When it reaches about [W / m / K], heat transport by radiation from the above-mentioned back surface becomes dominant, and it is predicted that the limit of high sensitivity will be reached.

【0132】

On the other hand, in the structure of FIG. 14 showing the present embodiment, the single crystal silicon 9 is exposed on most of the back surface of the sensor unit 10. Single crystal silicon is very low in impurities and therefore does not show infrared absorption peaks due to Si-O or Si-N and therefore has a very low emissivity.

【0133】

That is, according to the present embodiment, the limit of high sensitivity in the trend of miniaturization of the support structure can be further extended to the high sensitivity side.

【0134】

Next, a sixth embodiment of the present invention will be described.

【0135】

FIG. 15 shows a cross-sectional structure and a planar structure of a pixel portion of an infrared sensor according to a sixth embodiment of the present invention.

【0136】

FIG. 15 has a cross-sectional structure similar to that of the first embodiment shown in FIG. 10, but the embedded oxide film 8 of the SOI substrate does not exist at the bottom of the infrared sensor unit 10, and the SOI layer 9 has a hollow structure 7. The exposed parts are different because they are in direct contact with.

【0137】

Alternatively, although the cross-sectional structure is similar to that of the fifth embodiment shown in FIG. 14, the support insulating layer that protects the support wiring constituting the support structure is only the silicon nitride film 302, and the polycrystalline on the bottom surface of the support wiring is formed. The exposed part of silicon 101 is different.

【0138】

According to this embodiment, the thermal conductance of the support structure is extremely low, and at the same time, the heat transport due to radiation from the back surface of the sensor unit is significantly reduced.

【0139】

Therefore, according to the present embodiment, an infrared sensor having extremely high sensitivity can be obtained.

【0140】

Next, FIGS. 16 to 18 show the manufacturing method of the infrared sensor according to the fifth embodiment and the sixth embodiment of the present invention. 16 to 18 are basically the same steps as those of FIGS. 7 to 9 described above, and thus the description thereof will be omitted, but as can be seen from the comparison between FIGS. 16 (a) and 7 (a). In this embodiment shown in FIG. 16 (a), an SOI substrate having a thin embedded oxide film 8 is used. Therefore, as shown in FIG. 18 (e) or FIG. 18 (f), which is the final structure, the embedded oxide film 8 does not exist on the bottom surface of the support structure. Although not shown, the single crystal silicon layer 9 is exposed on the bottom surface of the sensor unit 10.

【0141】

The structure of FIG. 14 is obtained in the manufacturing process up to FIG. 18 (e), and the process of FIG. 15 is obtained in the manufacturing process up to FIG. 18 (f).

【0142】

(7th and 8th Embodiments) Next, FIGS. 19 to 21 show manufacturing methods of infrared sensors according to the 7th and 8th embodiments of the present invention. 19 to 21 are basically the same steps as those of FIGS. 11 to 13 described above, and thus the description thereof will be omitted, but as can be seen from the comparison between FIGS. 19 (a) and 11 (a). In the present embodiment shown in FIG. 19 (a), an SOI substrate having a thin embedded oxide film 8 is used. Therefore, as shown in FIG. 20 (d) or FIG. 21 which is the final structure, the embedded oxide film 8 does not exist on the bottom surface of the support structure. Although not shown, the single crystal silicon layer 9 is exposed on the bottom surface of the sensor unit 10.

【0143】

The structure of FIG. 14 is obtained in the manufacturing process up to FIG. 20 (d), and the process of FIG. 15 is obtained in the manufacturing process up to FIG. 21.

【0144】

The present invention is not limited to the above embodiment. For example, all of the embodiments described above are infrared sensors configured by arranging infrared detection pixels in a two-dimensional array, but of course, a one-dimensional sensor in which infrared detection pixels are arranged one-dimensionally or an array. It goes without saying that the same effect can be obtained by applying it to a single infrared sensor that is not arranged.

【0145】

Further, in the present embodiment, an example in which the gate electrode and the support wiring are formed by the polyside structure is shown, but a polymetal structure capable of further reducing the resistance can also be applied, which is caused by the electric resistance of the support wiring portion. It is more preferable because the thermal noise can be further reduced and the sensitivity can be increased.

【0146】

In this case, as the laminated structure of the gate electrode and the support wiring, for example, a titanium nitride film as a barrier metal and a tungsten film for reducing resistance are laminated on the polycrystalline silicon layer 101 instead of the metal silicide layer 103. It is possible to form.

【0147】

Further, the present invention is not limited to the pn junction having a planar structure as the pn junction used as the thermoelectric conversion means, and is also carried out when the pn junction having a lateral structure is used as the thermoelectric conversion means as shown in FIG. It is possible.

【0148】

Further, the present invention is not limited to the one using a pn junction as a thermoelectric conversion means, and for example, a low resistance polyside structure or a polymetal structure is used as a gate material for a MOS transistor in a circuit around a sensor element. Even in a structure in which a bolometer is formed in the same layer as the above, it is possible to similarly obtain the effects of high sensitivity and low cost due to its microfabrication and the effect of shortening the process.

【0149】

In addition, various modifications can be made without departing from the gist of the present invention.

【0150】

[Effect of the invention]

According to the present invention, it is possible to obtain a highly sensitive uncooled infrared sensor at low cost.

[Simple explanation of drawings]

[Figure 1]

The whole block diagram of the infrared sensor which concerns on 1st Embodiment of this invention.

[Figure 2]

An equivalent circuit of infrared detection pixels of an infrared sensor according to the first embodiment of the present invention.

[Fig. 3]

The figure for demonstrating the cross-sectional structure and the planar structure of the infrared detection pixel of the infrared sensor which concerns on 1st Embodiment of this invention.

[Fig. 4]

The process sectional view for demonstrating the support structure for supporting the sensor part of the infrared sensor which concerns on 1st Embodiment of this invention, and the manufacturing process of the MOS transistor formed in the sensor element peripheral circuit.

[Fig. 5]

The process sectional view following FIG.

[Fig. 6]

A characteristic diagram for explaining the absorption of a CVD silicon nitride film, a CVD silicon oxide film, and a silicon oxide film due to thermal oxidation in the 10 μm band.

[Fig. 7]

FIG. 3 is a process sectional view for explaining a support structure for supporting a sensor unit in the infrared sensor according to the first and second embodiments of the present invention, and a manufacturing process of a MOS transistor formed in a circuit around a sensor element.

[Fig. 8]

The process sectional view following FIG.

[Fig. 9]

The process sectional view following FIG.

[Fig. 10]

The figure for demonstrating the cross-sectional structure and the planar structure of the infrared detection pixel of the infrared sensor which concerns on 2nd Embodiment of this invention.

[Fig. 11]

FIG. 3 is a process sectional view for explaining a support structure for supporting a sensor unit in the infrared sensor according to the third and fourth embodiments of the present invention and a manufacturing process of a MOS transistor formed in a circuit around a sensor element.

[Fig. 12]

FIG. 5 is a cross-sectional view of the process following FIG.

[Fig. 13]

FIG. 2 is a cross-sectional view of the process following FIG.

[Fig. 14]

The figure for demonstrating the cross-sectional structure and the planar structure of the infrared detection pixel of the infrared sensor which concerns on 5th Embodiment of this invention.

[Fig. 15]

The figure for demonstrating the cross-sectional structure and the planar structure of the infrared detection pixel of the infrared sensor which concerns on 6th Embodiment of this invention.

[Fig. 16]

In the infrared sensor according to the fifth and sixth embodiments of the present invention, the manufacturing process for supporting the sensor portion and the MOS transistor formed in the peripheral circuit of the sensor element before forming the hollow structure will be described. Cross-sectional structure diagram for

[Fig. 17]

FIG. 6 is a cross-sectional view of the process following FIG.

[Fig. 18]

FIG. 6 is a cross-sectional view of the process following FIG.

[Fig. 19]

FIG. 5 is a cross-sectional structure diagram for explaining a support structure for supporting a sensor unit in the infrared sensor according to the seventh and eighth embodiments of the present invention and a manufacturing process of a MOS transistor formed in a circuit around a sensor element.

[Fig. 20]

FIG. 9 is a cross-sectional view of the process following FIG.

[Fig. 21]

FIG. 2 is a cross-sectional view of the process following FIG.

[Fig. 22]

The cross-sectional view for demonstrating the cross-sectional structure of an infrared detection pixel in a conventional infrared sensor.

[Fig. 23]

The perspective view for demonstrating the structure of the infrared detection pixel using a lateral type pn junction.

[Explanation of symbols]

1 ... Infrared detection pixel 2 ... Infrared detection pixel array 3 ... Vertical signal line 4 ... horizontal address line 5 ... Column selection transistor 6 ... Single crystal silicon support substrate 7 ... hollow structure 8 ... Embedded Silicon Oxide Layer 9 ... Single crystal silicon layer 10 ... Sensor section 11 ... Element separation silicon oxide film 12 ... Gate insulating film 13 ... LDD impurity region 13 ́ ... Source / drain impurity region 14 ... Silicon nitride film 16 ... plug 17 ... Metal wiring 18 ... Insulation layer (interlayer insulating film) 19 ... Etching hole 101 ... polycrystalline silicon layer 102 ... Metal film 103 ... metal silicide layer 201 ... Silicon oxide film layer 202 ... Silicon nitride film layer 301 ... Second insulating film (silicon oxide film, etc.) 302 ... 1st insulating film (silicon nitride film, etc.) 303 ... Second insulating film (silicon oxide film, etc.) 401 ... Bonding pad opening 402 ... Silicon oxide layer 501 ... Reflective layer 502 ... Insulation layer 503 ... Absorber layer