Photoelectric fusion device provided with three- dimensional shape
Abstract
[Task] The purpose is to solve the pin bottleneck of high-speed arithmetic elements and provide a photoelectric fusion device applicable to ultra-high-speed arithmetic and massively parallel processing.
Solution.In the photoelectric fusion device, at least a plurality of optical devices 102 including a light emitting device and a light receiving device are integrated on the surface of the three-dimensional crystal 101 of the semiconductor, and the inside of the three-dimensional crystal 101 is used as a medium for the optical wiring 105 to form a light emitting device. Light is transmitted and received between light receiving devices.

Term
Term ended
Projected expiry passed 29 March 2020, 6.5 years ago.
- Priority and filed
- Published
- Projected expiry
- Today
11 claims: 2 independent, 9 dependent
- 1【特許請求の範囲】 【請求項1】半導体の立体形状結晶の表面に、少なくとも、発光デバイスと受光デバイスを含む光デバイスが複数集積され、該立体形状結晶の内部を光配線媒体として用いて該発光デバイスと受光デバイス間で光を授受することを特徴とする光電融合デバイス。
- 2【請求項2】前記半導体の立体形状結晶はSi球であり、その表面に電子デバイスと光デバイスが複数集積されている請求項1に記載の光電融合デバイス。
- 3【請求項3】前記光デバイスは、その構成材料の一部にGaNAs、GaInNAs、AlNAs、GaInNAsP等のIII-VN半導体材料或いはSiGe等のIV族半導体材料が使われている請求項2に記載の光電融合デバイス。
- 4【請求項4】前記光デバイスは、格子整合調整用のバッファ層を介して前記半導体の立体形状結晶の表面に形成されている請求項1乃至3の何れかに記載の光電融合デバイス。
- 5【請求項5】前記発光デバイスは、それから発光される光が、自然放出光或いは誘導放出光であり、前記半導体の立体形状結晶内部に放射され、かつ該光の波長が該半導体の立体形状結晶のバンドギャップ波長よりも長い請求項1乃至4の何れかに記載の光電融合デバイス。
- 6【請求項6】前記発光デバイスは、光を前記半導体の立体形状結晶内部に放射して、1つ或いは複数の前記受光デバイスが該光を受光できる様に形成されている請求項5に記載の光電融合デバイス。
- 7【請求項7】前記発光デバイスは、それから発光される光が、自然放出光或いは誘導放出光であり、外部に光を発光できる様に形成されている請求項1乃至4の何れかに記載の光電融合デバイス。
- 8【請求項8】前記受光デバイスは、1つ或いは複数の前記発光デバイスから前記半導体の立体形状結晶内部に放射された光を受光できる様に形成されている請求項1乃至7の何れかに記載の光電融合デバイス。
- 9【請求項9】前記受光デバイスは、外部からの光を受光できる様に形成されている請求項1乃至7の何れかに記載の光電融合デバイス。
- 10【請求項10】前記発光デバイスは、1つの受光デバイスに向けて光を前記半導体の立体形状結晶内部に放射できる発光デバイスと、複数の受光デバイスに向けて光を該半導体の立体形状結晶内部に放射できる発光デバイスとを含む請求項1乃至9の何れかに記載の光電融合デバイス。
- 11【請求項11】前記半導体の立体形状結晶の表面に電子デバイスと光デバイスが複数集積されており、該電子デバイスは、前記発光デバイスの発光・消光を制御する機能、前記受光デバイスで受けた光を電気信号に変える機能、およびその電気信号をもとに論理演算する機能の少なくとも1つの機能を有する請求項1乃至10の何れかに記載の光電融合デバイス。
Independent claims11
139 paragraphs in 1 section, as filed
Description: TECHNICAL FIELD [Detailed description of the invention]
【0001】
[Technical field to which the invention belongs]
The present invention relates to a photoelectric fusion device formed on a three-dimensional semiconductor crystal such as a Si sphere, particularly a photoelectric fusion arithmetic device device applied to a neurocomputer or the like.
【0002】
[Conventional technology]
One of the methods used so far for high-speed CPU operation is to narrow the wiring width and increase the integration density. In this method, the number of wires increases dramatically as the number of devices increases, so that the degree of integration is limited to the number of wires (pin bottleneck). Several methods have been proposed to solve this.
【0003】
(1) Optical wiring This is an attempt to eliminate the pin bottleneck by replacing a part of the electrical wiring with an optical wiring. Then, the total number of electric wirings is reduced by utilizing the electromagnetic non-inductive property and high bandwidth of light. However, if the optical wiring is performed by an optical fiber or a semiconductor waveguide as in the conventional case, the waveguide becomes an order of magnitude thicker than the electric wiring, and only a specific electric wiring can be replaced. Will be.
【0004】
On the other hand, a method of transmitting to an open system, for example, a space has also been proposed. In this case, since the transmission path itself has a large degree of freedom, high-density wiring is possible, but on the other hand, the alignment of the light emitting element and the light receiving element is extremely complicated. Therefore, it is difficult to integrate at high density, and the total computing power is considered to be less effective than the case of only electrical wiring.
【0005】
(2) Spherical IC On the other hand, one of the attempts to solve this problem only by electrical wiring without using optical wiring is the use of a spherical Si substrate (referred to as a Si sphere in the present specification). Since the Si sphere uses the surface of the sphere as compared with a normal flat plate Si substrate, the space utilization efficiency is improved, so that the degree of integration per unit volume increases in inverse proportion to the radius of the Si sphere. Moreover, since the wiring length is also shortened, it is expected that the calculation speed will be improved by the effect of the degree of integration × the wiring length. However, this method is not a definitive method from the viewpoint of high-speed operation. This is because as the radius of the sphere is reduced, the wiring width and the wiring interval are also shortened, so that the influence of high resistance and electromagnetic induction noise increases sharply.
【0006】
As described above, at present, it can be said that a method for essentially solving the problem of speeding up the arithmetic element or the pin bottleneck has not been proposed.
【0007】
An object of the present invention is to solve a pin bottleneck of a high-speed arithmetic element, and to form an optical device such as an arithmetic element (CPU) applicable to massively parallel processing such as ultra-high-speed arithmetic on the surface of a semiconductor three-dimensional crystal. It is an object of the present invention to provide a photoelectric fusion device that uses the inside of the device as an optical transmission path.
【0008】
[Means for solving problems]
In the photoelectric fusion device of the present invention that achieves the above object, at least a plurality of optical devices including a light emitting device and a light receiving device are integrated on the surface of a three-dimensional crystal of a semiconductor, and the inside of the three-dimensional crystal is used as an optical wiring medium. It is characterized in that light is transmitted and received between the light emitting device and the light receiving device. In this basic configuration, the three-dimensional crystal of a semiconductor is typically a Si crystal that can easily monolithically form an electronic device such as a FET or a transistor on the surface, but other semiconductor crystals such as Ge can also be used. Can be used accordingly. The shape is also typically a sphere, but other shapes such as a cube can also be used. An important point of the present invention is that a plurality of optical devices (typically, ICs and optical devices) are integrated on the surface of a Si sphere or the like by using the inside of a three-dimensional crystal as an optical transmission path. The purpose is to configure a photoelectric fusion device. This optical device contains so-called III-VN semiconductor materials such as GaNAs, GaInNAs, AlNAs, and GaInNAsP (among group III and V compound semiconductor materials, N (nitrogen) as a group V material) as part of its constituent materials. In this specification, a group IV semiconductor material such as SiGe can be used.
【0009】
Based on the above basic configuration, the following configurations are also possible. The optical device is a three-dimensional crystal of the semiconductor via a buffer layer for lattice matching adjustment for adjusting the difference in lattice constant between the three-dimensional crystal of the semiconductor and the optical device to ensure high-quality crystal growth. Can be formed on the surface.
【0010】
In the light emitting device, the light emitted from the light emitting device is naturally emitted light or stimulated emission light, and is emitted inside the three-dimensional crystal of the semiconductor, and the emitted light is not absorbed inside the semiconductor crystal. The wavelength is longer than the band gap wavelength of the semiconductor crystal.
【0011】
The light emitting device may be formed so that one or a plurality of the light receiving devices can receive the light by radiating light into the three-dimensional crystal of the semiconductor. The light emitting device may be formed so that the light emitted from the light emitting device is spontaneous emission light or stimulated emission light and can emit light to the outside.
【0012】
The light receiving device may be formed so as to be able to receive light emitted from one or more of the light emitting devices into the three-dimensional crystal of the semiconductor. The light receiving device may also be formed so as to be able to receive light from the outside.
【0013】
Further, the light emitting device includes a light emitting device capable of emitting light toward one light receiving device inside the three-dimensional crystal of the semiconductor and a light emitting device capable of emitting light toward a plurality of light receiving devices inside the three-dimensional crystal of the semiconductor. Flexible wiring can be configured with a high degree of integration, including devices.
【0014】
Further, a plurality of electronic devices and optical devices are integrated on the surface of the three-dimensional crystal of the semiconductor, and the electronic device has a function of controlling light emission / quenching of the light emitting device and an electric signal of light received by the light receiving device. It may have at least one function of changing to light and a function of performing a logical operation based on the electric signal.
【0015】
[Action]
As described above, the greatest feature of the present invention is that the inside of a Si sphere or the like is used as an optical path for an optical interconnect.
【0016】
Typically, the electrical connect is wired on the surface of a device (called a ball IC) in which an IC is formed on a Si sphere, and at the same time, the inside of the ball IC is used as an optical path for an optical interconnect. For this purpose, it is necessary to form a light emitting device in a wavelength band that is not absorbed by Si or the like on a Si sphere or the like. Moreover, the optical device needs to operate in the same environment as Si or the like. In the present invention, this problem is typically solved by using a III-VN material for the light emitting device and III-VN or SiGe for the light receiving device. GaN<sub>x</sub>As<sub>1-x</sub>The III-VN material represented by is lattice-matched with Si at about x = 0.2. Further, it can be an active layer that emits light having a wavelength of about 1.3 μm at x = 0.03. Moreover, since a multilayer film of GaN As / AlNAs can be used as a high-reflection mirror, a high-efficiency LED or a surface emitting laser (VCSEL) can be manufactured. A light receiving device can be manufactured with almost the same structure, and a light receiving device can be manufactured using Si / Ge, which is easier to manufacture. A light emitting device (for example, an LED) arranged on a spherical surface or the like can be made to receive light by all light receiving devices (for example, PD) by radiating light inside. That is, the inside of a Si sphere or the like can be used as a three-dimensional optical transmission line. When LD is used as the light source, the directivity becomes sharp, so that it can be transferred to a specific light receiving device (PD). The light source and the light receiving device can be controlled by an electronic circuit arranged in the vicinity of the light source and the light receiving device. The electronic circuit around the light receiving device may have an arithmetic circuit capable of performing desired processing on the spot as well as simply performing OE conversion. The light receiving device can process the received signal with a nearby IC, transmit the processed result by electrical wiring along the surface of the Si sphere or the like, or newly transmit the processed result toward the inside of the Si sphere or the like. The final calculation result may be output to the outside as an electric signal or an optical signal.
【0017】
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
【0018】
(Example 1) In this embodiment, a light emitting diode (LED) and a photodiode (PD) are arranged on a Si ball IC (the active layer is mainly GaInNAs).
【0019】
FIG. 1 is a schematic diagram illustrating this embodiment. In FIG. 1, 101 is a Si sphere having a spherical shape and having a diameter of about 1 mm, and 102 and 103 are optical devices (light source (LED) and light receiving device (PD)) and electronic devices (light source (LED) and light receiving device (PD)) formed on the surface thereof, respectively. CMOS logic, etc.). Further, 104 is an electric wiring (Al or the like) that connects them, and is arranged on the surface of the Si sphere 101. Reference numeral 105 denotes an optical wiring formed by propagating the light emitted from the LED 102 inside the Si sphere 101.
【0020】
Hereinafter, the manufacturing method of this example will be described. The method for producing the ball IC may be exactly the same as that of the conventional reported example. For example, it is done as follows.
【0021】
(1) First, Si sphere 101 is produced. Granular polycrystalline Si is placed in a pipe with a diameter of 2 mm and melted to form a nearly spherical single crystal. After that, the surface is polished in the same way as to make a ball bearing to make a 1 mmφ true sphere.
【0022】
(2) Next, the oxidation and diffusion processes are carried out through the IC process pipe. Pattern printing can be realized by, for example, the methods disclosed in JP-A-10-294254 and JP-A-11-54406. In the former, a circuit pattern corresponding to the sphere of the Si sphere material is provided, and the circuit pattern is collectively exposed to the sphere of the Si sphere material over a region of half or more of the entire sphere. In the latter, an axis passing through the center of the spherical IC is arbitrarily determined, and while the spherical IC is intermittently rotated around the axis, the exposed area on the surface of the spherical IC corresponding to this rotation angle is covered with a mask corresponding to the axis. Is exposed using. The Si ball IC is completed by the steps up to this point (see Fig. 2).
【0023】
Next, after the Si-ball IC process is almost completed, the optical device is manufactured. First, the entire sphere is covered with a nitride film 301 or the like, and the optical device manufacturing portion (about 10 μm) is polished and polished to a flat surface (see FIG. 3). The reason for covering with the nitride film 301 is to protect the electronic device 103 during growth and to use it as a mask for selective growth. Here, as shown in FIG. 3, the (111) plane and the equivalent plane (8 planes in total) 302 were used.
【0024】
If necessary, cover the whole with a nitride film or the like again, and then open a window only in the device fabrication area. Since selective growth is performed according to the opening, the opening is controlled so as to have a cylindrical shape in this embodiment. FIG. 4 is a cross-sectional view of the Si sphere (optical device manufacturing region) 101 after this step.
【0025】
Hereinafter, the crystal growth of the optical device will be described. As this technique, those disclosed in Japanese Patent Application No. 11-136515 by the applicant can be used. In this crystal growth technique, a mask for selective growth is formed on a Si wafer having a (100) plane on which an electronic device is formed, and a first lattice constant having a lattice constant different from that of Si or approximately equal to Si is formed. After forming a thin film made of III-V material (III-VN material, etc.), from the second III-VN material and the first III-V material, which have a longer lattice constant than the first III-V material. A multilayer thin film made of a third III-VN material having a short lattice constant is laminated while being strain-compensated, and during that time, it grows laterally on the selective growth mask, so that it is almost the same as the first III-V material. A fourth III-VN material crystal having the same lattice constant is selectively formed, and a compound semiconductor optical device is laminated on the fourth III-VN material crystal.
【0026】
In this example, it was grown as follows. First, using the gas source MBE method or the MOCVD method, GaN is applied only to the surface 302 that conforms to the (111) surface.<sub>x</sub>As<sub>1-x</sub>Is laminated as a buffer layer. Here, the nitrogen composition X was gradually changed from 0.2 to 0 so as to be lattice-matched to GaAs. After that, an LED structure or a vertical cavity surface emitting laser (VCSEL) structure using GaInNAs / GaAs as an active layer is produced. An LED will be described as an example.
【0027】
In FIG. 5, 501 is a Si sphere, 502 is the buffer layer, 503 is an LED, 504 is a pin-PD, 505 is an incident light, 506 is an emitted light, and 507 is an electrode pad. Figure 6 is an enlarged view of the LED part. On the wafer of the buffer layer 502, n-type GaAs / AlAs reflective layer (reflectance 90%) 602, GaInNAs / GaAs single quantum well (SQW) active layer 603, p-type GaAs / AlAs reflective layer (reflectance 90%) 604 To form. The reason why the reflective layers 602 and 603 are provided on the LED is to improve the emission efficiency (to efficiently take out a large amount of light in a desired direction).
【0028】
The specific energy band structure of the active layer 603 having a single well layer 701 sandwiched between the barrier layers 702 is shown in FIG. The thickness of the clad layer 703 was controlled so that the cavity length was one wavelength. Further, the current constriction layer 605 is formed by oxidizing the AlAs of one layer of the p-type GaAs / AlAs reflection layer 604 except for the central portion thereof.
【0029】
After the above layers have grown, the positive electrode 606 and the negative electrode 607 are formed. Then, after removing the nitride film, the electrodes 606 and 607 and the IC 103 are wired.
【0030】
Since the light source of this embodiment has a surface emitting LED structure, it has a structure capable of emitting light at almost all solid angles. In order to increase the radiation angle, a structure with a spherical lens may be built. For example, the (111) surface and a surface equivalent thereto may be etched into a lens shape (for example, a concave lens shape), and then the LED structure may be grown there.
【0031】
The above is the manufacturing method for the light source, but the light receiving device can also be manufactured by the same method (the crystal growth of the device is performed after adjusting the lattice matching in the buffer layer). These optical devices may be manufactured at once by the above-mentioned selective growth technique, or may be manufactured separately. In this example, it grew all at once by selective growth (see Fig. 5).
【0032】
The operation method of this embodiment will be described. First, the most basic operation will be described. In the case of the light emitting device of this embodiment, by using DBR layers 602 and 604 and using GaInNAs / GaAs for the active layer 603, it can be driven with an operating current of 0.05 mA and an operating voltage of 1.5 V, so CMOS operating at 1.5 V or higher. It can be driven directly by the logic signal of the circuit. Further, the light receiving device can also obtain sufficient light receiving sensitivity by applying a reverse bias of about 1.5 V. In addition, both have a surface LED and a surface pin-PD structure, so they radiate light to almost all solid angles and can receive light from all solid angles. This means that the light emitted from the LED arranged on any of the eight surfaces according to the (111) surface can be received by the light receiving device on the other seven surfaces.
【0033】
Next, the signal flow will be described. In FIG. 1, when an electric signal is input to a processor element (PE) 103 made of CMOS or the like from the outside of a ball IC, an calculation is performed there, and then the output is an electric wiring 104 or an optical wiring 105 and another PE. Is transmitted to. The electrical wiring 104 transmits a signal in the same manner as a normal IC. The optical wiring 105 radiates light into the Si sphere 101 at a wide solid angle via a light emitting device. The emitted light is received by the light receiving device and converted into an electrical signal.
【0034】
At this time, the received light can be received only by a specific light receiving device by the signal flowing through the electrical wiring, or the reception sensitivity of the specific light receiving device can be controlled. In this embodiment, the basic operation is to perform these operations and data transfer in one ball IC and on the surface.
【0035】
In this embodiment, by arranging both the electronic device and the optical device on the sphere, it is the greatest effect that these devices can be efficiently interconnected without interfering with the electric wiring and the optical wiring.
【0036】
(Example 2) This example is an example in which VCSELs (active layers are mainly GaInNAs) and PDs (active layers are GaInNAs or SiGe) are formed on a Si ball IC, and these are not lattice-matched to GaAs.
【0037】
FIG. 8 is a schematic view (cross-sectional view) for explaining this embodiment. The difference from Example 1 is that the lattice constant of the buffer layer 502 is an arbitrary value between Si and GaAs, and that a surface emitting laser (VCSEL) is used as the light source.
【0038】
In FIG. 8, 101 is a Si sphere having a spherical shape and a diameter of about 1 mm, 801 is a surface emitting laser (VCSEL), 802 is a pin-PD having a ring-shaped light receiving surface, 803 is an electrode pad, and 804 is from a VCSEL801. The emitted beam, 805, is the incident light from another VCSEL to the pin-PD802.
【0039】
The production of this example is carried out as follows. The method for producing the ball IC may be exactly the same as in Example 1. After the Si-IC process is almost completed, the optical device is manufactured as follows.
【0040】
The entire sphere is covered with a nitride film or the like, and the manufactured portion (about 10 μm) of the optical device is polished and chemically polished on a flat surface. Here, the (001) plane and similar planes (6 planes in total) were used (see FIG. 9). Of course, a surface similar to the (111) surface as in the first embodiment may be used.
【0041】
If necessary, after covering the whole with a nitride film or the like again, the window may be opened only in the production area of the optical device. Similar to Example 1, the nitriding film is used to protect the electronic device and to be used as a mask for selective growth. In this example, a nitride film having an opening of 5 μmφ was newly prepared. Hereinafter, the crystal growth of the optical device will be described.
【0042】
Using the gas source MBE method or MOCVD method, GaN only on the surface conforming to the (001) plane.<sub>x</sub>As<sub>1-x</sub>Is laminated as a buffer layer 502. Here, the nitrogen composition X was gradually changed from 0.2 to y (0.2> y> 0). In this example, y = 0.05 was used. After this, the desired light source and light receiving device are manufactured.
【0043】
Here, a VCSEL will be described as an example as a light source. This will be described again with reference to FIG. In FIG. 6, 502 is a GaN As buffer layer, 602 is an n-type AlNAs / GaN As reflective layer (reflectance 99.9%), 603 is an undoped active layer, and 604 is a p-type AlPAs / GaN As reflective layer (reflectance 99.99%). The combination of AlPAs / GaNAs is used for the p-type reflective layer 604 because it is lattice-matched to the GaNAs buffer layer 502, the difference in refractive index between the two layers can be made large, and the heterobarrier of the valence band can be made small. .. The combination of AlNAs / GaNAs is used for the n-type reflective layer 602 because the heterobarrier of the conduction band can be reduced by lattice matching with the GaNAs buffer layer 502. As a result, a highly reflective film can be realized optically with a small number of layers, the series resistance due to the heterobarrier can be reduced electrically, and a VCSEL801 that operates at a low current and a low voltage is manufactured. I was able to.
【0044】
The structure of the active layer 603 will be described again with reference to FIG. GaInNAs well layer 701 (thickness 8 nm, emission wavelength 1.35 μm, strain -0.5% (tensile strain)), InGaAs barrier layer 702 (thickness 10 nm, strain 0.5% (compression strain)), with 1 well By doing so, the oscillation wavelength was set to about 1.3 μm. Distortion may be controlled as needed. The important point is that this active layer 603 is made of III-VN and III-V semiconductor materials, and has a wavelength longer than the absorption edge wavelength of Si (for example, 1.3 μm) so that the inside of the Si sphere can be used as an optical transmission path. It has a structure with excellent temperature characteristics because it has the emission wavelength of the above and has a large band offset of the conduction band.
【0045】
After the crystal growth, the positive electrode 606 and the negative electrode 607 are formed. After removing the nitride film, the electrodes 606 and 607 and the ball IC 103 are wired.
【0046】
In the second embodiment, the above is the manufacturing method for the light source, but the light receiving device may be the same method. It may be produced all at once by the above selective growth technique, or may be produced separately. An example of growing separately by selective growth is shown in FIG. For the active layer of VCSEL801, it is necessary to use a III-VN semiconductor material so that the inside of the Si sphere can be used as an optical transmission path, but SiGe that receives light in the 1.3 μm band may be used for the active layer of the light receiving device 802. .. For this purpose, it is necessary to perform selective growth separately for the light source and the light receiving device.
【0047】
In any case, the structure of the present embodiment is not limited as long as it is a light source that can be formed on the Si sphere and emits light that can pass through the inside of the Si sphere and a light receiving device that can receive the light.
【0048】
The operating principle of this embodiment will be described. In the case of the VCSEL of this embodiment, since the III-VN semiconductor material is used for the reflective layer and the active layer, it can be driven with an operating current of 0.1 mA and an operating voltage of 1.5 V, so that the logic signal of the CMOS circuit operating at 1.5 V or higher Can be driven directly with. Further, the light receiving device can also obtain sufficient light receiving sensitivity by applying a reverse bias of about 1.5 V.
【0049】
In FIG. 1, when an electric signal is input to the processor element (PE) 103 made of CMOS or the like from the outside of the ball IC, the necessary calculation is performed there, and then the output is the electric wiring 104 or the optical wiring 105. Is transmitted to the PE of. The electrical wiring 104 transmits a signal in the same manner as a normal IC. Unlike the first embodiment, since the laser is used in the present embodiment, the directivity of the light is high and the signal is transmitted only to a specific light receiving device. For example, as shown in FIG. 9, the optical signal emitted from the (001) plane is received only by the light receiving device 102 on the (00-1) plane. Alternatively, the optical signal emitted from the (100) plane is received only by the light receiving device 102 on the (-100) plane. The received signal is processed by a nearby PE and transmitted through the electrical wiring 104 or the optical wiring 105 to finally obtain the desired calculation result. In this way, the electrical wiring and the optical wiring can be organically connected.
【0050】
(Example 3) This embodiment relates to an example in which an LD and an LED are combined as a light source. In Example 1, LED is used as a light source, and in Example 2, LD is used as a light source, but in some cases, they may be mixed as in this example.
【0051】
FIG. 10 schematically shows an example of the configuration. In FIG. 10, 102a is an optical device for 1 × N optical wiring, and by using the device of Example 1, the output from one PE can be multi-output (fan-out). On the other hand, 102b is an optical device for 1 × 1 optical wiring, and by using the device of the second embodiment, 1 × 1 optical connection becomes possible. Compared to 1xN optical wiring, wiring flexibility is lost, but high-speed data transfer is possible.
【0052】
In some cases, an optical device having both 102a and 102b functions may be arranged in one PE. In this way, 1x1 and 1xN connections can be made with optical wiring in the same way as electrical wiring, and NxN connections can be easily made in total, resulting in a dramatic improvement in data processing speed. be able to.
【0053】
[Effect of the invention]
As described above, the present invention produces the following effects. (1) By arranging a light source and a light receiving device (typically, an IC and a plurality of light sources and a light receiving device) on the surface of a three-dimensional semiconductor crystal such as a Si sphere, the inside can be used as a transmission path. The wiring density and transfer capacity can be dramatically increased.
【0054】
(2) Since this optical transmission line is flexible, N × N connection is easy, and a pin bottleneck can be solved.
【0055】
(3) Since a GaAsN-based light emitting layer can be laminated on the Si sphere, an optical device with extremely low power consumption can be manufactured.
[Simple explanation of drawings]
[Figure 1]
FIG. 1 is a front view showing the whole of Example 1 of the present invention.
[Figure 2]
FIG. 2 is a front view showing Example 1 of the present invention at the stage where the IC and the electric wiring are formed on the Si sphere.
[Fig. 3]
FIG. 3 is a front view showing Example 1 of the present invention at a stage where the Si sphere forming the IC and the electrical wiring is covered with a nitride film and then the optical device manufacturing portion is polished into a flat surface.
[Fig. 4]
FIG. 4 is a cross-sectional view of the optical device manufacturing region of the Si sphere according to the first embodiment of the present invention.
[Fig. 5]
FIG. 5 is a cross-sectional view of Example 1 of the present invention at the stage where the optical device is manufactured in the optical device manufacturing region of the Si sphere.
[Fig. 6]
FIG. 6 is a cross-sectional view of an LED portion manufactured in the optical device manufacturing region of the Si sphere.
[Fig. 7]
FIG. 7 is an energy band structure diagram of the active layer of the light emitting device.
[Fig. 8]
FIG. 8 is a cross-sectional view of Example 2 of the present invention at the stage where the optical device is manufactured in the optical device manufacturing region of the Si sphere.
[Fig. 9]
FIG. 9 is a front view of Example 2 of the present invention for explaining the transfer of 1 × 1 light.
[Fig. 10]
FIG. 10 is a front view of Example 3 of the present invention for explaining the transfer of 1 × 1 and 1 × N light.
[Explanation of symbols]
101 Si sphere 102 Optical device (light source, light receiving device) 102a 1 × N Optical device for optical wiring 102b 1 × 1 Optical device for optical wiring 103 Electronic device (IC) 104 Electrical wiring on the surface of the sphere 105 Optical wiring inside the sphere (optical transmission line) 301 Nitride film 302 (111) plane 502 buffer layer 503 light source (LED) 504, 802 Receiving device (PD) 505, 805 Incident light 506, 804 Emission light 507, 803 Electrode pad 602 n type reflective type 603 active layer 604 p type reflective type 605 Stenotic layer 606 Positive electrode 607 Negative electrode 701 Well layer 702 Barrier layer 703 clad layer 801 Light source (VCSEL)
11 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US6928205B2 | Cited by | United States of America | Applicant |
| US7720389B2 | Cited by | United States of America | Applicant |
| US6897430B2 | Cited by | United States of America | Applicant |
| US7141778B2 | Cited by | United States of America | Applicant |
| US6936808B2 | Cited by | United States of America | Applicant |
6 members in 3 offices
Members6
| Document | Office | Kind | |
|---|---|---|---|
| EP1139122A2 | European Patent Office (EPO) | A2 | |
| JP2001284635AThis record | Japan | A | |
| US2001032984A1 | United States of America | A1 | |
| US6563137B2 | United States of America | B2 | |
| EP1139122A3 | European Patent Office (EPO) | A3 | |
| JP3689615B2 | Japan | B2 |
12 legal events, as the office reported them to INPADOC
Over the term
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| Event | Code | |
|---|---|---|
| Cancellation because of no payment of annual feesLAPS | LAPS | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
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| Certificate of patent or registration of utility modelJAPANESE INTERMEDIATE CODE: R150R150 | R150 | |
| First payment of annual fees (during grant procedure)JAPANESE INTERMEDIATE CODE: A61A61 | A61 | |
| Written decision to grant a patent or to grant a registration (utility model)JAPANESE INTERMEDIATE CODE: A01A01 | A01 | |
| Decision of grant or rejection writtenTRDD | TRDD | |
| Written amendmentJAPANESE INTERMEDIATE CODE: A523A521 | A521 | |
| Notification of reasons for refusalJAPANESE INTERMEDIATE CODE: A131A131 | A131 |
Numbers
- Publication
- 2001-284635
- Application
- 90826
Titles2
- Japanese
- 立体形状を有する光電融合デバイス
- English
- [Title of the Invention] A photoelectric fusion device having a three-dimensional shape.
Classification
- CPC, 6
- G02B6/12004
- G02B6/12002
- G02B6/132
- G02B2006/12061
- G02B2006/12121
- G02B2006/12123
- IPC, 9
- G02B6 12
- G02B6 132
- H01L31 10
- H01L31 12
- H01L33 12
- H01L33 32
- H01L33 34
- H01S5 026
- H01S5 323