Noise-shaping method in segmented mix signal circuit

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to a noise shaping method in a segmented mixed signal circuit such as a digital / analog converter.

【0002】

[Conventional technology]

Figure 1 of the accompanying drawing shows each element of a so-called "current-steering" type conventional digital-to-analog converter (DAC). DAC 1 is designed to convert m-bit digital input words D1 to Dm into the corresponding analog output signals.

【0003】

DAC 1 is a plurality of (n) identical current sources 2₁~2_nIncluding, n = 2^mIt is -1. Each current source 2 passes a substantially constant current I. DAC 1 also has n current sources 2₁~2_nMultiple differential switch circuits corresponding to each 4₁~4_nAlso includes. Each differential switch circuit 4 is connected to the corresponding current source 2, and the current generated by the current source is transferred to the first terminal connected to the first connection line A of the converter, or to the first terminal. Switch to the second terminal connected to the second connection line B of the converter.

【0004】

Each differential switch circuit 4 receives one of a plurality of control signals T1 to Tn (referred to as a thermometer-coded signal for the reasons described below) and the value of the associated signal. Select your own 1st or 2nd terminal according to. First output current I of DAC 1_AIs the sum of the currents supplied to each first terminal of each of the above differential switch circuits, and is the second output current I of DAC 1._BIs the sum of the currents supplied to each second terminal of each of the above differential switch circuits.

【0005】

The analog output signal is the first output current I of DAC 1._AThe voltage V generated by sucking the resistor R into the resistor R_AAnd the second output current I of the converter_BVoltage V generated by sucking_BVoltage difference between_A-V_BIs. In the DAC of FIG. 1, the samo-metacoded signals T1 to Tn are derived from the binary input words D1 to Dm by the binary samo-meta decoder 6. The decoder 6 operates as follows.

【0006】

When the binary input words D1 to Dm have the minimum value, the sumo metacoded signals T1 to Tn are differential switch circuits 4.₁~4_nCurrent source 2 from each of them selecting their second terminal₁~2_nIt's like all of them are connected to the second connection line B. V in this state_A= 0 and V_B= nIR. Also, the analog output signal V_A-V_B= -nIR.

【0007】

When the values of the binary input words D1 to Dm gradually increase, the sumo metacoded signals T1 to Tn generated by the decoder 6 are (differential switch circuit 4).₁Many of the above differential switch circuits select their first terminal, and differential switch circuits that have already selected their first terminal do not return to that second terminal. .. When the binary input words D1 to Dm have the value i, the first i differential switch circuits 4₁~4_iSelects each first terminal, but the remaining (ni) differential switch circuits 4_{i + 1}~4_nSelects each second terminal. Analog output signal V_A-V_BIs equal to (2i-n) IR.

【0008】

FIG. 2 shows an example of a samo-metacoded signal generated for the 3-bit binary input words D1 to D3 (ie, m = 3 in this example). In this case, 7 samo-metacoded signals T1 to T7 are required (n = 2).^m-1 = 7). As shown in FIG. 2, the samo-metacoded signals T1 to Tn generated by the binary samo-meta decoder 6 follow the so-called thermometer code, and in this case, the r-th signal Tr is activated (1. It is known that all of the lower signals T1 to Tr-1 are also activated when (set to).

【0009】

Samometa coding is common in current-controlled DACs, because as the number of binary input words increases, the current source that has already been switched to the first connection line A does not switch to another line B. This is because more current sources are switched to line A. Therefore, the input / output characteristics of the DAC are monotonous, and the glitch impulse resulting from the change of 1 in the input word is small.

【0010】

By the way, it is understood that the number of current sources 2 and the number of corresponding differential switch circuits 4 in the architecture of FIG. 1 are very large, especially when m is 6 or more. For example, if m = 6, then n = 63, which requires 63 current sources and 63 differential switch circuits. In order to handle such a large number of current sources and to efficiently supply the sumometa signal to each differential switch circuit, each current source and each differential switch circuit are set as cells in a two-dimensional array. Arranged, each cell is proposed to contain one current source and a cooperating differential switch circuit. This layout is shown in Figure 3.

【0011】

In Figure 3, cell CL_ijAre arranged in an 8x8 square array with 8 rows (rows) and 8 columns (columns). In FIG. 3, the first column of the subscript applied to each cell represents the row in which the cell is placed, and the second column of the subscript represents the column in which the cell is placed. Therefore, cell CL₁₈Is the cell in row 1 and column 8. Each cell CL_ijIncludes its own current source 2 and its own differential switch circuit 4. Similar to the DAC of FIG. 1, the first terminal of each cell of the above array is integrally connected to the first connection line A of the DAC, and the second terminal of each cell of the above array is described above. It is integrally connected to the second connection line B of the DAC.

【0012】

Each cell CL in Figure 3_ijEach number assigned to represents the order in which each cell is activated (or controlled) and changes from the selection of each second terminal to the selection of each first terminal. For each consecutive row in the array, the startup order follows the physical order of each cell in the array, starting from row 1 and starting each cell in this row sequentially in column order, and then. Line 2 and so on.

【0013】

[Problems to be Solved by the Invention]

One problem that arises in FIG. 3 is that the output currents of the current sources 2 of the individual cells in the above array should be uniform, but in practice the actual output currents of each cell are non-uniform due to various causes. It means that it is affected by. As shown in FIG. 4 (a), for example, when the voltage drops along the power supply line, a graded error along the row or column can occur. In this case, each current source in the first four cells of the relevant row or column has a negative error, which means that each cell produces a subaverage output current. These negative errors decrease toward the center of the associated row or column. Each current source in the remaining cells 5-8 of the relevant row or column has its own positive error, which means that each cell produces above average output current. These positive errors decrease from the center to the edges of the associated row or column.

【0014】

As shown in FIG. 4 (b), the thermal distribution inside the chip containing the above sequence can cause symmetric errors in rows or columns. In this case, each current source in the row or column end cells 1, 2, 7 and 8 has a negative error, while each current source in the row or column center cells 3-6 has a positive error. In addition to this, there can be other types of error, such as random error. The final error distribution for the cell array is generated by superimposing all of the individual error components.

【0015】

The tilt and symmetric errors shown in FIGS. 4 (a) and 4 (b) tend to accumulate and result in large integral linearity errors (INLs). For example, assume that the tilt error distribution shown in FIG. 4 (a) exists in the first row of the cell array shown in FIG. In this case, negative errors accumulate when cells 1-4 are progressively activated (changed from the selection of each 2nd terminal to the selection of each 1st terminal), and the digital input code is 4 When is, a considerable negative total error is reached. Only when cells 5-8 are invoked sequentially, the positive errors associated with these cells offset the large negative errors associated with cells 1-4.

【0016】

Of course, the situation is exacerbated when the tilt error corresponding to FIG. 4 (a) exists along each of columns 1-8. In this case, as cells 1-8 are progressively activated, the largest negative error (error at position 1 in FIG. 4A) occurs for each of the eight cells in row 1. Similarly, in row 2, the negative error corresponding to position 2 in FIG. 4 (a) accumulates only eight times. Therefore, by the time the input code increases to 32 (corresponding to the activated state of all cells in rows 1-4), the accumulated negative error is actually quite large.

【0017】

A similar problem arises with the accumulation of the types of symmetric errors shown in Figure 4 (b). Mismatch due to tilt error and symmetric error can be reduced by selecting each cell in a special order that is different from the order in which each cell is physically arranged in the cell array. In particular, the applicant's Japanese Patent Application Laid-Open No. 11-243339 (corresponding to UK Patent Publication No. GB-A-2333190), which is pending at the same time, follows the order of numbers in the so-called "magic square". A special cell selection order is described , but the entire content is incorporated by reference.

【0018】

However, even when such a special cell selection order is adopted, inconsistencies inevitably remain between the respective currents generated by the individual segments. This causes non-linearity in the performance of the DAC. Jesper Steensgaard's SC Delta-Sigma ADC Structural Optimization and Scaling at the Delta-Sigma Data Converters Lecture Course, March 16-19, 1999, San Diego, Calif. In a paper entitled "Structural Optimization and Scaling of SC Delta-Sigma ADCs", it is proposed to adopt element (or segment) rotation to shape the inconsistency between each element of the DAC. In the proposal, each element is rotated using the amount of rotation in a data-directed expression. In the same course, Mismatch-Shaping Multibit DACs for Another paper by Ian Galton, entitled Delta-Sigma ADCs and DACs, discloses a mismatch shaping technique that improves noise shape by moving noise from low frequencies to high frequencies. In these techniques, noise increases rapidly with frequency at high output signal frequencies, so large oversampling ratios must be used to obtain useful results. In the same lecture course, "Noise shaping techniques Unconventional Applications of Noise-Shaping A further paper by Bob Adams entitled "Techniques)" discloses that the element "scramble" can be employed in a sigma-delta DAC to convert distortion into shaped noise. A random formula that uniformly disperses noise over the entire frequency spectrum both inside and outside the desired range frequency of the output signal, or a data-dependent formula that moves the noise away from DC, and the noise amplitude gradually advances with frequency. It can be one of the data-dependent expressions that increase in number.

【0019】

[Means for solving problems]

According to the first aspect of the present invention, it is a mixed signal circuit including a digital circuit and an analog circuit that operate to perform a series of operation cycles, and the analog circuit has a frequency in a predetermined desired range frequency. It has a plurality of circuit segments that jointly generate an output signal, and the digital circuit can act to generate a group of digital signals applied to each of the segments in each of the cycles. Digital signal generation means, and when r is the amount of rotation with respect to the related cycle, r pieces of each digital signal applied to each segment in each cycle are compared with each digital signal applied in the previous cycle. A rotating means that rotates only a segment of the above, and one or more rotating components that are each frequency component present in the frequency spectrum of the output signal as a result of the rotation, outside the predetermined desired range, 1 A mixed signal circuit comprising: a rotation control means that sets the amount of rotation r for each of the cycles so that it is mapped to one or more preselected frequencies or to a preselected narrow band frequency. Is provided.

【0020】

According to the second embodiment of the present invention, there is provided a digital / analog conversion circuit including a mixed signal circuit embodying the first embodiment of the present invention. According to a third embodiment of the present invention, in a mixed signal circuit including a digital circuit and an analog circuit and working to perform a series of operation cycles, the analog circuit has a frequency within a predetermined desired range frequency. It is a noise shaping method used in a mixed signal circuit having a plurality of circuit segments that jointly generate the output signals having the same, and in each cycle, a group of digital signals applied to each of the segments is generated. And the step of rotating each digital signal applied to each segment in each cycle by r segments compared to the digital signal applied in the previous cycle, where r is the amount of rotation for the related cycle. One or more rotational components, each frequency component present in the frequency spectrum of the output signal as a result of said rotation, move to one or more preselected frequencies outside the predetermined desired range. A noise shaping method is provided that comprises setting the amount of rotation for each of the cycles so that it is mapped to a preselected narrow band frequency.

【0021】

According to the fourth aspect of the present invention, there is provided a method of selecting the amount of rotation r to be used in the mixed signal circuit embodying the present invention. According to a fifth aspect of the invention, there is provided a computer program that causes the computer to perform certain or all steps of the method of embodying the fourth aspect of the invention when executed on a computer. .. The program can be carried on or by carrier. The carrier can be a storage medium (eg, a disk or CDROM) or a signal (eg, a download from the Internet).

【0022】

According to the sixth embodiment of the present invention, the number of the digital signals having a predetermined state in the group and the amount of rotation are generated by generating a group of rotational digital signals in a continuous operation cycle depending on the control signal. A digital signal generation circuit that specifies r and specifies the number of digital signals in which the group is rotated in the current cycle with respect to the group in the previous cycle within the cycle. A plurality of signal generation circuits, each of which has a circuit ID uniquely assigned to itself, and each of which is a rotated ID signal that depends on the assigned circuit ID in each of the above cycles. In order to generate a rotated ID signal different by the rotation amount r from the rotated ID signal in the cycle, and depending on the comparison between the rotated ID signal and the control signal, the digital signal is transmitted to the signal generation circuit. A plurality of signal generation circuits that can operate in order to set the predetermined state are provided, and each of the signal generation circuits generates a first portion of the rotated ID signal and the portion of the rotated ID signal. A first circuit portion that can act to compare with the first portion of the control signal and a second portion of the rotated ID signal that can act to generate and compare that portion with the second portion of the control signal. The second circuit portion includes a second circuit portion, and the second circuit portion generates the second portion of the rotated ID signal, while the first circuit portion produces the first portion of the rotated ID signal. A digital signal generation circuit is provided for comparison with the first part of the control signal. One said first circuit part may be commonly arranged for a group of said segments in which the first part of each rotated ID signal is the same and the first part of each data signal is the same. ..

【0023】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, examples of the present invention will be described in detail with reference to the accompanying drawings. FIG. 5 shows each element of the DAC 20 that embodies the present invention. Each element of the DAC of FIG. 5, which is the same as or closely corresponds to each element of the DAC of FIG. 1 as discussed above, is represented by the same reference number, and the description of each of these elements is omitted.

【0024】

The DAC of FIG. 5 includes a digital circuit part DC and an analog circuit part AC. The analog circuit portion AC is configured similar to the DAC of FIG. 1 and includes a plurality of segments (or cells) in which each segment has a constant current source 2 and a switch 4. The switch 4 in each segment is supplied from the digital circuit portion DC to the switch 4 and is controlled by the corresponding samo-metacoded signal OT.

【0025】

In the DAC of FIG. 5, the digital circuit portion DC includes a segment rotation block 22 and a rotation control block 24 in addition to the binary samometa decoder 6. The segment rotation block 22 has n inputs, at which a group of samometacoded input signals IT1 to ITn are received. These samo-metacoded input signals IT1 to ITn are generated by the binary samo-meta decoder 6 based on the binary input words D1 to Dm applied to the DAC. The binary samo-meta decoder 6 operates in the same manner as described above with respect to FIGS. 1 and 2, thereby deriving the samo-meta-coded input signals IT1 to ITn from the binary input words D1 to Dm.

【0026】

The segment rotation block 22 also has n outputs, and at the outputs, the samometacoded output signals OT1 to OTn of the digital circuit part DC are generated. The segment rotation block 22 also has a control input connected to the output of the rotation control block 24 to receive the rotation amount r from the rotation control block 24. The rotation control block 24 has first and second inputs for receiving externally derived application control signals MEAN and SPREAD, respectively.

【0027】

Next, the operation of the DAC shown in FIG. 5 will be described. The above DAC has a predetermined operating frequency (sampling speed) F._DACA series of operation cycles (conversion cycles) are carried out at. F_DACIs, for example, 100 million samples / second (100 M samples / second). In each cycle, the binary samo-meta decoder 6 converts the externally-derived applied input words D1 to Dm into n samo-meta-encoded signals IT1 to ITn, as described above with respect to FIG.

【0028】

In each cycle, the segment rotation block 22 also receives the value of the amount of rotation r to be used in that cycle, and according to the received r value, n samometacoded output signals OT1 to n from the sumometacoded input signals IT1 to ITn. Derivation of OTn. The operation of the segment rotation block 22 is shown in FIG.

【0029】

In FIG. 6, the samometacoded output signals OT1 to OTn are shown for a series of cycles CYCLE 1, CYCLE 2 and CYCLE 3. In CYCLE 1, the segment rotation block 22 makes the first output signal OT1 equal to the first input signal IT1, the second output signal OT2 equal to the second input signal IT2, and the following are all of the remaining output signals OT3 to OTn. Do the same for.

【0030】

Regarding CYCLE 2, the amount of rotation r by the rotation control block 24 with respect to the segment rotation block 22.₁Is supplied. This amount of rotation r₁Defines a new rotational mapping of the input signals IT1 to ITn for the output signals OT1 to OTn for CYCLE 2, unlike the mapping used in CYCLE 1. In this rotation mapping, each input signal IT1 to ITn is mapped to a new output signal OT1 to OTn, and the output signals OT1 to OTn rotate from each output signal to which the above input signals are mapped in the previous cycle. Quantity r₁Only different. As a result of this rotation, as shown in FIG.₁+1) th output signal OT (r)₁+1) is equal to the first input signal IT1. Similarly, the next output signal OT (r₁+2) is equal to the second input signal IT2, and the input signal IT (nr)₁The same applies to continuous output signals up to the output signal OTn equal to). Since each input signal is mapped to each output signal in a circular manner, the first output signal OT1 is the input signal IT (nr).₁Is equal to +1). Each remaining input signal up to "wrapped around" ITn is the output signal OT2 ~ OT (r).₁).

【0031】

In the next cycle CYCLE 3, the rotation amount r is determined by the rotation control block 24.₂Is identified. R as explained below₂Is the amount of rotation r used in the previous cycle₁It may be the same as or different from. r₂As a result of rotating only one segment, the input signal IT1 becomes the output signal OT (r) in CYCLE 3.₁+ r₂It is mapped to +1). The continuous input signal is then mapped to a continuous output signal, wrapped around if necessary, and the final input signal ITn is the output signal OT (r).₁+ r₂).

【0032】

Before describing the method in which the value of the amount of rotation r used in the continuous cycle is determined by the rotation control block 24 in the preferred embodiment of the present invention, refer to FIGS. 7 to 9 and the effect of rotation of each segment. Will be explained. In each example of FIGS. 7-9, each plot is from DC to DAC sampling rate F._DACOutput signal V of the DAC in Fig. 5 over the frequency range up to 1/2 of the frequency of_A-V_BThe signal-to-noise ratio (SNR) of is shown. In each plot, the SNR represented on the vertical axis is measured in dB, and the frequency represented on the horizontal axis is the sampling rate F._DACMeasured as a percentage of.

【0033】

In each example, each current source 2 in the individual segment shall have a mismatch with a standard deviation σ of 1.7%. This value for the standard deviation σ is artificially selected to be large enough to distinguish the noise component from the background noise by emphasizing the noise component in the output signal spectrum. In the DAC so far, the standard deviation value σ = 0.17% has been achieved in practice.

【0034】

Further, in this example, the number n of segments is assumed to be 64. In each example, about 0.3F_DAC~ 0.5F_DACIt is understood that there is a wide noise peak (Nyquist frequency). This wide noise peak is the result of a high-pass-filtered dither applied to the input data D1 through Dm to eliminate the effects of quantization error. For the purposes of this description, the wide noise peak can be ignored.

【0035】

In this example, the DAC shall be used at the output of the DAC to synthesize an output signal consisting of four "tones" T, i.e. four different frequency components. These four tones are 0.09F_DACCentered around frequencies in the vicinity of. Each tone T has a peak amplitude of -13 dB in the full-scale output amplitude FS of the DAC. The peak sum of each tone is -1dB FS.

【0036】

By the way, in this example, the output signal is composed of four tones because it is easy to identify the noise component in the output spectrum according to the plurality of tones. FIG. 7 shows the output signal frequency spectrum when no segment rotation is performed from one cycle to the next, that is, when r = 0 in each cycle. 0.3F from DC_DACThe average noise level in the frequency range up to is about -90 dB, but it can be understood that there are many significant intermodulation products M in the vicinity of the four tones T. These intermodulation products M are the result of segment mismatch.

【0037】

FIG. 8 shows the output signal frequency spectrum when the amount of rotation r = 1 is used in each cycle. In this case, the intermodulation product M near the tone T is now absent. However, instead, the output signal frequency spectrum is the frequency interval Δf = F._DAC/ n (in this example, = 0.0156F_DAC) Includes frequency components labeled 1-19. These frequency components are present in the output signal frequency spectrum as a result of segment rotation from one cycle to the next, and are hereinafter referred to as "rotation components".

【0038】

The first rotation component (component 1) has a frequency rΔf. The second rotation component (component 2) has a frequency of 2rΔf, and the third and higher-order rotation components have frequencies of 3rΔf, 4rΔf, and the like. On average, each rotational component decreases in size as the order increases. However, as can be seen in FIG. 8, components 1 and 2 are not greater than component 3 as opposed to what is expected on average. This is simply a statistical variation for the particular plot in Figure 8.

【0039】

When the amount of rotation r = 1 as in the plot of FIG. 8, all the most significant components 1 to 10 are DC to 0.16F._DACIs included in the frequency band of. This means that all of the above components are within the desired range of the output signal frequency of the DAC. For example, in a system where 4x oversampling is used, the desired range of output signal frequencies is DC to 0.125F._DACIs.

【0040】

FIG. 9 shows the output signal frequency spectrum when the amount of rotation r = 21 in each cycle. Rotational components 1 to 19 are now arranged in a considerably different manner from FIG. The first rotation component (component 1) is arranged at the frequency 21Δf. Component 2, which should have frequency 2rΔf (= 42Δf), is mapped to frequency 22Δf. This mapping occurs because 42Δf exceeds the Nyquist frequency (n / 2) Δf (= 32Δf) by +10Δf, so the component is mapped to (n / 2-10) Δf = 22Δf. .. Similarly, component 3 is mapped to Δf (because 3rΔf (= 63Δf) exceeds the Nyquist frequency by +31Δf, so that component is (n / 2-31) Δf = Δf). .. Component 4 is mapped to 20Δf (4rΔf = 84Δf is mapped to -20Δf because it exceeds the Nyquist frequency by +52Δf, but this is less than 0 mapping, so it is +20Δf). Each higher-order component is mapped in the same way.

【0041】

As can be seen from Figure 9, of the 10 low-order components 1-10, only components 3, 6 and 9 are now DC-0.125F._DACIs included within the desired range of. There are several higher-order components (components 12, 15 and 18) within the desired frequency range, but the significance of these higher-order components is limited. By the way, the relatively large size of component 18 (compared to other components) in FIG. 9 is also a statistical variation. On average, component 18 is smaller than the size shown in FIG.

【0042】

Table 1 below shows a method in which rotation components 1 to 16 are mapped to various positions in the output signal spectrum for various values of the amount of rotation r in the range of 20 to 31. The mapping values in the above table represent the frequencies (expressed as multiples of Δf) to which the relevant rotational components are mapped. As shown in Table 1, the desired range of output signal frequencies is DC ~ 0.12F._DACWhen (ie, 4x oversampling), a preferred value for the amount of rotation r is that the associated column of each mapping value does not have a relatively small value in the first few items of that column. In this regard, it can be understood that each column associated with the r-values of 24, 25, 26 and 27 is suitable. For example, for r = 24, it can be understood that the positions of components 1, 2 and 4 are good (all at 16Δf or higher), but components 3 and 5 (both at 8Δf) are less suitable. .. Similarly, when r = 25, the arrangement of components 1 to 4 (+ 11Δf or more) is all good, but the position of component 5 in 3Δf is not so suitable. In fact, of the r-values of 24-27, the values 25 and 26 can be considered suitable, for each of these, for example, component 5 which is significantly less significant than component 2 or 3, for example. Only is within the desired range for 4x oversampling.

【0043】

[table 1]

<img file="JP2001237704A_D0001.tif" />【0044】

The significance of r-values 25 and 26 is close to the ideal value of r / n = 0.4 (at least in certain cases of 4x oversampling). This 0.4F value is an ideal value, because all the rotation components are 0.4F._DACTo or 0.2F_DACThis is because it is mapped to or to DC. In particular, component 1 is 0.4F_DACMapped to, component 2 is 0.2F_DACMapped to (because 0.8 = (0.5 + 0.3) F_DAC 0.2 (= 0.5-0.3) F_DACThat's why). Ingredient 3 is 0.2F_DAC(Because it is 1.2 (= 0.5 + 0.7) F_DAC -0.2 (= 0.5-0.7) F_DAC 0.2F_DACThat's why). Ingredient 4 0.4F_DAC(Because it is 1.6 (= 0.5 + 1.1) F_DAC -0.6 (= 0.5-1.1) F_DAC +0.6 (= 0.5 + 0.1) F_DAC +0.4 (= 0.5-0.1) F_DACThat's why). Component 5 is mapped to DC (because 2.0 (= 0.5 + 1.5) F_DAC -1.0 (= 0.5-1.5) F_DAC + 1.0 (= 0.5 + 0.5) F_DAC 0 (0.5-0.5) F_DACThat's why). This pattern is repeated for each group of 5 higher order components, i.e., components 6-10 are mapped to the same positions as components 1-5, and so on.

【0045】

The effect of mapping when r / n = 0.4 is 0.4F_DAC, 0.2F_DACAnd to move the noise to three narrow bands centered on DC. The band with the highest noise is 0.4F_DACIt is a band centered on (because it has components 1 and 4 of each group of 5 components (1-5, 6-10, 11-15, etc.)) and then: The upper band of is 0.2F_DACThe band centered on (it has components 2 and 3 of each group) and centered on DC (only component 5 of each group) has even less noise. This will result in just over DC to 0.125F, as desired for 4x oversampling._DACIt will be understood that the frequency range up to is released from the significant noise component. 0.06 ~ 0.11F_DACThe desired frequency range (passband) of can be used free from significant noise components.

【0046】

It will be understood that the ideal r / n value of 0.4 generally requires a non-integer rotation amount r. For example, when n = 64, r must be set to a non-integer value of 25.6. It has the required value on average, since the non-integer value of r can be effectively achieved by changing r from one cycle to the next. Practically, it has been found that it is preferable to change r randomly or quasi-randomly so that r has the required value. Practically, noise shaping is improved by the random / pseudo-random variation as described above, as compared to the situation where r is constant or changed in a regular (predetermined) pattern.

【0047】

For example, for n = 64, r can be modified to give an average r-value of 25.5 by having values of 24, 25, 26 and 27 in a pseudo-random manner for each 25% of the conversion cycle. Many combinations of integer values can be used to "spread" r while producing the same mean r-value. For example, the average r-value of 25.5 is achieved by selecting with a pseudo-random formula that does not rotate each segment at all (r = 0) and rotates only 51 segments for 50% of the conversion cycle on average. Can be done. However, this has the effect of making the noise more "peak" in practice than if the r-values were diffused between the possible values 24, 25, 26 and 27. Each value used to spread r is preferably 0.4F, as in the case of the integer values 24, 25, 26 and 27, if used individually._DAC, 0.2F_D_ACAnd the value should be such that noise can be easily placed in an appropriate narrow band such as a band centered on DC. Diffusion has the effect of reducing the amplitude of the higher-order rotational components and further dispersing them at frequency.

【0048】

For r / n = 0.4 and n = 128, r must be set to the non-integer value 51.2. For example, r can be changed randomly or pseudo-randomly using 9 diffusion values from 47 to 55 to have an average value of 51.25, but each of the terminal values 47 and 55 is 6.25 of the conversion cycle. It is for%, and each of the intermediate values 48-54 is for 12.5% of the conversion cycle. Alternatively, five diffusion values from 49 to 53 can be used, but each of the terminal values 49 and 53 is for 12.5% of the conversion cycle, and each of the medians 50, 51 and 52 , For 25% of the conversion cycle.

【0049】

Table 2 below shows the method of mapping the rotation components 1 to 16 to various positions in the output signal frequency spectrum with respect to the rotation amount r of an integer value of 46 to 56 when n = 128.

【0050】

[Table 2]

<img file="JP2001237704A_D0002.tif" />【0051】

Similarly, Tables 3-7 represent the effects of different amounts of spreading the r-value to achieve the same mean of 51.25. In Tables 3-7, the standard deviation σ of the segment inconsistency is assumed to be 0.24%, which is 0.17% inconsistency in the 64-segment DAC for a DAC with 128 segments. Equal to standard deviation.

【0052】

Diffusion is not applied in Table 3 and the amount of rotation is 51.25 per cycle. This is done by incrementing the counter by 51.25 and rounding the count value to an integer value per cycle, or by incrementing the counter by 51.75 per cycle and mainly truncating the count value to an integer value. Achieved. (Truncation requires an increment of 0.5 or more greater than rounding per cycle, because truncation produces an average downward shift of 0.5 per cycle.) In Tables 4-7. , The diffusion amounts are 2, 4, 8 and 16, respectively, and the average r-value for each is 51.25.

【0053】

[Table 3]

<img file="JP2001237704A_D0003.tif" />【0054】

[Table 4]

<img file="JP2001237704A_D0004.tif" />【0055】

[Table 5]

<img file="JP2001237704A_D0005.tif" />【0056】

[Table 6]

<img file="JP2001237704A_D0006.tif" />【0057】

[Table 7]

<img file="JP2001237704A_D0007.tif" />【0058】

In Tables 3 to 7, the measured values A to D represent the measured values of the noise characteristics of the DAC over various desired frequency ranges as follows. The frequency range for the measured value A is DC ~ 15/128 (0.12) F_DACThat is, it is a baseband for 4x oversampling r. The frequency range for the measured value C is 8.5 / 128 to 14/128 (0.0664 to 0.1094) F_DACThat is, the passband for 4x oversampling. Measurement B represents the worst (most noisy) narrowband noise level of all available narrowbands over the frequency range of measurement A. Similarly, measurement D represents the worst (most noisy) narrowband noise level of all available narrowbands over the frequency range of measurement C. Each narrow band in the example has a frequency range of 1/4000 of the measured value A frequency range, that is, 30 × 10.^-6F_DACIs assumed to have.

【0059】

These measurements are used in view of the possibility of using a DAC embodying the present invention in a mobile communication network such as a GSM network. In such networks, it is preferable to use the baseband frequency range corresponding to measured value A (eg 5-40 MHz) or the passband frequency range corresponding to measured value C (eg 40-40 MHz). .. The measurements B and D correspond to the baseband and the worst-case channel of the network in the baseband, respectively, but each channel has a frequency range of, for example, 200 KHz. In the case of baseband (eg 5-40MHz), the harmonics are relatively small but placed in the band, while in the passband (eg 40-40KHz) the harmonics are relatively large but placed out of band. (For example, the second harmonic of 40MHz is at 80MHz, and the intermodulation product of 40MHz and 75MHz is at 35MHz).

【0060】

Numerous simulations were performed for each of the various measurements A through D with different spreads, and in each case the following statistical information was derived: average noise level over the desired frequency range ( Mean ) (ie, worst-case narrowband for measurements B and D), standard deviation of noise over that range / band (Sigma), minimum noise level over that range / band (Min) , And the maximum noise level (Max) over that range / band. All values in each table are negative values expressed in dB FS, i.e. for the DAC's full-scale output FS.

【0061】

As shown in FIGS. 10 and 11, the DAC inputs in the above simulation are four tones, each with an amplitude of -13 dB FS, and the sampling rate F._DACWas 832 MHz. This number was chosen to handle input data up to 45MHz, corresponding to a minimum sampling rate of 90M samples / sec. The closest "suitable" speed (multiple of 13MHz) in GSM is 104M samples / sec, which according to 8x oversampling is F._DACConverted to = 832MHz.

【0062】

The results shown in Table 6 for a diffusion amount of 8 provide the optimum overall noise characteristics in this example. As shown in Fig. 10 and Fig. 11, the noise at that time is DC ~ 0.11F._DACIt is approximately flat over the desired frequency range for 4x oversampling. Figure 10 shows 0.035F in this case._DAC0 ~ 0.5F by output signal consisting of 4 tones centered on the frequency of_DACThe frequency spectrum of the output signal of is shown. As expected, the noise is 0.2F_DACAnd 0.4F_DACHas a peak at. There is a slight peak even in DC. 0.2F_DACAnd 0.4F_D_ACThe additional peaks on either side of the major peaks in represent intermodulation noise (approximately 0.035F between these additional peaks)._DACThe interval corresponds to the center frequency of the above four tones). Fig. 11 shows DC to 0.125F in Fig. 10 with respect to the enlarged horizontal scale._DACIt shows the noise in the part from, which is the part of interest due to 4x oversampling. In FIG. 11, line L represents the spurious-free dynamic range (SFDR) of the DAC. SFDR is a measure in dB between the rms amplitude of the output signal and the peak spurious signal over the specified bandwidth. By the way, in FIGS. 10 and 11, the noise is measured in dBc units, that is, with respect to the carrier wave, which has a level of -13 dB FS in these simulations. Therefore, 0dBc = -13dB FS.

【0063】

In FIG. 11, a slight noise peak in the vicinity of DC can be understood, and the overall uniformity of noise over the baseband, especially over the passband, can be understood. The noise level over the baseband in the plot above is -85.31 dB FS, while the noise level over the passband in the plot is -90.04 dB FS. (These numbers are close to the corresponding mean numbers (-86.1dB FS and -90.6dB FS) in Table 6 for Figures 10 and 11, but they are not exactly the same, as Figure 10 and Figure 11 show. Contrary to representing a single "run" of the simulation, each number in Table 6 was obtained based on several trials to make it statistically more valid.) R / n To show the improvement gained by rotation with = 0.4, each value in Tables 3-7 can be obtained when rotation is not used and compared to each of the following values: mean = -71.7 dB FS, σ = 4.2dB FS, minimum noise = -66.7dB FS, and maximum noise = -78.7dB FS. When the diffusion amount is 8, as shown in Table 6, improvements of 15 dB and 19 dB are achieved for the measured values A and C, respectively.

【0064】

The noise value of measured value A of -86.1 dB in Table 6 corresponds to the SFDR value of -165.6 dB FS / Hz (because the bandwidth for measured value A is 90 MHz and the equivalent noise value per hertz. Is 79.5 dB better than the average of -86.1 dB). The corresponding bandwidth for measurements B and D is 200 KHz in each case, and the bandwidth for measurements C is 35 MHz. Therefore, the SFDR values for the measured values B to D in Table 6 are -161.5, -166.0 and -162.9 dB FS / Hz, respectively.

【0065】

Comparing Tables 3 to 7, the noise values of the measured values A and C are worse when the diffusion is performed (Tables 4 to 7) than when the diffusion is not performed (Table 3). Therefore, the total noise is increased by diffusion. However, comparing measurements B and D, diffusion results in a significant improvement in noise levels in the worst-case narrowband (channel), with the highest improvement being obtained in the case of Table 6. These improvements occur because diffusion reduces or eliminates the number of individual narrow bands of high noise over the further wideband, as the noise is evenly distributed over the further wideband in question. Because. Therefore, the performance for the worst-case narrow band is greatly improved.

【0066】

The importance of the above improvements in system matters such as GSM networks is that more carriers (eg, 4 or 8 instead of the current 2) can be combined or the same number of carriers in the DAC. This means that if a carrier wave is used, there will be even greater margins for distortion and noise. In the former case (increase in the number of carriers per DAC), the economy of the network is high performance rather than arranging a small number of channels per DAC by using a low performance but inexpensive DAC. It is preferably shifted by using a (relatively expensive) DAC and increasing the number of channels per DAC.

【0067】

FIG. 12 shows an example of the configuration of the rotation control block 24 in the DAC of FIG. The rotation control block 24 includes a first adder 52, a second adder 54, a pseudo-random number generator 56, and a latch 58. The first adder 52 has a first input that receives the control signal MEAN, which in this example is a 9-bit integer value (for the reasons described below). The first adder 52 also has a second input connected to the pseudo-random number generator 56, which receives a random number RN from the pseudo-random number generator 56 for each conversion cycle of the DAC. The pseudo-random number generator 56 has an input for receiving the control signal SPREAD. The range of the pseudo-random number RN generated by the generator 56 is determined by the control signal SPREAD applied to the generator 56. In this embodiment, the generator 56 generates random numbers of integers in the range of -SPREAD / 2 to + SPREAD / 2, but each integer is generated on average at the same frequency.

【0068】

By connecting the output of the first adder 52 to the first input of the second adder 54, the sum of the signals MEAN and RN applied to the two inputs of the first adder 52, MEAN + RN, is seconded. Applies to adder 54. The second adder 54 also has a second input connected to the output of the latch 58 and receives a 9-bit value LAST from the latch 58. The output of the second adder 54 is connected to the input of the latch 58 and applies the internal signal r9 to the latch 58. The signal r9 is a 9-bit value. The output signal r of this block is provided by the seven higher bits of the signal r9 in the embodiment.

【0069】

Next, the operation of the circuit of FIG. 12 will be described. The control signals MEAN and SPREAD are externally derived applied control signals determined by the user of the DAC in the embodiment. In this embodiment, the number n of segments is 128 and 4x oversampling is used in the DAC. Therefore, as described above, the average r value in each cycle can reach a value of r / n = 0.4. It is assumed that they will be close to each other. As explained earlier, this can be achieved by having the mean r-value have a non-integer value of 51.25. Since truncation is used in this example, this average r-value of 51.25 is an increment value of 51.75 per cycle (= 51.25 + 0.5, 0.5 is the average decrease per cycle resulting from truncation). I need. Since 51.75 is equal to the quotient of the integer value 207 divided by 4, MEAN is set to 207. The SPREAD value applied to the pseudo-random number generator 56 to achieve approximately optimal diffusion of the r-value when MEAN is set to 207 is 32 (= 8 × 4) in this embodiment. As a result, the generator 56 generates a pseudo-random value RN in the range -16 to +16, so the sum MEAN + RN in the output of the first adder is (equal to r in the range 47.25 to 55.25) 191. It is in the range of ~ 223.

【0070】

The value LAST applied to the second input of the second adder 54 in each cycle represents the sum of all trials of the MEAN + RN values generated by the first adder 52 in the previous cycle. In this regard, in each conversion cycle, the second adder outputs the r9 value, which represents the sum of the LAST value and the MEAN + RN value, and the r9 value generated in this way is stored in the latch 58. In each conversion cycle, the latch 58 also outputs the r9 value received by the latch 58 in the previous cycle as the LAST value.

【0071】

The r9 value is a 9-bit value, of which 2 lower bits are considered to be to the right of the binary point and 7 higher bits. Can be considered to the left of the binary point. The 7 bits to the left of the decimal point are output as a 7-bit r-value for the associated cycle, i.e. truncate with respect to r. The r-value must have 7 bits, which is 128 (= 2) in this example.⁷) Because there are segments. R-value rounding can be performed instead of truncation, in which case MEAN is set to 205 (= 51.25 × 4) in this example.

【0072】

By the way, as described above with respect to FIG. 6, since the segment rotation is executed in the circulation mode within the 128 segments, any carry in the second adder 54 can be ignored. Therefore, it is only necessary to maintain the r9 and LAST values with 9-bit precision. It will be appreciated that the MEAN and SPREAD values exemplified above with reference to FIG. 12 are for illustration purposes only. Other suitable values may be used, and the number of bits representing each value may be adjusted to fit the selected value.

【0073】

Next, FIG. 13 is an explanatory block diagram used to explain the configuration of the segment rotation block 22 used in the DAC of FIG. For simplicity, it is assumed that in FIG. 13, there is a segment with only n = 8 in the DAC. The circuit of FIG. 13 is made up of first, second and third multiplexer elements 62, 64 and 66. Each multiplexer element has n inputs and n outputs, each output of the first multiplexer element 62 is connected to each input of the second multiplexer element 64, and each output of the second multiplexer element 64 is It is connected to each input of the third multiplexer element 66. The samometacoded input signals IT1 to ITn are applied to each input of the first multiplexer element 62, and the samometacoded output signals OT1 to OTn are generated at each output of the third multiplexer element 66.

【0074】

Each multiplexer element also has a control input b, which is provided by a corresponding 1 bit of each bit of the r-value generated by the rotation control block 24. As shown in FIG. 13 itself, each multiplexer element input has an associated output pair and at any given time between the associated input and one output selected from among the associated output pairs. Form a connection. Output selection is made according to the control signal b applied to the element.

【0075】

Control signal b₁For the third multiplexer element 66 that receives (the first bit of the r-value), b₁When the control signal has a value of 0, each input is connected to an output directly opposed to that input in FIG. b₁When the control signal has a value of 1, each input is directly connected to the output directly above the opposite output (in the case of the top-level input, the "directly above" output is the bottom-level output of the above element). Therefore, the effect of the third multiplexer element 66 is b.₁According to the control signal, the samo-meta-coded output signal is rotated by 0 segment or 1 segment with respect to the samo-meta-coded input signal.

【0076】

Similarly, the second multiplexer element 64 is b.₂It plays a role of rotating each output signal by 0 segment or 2 segments for each input signal according to the value of the control signal (that is, the second bit of the r value). Thus, the first multiplexer element 62 is b.₃It plays a role of rotating each input signal by 0 or 4 segments with respect to each output signal according to the value of the control signal (that is, the third bit of the r value).

【0077】

In order to handle more segments, it is only necessary to add a higher order rotation stage, each of which has the same multiplexer elements as the multiplexer elements 62-66 in FIG. Each multiplexer element must have n inputs and n outputs, with n as the number of segments, and has a control signal provided by one of each bit of the r-value. The multiplexer element controlled by the 4th bit of the r value plays a role of rotating each output signal by 0 segment or 8 segments for each input signal, and is the same for each higher-order rotation stage thereafter. is there.

【0078】

By the way, returning to Fig. 2, the number of samo-metacoded signals that can be generated from an m-bit binary input word is 2.^mBut these 2^m2 different values^m-It will be understood that it can be represented by a single samo-metacoded signal. For example, for m = 3, eight different possible combinations of samometacoded signals generated by the binary samometacoder 6 can be represented using seven samometacoded signals. The rotation performed by each multiplexer element in the circuit of FIG. 13 should be an integer power of 2 (1, 2, 4, ...) and typically a power of 2 as well. Designed to have a number of each input and each output. In this case, a "dummy" samometacoded signal that is constantly set to 0 or 1 can be applied to the segment rotation block 22 as the nth samometacoded input signal. What this really means is that in any given conversion cycle, there is always a single segment that is in a given state rather than being determined by a binary input word. It means to do.

【0079】

In each of the above embodiments, the segment rotation preselects each rotation component in the output signal frequency spectrum (0.4F)._DAC, 0.2F_DACAnd DC), but in other embodiments of the invention different values of the ratio between r and n can be used to achieve other useful mappings of each rotating component. That is understood. The most appropriate mapping for each particular application depends on a variety of factors, especially the desired range of output signal frequencies produced by the DAC and the oversampling ratio (if any).

【0080】

For example, when 2x oversampling is used, a random rotation with an average r-value of 31.5 will reduce the main noise to 0.5F._DACPlace it on DC and place lower noise on DC, and 0.1F_DAC~ 0.3F_DACLeaves the passband of. The average r-value of 31.5 can be generated by various methods, but values of 31 and 32, each of which is 50% of the conversion cycle, can be used.

【0081】

Without oversampling (sometimes referred to as 1x oversampling), an average r-value of 0.5 would be the main noise, eg DC ~ 0.1F._DACPlaced in the vicinity of DC within the band of. For example, the r-values of 0 and 1, each for 50% of the time, can be used to generate the required average r-value of 0.5. In this case, for example, when a low-pass-filtered dither is applied to the data input to the DAC, the dither affects the lower part of the available bandwidth. Dither is 0.1F, for example_DACStop at, 0.5F from that frequency_DACLeave the passband up to perfect.

【0082】

Next, a further description will be given of how to achieve a useful mapping of each rotational component by systematically selecting the value of the ratio between r and n. Consider three examples. In the first example, the output signal frequency is 13.5 to 48.5 MHz and the sampling rate is F._DACIs assumed to be 832 Msamples / sec. This corresponds to the output signal frequency in the passband of the first Nyquist region for 8x oversampling. In the second example, it is assumed that the output signal frequency range is 55.5 to 90.5 MHz and the sampling rate is also 832 Msample / sec. This corresponds to the output signal frequency of the passband in the second Nyquist region. In the third example, it is assumed that the output signal frequency is 117.5 to 152.5 MHz and the sampling rate is the same. This corresponds to the output signal frequency of the passband in the third Nyquist region.

【0083】

14 and 15 are graphs used to illustrate how to select an appropriate r-value in the first example (in the case of the first Nyquist region). FIG. 14 shows the frequencies to which these components are mapped to different r-values for the first nine rotational components (which are the top-level components to be considered as explained below). There is. In all of this example, the number n of segments is 128. The range of r-values on the horizontal axis in FIG. 14 is 0 to 64, that is, 0 to n / 2.

【0084】

Line L1 represents the frequency at which the first rotation component is mapped to different r-values. As expected, r increases and F at r = n / 2_DACAs it reaches / 2, the first rotation component frequency increases linearly. Line L2 represents the frequency to which the second rotation component is mapped as r changes. The second rotation component frequency is F from 0 to r = n / 4_DACIt increases linearly to / 2, then decreases linearly from this value to 0 again at r = n / 2. Lines L3 to L9 show mappings for the 3rd to 9th rotation components, respectively.

【0085】

FIG. 14 also shows a group of eight tones (frequencyes) evenly spaced to form an output signal as eight horizontal solid lines. In the first embodiment, these eight tones have frequencies of 13.5, 18.5, 23.5, 28.5, 33.5, 38.5, 43.5 and 48.5 MHz, respectively. Similarly, each of the eight horizontal dotted lines in FIG. 14 represents the second harmonic of eight tones. Each of these second harmonic frequencies is twice the frequency of their corresponding tone. Similarly, each of the eight horizontal alternate long and short dash lines in FIG. 14 represents the third harmonic of eight tones, which are three times the frequency of the corresponding tones. In FIG. 14, it can be understood that the second and third harmonics on the low frequency side are within the output signal range of 13.5 to 48.5 MHz.

【0086】

The first requirement for selecting the appropriate r-value to achieve the desired noise shaping is that each significant rotational component should be mapped to a frequency that is far from the output signal frequency range. Appropriate r-values that satisfy this first requirement are contained within the hole in the graph of FIG. 14, where each horizontal line represents each tone within the desired output signal frequency range. L1 to L9 do not intersect with any of the above. In FIG. 14, three such holes H1, H2 and H3 are identified. The first hole is centered on r = 32 or r = n / 4. The second hole H2 is centered on r = 42.67, i.e. r = n / 3. The third hole H3 is centered on r = 51.20 or r = 2n / 5. Although there are other holes available on FIG. 14, it is easy to observe because these three holes H1 to H3 are the largest.

【0087】

The second requirement for choosing an appropriate r-value is that the significant intermodulation product should also be as far away as possible from the output signal frequency range. FIG. 15 is a graph showing the effect of the main intermodulation sideband depending on each rotation component in the first embodiment. These sidebands result from the intermodulation of the output signal due to each rotational component. In FIG. 15, there are six inclined line groups M1 to M6. The two line groups M1 and M2 correspond to the upper and lower first side wave bands of the first rotation component, respectively. Similarly, the two line groups M3 and M4 correspond to the upper and lower sidebands of the second rotation component, respectively. The two line groups M5 and M6 correspond to the upper and lower second sidebands of the first rotation component, respectively. Each of the above sidebands is of paramount importance for noise shaping purposes.

【0088】

In FIG. 15, the tones of the eight output signals are also shown as each horizontal solid line. An appropriate r-value from the viewpoint of intermodulation is an r-value at which the output signal line does not intersect with any of the intermodulation line groups M1 to M6. From FIG. 15, it is understood that in the first embodiment (in the case of baseband), the appropriate r-value range is from about 22.4 to about 56.5.

【0089】

Considering the results shown in the two graphs of FIGS. 14 and 15, the r-values in the three holes H1, H2 and H3 are good values in FIG. 14, as is clear from FIG. It is compatible with keeping significant intermodulation sidebands away from the output signal. By the way, the value of r = 51.2 is the value described above at r / n = 0.4.

【0090】

Therefore, FIGS. 14 and 15 show that in the first embodiment the appropriate r-value (for n = 128) can be systematically selected as any of 32, 42.67 or 51.2. 16 and 17 are graphs corresponding to FIGS. 14 and 15, respectively, but relate to a second embodiment (passband in the second Nyquist region). In the second embodiment, each tone has frequencies of 55.5, 60.5, 65.5, 70.5, 75.5, 80.5, 85.5 and 90.5 MHz, respectively. In this case, there are holes bounded by lines L1 to L9 in the same manner as in FIG. However, in FIG. 17, the range of appropriate r values is considerably limited from the viewpoint of intermodulation, and there is one band of r42 to r50 and another band of r56 to r61. Considering the two graphs together, it is relatively difficult to find a good choice for the r-value in the second embodiment. The optimal possibility is r = 42.67, a narrow range centered on r = n / 3. Other possibilities are r48 and r60. However, in the latter case, it can be understood that the frequency of the second rotation component (line L2) is extremely close to the lowest frequency tone in the output signal. Keeping in mind that intermodulation also occurs between each intermodulation product, it is desirable to maintain a constant clearance between each rotational component and the edge of the output signal frequency band.

【0091】

18 and 19 are graphs corresponding to FIGS. 14 and 15, respectively, for the third embodiment (passband in the third Nyquist region). In the third embodiment, each tone has frequencies of 117.5, 122.5, 127.5, 132.5, 137.5, 142.5, 147.5 and 152.5 MHZ, respectively. Also in this case, in the rotation component graph of FIG. 18, there are various holes in which none of the lines L1 to L9 intersect with the output signal frequency line. Also in FIG. 19, there are three holes in the intermodulation graph. Considering the combination of the two graphs, there are four good choices for r: r 8, r 32, r 48 and r 51.2, with r 32 being optimal. This is because the corresponding holes in both graphs are relatively wide.

【0092】

By the way, diffusion is not used in all graphs, i.e. the r-value is the same in all cycles. In practice, a small amount of diffusion (eg 2) must be used (large diffusion is inconvenient because it tends to diffuse each rotating component within the desired output signal frequency range). For example, it is possible to make a random selection between r = 31 and r = 32 and give an average r-value of 31.5.

【0093】

After using each graph to identify each hole that contains the possible candidate r-values, the next step is to select the appropriate MEAN and SPREAD values (Figure 21) for optimal noise in the desired frequency range. Achieving shaping properties. This can be achieved by sweeping the area with various MEAN and SPREAD values within the specified area while performing the simulation.

【0094】

Next, the first Nyquist region will be considered in more detail with reference to FIGS. 20 and 21. The first embodiment (passband of 13.5 to 48.5 MHz) and the fourth embodiment (baseband of 13.5 to 48.5 MHz) are considered. FIG. 20 extends the information contained in the graph of FIG. 14 from the first 9 rotational components to the first 20 rotational components. From FIG. 20, it can be understood that the available holes correspond to a ratio r / n, which is a specific fraction. For example, holes H1 to H3 in FIG. 14 correspond to proportions 1/4, 1/3, and 2/5, respectively. Other halls have a correspondence ratio of 1/5, 2/7, 3/7, 3/8, etc. Therefore, these ratios can be expected to provide potentially good candidate r / n ratios. The table in FIG. 21 considers these ratios as candidate r / n ratios in more detail and gives constant simulation results confirming the effectiveness of the graph-type selection of r-values using FIGS. 11-13. It is a thing. Only the proportions in the range r / n = 22.4 / 128 to r / n = 56.5 / 128 were verified, as this range is the "hole" range in the intermodulation graph of FIG. 15 relative to the first embodiment. Is.

【0095】

In the table of FIG. 21, the first column gives the numerator NUM and denominator DEN of each candidate ratio to r / n. Column 2 represents the r-value corresponding to the percentage when the number n of segments is 128. Column 3 shows the frequency F of the rotating component with the lowest frequency (excluding DC)._{upper upper}Is shown. Column 4 represents each frequency to which the first few rotational components are mapped. Here, each component up to the first DC component is represented (up to the maximum of 5 components). All rotating components mapped to DC are omitted. In fact, all DENth rotating components are mapped to DC. Each frequency identified in column 4 is the sampling frequency F._DACExpressed as a percentage of. F in column 3_{upper upper}The value of is the component closest to the actual frequency of the lowest percentage in column 4, i.e., the upper limit of the output signal frequency range.

【0096】

Columns 5 and 6 specifically relate to the fourth embodiment (baseband: 0-48.5 MHz), and columns 7 and 8 specifically relate to the first embodiment (passband in the first Nyquist region: 13.5-48.5 MHz). And provide simulation results. A large number (200 times) of simulations were performed for each of the various candidate percentage values, with the DAC inputs in each simulation having the respective frequencies shown in FIGS. 14 and 18 and evenly spaced 8 Individual tones and sampling speed F_DACIs 832MHz.

【0097】

In each simulation, the DAC transfer function is carefully changed from one trial to the next, with manufacturing-induced variability of the expected eigentransfer function from one DAC device to the next as a factor during the simulation. Weaved in. In each trial, the highest (worst case) on any single 100KHz channel across the band (0-48.5MHz for the 4th example; 13.5-48.5MHz for the 1st example) The noise level has been determined. The mean of these worst-state noise levels was calculated (columns 5 and 7), and the standard deviation (σ) of these worst-state noise levels over these trials was also calculated (columns 6 and 7). 8). The volatility of the DAC transfer function leads to the standard deviation of the noise characteristics. As is clear from the table in FIG. 21, both the mean and σ vary with respect to the various percentage values of r / n. When random rotation is performed (last row of the table), the average noise and standard deviation values are 114.4 dB and 3.2 dB, respectively. Random rotation has the effect of disabling any noise shaping, i.e., producing wideband noise with a perfectly flat noise flat portion with no noise peaks. In the fourth embodiment (in the case of baseband), the mean and standard deviation values when the rotations are performed are extremely bad, from significantly worse than in the case of "random rotations" to significantly better. It changes widely. In the first embodiment (in the case of passband), the variability of the values of the mean and standard deviation is small and all are better than in the case of "random rotation".

【0098】

Column 9 shows the worst-state average noise level in the baseband case compared to the passband case. It can be understood that when the DEN is relatively small (9 or less), the baseband noise characteristic is significantly lower than the passband noise characteristic. This is because when the DEN is small, a fairly significant low-order rotation component is mapped to DC (in the output signal frequency range in the case of baseband). On the other hand, when DEN is 10 or more, the low-order rotational component (order &lt;DEN) is not mapped to DC, so the baseband characteristics are improved when DEN increases, and the baseband and passband are improved. The difference in average noise level from the case of is small (0.5 dB or less). However, if DEN increases further, F_{upper upper}Decreases to bring the lowest frequency rotation component closer to the upper limit of the output signal range for both the baseband and passband. The action of this depends on the order of its lowest frequency component. If it is a higher order component, its action is less damaging than if it were a lower order component. For example, when the description in column 4 is compared to the proportions 2/11, 3/11 and 4/11, the lowest frequency component (1 / 11F in each case)._DACAlternatively, 75.6 MHz) can be observed to be the third component for 4/11, the fourth component for 3/11 and the fifth component for 2/11. Therefore, 2/11 is expected to be a better choice than 3/11 or 4/11, and the standard deviation numbers for baseband (column 6) support this. In general, in the case of baseband, it is desirable to choose a proportion that makes the lowest frequency rotation component the highest possible order (ie, as far to the right in column 4). For example, for a given system, F in this example_{upper upper}It is expected to cause problems at &lt;62MHz, but this is because the DC component makes the baseband characteristics worse than the passband characteristics (62-48.5 (margin above the band) = 13.5-0 band (band). This is due to the same reason as the lower margin)). Such an upper margin is desirable, because according to arbitrary diffusion F_{upper upper}This is because the noise component in is inevitably brought close to the upper limit of the output signal frequency range.

【0099】

By the way, it is because the higher-order rotation component (order&gt; 9) does not affect the noise characteristics so much in the case of the first embodiment. Therefore, in the graph of FIG. 14, the lines L1 to L9 for the first nine rotation components It is reasonable to plot only. The optimum overall noise value is obtained for the first embodiment (baseband) by r / n = 3/14 and for the third embodiment (passband) by r / n = 2/7. .. For passbands, 5/13 is also a good choice. Not only should the average noise characteristics be good, but the standard deviation of the noise characteristics should also be good, which is a measure of the volatility of the noise characteristics between devices. For example, for a passband where noise at 64 MHz is acceptable, 5/13 may be selected. On the other hand, if noise is not tolerated at 64MHz, 2/7 must be selected. For example, in a cell communication system, the DAC can be used to generate a transmit signal in the transmit band (eg) 13.5 MHz to 48.5 MHz. In this case, a receive band of (eg) 53.5 MHz to 88.5 MHz may be used for the received signal. What this means is that the system (rather than the DAC above) is affected by noise in the receive band, so placing noise components at each frequency in this band is a potential problem. .. Therefore, at 118.8MHz, F for a ratio of 2/7_{upper upper}Is even better.

【0100】

The last two columns 10 and 11 in the table in Figure 21 show the noise characteristic values (mean -2σ) generated by subtracting twice the standard deviation σ from the mean for both cases. .. Therefore, each value in column 10 is generated by subtracting twice the value in column 6 from the value in column 5. Similarly, each value in column 11 is generated by subtracting twice the value in column 8 from the value in column 7. The optimal column 10 number is obtained when r / n = 5/13 or 3/14. Similarly, the optimal column 11 number is obtained when r / n = 2/7 or 5/13.

【0101】

The values in columns 10 and 11 are useful to device manufacturers in assessing the trade-off between device yield and minimum guaranteed device performance. Based on known device yield curves, if the minimum guaranteed performance is estimated based on "mean -2σ" numbers, such as the numbers in columns 10 and 11, about 95% of manufactured devices will meet the guaranteed performance. It is known that the yield is 95% or more.

【0102】

If instead of using the "average -2σ" value, the manufacturer estimates the guaranteed performance based on a more lenient "average -3σ" value, the yield will be slightly increased, for example to 98.5%, and the unit cost will be. Although slightly reduced, consumers are less interested in the device as the estimated performance is naturally lower. If the manufacturer estimates the guaranteed performance based on a more stringent "average -σ" number, the yield will drop dramatically to, for example, 50%, doubling the unit cost, but the estimated performance will be even higher and the consumer. On the other hand, the device becomes more attractive. In this case, the "average -2σ" number is a reasonable trade-off, which says that it is a performance level that is attractive to consumers (eg r / n = 5/13). This is because the yield is preferably kept high so that the unit cost is economical while giving 120.4 dB).

【0103】

In the last row of columns 10 and 11, we see a comparable "mean -2σ" number (108.0 dB) for the DAC when a random rotation is performed. The improvement achieved by the optimal candidate ratio in these examples is approximately 12 dB, which is an extra 2 bits in DAC accuracy and is a very important improvement.

【0104】

Therefore, using an analysis based on the graphs shown in FIGS. 11-20 and the statistical information collected from the table in FIG. 21, good r / n should be used in any particular situation. It is possible to systematically select the value. Each graph can be generated by a computer operating according to a computer program, and "holes" can be manually identified (in print or on the display screen) or automatically identified and matched by the computer program.

【0105】

It will be appreciated that each of the above embodiments used different r-values in different conversion cycles, but it is not necessary to do this in all cases. Fixed r-values can be used in the embodiment where each rotational component and each intermodulated product are all mapped to the desired band of interest by rotation with a fixed r-value. Also, although the segment rotation block described with respect to FIG. 13 employs a so-called "barrel shifter" architecture, in each embodiment of the invention any other suitable segment rotation block configuration and It will also be understood that the architecture can be used. For example, a butterfly shuffler architecture or a tree structure can be adopted. Alternatively, in order to avoid the need for such a barrel shifter, an architecture different from that shown in FIG. 5 may be adopted as described below.

【0106】

In each of the embodiments described above with reference to FIGS. 5 to 13, the binary input words D1 to Dm are first totally decoded by the binary samometa decoder 6 to produce the samometacoded input signals IT1 to ITn. Derived. These samo-metacoded input signals IT1 to ITn are then rotated by the segment rotation block 22 as a whole by the amount of rotation r to generate a group of rotated output signals OT1 to OTn. , 4 differential switch circuits provided in each of the n segments₁~4_nFunctions as inputs T1 to Tn for.

【0107】

FIG. 22 shows an alternative layout configuration of the DAC 200 that embodies the present invention. Each element of the DAC of FIG. 22 that is the same as or closely corresponds to each element of the DAC of FIG. 5 discussed above is represented by the same reference number, and the description of these elements is omitted. In the DAC of FIG. 22, each segment has a local decoder 26 in addition to the constant current source 2 and switch 4 described above with respect to FIG. The switch 4 in each segment is controlled by the individualized samo-metacoded signal T supplied from the local decoder 26 to the switch 4.

【0108】

The DAC of FIG. 22 includes a rotation control block 24 substantially similar to the rotation control block 24 of FIG. 5, but the binary samometa decoder 6 and segment rotation block 22 of FIG. 5 are not required in this embodiment. The local decoder 26 in each segment receives the rotation amount r supplied from the rotation control block 124 at the first input, and receives the binary input words D1 to Dm at the second input.

【0109】

The circuit contained within the local decoder 26 is described with reference to FIG. Each local decoder includes an adder 262 and a comparator 264. The adder receives the rotation amount r applied to the first input of the local decoder at one input, and receives the pre-allocated segment ID unique to the segment at the other input. The comparator 264 has two inputs, the binary input words D1 to Dm applied to the second input of the local decoder, and the output ID of the adder 262._rotIs received, and the sumo metacoded signal T for that segment is output.

【0110】

Next, the operation of the DAC 200 shown in FIGS. 22 and 23 will be described. In this embodiment, the number n of segments is 128, and the value of the amount of rotation r (r &lt;n) is generated by the rotation control circuit 124 in each cycle of the circuit described above with respect to FIG. .. Since there are 128 segments in this embodiment, the binary input words D1 to Dm are 7 bits wide, as are the amount of rotation r and the local segment ID. Each of the 128 segments is assigned a unique ID selected from values 0-127. The ID is hard-wired in the local decoder, for example.

【0111】

As can be understood by comparing FIG. 5 with FIG. 12, in this embodiment both the decoding of the binary input words D1 to Dm to the samometacoded signals T1 to Tn and their rotation are (in FIG. 5). It is not done "overall" (by a centralized binary / samometa decoder like decoder 6), but instead it is done locally inside each of the n segments. The amount of rotation r for all segments is still commonly generated by the rotation control circuit 124.

【0112】

In the local decoder 26, the amount of rotation r is added to the local segment ID by the adder 262. Since all carry generated in the above adder is ignored, the result ID of the addition_rotIs "wrapped around" to 0 after exceeding 127 (ie, the adder is mod-128). The result ID_rotIs then compared by the comparator 264 with the binary input words D1 through Dm to determine the state of the differential switch circuit 4 for that segment. In this example, if the binary input word is greater than the result of the addition, the output (T) of the comparator is high (1).

【0113】

When such a greater-than comparator is used in each of the 128 segments as described above, one of each segment (ID) in any cycle._rotThe segment where = 127) is always in the OFF state (T = 0) because the binary input word cannot be larger than 127. To maintain the zero offset (taking into account the differential current switching characteristics of the switch circuit above), a surplus "dummy" segment that is always kept in the ON state (T = 1) is included. This is more convenient than using only 127 segments, because in that case you need a mod-127 adder instead of a simple mod-128 adder in each segment. If the comparator performs a greater-than-or-equal comparison instead, then one of each segment (ID)_rotSince (the segment where = 0) is always in the ON state (T = 1), the surplus dummy segment must be instead maintained in the OFF state (T = 0) to achieve zero offset.

【0114】

As mentioned above, each segment has an ID ranging from 0 to 127. Therefore, assuming the moment when the amount of rotation r is 0, each segment whose ID is smaller than the binary input word has a samo-metacoded signal T set to 1. All other segments have a samo-metacoded signal set to 0. Therefore, in this embodiment, the group of comparators 264 perform the same basic functions as the binary samometa decoder 6 of the embodiment of FIG.

【0115】

Adding a non-zero rotation amount r to each of the segment IDs in each cycle has the effect of rotating the segment ID by the amount r, so in the current cycle compared to the group activated in the previous cycle. Invokes different groups of segments for the same binary input word. Therefore, the group of adders 262 perform the same basic functions as the segment rotation block 22 of FIG. One advantage of the embodiment of FIG. 22 compared to the embodiment of FIG. 5 is that the embodiment avoids the need for a barrel shifter that can become heavier as the number of segments increases.

【0116】

By the way, it is also possible to achieve the same effect by subtracting the ID from the rotation amount r instead of adding the segment ID to the rotation amount r. Subtraction can be achieved, for example, by providing the segment ID in the form of two's complement and adding it to the amount of rotation r. FIG. 24 shows one possible implementation of rotation control block 124 in FIG. 22; this is an alternative implementation of the implementation shown in FIG. 12 and can also be used in the DAC of FIG. The rotation control circuit of FIG. 12 has a 7-bit register 70.₁~70₄, Multiplexer 72, first latch 74, adder 76 and second latch 78. The multiplexer 72 is a 7-bit register 70₁~70₄Four data inputs connected to their respective outputs R1 to R4 to receive outputs R1 to R4, and two selections connected to two selection signals S1 and S2 to receive the selection signals S1 and S2. Has an input. The multiplexer 72 selects one of its four data inputs R1 to R4 depending on the selection signals S1 and S2. The output of the first latch 74 (ie, selected from the data inputs R1 through R4) is provided via the first latch 74 as one input of the adder 76. The output of the adder is provided to the input of the second latch 78. The output of the second latch 78 provides the amount of rotation r, which is fed back and acts as another input to the adder 76.

【0117】

Four registers 70 in the operation of the rotation control circuit of FIG.₁~70₄For each, four predetermined possible values R1 to R4 for the rotation amount r are loaded. The values R1 to R4 may all be different, but two or more values can be the same. One of these possible values is randomly selected by the multiplexer 72 in each conversion cycle by supplying two pseudo-random bits as the multiplexer selection signals S1 and S2. In this example, each possible value is selected on average by the same frequency. Each possible value is selected as described above to give the desired mean and spread. For example, using the values 49, 51, 52 and 53 gives a mean of 51.25 and a spread of 4. The randomly selected values are then accumulated by the adder 76 and the second latch 78 in a manner similar to the second adder 54 and latch 58 of FIG. 12 to provide the amount r at the output of the rotation control circuit. To do.

【0118】

In the example of FIG. 24, the four registers 70₁~70₄Is placed. However, any suitable number of registers can be used. It will be appreciated that register values R1 through R4 can be preset or dynamically loaded into each register as needed. By the way, if extremely high speed operation is required, for the local decoder for each segment, the same for each bit of each parameter (segment ID, rotation amount r and binary input words D1 ~ Dm). Two (or more) circuit parts that perform basic addition and comparison operations of are arranged. For example, the first circuit portion may act on each upper bit according to each rising edge of the clock signal, and the second circuit portion can act on each lower bit according to each falling edge of the clock signal. .. The two or more circuit parts may also operate in a pipeline manner if desired.

【0119】

One example of such a pipelined local decoder is described with reference to FIGS. 25 and 26. FIG. 25 shows the first circuit part 26.₁And the second circuit part 26₂The local decoder circuit 260 equipped with the above is shown. Circuit part 26₁And 26₂Since each of the above is generally similar to the single local decoder 26 described above with respect to FIG. 23, here the circuit portion 26₁And 26₂Further detailed description of the above will be omitted.

【0120】

The operation performed by the local decoder 260 in this example is the first circuit portion 26.₁The operation on each lower bit performed by and the second circuit part 26₂It is divided into operations related to each higher-order bit performed by. 1st circuit part 26₁Uses only the lower bit r (lsb) of the amount of rotation r, the lower bit D (lsb) of the binary input words D1 to Dm, and the lower bit ID (lsb) of the local segment ID. 2nd circuit part 26₂Uses only the high-order bit r (msb) of the amount of rotation r, the high-order bit D (msb) of the binary input words D1 to Dm, and the high-order bit ID (msb) of the local segment ID. Lower bit adder 262, as shown in Figure 25₁From the upper bit adder 262₂Carry bit carry-add also needs to be communicated to and the lower bit comparator 264₁From the upper bit comparator 264₂Carry bit carry-comp needs to be communicated to. Also, the edge-triggered latch L1 is used to control the timing described with respect to FIG.₁, L1₂, L2₁, L2₂And L3₁Is included.

【0121】

Starting from clock edge A, lower bit adder 262₁Adds the amount of rotation r and the lower bits r (lsb) and ID (lsb) of the local segment ID. Result ID of this addition_rot(lsb) and carry-add are latch L1 respectively₁And latch L3₁The clock falls and is latched by B. At this point, the second adder is the first comparator 264.₁Is the first addition latch result ID_rotAt the same time as comparing (lsb) with each lower data bit D (lsb), (1st circuit part 26₁Starts adding the most significant bits r (msb) and ID (msb) of the rotation amount r and the local segment ID (taking into account the carry-add bits passed from). The results of the second addition and the first comparison are then latches L1 at clock rise C, respectively.₂And L2₁Latched by. At this point, the first circuit part 26₁Can start operations on the data for the next conversion cycle, while the second comparator 264₂Completes the operation related to the previous conversion cycle.

【0122】

The examples of FIGS. 25 and 26 divide the addition operation into two subordinate operations "ADD lsbs" and "ADD msbs". Each of these sub-operations contains fewer bits than when the operation was performed on all bits of r and ID, so that the sub-operations on each lsb can be performed within half a cycle, even at high cycle speeds. Can be completed. This also applies to the comparison operation that is divided into two less subordinate operations "COMP lsbs" and "COMP msbs". As is clear from FIG. 26, in this embodiment, ADD lsbs overlaps with COMP msbs and ADD msbs overlaps with COMP lsbs.

【0123】

In this way, the operations performed by the local decoder 260 are pipelined, and each operation from one conversion cycle overlaps with each operation from adjacent cycles. Two circuit parts 26 with a local decoder as described for FIGS. 25 and 26₁And 26₂Another benefit of splitting into is the first circuit part 26, which operates for each lower bit (lsbs).₁However, each segment ID of each segment is shared among the segments that share the same bit pattern in each of their lower bits.

【0124】

For example, 128 segments treated as 8 "groups", each with 16 "elements (emembr)" (each element in each group has the same ID in the lsb) Taking) as an example, the first group (with lsb ID = 000) consists of segments 0, 8, 16, ..., 120, and the second group (with lsb ID = 001) consists of segments 1, It consists of 9, 17, ..., 121, and so on up to the 8th group (with lsb ID = 111) consisting of segments 7, 15, 23, ..., 127. Only one lsb local decoder circuit part is required for each group (each element has its own msb local decoder circuit part), and the "carry-add" and "carry-comp" signals described above It is routed to all elements of the group.

【0125】

This technique can save about 50% of the logic (corresponding to the number of gates, power and area) compared to the undivided local decoder described above with respect to FIG. According to an eight group of 16 segments (using 3 lsb and 4 msb), the number of gates is 8 × (16 × 7N) = 896N to 8 × (3N + 16 × 4N). ) = 536N, which is 60% of the original (40% saved).

【0126】

This savings is even greater for a large number of small groups (for example, for 8 16 groups, 16 × (8 × 7N) = 896N to 16 × (4N + 8 × 3N) = 448N, a 50% savings. However, other design considerations may be considered that make the use of small groups less attractive. Although the present invention has been described with respect to DACs, those skilled in the art will appreciate that the present invention is applicable to any type of mixed signal circuit having a segmented architecture. For example, the present invention can be applied to A / D converters, programmable current generators, and to mixers having a segmented architecture.

【0127】

The pipelined rotating circuits described above with respect to FIGS. 25 and 26 have even more general applicability than in mixed signal circuits. For example, in another embodiment, a digital-only circuit is required to generate a group of digital signals that are controlled by a samometacode according to the applied control signal and rotated according to the amount of rotation. In this case, the digital circuit has a plurality of signal generation circuits, each of which includes a rotating circuit of FIG. 25 that generates one of a group of digital signals.

【0128】

(Appendix 1) A mixed signal circuit including a digital circuit and an analog circuit that work to perform a series of operation cycles. The analog circuit cooperates with an output signal having a frequency in a predetermined desired range frequency. A digital signal generating means having a plurality of circuit segments to be generated and capable of operating to generate a group of digital signals applied to each of the segments in each of the cycles. When r is the amount of rotation with respect to the related cycle, each digital signal applied to each of the segments in each cycle is compared with each digital signal applied in the previous cycle, and the rotating means for rotating only r segments. And, as a result of the rotation, one or more rotation components, which are each frequency component existing in the frequency spectrum of the output signal, move to one or more preselected frequencies outside the predetermined desired range. A mixed signal circuit comprising and or a rotation control means for setting the rotation amount r for each of the cycles so as to be mapped to a preselected narrow band frequency.

【0129】

(Appendix 2) In the mixed signal circuit according to Appendix 1, the rotation control means causes substantially all rotation components to move to one or more preselected frequencies outside the predetermined desired range. Alternatively, a mixed signal circuit comprising setting the rotation amount r for each cycle so as to be mapped to a preselected narrow band frequency.

【0130】

(Appendix 3) In the mixed signal circuit according to Appendix 1, the rotation control means sets the rotation amount r for each cycle in order to minimize the number of each low-order rotation component within a predetermined desired range. A mixed signal circuit characterized by being set. (Appendix 4) In the mixed signal circuit according to any one of Appendix 1 or 3, the rotation control means has the above-mentioned respective rotation control means in order to maximize the amount of each low-order rotation component outside the predetermined desired range. A mixed signal circuit comprising setting the rotation amount r with respect to a cycle.

【0131】

(Appendix 5) In the mixed signal circuit according to any one of Appendix 1 to 4, the rotation control means has n as the number of segments, and the average value of the rotation amount r is equal to or equal to 0.4n. A mixed signal circuit characterized in that the rotation amount r for each cycle is set so as to be close to each other. (Appendix 6) In the mixed signal circuit according to any one of Appendix 1 to 4, the rotation control means has n as the number of segments, and the average value of the rotation amount r is equal to or equal to 0.5n. A mixed signal circuit characterized in that the rotation amount r for each cycle is set so as to be close to each other.

【0132】

(Appendix 7) In the mixed signal circuit according to any one of Appendix 1 to 4, the rotation control means sets the rotation amount r for each cycle so that the average value of the rotation amount r becomes smaller than 1. A mixed signal circuit characterized by being set. (Appendix 8) In the mixed signal circuit according to any one of Appendix 1 to 7, the rotation control means can act to set an individual rotation amount r for each of the cycles. Mixed signal circuit.

【0133】

(Appendix 9) In the mixed signal circuit described in Appendix 8, the rotation control means selects each rotation amount from a plurality of predetermined different possible values, thereby performing the rotation amount for each cycle. A mixed signal circuit comprising a spreading means capable of diffusing. (Appendix 10) In the mixed signal circuit according to Appendix 9, the plurality of predetermined different possible values are integer values, and the diffusion of each rotation amount is the rotation over each continuous cycle. A mixed signal circuit characterized in that the mean value of a quantity is such that it is a non-integer value.

【0134】

(Supplementary Note 11) In the mixed signal circuit according to any one of Supplementary note 9 or 10, the diffusion means is a mixed signal circuit in which selection is performed in a random or pseudo-random manner. (Appendix 12) In the mixed signal circuit according to any one of Appendix 9 to 11, the predetermined different possible values adopted by the diffusion means improve noise dispersion in the predetermined desired range. A mixed signal circuit characterized by being selected to be.

【0135】

(Appendix 13) In the mixed signal circuit according to any one of Appendix 9 to 12, each of the predetermined different possible values is a rotation amount of a predetermined value, and the rotation amount of the predetermined value is relative to the rotation amount of the predetermined value. A mixed signal circuit characterized in that all of the lowest order rotation components resulting from individual rotations depending on the value are mapped outside the predetermined desired range.

【0136】

(Appendix 14) In the mixed signal circuit according to any one of Appendix 9 to 13, each of the predetermined different possible values is a rotation amount of a predetermined value, and the rotation amount of the predetermined value is relative to the rotation amount of the predetermined value. A mixed signal circuit characterized in that any rotation component that results from individual rotations depending on the value and that is mapped to the predetermined desired range is a higher-order rotation component.

【0137】

(Appendix 15) In the mixed signal circuit according to Appendix 10, each of the integer values is a continuous value close to the average value. (Appendix 16) In the mixed signal circuit according to Appendix 1, the rotation control means has the above-mentioned respective rotation control means so that the average value of the ratio r / n is equal to or close to a predetermined ratio selected from the following group of ratios. A mixed signal circuit characterized in that the rotation amount r is set for a cycle: 1/3, 1/4, 1/5, 2/5, 2/7, 3/7, 3/8, 2/9, 3/10, 2/11, 3/11, 4/11, 5/ 12, 3/13, 4/13, 5/13, 3/14, and 4/15.

【0138】

(Appendix 17) In the mixed signal circuit according to Appendix 16, the predetermined desired range is within the baseband, and the selected ratio has a denominator of 7 or more, preferably 10 or more. A mixed signal circuit characterized by. (Appendix 18) In the mixed signal circuit according to Appendix 16, the predetermined desired range is within the baseband, and the selected ratios are 2/11, 5/12, 3/13, 5 A mixed signal circuit characterized by being one of / 13 and 3/14.

【0139】

(Appendix 19) In the mixed signal circuit according to Appendix 16, the predetermined desired range is within the pass band in the first Nyquist region, and the selected ratios are 2/7, 5/12, A mixed signal circuit characterized by being one of 5/13 and 3/14. (Appendix 20) In the mixed signal circuit according to any one of Appendix 1 to 19, the predetermined desired range is within the baseband, and the rotation control means is an average of the ratio r / n. A mixed signal circuit characterized in that the rotation amount r is set for each cycle so that the value is in the range of 20/128 to 60/128.

【0140】

(Appendix 21) In the mixed signal circuit according to any one of Appendix 1 to 20, the predetermined desired range is within the pass band in the second Nyquist region, and the rotation control means has the ratio. A mixed signal circuit comprising setting the rotation amount r for each cycle so that the mean value of r / n is equal to or close to 1/3, 48/128 or 60/128.

【0141】

(Appendix 22) In the mixed signal circuit according to any one of Appendix 1 to 21, the predetermined desired range is within the pass band in the third Nyquist region, and the rotation control means has the ratio. Set the rotation amount r for each cycle so that the average value of r / n is close to 8/128, 32/128, 48/128 or 51.2 / 128, preferably close to 32/128. Characterized mixed signal circuit.

【0142】

(Appendix 23) In the mixed signal circuit according to any one of Appendix 1 to 22, the rotating means and the digital signal generating means cooperate to set the ID of each segment in each cycle and the rotation amount r. It is provided with an ID rotating means capable of operating only to rotate and a determining means capable of generating the digital signal for each segment depending on the comparison between the rotated ID of the segment and the data signal. Characterized mixed signal circuit.

【0143】

(Appendix 24) In the mixed signal circuit according to Appendix 23, each segment has a local decoder, and the local decoder includes the data signal, the rotation amount r, and a segment uniquely assigned to the segment. The local decoder is connected to receive an ID, and in each cycle, the local decoder is a rotated ID signal that depends on the segment ID assigned and is different from the rotated ID signal in the previous cycle by the rotation amount r. A mixture characterized in that it can generate a signal and can act to generate the digital signal on a segment of the local decoder depending on the comparison between the rotated ID signal and the data signal. Signal circuit.

【0144】

(Appendix 25) In the mixed signal circuit according to Appendix 24, the mixed signal circuit has first and second circuit portions, and the first circuit portion has the rotated ID for one or more segments. It can generate a first portion of the signal and act to compare that portion of the rotated ID signal with the first portion of the data signal, the second circuit portion for the one or more segments. Therefore, it is possible to generate a second part of the rotated ID signal and to compare that part with the second part of the data signal, and the second circuit part is the said of the rotated ID signal. A mixed signal circuit comprising generating a second portion, the first circuit portion comparing the first portion of the rotated ID signal with the first portion of the data signal.

【0145】

(Appendix 26) In the mixed signal circuit described in Appendix 25, for the group of the segments in which the first part of each rotated ID signal is the same and the first part of each data signal is the same. A mixed signal circuit characterized in that one of the first circuit portions is arranged in common. (Supplementary note 27) A digital / analog conversion circuit comprising the mixed signal circuit according to any one of Supplementary notes 1 to 26.

【0146】

(Appendix 28) In the digital / analog conversion circuit described in Appendix 27, each segment includes a current source circuit or a current suction circuit, and the output signal is a current source / current of the segment selected within the respective segments. Derived by summing the respective currents fed by the suction circuit or optionally sucked, the selection of each segment in each cycle is the group of digital applications applied to each segment in that cycle. A digital-to-analog conversion circuit characterized in that it is performed according to a signal.

【0147】

(Appendix 29) In a mixed signal circuit that includes a digital circuit and an analog circuit and works to perform a series of operation cycles, the analog circuit cooperates with an output signal having a frequency within a predetermined desired range frequency. It is a noise shaping method used in a mixed signal circuit having a plurality of circuit segments to be generated, and is associated with a step of generating a group of digital signals applied to each of the segments in each cycle. The amount of rotation for a cycle, the step of rotating each digital signal applied to each segment in each cycle by r segments compared to the digital signal applied in the previous cycle, and the output as a result of the rotation. Each one or more rotational components, each frequency component present in the frequency spectrum of the signal, move to one or more preselected frequencies or to a preselected narrow band frequency outside the predetermined desired range. A noise shaping method comprising: a step of setting the rotation amount for each of the cycles so as to be mapped to.

【0148】

(Appendix 30) A method of selecting the amount of rotation r used by the mixed signal circuit according to any one of Appendix 1 to 26, which is orthogonal to the first axis displaying the frequency and the first axis. The rotation using the corresponding first line in the graph for each of the stages of plotting a graph having a second axis displaying the amount of rotation r with and a plurality of preselected low order rotation components. A step of displaying the individual frequencies to which the component is mapped when the quantity r is varied, and one or more extending in the direction of the second axis at an appropriate position along the first axis in the graph. Corresponding to the step of displaying one or more frequencies in the desired frequency range of the output signal using the corresponding second line, and in the graph, intersecting by any of the first line within the second line. It comprises a step of specifying a region including a portion not to be formed, and a step of selecting the rotation amount r to be used by the mixed signal circuit from the range of the rotation amount r corresponding to the region thus specified. A method of selecting the amount of rotation characterized by that.

【0149】

(Appendix 31) A method of selecting the amount of rotation r used by the mixed signal circuit according to any one of Appendix 1 to 26, which is orthogonal to the first axis displaying the frequency and the first axis. For each of the steps of plotting the graph with the second axis displaying the amount of rotation r and the plurality of preselected significant intermodulation sidebands, the corresponding first group of lines in the graph. It is used to display the individual frequencies to which the sideband is mapped when the amount of rotation is changed, and the direction of the second axis at an appropriate position along the first axis in the graph. A step of displaying one or more frequencies in the desired frequency range of the output signal using one or more corresponding second lines extending to, and in the graph, the first of the second lines. The amount of rotation to be used by the mixed signal circuit from the stage of identifying a region that includes a portion that is not intersected by any of the lines of one group and the range of the amount of rotation r corresponding to the region thus identified. A method of selecting the amount of rotation, which is characterized by a step of selecting and a method of selecting.

【0150】

(Appendix 32) A method of selecting the rotation amount r used by the mixed signal circuit according to any one of Supplementary note 1 to 26, wherein the first axis displaying the frequency and the rotation amount orthogonal to the first axis are selected. The rotation using the corresponding first line in the first graph for each of the stages of plotting the first graph with the second axis displaying r and the plurality of preselected low order rotation components. The step of displaying the individual frequencies to which the components are mapped when the quantity r is varied, and the said in the first graph at appropriate positions along the first axis of the first graph. A step of displaying one or more frequencies in the desired frequency range of the output signal using one or more corresponding second lines extending in the direction of the second axis, and in the first graph, said first. A step of identifying a region of the two lines that includes a portion that is not crossed by any of the first lines, a first axis that displays the frequency, and a second that is orthogonal to the first axis and displays the amount of rotation r. The step of plotting a second graph with two axes and for each of a plurality of preselected significant intermodulated sidebands, using the corresponding first group of lines in said second graph, said. The step of displaying the individual frequencies to which the sideband is mapped when the amount of rotation r is changed, and the second in the second graph at an appropriate position along the first axis of the second graph. A step of displaying one or more frequencies in the desired frequency range of the output signal using one or more corresponding second lines extending in the direction of the second axis of the graph, and in the second graph. Corresponds to the step of identifying a region of the second line that includes a portion that is not intersected by any of the lines of the first group, and the region thus identified in one of the first and second graphs. A method for selecting a rotation amount, which comprises a step of selecting the rotation amount r to be used by the mixed signal circuit from the range of the rotation amount r to be performed.

【0151】

(Appendix 33) In the method described in Appendix 32, the rotation amount r in the selection step is specified by the first range of the rotation amount r corresponding to the region specified in the first graph and the second graph. A method of selecting a rotation amount, which is selected so as to be included in both the second range of the rotation amount r corresponding to the region. (Appendix 34) In the method according to any one of Appendix 30 to 33, further, for analysis by the operator, the one or each graph is displayed on the display screen, or the graph is used as a recording medium. A method of selecting an amount of rotation, which comprises a step of printing.

【0152】

(Appendix 35) A group of rotational digital signals is generated in a continuous operation cycle depending on the control signal, the number of the digital signals having a predetermined state in the group and the rotational amount r are specified, and within the cycle. A digital signal generation circuit that specifies the number of digital signals that the group is rotated in the current cycle with respect to the group in the previous cycle, and the digital signal generation circuit is a plurality of signal generation circuits. , Each having a circuit ID uniquely assigned to itself, and each being a rotated ID signal that depends on the assigned circuit ID in each cycle, from the rotated ID signal in the previous cycle. In order to generate a rotated ID signal that differs by the amount of rotation r, and to set the digital signal to the predetermined state for the signal generation circuit depending on the comparison between the rotated ID signal and the control signal. Each of the signal generation circuits generates a first portion of the rotated ID signal and uses that portion of the rotated ID signal as the first portion of the control signal. It includes a first circuit portion that can act for comparison and a second circuit portion that can generate a second portion of the rotated ID signal and act to compare that portion with the second portion of the control signal. In addition, the second circuit portion generates the second portion of the rotated ID signal, while the first circuit portion uses the first portion of the rotated ID signal as the first portion of the control signal. A digital signal generation circuit characterized by comparison.

【0153】

(Appendix 36) In the digital signal generation circuit described in Appendix 35, one said first circuit part has the same first part of each of the rotated ID signals, and the first part of each digital signal is the same. A digital signal generation circuit characterized in that it is commonly arranged for the same group of said segments. (Appendix 37) A mixed signal circuit that works to perform a series of operation cycles, an analog circuit having a plurality of circuit segments that jointly generate output signals having frequencies in a predetermined desired range frequency, and each of the segments. It comprises a digital circuit that generates a group of digital signals in each cycle to apply to, and one or more rotation components that are each frequency component present in the frequency spectrum of the output signal as a result of rotation. Each digital signal applied to each segment in each cycle is preceded so that it is mapped to one or more preselected frequencies or to a preselected narrow band frequency outside the predetermined desired range. A computer program used in the method of selecting the amount of rotation r to be used by a mixed signal circuit, which is rotated by r segments compared to each digital signal applied in the cycle of. , A plot code portion that plots a graph having a first axis representing the frequency and a second axis orthogonal to the first axis and representing the amount of rotation r, and each of the plurality of preselected low-order rotation components. On the other hand, using the corresponding first line in the graph, the rotation component display code portion for displaying the individual frequencies to which the components are mapped when the rotation amount r is changed, and the first in the graph. An output signal that displays one or more frequencies in the desired frequency range of the output signal using one or more corresponding second lines extending in the direction of the second axis at appropriate positions along the axis. By providing the display code portion, it corresponds to the identification of the region including the portion of the second line that is not intersected by any of the first lines and the region thus identified in the graph. A computer-readable recording medium that stores a computer program that facilitates the selection of the amount of rotation r to be used by the mixed signal circuit from the range of the amount of rotation r.

【0154】

(Appendix 38) A mixed signal circuit that works to perform a series of operation cycles, an analog circuit having a plurality of circuit segments that jointly generate output signals having frequencies in a predetermined desired range frequency, and each of the segments. It comprises a digital circuit that generates a group of digital signals in each cycle to apply to, and one or more rotation components that are each frequency component present in the frequency spectrum of the output signal as a result of rotation. Each digital signal applied to each segment in each cycle is preceded so that it is mapped to one or more preselected frequencies or to a preselected narrow band frequency outside the predetermined desired range. A computer program used in the method of selecting the amount of rotation r to be used by a mixed signal circuit, which is rotated by r segments compared to each digital signal applied in the cycle of. , A plot code portion that plots a graph having a first axis representing the frequency and a second axis orthogonal to the first axis and representing the amount of rotation r, and a plurality of preselected significant intermodulated side waves. For each of the bands, a cross-modulated sideband display that displays the individual frequencies to which the sideband is mapped when the amount of rotation is changed, using the corresponding first group of lines in the graph. The cord portion and one or more corresponding second lines extending in the direction of the second axis at appropriate positions along the first axis in the graph are used in the desired frequency range of the output signal. By providing an output signal display code portion for displaying one or more frequencies, identification of a region including a portion of the second line that is not crossed by any of the first line in the graph can be specified. A computer-readable recording medium that stores a computer program that facilitates the selection of the amount of rotation to be used by the mixed signal circuit from the range of the amount of rotation r corresponding to the region thus identified.

【0155】

(Appendix 39) A mixed signal circuit that works to perform a series of operation cycles, an analog circuit having a plurality of circuit segments that jointly generate output signals having frequencies in a predetermined desired range frequency, and each of the segments. It comprises a digital circuit that generates a group of digital signals in each cycle to apply to, and one or more rotation components that are each frequency component present in the frequency spectrum of the output signal as a result of rotation. Each digital signal applied to each segment in each cycle is preceded so that it is mapped to one or more preselected frequencies or to a preselected narrow band frequency outside the predetermined desired range. A computer program used in the method of selecting the amount of rotation r to be used by a mixed signal circuit, which is rotated by r segments compared to each digital signal applied in the cycle of. , A first plot code portion for plotting a first graph having a first axis displaying the frequency and a second axis orthogonal to the first axis and displaying the amount of rotation r, and a plurality of preselected. For each of the low-order rotation components, a rotation component display portion that displays the individual frequencies to which the components are mapped when the rotation amount r is changed, using the corresponding first line in the first graph. Using one or more corresponding second lines extending in the direction of the second axis of the first graph at appropriate positions along the first axis of the first graph in the first graph. The first output signal display code portion that displays one or more frequencies in the desired frequency range of the output signal, the first axis that displays the frequency, and the rotation amount r that is orthogonal to the first axis are displayed. For each of the second plot code portion plotting the second graph with the second axis and the plurality of preselected significant intermodulation sidebands, the corresponding first group of lines in the second graph. A cross-modulated sideband display code portion that is used to display the individual frequencies to which the sideband is mapped when the amount of rotation r is changed.The second graph uses one or more corresponding second lines extending in the direction of the second axis of the second graph at appropriate positions along the first axis of the second graph. By providing a second output signal display code portion that displays one or more frequencies in the desired frequency range of the output signal, in the first graph, by any of the first lines within the second line. Identification of the region including the portion not intersected by any of the first lines in the second graph, and the identification of the region including the portion not intersected by any of the first lines in the second graph, and the identification of the region including the portion not intersected by any of the first lines. On the one hand, a computer-readable recording medium that stores a computer program that facilitates the selection of the rotation amount r to be used by the mixed signal circuit from the range of the rotation amount r corresponding to the region thus identified.

【0156】

[Effect of the invention]

As described in detail above, according to the present invention, it is possible to improve noise shaping in a segmented mixed signal circuit such as a digital / analog converter.

[Simple explanation of drawings]

[Figure 1]

It is a figure which shows each element of the current control type DAC which was considered above as discussed above.

[Figure 2]

As discussed above, it is a diagram showing a table used to explain how a samo-metacoded control signal is derived from a binary input word in the DAC of FIG.

[Fig. 3]

It is a figure which shows each element of the cell array circuit considered above to be used in a DAC as discussed above.

[Fig. 4]

As discussed above, it is a schematic diagram used to explain the occurrence of tilt error and symmetric error in the cell array circuit of FIG.

[Fig. 5]

It is a figure which shows each element of the DAC which embodies the present invention.

[Fig. 6]

It is a schematic diagram used to explain the operation of the DAC of FIG.

[Fig. 7]

It is a figure which shows the frequency spectrum of the output signal of the DAC of FIG. 5 when the segment rotation is not executed.

[Fig. 8]

It is a figure which shows the frequency spectrum of the output signal of the DAC of FIG. 5 when the segment rotation is executed by the rotation amount r = 1.

[Fig. 9]

It is a figure which shows the frequency spectrum of the output signal of the DAC of FIG. 5 when the segment rotation is executed by the rotation amount r = 21.

[Fig. 10]

It is a figure which shows the frequency spectrum of the output signal in another embodiment of this invention.

[Fig. 11]

It is a figure which shows the expanded part of the frequency spectrum of the output signal of FIG.

[Fig. 12]

It is a block diagram which shows an example of the structure of the rotation control block of the DAC of FIG.

[Fig. 13]

It is a block diagram used to explain the structure of the segment rotation block of the DAC of FIG.

[Fig. 14]

It is a figure which shows the graph which shows the mapping of the rotation component in the 1st Example that the output signal frequency range is in the pass band in the 1st Nyquist region.

[Fig. 15]

It is a figure which shows the graph which shows the significant intermodulation side wave band in the said 1st Example.

[Fig. 16]

It is a figure which shows the graph of the mapping of the rotation component in the 2nd Example that the output signal frequency range is in the pass band in the 2nd Nyquist region.

[Fig. 17]

It is a figure which shows the graph which shows the significant intermodulation side wave band in the said 2nd Example.

[Fig. 18]

It is a figure which shows the graph which shows the mapping of the rotation component in the 3rd Example that the output signal frequency range is in the pass band in the 3rd Nyquist region.

[Fig. 19]

It is a figure which shows the graph of the significant intermodulation side wave band in the said 3rd Example.

[Fig. 20]

It is a figure which shows another graph which corresponds to FIG. 14 but shows a higher order rotation component.

[Fig. 21]

It is a figure which shows the table about the 1st Example and the 4th Example that the output signal frequency range is in a baseband.

[Fig. 22]

It is a figure which shows each element of the DAC which concerns on other Examples of this invention.

[Fig. 23]

It is a block diagram which shows an example of the structure of the local decoder of the DAC of FIG. 22.

[Fig. 24]

It is a block diagram which shows an example of the structure of the rotation control block of the DAC of FIG.

[Fig. 25]

It is a block diagram which shows the alternative embodiment of the local decoder of FIG.

[Fig. 26]

It is a timing diagram used for explaining the operation of the local decoder circuit of FIG.

[Explanation of symbols]

1,20,200 ... Digital / Analog Converter (DAC) 2 ... constant current source 2₁~2_n... current source Four₁~4_n... differential switch circuit 6 ... Binary Samometa Decoder 22 ... segment rotation block 24 ... Rotation control block 26 ... local decoder 26₁... 1st circuit part 26₂... the second circuit part 52 ... 1st adder 54 ... 2nd adder 56 ... Pseudo Random Number Generator 58 ... Latch 62 ... 1st multiplexer element 64 ... 2nd multiplexer element 66 ... 3rd multiplexer element 70₁~70₄... 7-bit register 72 ... Multiplexer 74 ... 1st latch 76 ... adder 78 ... 2nd latch 124 ... Rotation control unit 260 ... local decoder circuit 262 ... adder 262₁... lower bit adder 262₂... upper bit adder 264 ... Comparator 264₁... lower bit comparator 264₂... upper bit comparator