Semiconductor device and method of manufacturing the same

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention is a non-volatile memory realized by laminating an insulating film, a semiconductor layer, and a ferroelectric layer on a substrate on which a MOS transistor is formed, and changing the resistivity of the semiconductor layer by polarization of the ferroelectric layer. It relates to the structure of an element and the method of forming the element.

【0002】

[Conventional technology]

With regard to the ability to retain information even when the power supply is cut off, that is, the non-volatility of information recording, which has been conventionally realized by magnetic tapes, hard disk devices, optical disk devices, magneto-optical disk devices, etc., solid-state elements made of semiconductors have been used in recent years. There are many attempts to try. For example, flash memory and FeRAM that have already been put into practical use correspond to this.

【0003】

These are expected to have no movable mechanical parts required for magnetic tape devices, hard disk devices, optical disks, or magneto-optical disk devices in the previous term, and to have small external dimensions and low power consumption. The outline of flash memory is summarized in the first document, "Applied Physics Vol. 65, No. 11 (1996), pp. 1114 to 1124: Flash Memory Technology, Hitoshi Kume". However, the current flash memory and FeRAM have the following problems.

【0004】

According to this, the current flash memory requires a high operating voltage, for example, in the example shown in the first document, the internal maximum voltage is 12V. This is much higher than normal DRAM and LSI operating at 3-4V. In addition, the rewriting time requires 1 millisecond to 1 second, which gives a great stress to the user when considering frequent data rewriting.

【0005】

The outline of FeRAM is described in the second document "Journal of the Institute of Electronics, Information and Communication Engineers Vol.80, No.2 (1997) pp. 169-175: Ferroelectric memory as an ideal memory, Elliott M. Philofsky". It is summarized. According to this, it is disclosed that the flash memory has a high internal voltage of 12 V or more, whereas the FeRAM has a low voltage of 5 V or less. The access time is also very short at 250 nanoseconds.

【0006】

In addition to these flash memories and FeRAMs, there is a non-volatile storage element that has been energetically under development and studied recently, which is collectively called "MFS transistor". For example, the outline is summarized in the third document, "Journal of the Institute of Electronics, Information and Communication Engineers Vol.77, No.9, pp. 976-979: Trends in the Development of Ferroelectric Memory and the Future, Yasuo Tarui". In this device, a ferroelectric substance is placed at the gate portion of a normal MOS transistor structure, and the conductance of the transistor channel is changed according to the direction of polarization of the ferroelectric substance to realize a non-volatile memory. Normally, it is difficult to place the ferroelectric substance directly on the Si substrate due to problems such as diffusion of elements. Therefore, an MFIS structure in which an insulator film (Insulator) that also serves as a diffusion suppression layer is inserted between the substrate and the ferroelectric substance, or Furthermore, the MFMIS structure with a floating electrode inserted is often adopted.

【0007】

The current flash memory and FeRAM have the following problems.

【0008】

According to the first document, the current flash memory requires a high operating voltage, for example, in the example shown in the first document, the internal maximum voltage is 12 V. This is much higher than normal DRAM and LSI operating at 3-4V. In addition, the rewriting time requires 1 millisecond to 1 second, which gives a great stress to the user when considering frequent data rewriting.

【0009】

According to the second document, in the case of FeRAM, the switching characteristics of the ferroelectric capacitor are easily affected by temperature, and even though high temperature annealing is required, low melting point metals such as Pb and Bi are used as constituent elements of the ferroelectric layer. Issues such as the problem of diffusion of these elements on the substrate due to the inclusion of these elements are also disclosed.

【0010】

In addition, the MFS device also has the problem of temperature-dependent characteristic fluctuations and element diffusion that existed with FeRAM, and in particular, because the ferroelectric layer is placed directly above the gate, which has a great influence on the transistor operation. In addition, the problem is bigger. In addition, after applying a voltage to the gate and switching the ferroelectric layer, a counterelectric field due to the polarization of the ferroelectric layer exists even if the voltage is taken, so that the memorized polarization direction is always eliminated. Receive force in the direction of being done. Therefore, it is difficult to obtain a sufficient record holding time.

【0011】

By the way, in addition, there is "Ferroelectric non-volatile variable sintered element" as an attempt to realize a non-volatile memory element by using a ferroelectric substance. Hereinafter, in the present specification, for the sake of simplicity, an element similar to this will be referred to as a VRF for convenience. This is because it has a variable resistor and uses the action of a ferroelectric substance. For example, the fourth document, "United States Patent: Patent Number: 5070385, Inventors Joseph T. Evance, Jr.,: Jeff A. It is disclosed in detail in "Bullington". This device is similar to a non-volatile storage element that uses a ferroelectric substance such as the FeRAM or MFS transistor, but both strongly affect the polarization stability of the ferroelectric substance such as the capacitance of the capacitor and the conductance of the channel of the transistor. While the memory operation is realized by using the parameters to be obtained, in this device, the resistance of the semiconductor layer existing adjacent to the ferroelectric substance is changed by the polarization of the ferroelectric substance to identify the presence or absence of information. .. That is, the semiconductor layer is used as a variable resistor. This is different from MFS in that MFS places a ferroelectric substance in the gate part of the transistor structure to change the conductance of the transistor channel itself, whereas in VRF there is a variable resistor in the part different from the transistor. , The gate, source, and drain of the transistor are connected to this variable resistor through wiring. As a result, the variable resistance portion that holds information even when the polarization of the ferroelectric substance is liable to fluctuate shows more stable operation without being greatly affected by the above-mentioned two elements, and has a large operation margin. It will be.

【0012】

[Problems to be Solved by the Invention]

However, VRF also has the following problems.

【0013】

In the example disclosed in the fourth document, a lower electrode metal, an oxide semiconductor, a ferroelectric substance, and an upper electrode metal are laminated in the vicinity of a MOS transistor formed on a Si substrate by a general method. Here, the oxide semiconductor is selected in a combination such that it crystallizes on the lower electrode metal. However, since this oxide semiconductor is formed as a thin film on the lower electrode, its properties as a semiconductor may be slightly different from those of a bulk oxide semiconductor formed in a large volume. The reason is that the bulk oxide semiconductor is a single crystal over a large volume, whereas when it is formed on a metal electrode, it can only be a polycrystal. In the case of a polycrystal, a large amount of defects and composition non-uniformity are introduced near the grain boundaries, and the resistivity and withstand voltage are significantly different.

【0014】

Further, depending on the forming method, the oxide semiconductor may contain a large amount of impurities other than its constituent elements. For example, the metalorganic vapor phase growth (MOCVD) method uses an organometallic compound or complex containing constituent elements, which always contains carbon, hydrogen, nitrogen, oxygen, and the like. The gas component has a relatively small residual amount, but carbon may remain in a large amount because it is a solid. Even when impurities remain in this way, the resistivity and withstand voltage will be significantly different from the bulk values.

【0015】

By forming the oxide semiconductor layer on the electrode metal as a thin film as described above, the semiconductor characteristics different from the bulk electrical characteristics are exhibited, and the desired resistivity is often not obtained. As a result, it becomes difficult to operate the device at a practical voltage, or it becomes difficult to integrate the device at a practical size.

【0016】

It is preferable that the ZnO layer in the fourth variable resistance element of the present invention is in a single crystal state due to epitaxial growth.

【0017】

A non-volatile semiconductor storage element can be realized by using any of the first to fourth variable resistance elements and connecting them to the gate, source, and drain of a normal MOS transistor formed on the same substrate. it can.

【0018】

4 and 5 are circuit diagrams of the first to fourth variable resistance elements connected to the gate of a normal MOS transistor and to the source or drain.

【0019】

6 and 7 are schematic views showing a device structure when the first to fourth variable resistance elements are connected to the gate of a normal MOS transistor.

【0020】

FIG. 8 is a schematic view showing a device structure when the first to fourth variable resistance elements are connected to the drain of a normal MOS transistor.

【0021】

The same applies when another substance that can form a thin film as a single crystal on the Si substrate and whose resistivity changes greatly depending on the presence or absence of doping is used instead of the first to fourth variable resistance elements. It is possible to create a device structure of.

【0022】

In view of this point, an object of the present invention is to introduce a VRF to realize a non-volatile storage device having a low voltage, a high operating speed, and a sufficient recording holding time, and at the same time, in a VRF type non-volatile storage device. It is an object of the present invention to realize an element having excellent electrical characteristics by continuously forming an insulating layer and a semiconductor layer which are single crystals on a Si substrate and further laminating a ferroelectric layer which is close to a single crystal.

【0023】

[Means for solving problems]

First, the consideration made to reach the operating principle of the variable resistance type non-volatile memory element using the ferroelectric layer according to the present invention will be described.

【0024】

Fig. 1 shows the changes in (a) resistivity, (b) depletion layer thickness retention, and (c) resistance of the variable resistor with respect to the impurity concentration when AlN is used in the semiconductor layer. AlN can grow epitaxially on a Si substrate and can form a single crystal even if it is a thin film. Also, by not doping at all, 1x10 in the thin film state⁷A high resistivity of Ωcm or more is possible. 1x10 by further doping^-3A resistivity as small as Ω cm is also possible. Depletion layer thickness W_depIs uniquely determined with respect to the impurity concentration once the material is determined. This is expressed in (b). On the other hand, (c) shows the change in resistance with respect to the carrier concentration when the size of the variable resistor and the direction of current flow are defined as in (d). The carrier concentration is 1x10 between the resistance when energized and the resistance when cut off.¹⁵cm^-3Even so, there is a difference of 3 digits or more, and it can be seen that it has a sufficient operating range as a variable resistor. However, according to this energization resistance, even if it is the lowest, there is a value close to 1 kΩ, which is too high to detect the difference in the magnitude of the current due to the change in the resistance value and operate it as a storage element. In reality, due to the electric field of the ferroelectric substance, the AlN semiconductor layer is in a carrier accumulation state when energized, and exhibits a value much lower than the resistance value corresponding to the steady carrier concentration. That is, the carrier concentration is 1x10.²⁰cm^-3The resistance value drops to about 10Ω, which is sufficient for use as a variable resistor.

【0025】

Similarly SrTiO₃The results of the same consideration for Si and Si are shown in Fig. 2 and Fig. 3. In either case, it can be seen that there is a resistance change that can be used as a variable resistor as well.

【0026】

AlN and SrTiO₃, And similar to those materials, dielectrics such as ZnO show resistance changes that can be handled as semiconductors from insulators by controlling the amount of impurities introduced, but this is used as a variable resistor for MOS transistor elements. The configuration achieved by connecting to the gate or source / drain is circuit-similar to the configuration disclosed in the fourth document.

【0027】

Further, for example, in the case of AlN, crystals can be grown on a clean Si substrate from which oxide films and contamination have been removed to form a thin film. Further, the formed thin film is a single crystal over the entire surface of the substrate, and does not contain any grain boundaries, voids, or precipitates having different compositions. This point is clearly different from the structure disclosed in the fourth document. That is, in the example of the fourth document, there is a possibility that the conductivity, the breakdown voltage (withstand voltage), etc. may be deteriorated from the bulk value due to grain boundaries, voids, precipitates having different compositions, etc. According to the above, since the conductivity and withstand voltage, which are the bulk properties of the material to be used, can be used as they are, there is little deterioration in performance when used as an element. Moreover, since there is no deterioration, it is easier to design and manufacture the element.

【0028】

From the above consideration, the present invention has a laminated structure of i-AlN and n-AlN, which are insulating layers, by forming a normal MOS transistor on a Si substrate and then epitaxially growing AlN to form a single crystal thin film. Further, it was conceived that this can be made into a variable resistor by laminating a ferroelectric substance on it, and as a result, a non-volatile storage element can be formed.

【0029】

Hereinafter, the present invention derived from the above considerations will be described.

【0030】

In the first variable resistance element of the present invention, an i-AlN layer which is an insulator without doping, an n-AlN layer which is an n-type doped semiconductor, and a ferroelectric layer are sequentially laminated on a Si substrate. It is composed of being.

【0031】

As a result, the resistance value of the n-AlN layer can be changed from about several Ω to a value three orders of magnitude or more larger as the polarization direction of the ferroelectric layer changes.

【0032】

It is preferable that the i-AlN layer and the n-AlN layer in the first variable resistance element of the present invention are in a single crystal state due to epitaxial growth.

【0033】

In the second variable resistance element of the present invention, the i-SrTiO3 layer, which is an insulating layer without doping, the n-SrTiO3 layer, which is an n-type doped semiconductor layer, and the ferroelectric layer are sequentially laminated on the Si substrate. It is composed of being.

【0034】

As a result, the resistance value of the semiconductor layer can be changed from about several Ω to a value three orders of magnitude or more larger as the polarization direction of the ferroelectric layer changes.

【0035】

It is preferable that the SrTiO3 layer in the second variable resistance element of the present invention is in a single crystal state due to epitaxial growth.

【0036】

In the third variable resistance element of the present invention, an i-Si layer which is an insulating layer without doping, an n-Si layer which is an n-type doped semiconductor layer, and a ferroelectric layer are sequentially laminated on a Si substrate. There is.

【0037】

As a result, as the polarization direction of the ferroelectric layer changes, the resistance value of the semiconductor layer can be changed from about several Ω to a value three orders of magnitude or more larger.

【0038】

It is preferable that the Si layer in the third variable resistance element of the present invention is in a single crystal state due to epitaxial growth.

【0039】

In the fourth variable resistance element of the present invention, an i-ZnO layer which is an insulating layer without doping, an n-ZnO layer which is an n-type doped and a semiconductor layer, and a ferroelectric layer are sequentially laminated on a Si substrate. There is.

【0040】

As a result, as the polarization direction of the ferroelectric layer changes, the resistance value of the semiconductor layer can be changed from about several Ω to a value three orders of magnitude or more larger.

【0041】

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) Next, the first embodiment relating to the method for forming a non-volatile storage element in the present invention will be described with reference to the drawings.

【0042】

FIG. 9 schematically shows the method of forming the non-volatile memory element according to the first embodiment of the present invention step by step. First, as shown in (a), the Si substrate 7 is pretreated by a general method such as cleaning, and then LOCOS 8 is formed except for the portion where the element is formed later. Next, as shown in (b), a gate laminated structure 28 composed of a gate insulating film and a gate electrode is formed in the transistor region, and then the variable resistance is generated in the source and drain regions of the transistor and the process after (c) using this as a mask. Impurities are introduced into the formed region by ion implantation to form the injection region 9. Further, as shown in (c), a single crystal i-AlN insulating layer 10 and an n-AlN semiconductor layer thin film 11 are formed. Methods for forming the insulating layer 10 and the semiconductor layer 11 include a molecular beam epitaxy (MBE) method, a sputtering method, a metalorganic metal vapor deposition (MOVPE) method, and an ultra-high vacuum chemical vapor deposition (UHV-CVD) method. .. Here, a case where the i-AlN and n-AlN layers are formed by using the MBE method will be described as a typical example.

【0043】

The Si substrate 7 is subjected to surface treatment such as cleaning again and introduced into the MBE apparatus. Sulfuric acid and hydrogen peroxide, or ammonia and hydrogen peroxide, and dilute hydrofluoric acid are used for the surface treatment as in the general pretreatment.

【0044】

The surface of the Si substrate introduced into the MBE device is still hydrogen (H) atoms and ultra-thin SiO.₂It is covered with an amorphous layer. In the MBE apparatus, the temperature of the Si substrate 7 is raised to a range of 100 to 400 ° C to remove water and adsorbed gas remaining on the surface of the Si substrate 7.

【0045】

After that, the temperature of the Si substrate 7 is further raised to maintain the temperature in the range of 800 to 900 ° C. At this time, the H atoms and thin SiO that covered the surface of the Si substrate 7₂The amorphous layer is desorbed and removed.

【0046】

Then, the AlN crystal layer is formed by supplying the Al raw material and the N raw material by the MBE growth method. The Al raw material is usually held in a Knudsen (K-) cell installed in the MBE apparatus, and is evaporated by heating and supplied to the Si substrate 7. The amount of Al raw material supplied varies greatly depending on several parameters such as the size of the device and the distance between the cell and the substrate, but for example, the pressure measured near the substrate position is 5x10.^-9~ 1x10^-7Torr (1 Torr = 133.322 Pa). The N raw material is introduced from a nitrogen gas cylinder installed outside the device into a plasma cell installed inside the MBE device, excited to a plasma state in the cell, and supplied to the Si substrate. The amount of N raw material supplied varies greatly depending on some parameters such as the size of the device and the distance between the cell and the substrate, but for example, the amount of nitrogen gas introduced into the plasma cell is about 0.05 sccm to 3 sccm. is there. The Al and N raw materials supplied on the Si substrate 7 held at 800 ° C to 900 ° C are in atomic or excited atomic states, respectively, and are diffused and moved on the substrate and then on the substrate. Form a bond as an AlN crystal. At this time, since atoms other than Al and N are not supplied, the formed AlN thin film becomes the i-AlN layer 10 having high insulating properties. The film thickness of the i-AlN layer 10 is preferably 5 to 20 nm, but may be 2 to 50 nm. After forming the i-AlN layer 10 having a desired thickness, an impurity (dopant) that makes AlN n-type, for example, a very small amount of Si or Se is supplied to the substrate together with the Al raw material and the N raw material to form the i-AlN layer 10. The AlN layer formed becomes an n-AlN layer 11 exhibiting n-type conductivity. That is, the i-AlN layer 10 and the n-AlN layer 11 can be continuously formed by adding a dopant in the middle in addition to supplying only the Al and N raw materials. The film thickness of the semiconductor layer n-AlN layer 11 that serves as a variable resistor differs depending on the carrier concentration in the n-AlN layer 11. In each case, the thickness is set to the same thickness as the depletion layer thickness determined by the carrier concentration at room temperature, or 0.9 to 1.1 times the thickness in the range.

【0047】

The lattice constants of Si and AlN differ by about 20%, but AlN layers 10 and 11 grow epitaxially on the Si substrate 7 as a single crystal. When Si (111) is used for the substrate, AlN has the original wurtzite crystal structure and grows in the direction in which the c-axis is perpendicular to the substrate surface. When a Si (001) substrate is used as the substrate, it grows in a sphalerite-type crystal structure.

【0048】

Next, the ferroelectric layer 12 is laminated as shown in (d). The ferroelectric layer 12 also exhibits high crystallinity under the influence of the insulating layer 10 and the semiconductor layer 11. The ferroelectric layer 12 is also formed in the same manner as the insulating layer 10 and the semiconductor layer 11. Crystals having a perovskite structure are mainly used as the ferroelectric substance, but any substance having a ferroelectric property may be used.

【0049】

Next, after laminating the switching upper electrode 31 and the protective film 30 as in (e), a hole for contact is made to form a gate electrode 14 and a source / drain electrode 16. The protective film 30 is usually made of silicon nitride (Si).₃N₄) An amorphous layer is used, but different substances may be used.

【0050】

(Second Embodiment) The second embodiment concerning the method for forming the non-volatile memory element in the present invention will be described with reference to the drawings. FIG. 10 schematically shows the method of forming the non-volatile memory element according to the second embodiment of the present invention step by step. First, as shown in (a), the Si substrate 32 is pretreated by a general method such as cleaning, and then LOCOS 33 is formed except for the portion where the element is formed later. Next, as shown in (b), impurities are introduced into the region where the variable resistor is formed by ion implantation to form the injection region 34. Further, a single crystal i-AlN insulating layer 35 and an n-AlN semiconductor layer 36 thin film are formed. Methods for forming the insulating layer 35 and the semiconductor layer 36 include molecular beam epitaxy (MBE) method, sputtering method, metalorganic vapor vapor deposition (MOVPE) method, and ultra-high vacuum chemical vapor deposition (UHV-CVD) method. .. The materials used are AlN and SrTiO.₃, ZnO, Si, etc., but the materials used are AlN, SrTiO, etc.₃, ZnO, Si, etc., but any semiconductor with a high dielectric constant, which has a large change in resistivity over three orders of magnitude or more due to doping and has crystallinity, may be used. Here, a case where the i-AlN and n-AlN layers are formed by using the MBE method will be described as a typical example.

【0051】

After the step (a), the Si substrate is subjected to surface treatment such as cleaning again and then introduced into the MBE apparatus. Sulfuric acid and hydrogen peroxide, or ammonia and hydrogen peroxide, and dilute hydrofluoric acid are used for the surface treatment as in the general pretreatment.

【0052】

The Si substrate surface 32 introduced in the MBE device still has hydrogen (H) atoms and ultra-thin SiO.₂It is covered with an amorphous layer. In the MBE apparatus, the temperature of the Si substrate 32 is raised to a range of 100 to 400 ° C to remove water and adsorbed gas remaining on the surface of the Si substrate 32.

【0053】

After that, the temperature of the Si substrate 32 is further raised to maintain the temperature in the range of 800 to 900 ° C. At this time, the H atoms and thin SiO that covered the surface of the Si substrate 32₂The amorphous layer is desorbed and removed.

【0054】

Then, the AlN crystal layer is formed by supplying the Al raw material and the N raw material by the MBE growth method. The Al raw material is usually held in a Knudesen (K-) cell installed in the MBE device, and is evaporated by heating and supplied to the Si substrate. The amount of Al raw material supplied varies greatly depending on several parameters such as the size of the device and the distance between the cell and the substrate, but for example, the pressure measured near the substrate position is 5x10.^-9~ 1x10^-7Torr. The N raw material is introduced from a nitrogen gas cylinder installed outside the device into a plasma cell installed inside the MBE device, excited to a plasma state in the cell, and supplied to the Si substrate. The amount of N raw material supplied varies greatly depending on some parameters such as the size of the device and the distance between the cell and the substrate, but the amount of nitrogen gas introduced into the plasma cell is about 0.05 sccm to 3 sccm. .. The Al and N raw materials supplied on the Si substrate held at 800 ° C to 900 ° C are in the atomic or excited atomic state, respectively, and after diffusing and moving on the substrate, AlN is placed on the substrate. Form bonds as crystals. At this time, since atoms other than Al and N are not supplied, the formed AlN thin film becomes an i-AlN layer 35 having high insulating properties. The film thickness of this i-AlN layer is preferably 5 to 20 nm, but may be 2 to 50 nm. After forming an i-AlN layer of a desired thickness, an impurity (dopant) that makes AlN n-type, for example, a very small amount of Si or Se is supplied to the substrate together with the Al raw material and the N raw material to form the i-AlN layer. The AlN layer is an n-AlN layer 36 showing n-type conductivity. That is, i-AlN35 and n-AlN36 can be continuously formed by adding a dopant in the middle in addition to supplying only the Al and N raw materials. The film thickness of the semiconductor layer n-AlN layer 36, which is a variable resistor, depends on the carrier concentration in the n-AlN layer 36, which is determined by the n-type impurities supplied, but both are the depletion layer thickness determined by the carrier concentration at room temperature. The thickness is set to the same thickness or 0.9 to 1.1 times that thickness.

【0055】

The lattice constants of the Si substrate and AlN differ by about 20%, but the AlN layer epitaxially grows as a single crystal with respect to the Si substrate. When Si (111) is used for the substrate, AlN has the original wurtzite crystal structure and grows in the direction in which the c-axis is perpendicular to the substrate surface. When a Si (001) substrate is used as the substrate, it grows by taking an originally unstable sphalerite-type crystal structure.

【0056】

Next, the ferroelectric layer 38 is laminated. The ferroelectric layer 38 also exhibits high crystallinity under the influence of the insulating layer 35 and the semiconductor layer 36. The ferroelectric layer 38 is also formed in the same manner as the insulating layer 35 and the semiconductor layer 36. Crystals having a perovskite structure are mainly used as the ferroelectric substance, but any substance having a ferroelectric property may be used.

【0057】

Then, in order to simplify the next process, the top surface thereof is flattened over the entire surface of the substrate as shown in (c). Chemical Mechanical Polish (CMP) is often used for flattening, but other methods such as dry etching may be used.

【0058】

Next, as shown in (d), the portion where the transistor is formed is opened by dry etching or the like to form the opening 39. The Si substrate surface is exposed in the region 39 where the transistor is formed by this operation.

【0059】

As shown in (e), a gate insulating film 45 and a poly-Si gate electrode 46 are formed in this exposed portion, and impurities are introduced into the source and drain regions using this as a mask by an ion implantation method to form an injection region 47. An upper electrode 40 for switching with respect to the ferroelectric layer is installed on the ferroelectric layer 38.

【0060】

After that, as shown in (f), the entire surface is covered with the protective film 41 to flatten the uppermost surface. The protective film is usually silicon nitride (Si)₃N₄) An amorphous layer is used, but different substances may be used.

【0061】

Subsequently, as shown in (g), a contact hole is opened to form a gate electrode 42 and a source / drain electrode 44.

【0062】

[Effect of the invention]

According to the method for forming a dielectric laminated film and an element of the present invention, an insulating film having excellent insulating properties and a semiconductor film having a large change in resistivity can be formed, and this can be used as a variable resistance portion to operate at a low voltage. It is possible to obtain a non-volatile memory element having a high speed, a sufficiently long memory retention time, and suppressing the influence of the stability of the ferroelectric substance.

[Simple explanation of drawings]

[Figure 1]

The figure which calculated the change of the property of AlN with respect to the carrier concentration used for considering the principle of this invention. [Figure 2]

The figure which calculated the change of the property of SrTiO3 with respect to the carrier concentration used for considering the principle of this invention. [Fig. 3]

The figure which calculated the change of the property of Si with respect to the carrier concentration used for considering the principle of this invention. [Fig. 4]

The figure which represented one form of the circuit structure of the non-volatile memory element in this invention schematically. [Fig. 5]

The figure which schematically represented another form about the circuit structure of the non-volatile memory element in this invention. [Fig. 6]

The figure which shows the element structure in the Example of this invention [Fig. 7]

The figure which shows the element structure in the Example of this invention [Fig. 8]

The figure which shows the element structure in the Example of this invention [Fig. 9]

The figure which schematically showed the manufacturing method of the element in 1st Embodiment [Fig. 10]

The figure which schematically showed the manufacturing method of the element in 2nd Embodiment [Explanation of symbols]

1 transistor 2 Variable resistor 3-bit line (read) 4 word line (read) 5-bit line (write) 6 word line (write) 7 Si board 8 LOCOS 9 injection area 10 i-AlN layer 11 n-Al N layer 12 Ferroelectric layer 13 Source / drain electrodes 14 Gate electrode 15 Switching electrodes 16 Source / drain electrodes 17 contact hole 18 SiO₂Gate oxide film 19 poly-Si gate electrode 20 Ferroelectric layer 21 Gate electrode metal 22 Switching electrodes 23 contact hole 24 Source / Drain Electrode Metal 25 Switching electrodes 26 Gate electrode metal 27 contact holes 28 Gate laminated structure (electrode / poly-Si / SiO₂) 30 Upper electrode plate for switching 31 Switching electrode metal 32 Si board 33 LOCOS 34 Injection area 35 i-AlN 36 n-AlN 37 Ferroelectric layer 38 Protective film 39 opening 40 Upper electrode plate for switching 41 Protective film 42 Gate electrode 43 Switching electrode metal 44 Source / Drain Electrode Metal 45 SiO₂Gate insulating film 46 poly-Si gate electrode