Method and device for driving liquid crystal display device

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to a method for driving a liquid crystal display device suitable for driving a liquid crystal display device that responds at high speed, and a liquid crystal display device using the driving method. In particular, the present invention relates to a drive method and a drive device suitable for a liquid crystal display device driven by a multi-line simultaneous selection method.

【0002】

[Conventional technology]

A multi-line simultaneous selection method (multi-line addressing method: MLA method) has been proposed in order to drive the STN liquid crystal element at a higher speed. The multiple line simultaneous selection method is a method in which a plurality of scanning electrodes (row electrodes) are collectively selected and driven. In the multi-line simultaneous selection method, a predetermined voltage pulse train is applied to each row electrode driven at the same time in order to independently control the column display pattern supplied to the data electrodes (column electrodes).

【0003】

The voltage pulse voltage group (selection pulse group) applied to each row electrode can be represented by a matrix of L rows and K columns. Hereinafter, this matrix is referred to as a selection matrix (A). L is the number of simultaneous selections. Voltage pulse The voltage group is represented as a vector group orthogonal to each other. Therefore, the matrix containing those vectors as elements is an orthogonal matrix. Each row vector in each matrix is orthogonal to each other.

【0004】

In an orthogonal matrix, each row corresponds to each line of the liquid crystal display. For example, the element of the first row of the selection matrix (A) is applied to the first line in the L selection lines. That is, the selection pulse is applied to the first row electrode in the order of the element in the first column and the element in the second column.

【0005】

FIG. 4 is an explanatory diagram showing how to determine the sequence of the voltage waveform applied to the column electrodes. In FIG. 4, (a) shows an example of a selection matrix and display data, (b) shows an example of an image display pattern and a voltage pattern, and (c) shows an example of voltage waveforms of column electrodes i and j. Here, as shown in FIG. 4A, the Hadamard matrix of 4 rows and 2 columns as the pixels and the 4 rows and 4 columns as the selection matrix is taken as an example. In the selection matrix shown in FIG. 4 (a), "1" means a positive selection pulse and "-1" means a negative selection pulse.

【0006】

It is assumed that the display data to be displayed on the column electrodes i and j is as shown in FIG. 4 (a). In FIG. 4 (a), white circles indicate that they are lit and black circles indicate that they are off. Then, the column display pattern (image display pattern) is represented by a vector (d) as shown in FIG. 4 (b). In the vector (d) shown in FIG. 4 (b), "-1" corresponds to the on display and "1" corresponds to the off display.

【0007】

The voltage levels to be applied sequentially to the column electrodes i and j are as shown in the vector (v) shown in FIG. 4 (b). This vector corresponds to the product of the column display pattern and the corresponding row selection pattern bit by bit, and the sum of the results. FIG. 4 (c) is a timing diagram showing the voltage waveforms of the column electrodes i and j corresponding to the vector (v) shown in FIG. 4 (b). In FIG. 4 (c), the vertical axis represents the voltage applied to the column electrodes, and the horizontal axis represents time.

【0008】

According to such a driving method, the frame response of the liquid crystal is suppressed, and as a result, a high-speed response (r + d <200 ms: r is the rise time of the liquid crystal molecule and d is the fall time) and high contrast (40: 1 or more). ) And can be achieved. That is, it becomes possible to provide a high-quality image, which has been difficult in the conventional drive display in a simple matrix display device such as STN.

【0009】

When the liquid crystal display device is driven by the multiple line simultaneous selection method, if the on / off display and selection pattern in the column display pattern and row selection pattern are represented by "-1" and "1", the voltage pattern applied to the column electrodes is , The column display pattern and the corresponding row selection pattern are multiplied bit by bit, and the sum of the results is taken.

【0010】

Therefore, the number of voltage levels applied to the column electrodes is L + 1 when the number of simultaneously selected lines is L. For example, when the Hadamard matrix of 4 rows and 4 columns shown in FIG. 4A is used as the selection matrix, the number of simultaneous selection lines is 4, so the number of applied voltage levels is 5. Specifically, as shown in FIG. 4 (c), the five levels (-4, -2, 0, 2, 4) are applied to the row electrodes i and j.

【0011】

On the other hand, in the liquid crystal display device in the conventional normal drive method (line sequential drive method), the number of voltage levels applied to the column electrodes is 2 levels for APT drive and 4 levels for IAPT drive. On the other hand, in the case of simultaneous selection of 4 lines, it will increase to 5 levels. There is a problem that the cost of the column electrode driver increases as the number of applied voltage levels increases. [0012]

To solve this problem, a method of reducing the number of voltage levels applied to the row electrodes in the simultaneous selection method of a plurality of lines has also been proposed. For example, in order to reduce the number of applied voltage levels, it is a method of making a virtual line in which a part of the simultaneously selected lines is not actually displayed.

【0013】

Figure 5 shows an example in which a Hadamard matrix with 4 rows and 4 columns is used and the 4th line is a virtual row. In FIG. 5, (a) shows an example of a selection matrix and display data, and (b) shows an example of an image display pattern and a voltage pattern. When the display data displayed at the row electrodes L = 1, L = 2, L = 3 at the column electrodes i and j and the corresponding virtual row data are shown in FIG. 5 (a), the column display pattern becomes It is represented by a vector (d) as shown in Fig. 5 (b).

【0014】

The voltage pattern to be applied sequentially to the column electrodes i and j corresponds to the product of the column display pattern and the corresponding row selection pattern bit by bit and the sum of the results. The voltage pattern to be applied to i and j in sequence is as shown in the vector (v) shown in Fig. 5 (b). In this case, the number of levels of the applied voltage pattern is reduced to two levels.

【0015】

Next, a driving method when the gradation method by the PWM (pulse width modulation) method is applied to the multiple line simultaneous selection method in which virtual rows are provided in order to reduce the number of levels will be described. First, Fig. 6 shows an example of a general PWM gradation method. In Fig. 6, "-1" corresponds to on display and "1" corresponds to off display.

【0016】

As shown in Fig. 6, the selection period is divided into four equal parts from T1 to T4, the period of T1 to T4 is displayed on the gradation level 4/4, and the period of T1 to T4 is displayed at the gradation level 0/4. Show off. Then, at the gradation levels 1/4, 2/4, and 3/4, intermediate level gradations are displayed by mixing the on display and off display periods. When divided into four in this way, five levels of gradation can be displayed.

【0017】

Next, a method of displaying gradation by the PWM gradation method in the multiple line simultaneous selection method will be described. As a conventional example in which the PWM gradation method is applied by the multiple line simultaneous selection method, there are methods disclosed in Japanese Patent Application Laid-Open No. 5-100642 and Japanese Patent Application Laid-Open No. 7-199863. Further, Japanese Patent Application Laid-Open No. 6-4049, EP0522510A1, US5262881 and the like disclose the use of virtual lines for the simultaneous selection method of a plurality of lines. Further, as a conventional example in which the PWM gradation method is applied to the simultaneous selection method of a plurality of lines provided with virtual lines, there is a method disclosed in Japanese Patent Application Laid-Open No. 10-301545.

【0018】

Hereinafter, an example in which the PWM gradation method is applied to the simultaneous selection method of a plurality of lines provided with virtual lines will be described with reference to FIG. In FIG. 7, (a) shows an example of on / off display during the division period, and (b) shows an example of the voltage pattern applied to the column electrodes. Assuming that the display data of the lines L1, L2, and L3 that are simultaneously selected as shown in Fig. 7 (a) is 3/4, 2/4, 1/4, the on "-" at T1 to T4 within the selection period. 1 and off 1 are displayed as [1, -1, -1, -1] for L1, [1,1, -1, -1] for L2, and [1,1,1,-] for L3. 1].

【0019】

In each period of T1 to T4, the data of the virtual row for making the number of applied voltage levels 2 levels is determined. When the 4-by-4 Hadamard matrix shown in Fig. 5 (a) is used, the display data of L1, L2, and L3 is (1,1,1) at T1, so the virtual data is "-1". Become. Similarly, in T2, the display data is (-1,1,1), so the virtual data is "1". In T3, the display data is (-1, -1, 1), so the virtual data is "-1". Then, in T4, the display data is (-1, -1, -1), so the virtual data is "1".

【0020】

The column display pattern shown in Fig. 7 (a) and the corresponding row selection pattern shown in Fig. 5 (a) are producted bit by bit, and the sum of the results is taken to obtain the first selection to the first selection. The voltage pattern applied to the column electrodes during each selection period of the four selections is as shown in FIG. 7 (b). The driving method when the gradation method by the PWM method is applied to the simultaneous selection method of a plurality of lines provided with virtual lines in order to reduce the number of levels is performed by the above procedure.

【0021】

However, when the liquid crystal display device is driven by this method, there is a problem that so-called display unevenness, in which a difference in brightness occurs in the display screen, increases. This will be described with reference to FIG. 7 (c). FIG. 7 (c) shows the applied voltage waveforms at the time of the first selection and the second selection. As shown in FIG. 7 (c), there are change points of the applied voltage level once in the first selection and three times in the second selection. At these points of change, an applied voltage waveform rounding occurs as shown by the dotted line. This waveform blunting causes a loss of the applied voltage effective value and causes display unevenness.

【0022】

[Problems to be Solved by the Invention]

As described above, when the liquid crystal display device is driven by using a drive method in which the PWM gradation method is applied to the multiple line simultaneous selection method in which virtual rows are provided in order to reduce the number of levels, the columns are displayed. There is a problem that the number of change points of the applied voltage level with respect to the electrode increases, and as a result, the display unevenness increases due to the loss of the applied voltage effective value caused by the blunting of the applied voltage waveform.

【0023】

Therefore, an object of the present invention is to provide a driving method and a driving device for a liquid crystal display device that can solve such a problem, suppress display unevenness, and obtain uniform display quality.

【0024】

[Means for solving problems]

The driving method of the liquid crystal display device according to the invention according to claim 1 is a method of performing gradation display using a plurality of lines simultaneous selection method assuming a virtual line, and each period in which one selection period is divided into a plurality of periods. The feature is that the voltage pattern is converted so as to reduce the change point of the voltage level applied to the column electrodes during one selection period, and the voltage is applied to the column electrodes according to the converted voltage pattern to display the gradation. To do. The inventor of the present invention has invented an invention in which the number of gradations is increased while suppressing display unevenness by dividing the frame selection period, and the invention is disclosed in Japanese Patent Application No. 11-51914. There is.

【0025】

The driving method of the liquid crystal display device according to the invention according to claim 2 is a method of performing gradation display by using a plurality of lines simultaneous selection method assuming virtual lines, and one selection period is evenly divided into a plurality of each. A period is set, the voltage pattern to be applied to the column electrodes is determined, and the voltage is applied to the column electrodes to gradation using the voltage pattern in which the voltage level applied to the column electrodes changes at one point during one selection period. It is characterized by displaying.

【0026】

The driving device of the liquid crystal display device according to the invention according to claim 3 includes a gradation processing means that generates gradation data from input image data and writes it to a frame memory, and each period in which one selection period is evenly divided into a plurality of periods. Equipped with a column data generation means for determining the voltage pattern to be applied to the column electrode, so that there is only one change point when there are multiple change points of the voltage level applied to the column electrode during one selection period. It is composed.

【0027】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described. FIG. 1 is a block diagram showing a configuration example of a liquid crystal driving device that performs simultaneous selective driving of a plurality of lines according to the present invention. In FIG. 1, the liquid crystal drive device 10 inputs the image data 100 and the control signal 101, outputs the column data signal 105 to the column driver, and outputs the necessary control signal 106 to the column driver and the row driver. .. The control signal 101 includes a dot clock signal, a vertical synchronization signal, a horizontal synchronization signal, a data enable signal indicating a valid period of image data, and the like.

【0028】

The image data 100 having the gradation signal input to the liquid crystal driving device 10 is input to the gradation processing circuit 11. The gradation processing circuit 11 converts the input image data 100 into gradation data 102 indicating the gradation level for each display frame and writes it in the frame memory 12. The frame memory 12 holds the written gradation data until it is read a plurality of times for simultaneous selection drive (MLA drive) of a plurality of lines.

【0029】

The MLA calculation circuit 13 reads the gradation data 103 from the frame memory 12 and performs a plurality of lines simultaneous selection calculation process to generate a voltage pattern applied to the column electrodes. Then, the voltage pattern is output to the column data converter 14 as the column data signal 104. The column data converter 14 converts the voltage pattern generated by the MLA arithmetic circuit 13 into a voltage pattern that does not increase the display unevenness and outputs the voltage pattern to the column driver.

【0030】

The timing control circuit 15 generates a control signal required for each circuit block and a control signal 106 for the column driver and the row driver. The liquid crystal drive device 10 is also provided with a row selection pattern generator that supplies a row selection pattern signal based on an orthogonal matrix to the row driver, but the illustration is omitted in FIG.

【0031】

Next, the operation of the liquid crystal drive device 10 will be described. The image data 100 having the gradation signal input to the liquid crystal driving device 10 is input to the gradation processing circuit 11. The gradation processing circuit 11 converts the input image data 100 into gradation data 102 corresponding to the gradation level for each display frame and writes it in the frame memory 12. For example, when the selection period is divided into four and a halftone display of five gradations is performed, the gradation data 102 has three bits for distinguishing five types of gradation levels from 0/4 to 4/4. It becomes data.

【0032】

That is, the gradation processing circuit 11 generates 3-bit data corresponding to the gradation level as shown in FIG. 6 for each display frame, and writes the generated data as gradation data 102 in the frame memory 12. .. The frame memory 12 holds the written gradation data until it is read a plurality of times in order to simultaneously select and drive a plurality of lines.

【0033】

The MLA calculation circuit 13 reads the gradation data 103 from the frame memory 12. In the case of the example shown in FIG. 6, the 3-bit gradation data is read out and converted into 4-bit data indicating on display or off display in each period T1 to T4 of the four-divided selection period. Next, in order to make the number of levels of the voltage applied to the column electrodes 2 levels in each division period of T1 to T4, virtual row data is generated corresponding to the display data of 3 lines simultaneously selected.

【0034】

For example, when the Hadamard matrix of 4 rows and 4 columns shown in FIG. 5 (a) is used as the row selection pattern, the division periods T1 to T4 are simultaneously selected for each selection period of the first selection to the fourth selection. 3 Display line and virtual row data and row selection pattern are producted bit by bit, and the sum of the results is "+1" or "-1". Virtual row data (virtual data) To decide. Then, the sum of the results, "+1" or "-1", is arranged to form an applied voltage pattern.

【0035】

In the actual circuit, "-1" is represented by "0" and "+1" is represented by "1". Therefore, the MLA arithmetic circuit 13 takes an exclusive OR for each bit and applies the voltage. Generate a pattern. The generated applied voltage pattern is output to the column data converter 14 as a column data signal 104.

【0036】

3 When the gradation data of the display lines (L1, L2, L3) is 3/4 gradation, 2/4 gradation, and 1/4 gradation, the second selection period is as shown in Fig. 7 (c). It has already been mentioned that in the voltage pattern of, the voltage level changes occur at three points, and the waveform blunting here increases the display unevenness. Therefore, in the embodiment of the present invention, the column data converter 14 converts the voltage pattern signal generated by the MLA arithmetic circuit 13 into a voltage pattern that does not increase the display unevenness.

【0037】

Hereinafter, the operation of the column data converter 14 will be described with reference to the timing diagram of FIG. FIG. 2 is an explanatory diagram showing voltage patterns before and after conversion by the column data converter 14. In the voltage pattern before conversion, the voltage levels at T1 to T4 are in the order of (2, -2, 2, -2), but the column data converter 14 swaps the order of T2 and T3 ( 2,2, -2, -2). Then, in the converted voltage pattern, there is only one change point of the voltage level.

【0038】

Therefore, the loss of the applied voltage effective value caused by the blunting of the applied voltage waveform is reduced, and as a result, the increase of the display unevenness is prevented. Even in other voltage patterns, when there are three change points, the column data converter 14 performs waveform shaping so that there is only one change point. In this way, the column data converter 14 converts the voltage pattern so that the voltage level changes at one point, and outputs the column data signal 105.

【0039】

FIG. 3 shows an example of the relationship between the voltage pattern of the column data signal 104 that can be output by the MLA arithmetic circuit 13 in this embodiment and the voltage pattern of the column data signal 105 after conversion by the column data converter 14. It is a figure. In FIG. 3, in the voltage pattern, for example, a high voltage is displayed as "1" and a low voltage is displayed as "0".

【0040】

Among the voltage patterns that the MLA arithmetic circuit 13 may output, the patterns of [0,1,0,1] and [1,0,1,0] have three change points. As shown in FIG. 3, those patterns are converted to [1,1,0,0] or [0,0,1,1] by the column data converter 14.

【0041】

Further, the column data converter 14 converts a voltage pattern having change points at two points into a voltage pattern having change points at only one place. That is, the patterns of [0,0,1,0] and [0,1,0,0] are converted to [0,0,0,1] or [1,0,0,0].

Convert the patterns of [1,0,0,1] and [0,1,1,0] to [1,1,0,0] or [0,0,1,1]. Furthermore, the patterns of [1,0,1,1] and [1,1,0,1] are converted to [1,1,1,0] or [0,1,1,1].

【0042】

The conversion shown in FIG. 3 can be easily realized by combining logic circuits. When a liquid crystal drive circuit is realized by an LSI, the area occupied by such a logic circuit is small. Further, it can be easily realized by a ROM in which the pattern before conversion is used as the address data and the data after the conversion is used as the data in the specified address.

【0043】

The column data converter 14 outputs a column data signal 105 indicating the converted voltage pattern to the column driver. When the column data signal 105 is output to the column driver, the timing control circuit 15 outputs a latch signal for incorporating the data into the column driver. When the column driver receives the latch signal, it applies a liquid crystal driving voltage corresponding to the input data to the column electrodes. Further, the row selection pattern signal from the row selection pattern generator is output to the row driver. The row driver applies a predetermined voltage to the row electrodes of the liquid crystal panel in response to the row selection pattern signal.

【0044】

In the embodiment described above, the one-selection period is evenly divided, but even if the one-selection period is not evenly divided, the display unevenness can be obtained by dividing the voltage level change point during the one-selection period. Can be suppressed. Further, the embodiment described above is an example in which the embodiment of the present invention is applied to an MLA drive device having a configuration independent of the column driver and the row driver, but the present invention has a configuration incorporating a column driver circuit or a configuration. It can also be applied to an MLA drive unit that has a built-in column driver and row driver circuit.

【0045】

[Effect of the invention]

As described above, according to the present invention, the drive method and drive device of the liquid crystal display device are designed to convert the voltage pattern in order to reduce the change point of the voltage level applied to the column electrodes during one selection period. Since it is configured, the loss of the effective voltage value due to the blunting of the voltage waveform is reduced, and as a result, the display unevenness is suppressed and a uniform display quality can be obtained.

[Simple explanation of drawings]

[Figure 1]

The block diagram which shows one configuration example of the liquid crystal drive device by this invention.

[Figure 2]

A timing diagram for explaining the operation of the column data converter.

[Fig. 3]

Explanatory drawing which shows an example of the relationship between the voltage pattern from an MLA arithmetic circuit and the voltage pattern by a column data converter.

[Fig. 4]

Explanatory drawing which shows how to determine the sequence of the voltage waveform applied to a column electrode.

[Fig. 5]

An explanatory diagram showing an example in which the 4th line is a virtual row using a Hadamard matrix of 4 rows and 4 columns.

[Fig. 6]

Explanatory drawing which shows an example of a general PWM method.

[Fig. 7]

Explanatory drawing which shows an example which applied the PWM method to the simultaneous selection method of multiple lines provided with virtual lines.

[Explanation of symbols]

10 LCD drive 11 Gradation processing circuit 12 frame memory 13 MLA arithmetic circuit