Orthogonal modulator
Abstract
[Task] It is possible to suppress the upper sideband component etc. in the output, it is possible to obtain a stable modulated output signal, it is possible to reduce the variation in modulation accuracy, and even when it is made into an IC, the baseband part and Provided is a quadrature modulator capable of improving the yield by reducing the influence of variations in the elements constituting the phase-locked loop.
Solution.The first multiplication circuit 11 that performs frequency conversion of the first and second modulated signals with the first and second carrier signals, and the frequency conversion of the third and fourth modulated signals with the third and fourth carrier signals. In the orthogonal modulator 10 including the second multiplication circuit 12 for performing the above and the addition circuit 13 for adding the outputs of the first multiplication circuit 11 and the second multiplication circuit 12, the unnecessary frequency of the modulation output signal of the addition circuit 13 A detection circuit 16 that detects components, a first delay circuit 14 that inputs a first control signal output from the detection circuit 16 and adjusts the phases of the first modulation signal and the second modulation signal, and a first delay circuit 14. It has a second delay circuit 15 that inputs a second control signal output from the detection circuit 16 and adjusts the phases of the third modulated signal and the fourth modulated signal.

Term
Term ended
Projected expiry passed 20 January 2019, 7.7 years ago.
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- Projected expiry
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4 claims: 4 independent, 0 dependent
- 1【特許請求の範囲】 【請求項1】 第1の変調入力端子に第1の変調信号を入力し第2の変調入力端子に前記第1の変調信号と180度の位相差を有する第2の変調信号を入力し、第1の搬送波入力端子に第1の搬送波信号を入力し第2の搬送波入力端子に前記第1の搬送波信号と180度の位相差を有する第2の搬送波信号を入力し、前記第1の変調信号及び前記第2の変調信号を前記第1の搬送波信号及び前記第2の搬送波信号で周波数変換を行う第1の掛算回路と、 第3の変調入力端子に前記第1の変調信号と90度の位相差を有する第3の変調信号を入力し第4の変調入力端子に前記第3の変調信号と180度の位相差を有する第4の変調信号を入力し、第3の搬送波入力端子に前記第1の搬送波信号と90度の位相差を有する第3の搬送波信号を入力し第4の搬送波入力端子に前記第3の搬送波信号と180度の位相差を有する第4の搬送波信号を入力し、前記第3の変調信号及び第4の変調信号を前記第3の搬送波信号及び第4の搬送波信号で周波数変換を行う第2の掛算回路と、 前記第1の掛算回路と前記第2の掛算回路の出力の加算を行う加算回路を備え、前記加算回路の出力より、変調信号を出力する直交変調器において、 前記加算回路の変調出力信号の不要周波数成分を検出する検出回路と、 前記検出回路より出力される第1の制御信号を入力して前記第1の変調信号と前記第2の変調信号の位相の調整を行う第1の遅延回路と、 前記検出回路より出力される第2の制御信号を入力して前記第3の変調信号と前記第4の変調信号の位相の調整を行う第2の遅延回路とを有することを特徴とする直交変調器。
- 2【請求項2】 第1の変調入力端子に第1の変調信号を入力し第2の変調入力端子に前記第1の変調信号と180度の位相差を有する第2の変調信号を入力し、第1の搬送波入力端子に第1の搬送波信号を入力し第2の搬送波入力端子に前記第1の搬送波信号と180度の位相差を有する第2の搬送波信号を入力し、前記第1の変調信号及び第2の変調信号を前記第1の搬送波信号及び第2の搬送波信号で周波数変換を行う第1の掛算回路と、 第3の変調入力端子に前記第1の変調信号と90度の位相差を有する第3の変調信号を入力し第4の変調入力端子に前記第3の変調信号と180度の位相差を有する第4の変調信号を入力し、第3の搬送波入力端子に前記第1の搬送波信号と90度の位相差を有する第3の搬送波信号を入力し第4の搬送波入力端子に前記第3の搬送波信号と180度の位相差を有する第4の搬送波信号を入力し、前記第3の変調信号及び第4の変調信号を前記第3の搬送波信号及び第4の搬送波信号で周波数変換を行う第2の掛算回路と、 前記第1の掛算回路と前記第2の掛算回路の出力の加算を行う加算回路を備え、前記加算回路の出力より、変調信号を出力する直交変調器において、 前記加算回路の変調出力信号の不要周波数成分を検出する検出回路と、 前記検出回路より出力される第1の制御信号を入力して前記第1の搬送波信号と前記第2の搬送波信号の位相の調整を行う第1の遅延回路と、 前記検出回路より出力される第2の制御信号を入力して前記第3の搬送波信号と前記第4の搬送波信号の位相の調整を行う第2の遅延回路とを有することを特徴とする直交変調器。
- 3【請求項3】 第1の変調入力端子に第1の変調信号(I信号)を入力し第1の搬送波入力端子に第1の搬送波信号を入力し周波数変換を行う第1の掛算回路と、第2の変調入力端子に前記第1の変調信号と90度の位相差を有する第2の変調信号(Q信号)を入力し第2の搬送波入力端子に前記第1の搬送波信号と90度の位相差を有する第2の搬送波信号を入力し周波数変換を行う第2の掛算回路と、前記第1の掛算回路と前記第2の掛算回路の出力の加算を行う加算回路を備え、前記加算回路の出力より、変調信号を出力する直交変調器において、 前記加算回路の変調出力信号の不要周波数成分を検出する検出回路と、 前記検出回路より出力される第1の制御信号を入力して前記第1の変調信号の位相の調整を行う第1の遅延回路と、 前記検出回路より出力される第2の制御信号を入力して前記第2の変調信号の位相の調整を行う第2の遅延回路とを有することを特徴とする直交変調器。
- 4【請求項4】 第1の変調入力端子に第1の変調信号(I信号)を入力し第1の搬送波入力端子に第1の搬送波信号を入力し周波数変換を行う第1の掛算回路と、第2の変調入力端子に前記第1の変調信号と90度の位相差を有する第2の変調信号(Q信号)を入力し第2の搬送波入力端子に前記第1の搬送波信号と90度の位相差を有する第2の搬送波信号を入力し周波数変換を行う第2の掛算回路と、前記第1の掛算回路と前記第2の掛算回路の出力の加算を行う加算回路を備え、前記加算回路の出力より、変調信号を出力する直交変調器において、 前記加算回路の変調出力信号の不要周波数成分を検出する検出回路と、 前記検出回路より出力される第1の制御信号を入力して前記第1の搬送波信号の位相の調整を行う第1の遅延回路と、 前記検出回路より出力される第2の制御信号を入力して前記第2の搬送波信号の位相の調整を行う第2の遅延回路とを有することを特徴とする直交変調器。
Independent claims4
113 paragraphs in 1 section, as filed
Description: TECHNICAL FIELD [Detailed description of the invention]
【0001】
[Technical field to which the invention belongs]
The present invention relates to a quadrature modulator, and more particularly to a quadrature modulator used for quadrature modulation (or I, Q modulation) in a delay detector in digital radio communication.
【0002】
[Conventional technology]
In digital wireless communication, a delay detector is used as a demodulator, and quadrature modulation (or I, Q modulation) or the like is performed by the quadrature modulator. The configuration of the conventional quadrature modulator will be described with reference to FIG. The quadrature modulator 10 includes a multiplication circuit 11 that multiplies the quadrature modulation signals fbb (I), fbb (Ibar) and carrier signals fc (90 °), fc (270 °), and quadrature modulation signals fbb (Q), fbb. It is composed of a multiplication circuit 12 that multiplies (Qbar) and carrier signals fc (0 °) and fc (180 °), and an addition circuit 13 that adds the outputs of the multiplication circuits 11 and 12 and outputs a modulation signal. It is connected to the phase circuit 40 and the base band portion 50.
【0003】
In the conventional quadrature modulator, the carrier signal (fbb (I)) 61 output from the baseband section 50 and the carrier signal output from the 90-degree phase-locked loop 40 with reference to the output signal of the local oscillation circuit 30 ( The frequency of fc) 41 is converted by the multiplication circuit 11. The quadrature modulation signal (fbb (Q)) 62 having a phase difference of 90 degrees from the quadrature modulation signal 61 and the carrier signal (fc) 42 having a phase difference of 90 degrees from the carrier signal 41 are frequency-converted by the multiplication circuit 12. To. The modulation output signal (fmod) 70 was obtained by inputting the outputs of the multiplication circuit 11 and the multiplication circuit 12 into the addition circuit 13 and adding them.
【0004】
Here, the orthogonal modulation signal 61 is input as an I signal and an Ibar signal having the opposite phase to the I signal, and the orthogonal modulation signal 62 is input as the Q signal and the Qbar signal having the opposite phase to the Q signal from the modulation input terminal of the orthogonal modulator 10. , The specific circuit of the conventional orthogonal modulator 10 when the carrier signal 41 is input from the carrier input terminal of the orthogonal modulator 10 in a phase relationship of 90 degrees and 270 degrees and the carrier signal 42 is 0 degrees and 180 degrees. An example will be described with reference to FIG.
【0005】
From the modulation input terminals T10, T11, T12, T13 of the orthogonal modulator 10, the orthogonal modulation signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar) are sine waves sinωbbt, sin (ωbbt + π / 2), cosωbbt, cos (ωbbt + π / 2) are input in the phase shift relationship, and the carrier signals fc (90 degrees), fc (270 degrees), fc (0 degrees) are input from the carrier input terminals T14, T15, T16, T17. When input) and fc (180 degrees) with the phase relationship of cosωct, cos (ωct + π / 2), sinωct, sin (ωct + π / 2), they are output from the orthogonal modulator output terminals T18 and T19. The desired wave component of the modulated output signal fmod is (fc-fbb), and the upper sideband component is (fc + fbb).
【0006】
Quadrature modulation signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar) and carrier signals fc (90 degrees), fc (270 degrees), fc (0 degrees) to be input to the quadrature modulator 10. If the phase relationship of, fc (180 degrees) is accurate, unnecessary waves such as the upper sideband component (fc + fbb) can obtain a suppression degree of 40 dBc or more with respect to the desired wave component (fc-fbb). Is. However, in reality, the baseband portion 50 that generates the orthogonally modulated signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar), and the carrier signals fc (90 degrees), fc (270 degrees), Due to variations in the elements that make up the phase-locked loop 40 that generates fc (0 degrees) and fc (180 degrees), a phase shift (hereinafter referred to as phase accuracy) occurs, and the upper side wave in the modulated output signal fmod. The degree of suppression of band components (fc + fbb) etc. deteriorates.
【0007】
FIG. 11 shows the relationship between the phase shift probability and the suppression degree, with the phase shift probability on the horizontal axis and the suppression degree on the vertical axis. This suppression degree depends on the phase accuracy, and when the phase accuracy is 3 degrees or more, the suppression degree of the upper sideband component (fc + fbb) etc. becomes 30 dB or less, which is a main factor for deteriorating the modulation accuracy. Will end up.
【0008】
Therefore, in the conventional quadrature modulator, the degree of suppression of the upper sideband component and the like in the modulated output signal has been improved by finely adjusting the amplitude and the like of the quadrature modulation signal and the carrier signal. This adjustment was done manually, so it took time. Furthermore, when the quadrature modulator is converted to an IC, the phase relationship between the quadrature modulation signal and the carrier signal changes due to variations in the baseband and the elements that make up the phase-locked loop. The degree of suppression of components etc. varied. In other words, the modulation accuracy of each IC varies, which has been a major factor in yield deterioration.
【0009】
[Problems to be Solved by the Invention]
The present invention solves the conventional problems, and makes it possible to suppress the upper sideband component and the like in the output by automatically adjusting the amplitude of the quadrature modulation signal and the carrier signal, and stabilizes the modulation output. It is an object of the present invention to provide a quadrature modulator capable of obtaining a signal and reducing variation in modulation accuracy. Another object of the present invention is to provide a quadrature modulator capable of improving the yield by reducing the influence of variations in the baseband portion and the elements constituting the phase-locked loop even when the IC is used. Is.
【0010】
[Means for solving problems]
In the present invention, the first modulation signal (fbb (I)) is input to the first modulation input terminal (T10), and the phase difference of 180 degrees from the first modulation signal to the second modulation input terminal (T11). The second modulated signal (fbb (Ibar)) having is input, the first carrier signal (fc (90 degrees)) is input to the first carrier input terminal (T14), and the second carrier input terminal (T15) is input. ) Is input with a second carrier signal (fc (270 degrees)) having a phase difference of 180 degrees from the first carrier signal, and the first modulated signal and the second modulated signal are referred to as the first modulated signal. A first multiplication circuit (11) that performs frequency conversion with the carrier signal and the second carrier signal, and a third modulation input terminal (T12) having a phase difference of 90 degrees from the first modulation signal. The modulation signal (fbb (Q)) of is input, and the fourth modulation signal (fbb (Qbar)) having a phase difference of 180 degrees from the third modulation signal is input to the fourth modulation input terminal (T13). , A third carrier signal (fc (0 degree)) having a phase difference of 90 degrees from the first carrier signal is input to the third carrier input terminal (T16), and is input to the fourth carrier input terminal (T17). A fourth carrier signal (fc (180 degrees)) having a phase difference of 180 degrees from the third carrier signal is input, and the third modulated signal and the fourth modulated signal are used as the third carrier signal and the third modulated signal. The addition circuit includes a second multiplication circuit (12) that performs frequency conversion with a fourth carrier signal, and an addition circuit (13) that adds the outputs of the first multiplication circuit and the second multiplication circuit. In the orthogonal modulator 10 that outputs a modulation signal (fmod) from the output of, the detection circuit 16 that detects an unnecessary frequency component of the modulation output signal of the addition circuit and the first control signal that is output from the detection circuit are used. The first delay circuit (14) that is input to adjust the phase of the first modulation signal and the second modulation signal, and the second control signal output from the detection circuit are input to the first. It is configured to have a second delay circuit (15) for adjusting the phase of the third modulated signal and the fourth modulated signal.
【0011】
Further, in the present invention, the first modulation signal ((fbb (I)) is input to the first modulation input terminal (T10) and 180 degrees with the first modulation signal to the second modulation input terminal (T11). The second modulated signal ((fbb (Ibar)) having the phase difference of is input, the first carrier signal (fc (90 degrees)) is input to the first carrier input terminal (T14), and the second carrier is used. A second carrier signal (fc (270 degrees)) having a phase difference of 180 degrees from the first carrier signal is input to the input terminal (T15), and the first modulation signal and the second modulation signal are input. The first multiplication circuit (11) that performs frequency conversion with the first carrier signal and the second carrier signal, and the third modulation input terminal (T12) have a phase difference of 90 degrees from the first modulation signal. A third modulation signal (fbb (Q)) is input, and a fourth modulation signal (fbb (Qbar)) having a phase difference of 180 degrees from the third modulation signal is input to the fourth modulation input terminal (T13). Input, input the third carrier signal (fc (0 degree)) having a phase difference of 90 degrees from the first carrier signal to the third carrier input terminal (T16), and input the fourth carrier input terminal (T17). ) Is input with a fourth carrier signal (fc (180 degrees)) having a phase difference of 180 degrees from the third carrier signal, and the third modulated signal and the fourth modulated signal are input to the third carrier. A second multiplication circuit (12) that performs frequency conversion with a signal and a fourth carrier signal, and an addition circuit (13) that adds the outputs of the first multiplication circuit and the second multiplication circuit are provided. In the orthogonal modulator 10 that outputs a modulation signal from the output of the addition circuit, a detection circuit (16) that detects an unnecessary frequency component of the modulation output signal of the addition circuit and a first control signal output from the detection circuit. Is input to adjust the phase of the first carrier signal and the second carrier signal, and the first delay circuit (14) and the second control signal output from the detection circuit are input to the above. It is configured to have a second delay circuit (15) for adjusting the phase of the third carrier signal and the fourth carrier signal.
【0012】
In the present invention, the first modulation signal (I signal) is input to the first modulation input terminal (T10), and the first carrier signal (fc (90 degrees)) is input to the first carrier input terminal (14). A second modulation signal (Q signal) having a phase difference of 90 degrees from the first modulation signal is input to the first multiplication circuit (11) that performs frequency conversion and the second modulation input terminal (T12). A second multiplication circuit that inputs a second carrier signal (fc (0 degree)) having a phase difference of 90 degrees from the first carrier signal to the second carrier input terminal (T16) and performs frequency conversion ( In a orthogonal modulator that includes 12) and an adder circuit (13) that adds the outputs of the first multiplication circuit and the second multiplication circuit and outputs a modulation signal from the output of the adder circuit, the addition is performed. Circuit modulation A first detection circuit (16) that detects unnecessary frequency components of the output signal and a first control signal that is output from the detection circuit to adjust the phase of the first modulation signal. It is configured to have a delay circuit (14) and a second delay circuit (15) that inputs a second control signal output from the detection circuit and adjusts the phase of the second modulation signal. ..
【0013】
Further, in the present invention, the first modulation signal (I signal) is input to the first modulation input terminal (T10), and the first carrier signal (fc (90 degrees)) is input to the first carrier input terminal (T14). The first modulation circuit (11) that inputs and performs frequency conversion, and the second modulation signal (Q signal) that has a phase difference of 90 degrees from the first modulation signal at the second modulation input terminal (T12). Is input to the second carrier input terminal (T16), and a second carrier signal (fc (0 degree)) having a phase difference of 90 degrees from the first carrier signal is input to perform frequency conversion. In the orthogonal modulator 10 which includes a circuit (12) and an adder circuit (13) for adding the outputs of the first multiplication circuit and the second multiplication circuit, and outputs a modulated signal from the output of the adder circuit. , The detection circuit (16) for detecting an unnecessary frequency component of the modulation output signal of the addition circuit and the first control signal output from the detection circuit are input to adjust the phase of the first carrier signal. It has a first delay circuit (14) and a second delay circuit (15) that inputs a second control signal output from the detection circuit and adjusts the phase of the second carrier signal. It is a quadrature modulator composed of.
【0014】
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described. The configuration of the quadrature modulator according to the first embodiment of the present invention will be described with reference to FIG.
【0015】
As shown in FIG. 1, the orthogonal modulator 10 according to this embodiment adds the multiplication circuits 11 and 12 for multiplying the orthogonal modulation signal and the carrier signal, and the outputs of the multiplication circuits 11 and 12 to generate a modulated signal. Phase adjustment of the modulation input signals of the multiplication circuits 11 and 12 by the adder circuit 13 to be output, the detection circuit 16 to detect an unnecessary frequency signal component from the output signal of the adder circuit 13, and the control signal output from the detection circuit 16. It is composed of delay circuits 14 and 15 that perform the above.
【0016】
The carrier signal 41 output from the 90-degree phase shift circuit 40 with reference to the orthogonal modulation signal 61 output from the baseband section 50 and the output signal of the local oscillator circuit 30 is the multiplication circuit 11, the orthogonal modulation signal 61 and the 90-degree position. The orthogonal modulation signal 62 having a phase difference, the carrier signal 41, and the carrier signal 42 having a phase difference of 90 degrees are frequency-converted by the multiplication circuit 12, respectively, and the outputs of the multiplication circuit 11 and 12 are input to the addition circuit 13 and added. By doing so, a modulated output signal 70 is obtained.
【0017】
Here, the orthogonal modulation signal 61 is an I signal and an Ibar signal having a phase opposite to that of the I signal, and the orthogonal modulation signal 62 is a Q signal and a Qbar signal having an opposite phase to the Q signal. When inputting from the carrier input terminals T14 to T17 of the orthogonal modulator 10 with a phase relationship of 90 degrees and 270 degrees for the carrier signal 41 and 0 degrees and 180 degrees for the carrier signal 42, the circuit of the orthogonal modulator 10 An example is shown in Fig. 2.
【0018】
From the modulation input terminals T10, T11, T12, T13 of the orthogonal modulator 10, the orthogonal modulation signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar) are sinusoidal sinωbbt, sin (ωbbt + π /). 2), cos ωbbt, cos (ωbbt + π / 2) are input in the phase relationship, and the carrier signals fc (90 degrees), fc (270 degrees), fc (0 degrees) are input from the carrier input terminals T14, T15, T16, T17. ), Fc (180 degrees) are input with the phase relationship of cosωct, cos (ωct + π / 2), sinωct, sin (ωct + π / 2), and the modulation output from the orthogonal modulator output terminals T18 and T19. The desired wave component of the output signal fmod is (fc-fbb), and the upper band component is (fc + fbb).
【0019】
Quadrature modulation signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar) and carrier signals fc (90 degrees), fc (270 degrees), fc (0 degrees) to be input to the quadrature modulator 10. If the phase relationship of fc (180 degrees) is accurate, unnecessary waves such as the upper sideband component (fc + fbb) can obtain a suppression degree of 40 dBc or more with respect to the desired wave component (fc-fbb). is there.
【0020】
However, in reality, the baseband part that generates the quadrature modulation signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar) and the carrier signals fc (90 degrees), fc (270 degrees), fc Due to variations in the elements that make up the phase shift circuit that generates (0 degrees) and fc (180 degrees), a phase shift (hereinafter referred to as phase accuracy) occurs, and the upper sideband component in the modulated output signal fmod. The degree of suppression such as (fc + fbb) deteriorates, which is the main cause of deterioration of modulation accuracy.
【0021】
Therefore, in this embodiment, the phase of the orthogonal modulation signal is automatically adjusted based on the detection circuit 16 that detects the suppression degree of the upper sideband component (fc + fbb) and the like and the control signal output by the detection circuit 16. A delay circuit 14 and a delay circuit 15 are provided to suppress the upper sideband component and the like included in the modulation output signal fmod to improve the modulation accuracy.
【0022】
An example of the detection circuit 16 for detecting the suppression degree of unnecessary waves such as the upper sideband component in the modulated output signal will be described with reference to FIG. The detection circuit 16 is composed of an analog-to-digital (A / D) conversion unit 161, a Fourier transform (FFT) unit 162, and a control unit 163.
【0023】
First, the modulated output signal fmod, which is an analog signal, is input to the analog-to-digital conversion unit 161 to perform analog-to-digital conversion. Next, the Fourier transform unit 162 performs the Fourier transform, and the control unit 163 compares the output levels of each frequency component. After that, the degree of suppression of the upper wave band component or the like with respect to the desired wave component is detected, and a control signal corresponding to this is output. The control unit 163 controls the delay circuit 14 and the delay circuit 15 so that the suppression degree of the upper wave band and the like is 40 dBc or more, which does not significantly affect the modulation accuracy, and the delay circuit 14 and the delay circuit 15 transmit the quadrature modulation signal. The phase is adjusted by delaying.
【0024】
An example of phase adjustment when a sine wave is input as a quadrature modulation signal will be described with reference to FIG. Here, the phase adjustment of the quadrature modulation signals fbb (I) and fbb (Q) will be described. As shown in Fig. 4 (A), the ideal phase difference between fbb (I) and fbb (Q) is 90 degrees, so if the period is T, T / 4 is fbb (I) and fbb (Q). ) Is the time difference. As shown in Fig. 4 (B), the phase of fbb (I) is delayed (fbb'(I)) and the time difference from fbb (Q) is T / 4 due to variations in the elements that make up the baseband. If it becomes + T, if fbb (Q) is delayed by this time difference T and fbb'(Q), the phase difference between fbb'(I) and fbb'(Q) can be corrected to 90 degrees. it can. For example, to delay the phase of fbb (Q) by 1 degree, it is sufficient to delay fbb (Q) by ΔT = T / 360. Specifically, if the quadrature modulation signal is fbb = 100kHz, the period T is 1 / fbb = 10μsec, and ΔT = 1 / 36μsec to delay the phase by 1 degree.
【0025】
The example of adjusting the phase of the quadrature modulation signal has been described above, but the same applies even if the phase of the carrier signal fc (90 degrees), fc (270 degrees), fc (0 degrees), and fc (180 degrees) is adjusted. The effect can be obtained.
【0026】
The configuration of the quadrature modulation circuit according to the second embodiment of the present invention will be described with reference to FIG. As shown in FIG. 5, the orthogonal modulator 10 according to this embodiment adds the multiplication circuits 11 and 12 for multiplying the orthogonal modulation signal and the carrier wave signal and the outputs of the multiplication circuits 11 and 12 to generate a modulation signal. The phase of the carrier signal input to the multiplication circuits 11 and 12 by the adder circuit 13 to be output, the detection circuit 16 to detect an unnecessary frequency signal component from the output signal of the adder circuit 13, and the control signal output from the detection circuit 16. It is composed of delay circuits 14 and 15 for adjusting. In the quadrature modulation circuit according to this embodiment, the delay circuits 14 and 15 adjust the phase of the quadrature modulation input signal in the first embodiment as compared with the quadrature modulation circuit according to the first embodiment. On the other hand, this embodiment differs in that the phase of the carrier signal is adjusted.
【0027】
The orthogonal modulation signal 61 output from the baseband section 50 and the carrier signal 41 output from the 90-degree phase shift circuit 40 with reference to the output signal of the local oscillation circuit 30 are frequency-converted by the multiplication circuit 11. The quadrature modulation signal 62 having a phase difference of 90 degrees from the quadrature modulation signal 61 and the carrier signal 42 having a phase difference of 90 degrees from the carrier signal 41 are frequency-converted by the multiplication circuit 12. The modulation output signal 70 is obtained by inputting the outputs of the multiplication circuit 11 and the multiplication circuit 12 into the addition circuit 13 and adding them.
【0028】
Here, the orthogonal modulation signal 61 is used as the I signal and the Ibar signal having the opposite phase to the I signal, and the orthogonal modulation signal 62 is used as the Q signal and the Qbar signal having the opposite phase to the Q signal. Orthogonal when input from T13, the carrier signal 41 is input from the carrier input terminals T14 to T17 of the orthogonal modulator 10 with the phase relationship of 90 degrees and 270 degrees, and the carrier signal 42 is input from the phase relationship of 0 degrees and 180 degrees. An example of the circuit of the modulator 10 is shown in FIG.
【0029】
As shown in FIG. 6, the orthogonal modulation signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar) are sine wave sinωbbt from the modulation input terminals T10, T11, T12, T13 of the orthogonal modulator 10. , Sin (ωbbt + π / 2), cosωbbt, cos (ωbbt + π / 2), and from the carrier input terminals T14, T15, T16, T17, the carrier signal fc (90 degrees), fc (270) When input of degrees), fc (0 degrees), fc (180 degrees) with the phase relationship of cosωct, cos (ωct + π / 2), sinωct, sin (ωct + π / 2), the orthogonal modulator output terminal T18 The desired wave component of the modulated output signal fmod output from T19 is (fc-fbb), and the upper sideband component is (fc + fbb).
【0030】
In this case, the quadrature modulation signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar) and the carrier signals fc (90 degrees), fc (270 degrees), fc ( If the phase relationship of 0 degree) and fc (180 degree) is accurate, the unnecessary wave such as the upper sideband component (fc + fbb) should have a suppression degree of 40 dBc or more with respect to the desired wave component (fc-fbb). Is possible.
【0031】
However, in reality, the baseband part that generates the orthogonal modulation signals fbb (I), fbb (Ibar), fbb (Q), fbb (Qbar) and the carrier signals fc (90 degrees), fc (270 degrees), fc Since there are variations in the elements that make up the phase shift circuit that generates (0 degrees) and fc (180 degrees), a phase shift (hereinafter referred to as phase accuracy) occurs in these signals, and the upper side of the modulated output signal fmod. The degree of suppression of the wave band component (fc + fbb) deteriorates, which is the main cause of deterioration of modulation accuracy.
【0032】
Therefore, in this embodiment, the phase of the carrier signal is automatically adjusted based on the detection circuit 16 that detects the suppression degree of the upper sideband component (fc + fbb) and the like and the control signal output by the detection circuit 16. By providing the delay circuits 14 and 15 to be performed, it is possible to suppress the upper side wave value component and the like included in the modulation output signal fmod and improve the modulation accuracy.
【0033】
Next, the configuration of the quadrature modulator according to the third embodiment of the present invention will be described with reference to FIG. The orthogonal modulator 10 according to this embodiment includes multiplication circuits 11 and 12 that multiply the orthogonal modulation signal and the carrier signal, and addition circuits 13 that add the outputs of the multiplication circuits 11 and 12 and output the modulation signal. A detection circuit 16 that detects unnecessary frequency signal components from the output signal of the adder circuit 13, and delay circuits 14 and 15 that adjust the phase of the modulation input signals of the multiplication circuits 11 and 12 by the control signal output from the detection circuit 16. Consists of. Compared with the first embodiment, there are four modulated input signals in the first embodiment, whereas there are two in this embodiment.
【0034】
The carrier signal fc (90 degrees) 41 output from the 90-degree phase-locked loop 40 with reference to the orthogonal modulation signal (fbb (I)) 61 output from the baseband section 50 and the output signal of the local oscillator circuit 30 is a multiplication circuit. The frequency is converted at 11. On the other hand, the quadrature modulation signal 61 and the quadrature modulation signal (fbb (Q)) 62 having a phase difference of 90 degrees and the carrier signal 41 and the carrier signal signal (fc (0 degrees)) 42 having a phase difference of 90 degrees are multiplied. The frequency is converted by the circuit 12. The modulation output signal (fmod) 70 is obtained by inputting the outputs of the multiplication circuit 11 and the multiplication circuit 12 into the addition circuit 13 and adding them.
【0035】
Here, the orthogonal modulation signal 61 is input as an I signal and the orthogonal modulation signal 62 is input as a Q signal from the modulation input terminals T10 and T12 of the orthogonal modulator 30, the carrier signal 41 is 90 degrees, and the carrier signal 42 is 0 degrees. Is input from the carrier input terminals T14 and T16 of the orthogonal modulator 30.
【0036】
Similar to the first embodiment, the phase of the orthogonally modulated signal is adjusted by controlling the delay circuits 14 and 15 by the control signal generated by the detection circuit 16 that detects the unnecessary frequency component of the modulated output signal fmod. , A modulated output signal with reduced unnecessary frequency components can be obtained.
【0037】
The configuration of the quadrature modulator according to the fourth embodiment of the present invention will be described with reference to FIG. As shown in FIG. 8, the orthogonal modulator 10 according to the present embodiment adds the multiplication circuits 11 and 12 for multiplying the orthogonal modulation signal and the carrier wave signal and the outputs of the multiplication circuits 11 and 12 to obtain a modulation signal. Phase adjustment of the carrier signal of the multiplication circuits 11 and 12 by the addition circuit 13 that outputs the above, the detection circuit 16 that detects an unnecessary frequency signal component from the output signal of the addition circuit 13, and the control signal output from the detection circuit 16. It is composed of delay circuits 14 and 15 that perform the above. Compared with the second embodiment, there are four modulated input signals in the second embodiment, whereas there are two in this embodiment.
【0038】
The carrier signal (fc (90 degrees)) 41 output from the 90-degree phase-locked loop 40 with reference to the orthogonal modulation signal (fbb (I)) 61 output from the baseband section 50 and the output signal of the local oscillator circuit 30 The frequency is modulated by the multiplication circuit 11. The quadrature modulation signal 61 and the quadrature modulation signal (fbb (Q)) 62 having a phase difference of 90 degrees and the carrier signal 41 and the carrier signal signal (fc (0 degrees)) 42 having a phase difference of 90 degrees are in the multiplication circuit 12. Frequency converted. The modulation output signal (fmod) 70 is obtained by inputting the outputs of the multiplication circuit 11 and the multiplication circuit 12 into the addition circuit 13 and adding them.
【0039】
Here, the orthogonal modulation signal 61 is input as an I signal and the orthogonal modulation signal 62 is input as a Q signal from the modulation input terminal of the orthogonal modulator 10, the carrier signal 41 is 90 degrees, and the carrier signal 42 is 0 degrees. It is input from the carrier input terminal of the device 10.
【0040】
Similar to the second embodiment, the phase of the carrier wave is adjusted by controlling the delay circuits 14 and 15 by the control signal generated by the detection circuit 16 that detects the unnecessary frequency component of the modulated output signal fmod, and is unnecessary. A modulated output signal with a reduced frequency component can be obtained.
【0041】
[Effect of the invention]
As described above, according to the present invention, a detection circuit for detecting the suppression degree of the upper sideband component or the like in the modulated output signal and a delay circuit for automatically adjusting the phase of the orthogonally modulated signal or the carrier signal are provided. By providing it, it is possible to suppress the upper sideband component, improve the modulation accuracy of the modulated output signal, and when it is converted to an IC, each parameter of the base band and the transistors that make up the phase shift circuit. Since the influence of variations in the absolute values of the resistors and resistors can be reduced and the modulation accuracy variations of individual ICs can be suppressed, it is possible to obtain an orthogonal modulator with improved yield.
[Simple explanation of drawings]
[Figure 1]
The block diagram explaining the structure of the quadrature modulator which concerns on 1st Embodiment of this invention.
[Figure 2]
The figure which shows the specific example of the circuit of the quadrature modulator which concerns on 1st Embodiment of this invention.
[Fig. 3]
The block diagram which shows the specific example of the detection circuit provided in the quadrature modulator which concerns on 1st Embodiment of this invention.
[Fig. 4]
The explanatory view which shows the example of the phase adjustment in the delay circuit provided in the quadrature modulator according to the 1st Embodiment of this invention.
[Fig. 5]
The block diagram explaining the structure of the quadrature modulator which concerns on 2nd Embodiment of this invention.
[Fig. 6]
The figure which shows the specific example of the circuit of the quadrature modulator which concerns on the 2nd Embodiment of this invention.
[Fig. 7]
The block diagram explaining the structure of the quadrature modulator according to the 3rd Embodiment of this invention.
[Fig. 8]
The block diagram explaining the structure of the quadrature modulator which concerns on 4th Embodiment of this invention.
[Fig. 9]
The block diagram which shows an example of the structure of the conventional quadrature modulator.
[Fig. 10]
The figure which shows the specific example of the circuit of the conventional quadrature modulator.
[Fig. 11]
Explanatory drawing which shows the relationship between the phase accuracy and the upper side wave band component suppression degree.
[Explanation of symbols]
10 Quadrature modulator 11,12 Multiplication circuit 13 Addition circuit 14,15 Delay circuit 16 Detection circuit 161 Analog-to-digital converter 162 Fourier Transform 163 Control unit 30 Local oscillator circuit 40 Phase-locked loop 41,42 Carrier signal 50 baseband circuit 61,62 Quadrature modulation signal 70 Quadrature modulator output signal T10, T11, T12, T13 Modulation input terminal T14, T15, T16, T17 Carrier input terminal T18, T19 Quadrature modulator output terminal
12 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US9608677B2 | Cited by | United States of America | Applicant |
| JP2008518514A | Cited by | Japan | Search report |
| JP2007134789A | Cited by | Japan | Examiner |
| WO2005039043A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| JP2008518514A | Cited by | Japan | Examiner |
| US9705540B2 | Cited by | United States of America | Applicant |
| US9614484B2 | Cited by | United States of America | Applicant |
| US10278131B2 | Cited by | United States of America | Applicant |
| US9768733B2 | Cited by | United States of America | Applicant |
2 priority claims, no other members on record
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 1171599 | Japan | A | |
| JP19990011715 | – | – | – |
4 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Decision of refusalJAPANESE INTERMEDIATE CODE: A02A02 | A02 | |
| Notification of reasons for refusalJAPANESE INTERMEDIATE CODE: A131A131 | A131 | |
| Report on retrievalJAPANESE INTERMEDIATE CODE: A971007A977 | A977 | |
| Written request for application examinationJAPANESE INTERMEDIATE CODE: A621A621 | A621 |
Numbers
- Publication
- 2000-209291
- Publication, DOCDB
- 2000209291
- Publication, EPODOC
- JP2000209291
- Application
- 11011715
- Application, DOCDB
- 1171599
- Application, EPODOC
- JP19990011715
Titles2
- Japanese
- 直交変調器
- English
- [Title of Invention] Quadrature Modulator
Classification
- IPC, 1
- H04L27 20