Method and apparatus for random-number generator

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METHOD AND APPARATUS FOR RANDOM-NUMBER GENERATOR QUALCOMM INCORPORATED C:61057 WO 2006/014656 PCT/US2005/025610 [0001] [0002] [0003] 1

METHOD AND APPARATUS FOR RANDOM-NUMBER

GENERATOR

FIELD

The present invention relates to random number generators. More specifically, the present invention relates to methods and apparatus for stable, consistent, selfcalibrating random number generators for high-volume production of wireless communication devices.

BACKGROUND

In wireless communications terminals or devices, there is a need for random-number generators, e.g., for cryptographic applications. However, variations in the operating conditions (such as changes in temperature, voltage and current) and variations in component characteristics (due to inconsistencies in component manufacturing, aging, shelf life and operational life) cause existing random-number generators to vary in the performance of generating random numbers. Consequently, similar devices manufactured to perform uniformly fluctuate in their performance because the constituent random-number generators vary in their characteristics and; thus, produce different random-number distributions.

There is a need, therefore, for random-number generators that perform uniformly in spite of variations in component characteristics, operating conditions, and environment. - There is also a need for similarly manufactured -devices-to operate - -similarly and show uniform and consistent performance.

SUMMARY

The disclosed embodiments provide novel and improved methods and apparatus for generating random numbers? 'In'one'aspect, a method for generating random numbers for use in a wireless communication device provides for generating random numbers and gathering a sample of the generated random numbers. The method further prorides for computing at least one metric, such as mean value, standard deviation, anchor entropy, based on the gathered sample, and comparing the metric with a corresponding reference value. The method further provides for adjusting the metric [0004] WO 2006/014656 PCT/US2005/025610 2 based on a result of the comparison so that the generated random numbers achieve a desired distribution.

[0005] In another aspect, an apparatus for generating random numbers includes an analog noise generator and hardware components for generating random numbers and feedback values to adjust the random numbers and their distribution. The apparatus further includes a processor capable of executing instructions to carry out control algorithms for adjusting the random numbers and their distribution. BRIEF DESCRIPTION OF THE DRAWINGS [0006] The features and advantages of the present invention will become more apparent from the detailed description of the embodiments in connection with the drawings set forth below: [0007] [0008] [0009] [0010] FIG. 1 illustrates a block diagram of a random-number generator; FIG. 2 illustrates a flow chart for generating random numbers; FIG. 3 illustrates noise voltage waveforms for similarly manufactured devices; FIG. 4 illustrates random-number distributions for similarly manufactured devices without adjustment; and [0011] FIG. 5 illustrates similar random-number distributions for similarly manufactured devices with automatic adjustment.

DETAILED DESCRIPTION

[0012] Before several embodiments are explained in detail, it is to be understood that the scope of the invention should not be limited to the details of the construction and the arrangement of the components set forth in the following description or illustrated in the drawings. Also, it is to be understood that the phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting.

[0013] FIG. 1 illustrates a block diagram of an automatic self-adjusting random-number generator 100, according to one embodiment. Random-number generator 100 generally includes analog noise generator hardware 102, control processor hardware 104, and control processor software module 106. Analog noise generator hardware 102 provides a random analog voltage that is normally distributed with a mean value X and a standard deviation S. Analog noise generator hardware 102 may also include a noise diode 108 and an amplifier 110 for signal conditioning, according to one embodiment. The noise WO 2006/014656 PCT/US2005/025610 [0014] [0015] [0016] 3 diode may be used in its reverse breakdown region, biased to operate on the “knee” of this part of the operating characteristic. When the diode is operated in this region, the AC voltage at its terminals is a Gaussian distribution with flat spectral density over its bandwidth.

The control processor hardware 104 includes an ADC (analog to digital converter) 112, a CPU (central processing unit) or computer, and DACs (digital to analog converters) 114 and 116. The ADC 112 quantizes the normally distributed analog noise voltage based on the voltage reference (V-Ref) value and generates random numbers. The CPU in conjunction with the control software module computes at least one metric, based on a sample of the quantized noise voltage, e.g., random numbers, adjusts the reference voltage (V-Ref) input to the ADC 112, and the DC offset input of the amplifier 110, in order to “fit” the distribution of the random numbers into the full range “window” of the ADC’s capability. The DC offset represents the mean X of the random numbers, and the reference voltage (V-Ref) represents the. standard deviation of the random numbers. The ADC reference voltage corresponds to the full-scale quantization capability of the ADC, i.e., it sets the maximum voltage into the ADC that can be digitized without over scaling the converter. Thus, adjusting the reference voltage is directly proportional to the peak-to-peak voltage conversion of the ADC.

According to one embodiment, control processor software module 106 operates on a sample of random numbers produced by the ADC 112 and computes the mean X and the standard deviation S of the chosen sample for feeding back into the DACs 114 and 116, respectively. The mean value X is used to control the location of the peak of the histogram of the random numbers generated by the ADC 112, as shown by the waveform 118. The standard deviation S is used to control the width of the histogram of the random numbers generated by the ADC 112, as shown by the waveform 120.

In typical random-number generator systems, where only a few are being built and the operating environment is quasi-static, the systems may be adjusted by changing their parts to achieve consistent random-number distribution across all systems. However, in a high-volume production, such as mobile phones, there is a need for automatic adjustment capability that provides for consistent random-number distribution across high-volume production and under varying operating conditions. FIG. 2 illustrates a flow chart for adjusting' random-number distributions, according to one embodiment. In step 202, some initial values for the DC offset and [0017] [0018] WO 2006/014656 PCT/US2005/025610 .180912/2 4 reference voltage (V-Ref) are chosen, which may be the final values obtained when the random-number generator was last adjusted. In step 204, a sample of the random numbers produced by the ADC 112 is selected. In step 206, the mean value of the selected sample of random numbers is computed and compared to a reference mean value. The reference mean value may be chosen based on the ADC bit width of the random-number generator. For example, for an 8-bit ADC, the reference or desired mean value would be 127 to conform to a desired Gaussian random-number histogram 122. The reference mean value of 127 corresponds to the midpoint of the 8-bit ADC range. Based on the comparison conducted in step 206, the DC offset value input to the amplifier 110 is adjusted, in step 208 or 210, as the case may be, through some linear, nonlinear, or adaptive control algorithm well known in the art.

Similarly, in step 212, the standard deviation value of the selected sample of random numbers is computed and compared to a reference standard deviation value. The reference standard deviation value may be chosen based on the accuracy or ADC full scale value of the random-number generator. For example, for an 8-bit ADC 112, the reference or desired standard deviation value would be about 42 to conform to the desired Gaussian random-number histogram 122. The reference standard-deviation value of 42 corresponds to about one-sixth of the 8-bit ADC range, providing a random-number distribution of six sigma in the ADC. Based on the comparison conducted in step 212, the input to the DAC 116 is adjusted, in step 214 or 216, as the case may be, through some linear, nonlinear, or adaptive control algorithm well known in the art. If the comparison conducted in step 212 indicates that the computed standard deviation value is equal to the reference standard deviation value, no adjustment is made and a wait for periodic calibration of step 218 then occurs before step 204 being performed again.

[0019] FIG. 3 illustrates three noise voltage waveforms generated by three similarly manufactured devices. These noise voltages waveforms correspond to the signals generated at the output of the respective amplifiers 110. These waveforms generally have different mean and standard deviation values, because of the difference in the constituent component characteristics, operating conditions, and environment.

[0020] FIG. 4 illustrates three random-number distributions for the three similarly manufactured devices mentioned above in connection with FIG.3, without automatic adjustment. These random-number distributions correspond to the random-numbers generated at the output of the respective ADCs 112. They still have different mean and standard deviation values.

[0021] FIG. 5, however, illustrates three uniform· random-number distributions, for the similarly manufactured devices mentioned above in connection with FIG.3, with WO 2006/014656 PCT/US2005/025610 [0022] [0023] [0024] [0025] 5 automatic adjustment mechanism. These random-number distributions correspond to the random numbers generated at the output of the respective ADCs 112. They desirably have same, or very close, mean and standard deviation values, in spite of the difference in their constituent component characteristics, operating conditions, and environment.

Therefore, the control processor and software module disclosed herein adjust the random-number generator to produce similar random-number distributions across numerous similarly manufactured devices under varying operating conditions. For example, after the mean and sigma adjustment criteria have been met, the random-number generator is considered calibrated and ready to provide random numbers for the desired application with metrics that are consistent over initial production, environmental variations and life cycle of the product.

In another embodiment, additional metrics such as entropy, which indicates how much randomness exists in the generated random numbers, may also be computed and adjusted for adjusting the performance of the random-number generator.

Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and protocols. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention: 6 180912/3 [0026] The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but, in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. [0027] The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a MS-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal. cra&’an , crnxan rwzn ατα inia^n pnow pnszn irn πτ “|»oa ,ρνιη ηχΰπ naoana ma™ na^maa np’ioa .zruwan rwaa mpnan pmi1? oxnm οιηπη Pi?

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