Asam architecture

124509/2

ALCATEL C.111514

ASAM JVl1VpV>3*lN ASAM architecture 907-153 A Telecommunications System for Providing Both Narrowbandand Broadband Services to Subscribers; SubscriberEquipment; a Shelf Therefor; a Replaceable Lowpass FilterUnit; Line Termination Equipment; Network TerminationEquipment; and a Telecommunications Rack witha Plurality of Shelves Having a Redundancy Feature

BACKGROUND OF THE INVENTION 1· Technical Field of the Invention

The present invention relates to providing high-speed communications services to ordinary residences and .small businesses on digital subscriber lines. 2. Background of the Invention

The sudden- emergence of the Internet has produced anurgent demand for high-speed communications services toordinary residences and small businesses. These servicesare distinguished by bursty data patterns and asymmetrical data transfer - far more information senttoward the subscriber premises than received from it. Apartial response to this need, at least on the physicalsignal level, has been found in new ’'xDSL" transmissiontechnologies, such as ADSL (Asymmetric Digital SubscriberLine). These have recently become sophisticated enoughto allow dynamic bit-rate adaptation on each subscriberline, so that a wide range of loop lengths can beaccommodated. But all this variability (bursty data,dynamic bit rates, etc.) has made it nearly impossible topredict, control, manage, or guarantee the Quality ofService (QoS) provided to each subscriber, as requiredfor a viable commercial service.

Several companies are working on ADSL products usingDMT (Discrete Multi-Tone) and/or CAP (Carrier-lessAmplitude Phase Modulation) technology - each with theirown equipment configurations and target applications.These products simply multiplex the ADSL data streams 1 907-153 together with little or no flexible bandwidth control andno QoS management features.

SUMMARY OF THE INVENTION

An object of the present invention is to solve the5 management problems described above by combining the data management features of ATM (Asynchronous Transfer Mode)with the physical-layer transmission flexibility of xDSL.

Another object of the present invention is toprovide an architecture for a telecommunications system 10 in which plain old telephone service and a broadband digital service are simultaneously provided to individualsubscribers on conventional transmission lines alreadydeployed for telephony.

Still another object of the present invention is to 15 provide such an architecture in such a way as to provide maintainability of the digital subscriber line hardwarewithout interfering with lifeline telephony service tosubscribers.

Yet another object of the present invention is to 20 provide the practical hardware components capable of carrying out the above objects for such a system.

According to a first aspect of the presentinvention, a telecommunications system for providing bothnarrowband and broadband services to a plurality of 25 subscriber premises comprises at least one shelf for connection to a public switched telephone network (PSTN)and for connection to an asynchronous transfer mode (ATM)network for connecting the PSTN and the ATM network tothe plurality of subscriber premises via a corresponding 30 plurality of twisted copper pairs, and a plurality of subscriber modems for connection to the correspondingplurality of twisted copper pairs, wherein each of thetwisted copper pairs is for providing a digitalsubscriber line that accommodates both plain old 2 907-153 10 15 20 25 30 telephone service (POTS) and digital channels in an ATMformat. The digital subscriber line may be an asymmetricdigital subscriber line (ADSL). Moreover, it may use adiscrete multitone (DMT) technique, as known fromAmerican National Standards Institute (ANSI)

Specification ANSI Tl.413-1995. Or, it may use carrierless amplitude phase modulation (CAP). ATM and xDSL have not previously been combined inthis way to create a complete, viable, general-purposeaccess communications system for local loops. In fact,ADSL itself has only recently become feasible, since itwas not clear how to use the bandwidth above thetelephony spectrum (up to 3.4 kHz) over long distances onexisting copper pairs. New LSI (large-scale integration)and DSP (digital signal processing) technologies have nowmade ADSL practical at multi-megabit per second rates,and the demand for high-speed data services (particularlyInternet access) has made it necessary. Local telcos arealso under tremendous pressure to relieve existingtelephone switching systems from the overwhelmingInternet/modem traffic they were never designed tohandle. By using the system described in thisdisclosure, operating companies can simultaneously removecongestion from telephony switches, offer high-speedservices to customers as a new revenue producer, andexpand the types of services (i.e., QoS classes) offeredto fit customers' individual needs.

The full bandwidth flexibility of ATM provides theframework to support a wide range of services required bydifferent applications and achieves high-resourceutilization. It is particularly advantageous in thepresent invention that ATM provides the possibility toreserve resources in the network to meet the quality ofservice requirements of the applications desired by thesubscribers. This is particularly so in the present 35 3 907-153 10 15 20 25 30 35 invention, because of the nature of, e.g., asymmetricdigital subscriber lines wherein a very large bandwidthis dedicated downstream with a relatively small bandwidthreserved for upstream communications from subscribers.

In that case, with an architecture having a large numberof subscribers connected to an upstream network element,there can be, depending on the number of subscriberspotentially connected to the network element, a severebandwidth contention problem in the upstream direction.This can be balanced to some extent, according to thepresent invention, by offering differing qualities ofservice to the subscribers, which can be implemented bytelcos using different rate structures.

According to a second aspect of the invention, atelecommunications system comprises subscriber equipmentand provider equipment, with the subscriber equipmentincluding a lowpass filter for use at a subscriber'spremises responsive to a telephony signal occupying abaseband position in a frequency-division multiplexedsignal, also having a wideband signal occupying aposition above baseband, for only providing the telephonysignal for use in voice communications between thesubscriber's premises and a public switched telephonenetwork, and a digital subscriber line modem for use atthe subscriber's premises, responsive to the frequency-division multiplexed signal for providing the widebandservice for use in digital communications between thesubscriber's premises and a packet network, and whereinthe provider equipment includes a shelf, responsive tothe telephony signal and to the wideband signal, forproviding the frequency-division multiplexed signal.

The second aspect of the present invention allowstelephone subscribers to obtain efficient, high speeddigital services to their homes and businesses overexisting telephony copper pairs - while conventional 4 907-153 analog ‘'lifeline" telephony services are simultaneouslyprovided with high integrity on the same pairs.

The key to these and other aspects of the presentinvention is a unique system architecture and a novelcombination of xDSL and packet technology that worktogether to economically deliver services such asInternet access at speeds more than 100 times faster thanconventional analog modems.

By providing the lowpass filter separately from thedigital subscriber line modem, the modem can bemaintained separately and without interfering with thelifeline telephony services, thereby providing the above-mentioned high integrity. A similar separation of thetelephony services from the wideband services can beaccomplished in the shelf as well, by providing aseparate lowpass filter that is not part of the linetermination of the wideband service in the shelf.

The preferred embodiment described below overlaysadaptive-rate ADSL-coded, ATM-formatted data on existingcopper pairs, but it should be realized that the systemarchitecture described below can incorporate any kind ofpacket network and/or any of a variety of DigitalSubscriber Line (DSL) transmission technologies,including ADSL, VDSL, HDSL, SDSL, and ISDN-BRA. Theinitial implementation of this invention uses the DMTcoding method for ADSL specified in ANSI standard T1.413-1995, entitled "Network and Customer InstallationInterfaces—Asymmetric Digital Subscriber Line (ADSL)Metallic Interface", but it should be realized that othercoding methods can also be used.

In addition, multiple ATM service classes and theirrespective Quality of Service (QoS) parameters aresupported, allowing customers to subscribe to CBR(Constant Bit Rate), VBRrt (Variable Bit Rate-real time),VBRnrt (Variable Bit Rate-not real time) and UBR 5 124509/2 (Unspecified Bit Rate) services, as well as a new servicecalled UBR+ which allows a minimum bandwidth to bereserved for UBR traffic.

The architecture disclosed herein applies an ATM muxfunction and a unique "IQ" bus invention disclosed indetail in U.S. Patent No. 5,951,660 entitled "Method ForPrioritized Data Transmission and Data TransmissionArrangement", to allocate traffic within requiredparameters, based on a priority scheme using weightedservice offerings and a cell aging mechanism. The "IQ"bus concept itself is an improvement over an "I*" busaccess mechanism, as disclosed in U.S. Patent No.6,105,084 entitled "Priority-Based Access Control Methodand Arrangement'.'’, and which is based on European PatentPublication No. 858,035, and which can also be used inselected embodiments of the present invention.

According to a third aspect of the presentinvention, a telecommunications system comprises at leastone shelf for connection to a plurality of subscriberterminals for location at a corresponding plurality ofsubscriber premises by way of twisted copper pairs,wherein the at least one shelf is for housing a pluralityof cards, including a network termination card forconnection to a broadband network, a plurality of linetermination cards for connection to the network termination card by means of a backplane bus of theshelf, and a plurality of lowpass filter cards, each forconnection to a public switched telephone network,wherein each lowpass filter card is for connection to acorresponding line termination card for joining aplurality of telephony signals and a corresponding 6 907-153 w plurality of digital subscriber line signals at an upstream end of a twisted copper pair, and wherein eachsubscriber terminal comprises a lowpass filter forconnection at a downstream end of a corresponding twisted 5 copper pair for providing the telephony signal to a telephone, and a digital subscriber line modem also forconnection at the downstream end of the twisted copperpair for connection to a data terminal.

According to a fourth aspect of the present10 invention, a telecommunications system comprises at least one shelf for housing a network termination card forconnection to a broadband network, a plurality of linetermination cards for connection to said networktermination card by means of a backplane bus of said 15 shelf, and a plurality of upstream end lowpass filter cards each for connection to a public switched telephonenetwork, wherein each lowpass filter card is forconnection to a corresponding line termination card forjoining a plurality of telephony signals and a 20 corresponding plurality of digital subscriber line signals at an upstream end of a corresponding pluralityof twisted copper pairs, and a plurality of subscriberterminals for location at a corresponding plurality ofsubscriber premises, each subscriber terminal for 25 connection at a downstream end of a corresponding twisted copper pair for communication with a correspondingupstream end lowpass filter and line termination cardover said corresponding twisted copper pair, wherein eachsubscriber terminal comprises a downstream end lowpass 30 filter for connection at said downstream end of said corresponding twisted copper pair and for connection to atelephone at a corresponding subscriber premises, and adigital subscriber line modem also for connection at saiddownstream end of said corresponding twisted copper pair 7 907-153 for connection to a data terminal at said correspondingsubscriber premises.

According to a fifth aspect of the presentinvention, a telecommunications system comprisessubscriber equipment, comprising a downstream end lowpassfilter for use at a subscriber's premises, responsive toa telephony signal occupying a baseband position in afrequency division multiplexed signal also having awideband signal occupying a position above baseband, for .only providing said telephony signal for use in voicecommunications between said subscriber's premises and apublic switched telephone network, and a digitalsubscriber line modem for use at the subscriber'spremises, responsive to said frequency divisionmultiplexed signal for providing said wideband signal foruse in digital communications between said subscriber'spremises and a packet network, and provider equipmentcomprising a shelf, responsive to said telephony signaland to said wideband signal, for providing said frequencydivision multiplexed signal.

According to a sixth aspect of the presentinvention, subscriber equipment for use in atelecommunications system having a shelf for connectionboth to a telephone network and to a wideband network andhaving a plurality of subscriber lines for connection tosubscriber equipment at a plurality of subscriberpremises, wherein each subscriber equipment comprises alowpass filter for use at a subscriber's premises,responsive to a telephony signal occupying a basebandposition in a frequency division multiplexed signal alsohaving a wideband signal occupying a position abovebaseband, for only providing said telephony signalbetween said lowpass filter and a subscriber's telephonefor use in voice communications between said subscriber'spremises and said telephone network, and a digital 8 907-153 subscriber line modem for use at the subscriber'spremises, for connection to said frequency divisionmultiplexed signal for only providing said widebandsignal between said digital subscriber line modem and asubscriber's data terminal for use in digitalcommunications between said subscriber's premises andsaid wideband network.

According to a seventh aspect of the presentinvention, a shelf for use among a plurality of shelvesin a rack for use in a telecommunications system forproviding both narrowband and broadband services to aplurality of subscriber premises, comprising a housingfor connection to a narrowband network and for connectionto a broadband network for connecting said narrowbandnetwork and said broadband network to said plurality ofsubscriber premises via a corresponding plurality oftwisted copper pairs, wherein said housing includesplural sections including an upper section for housing ina central portion thereof a plurality of lowpass filtercards with connectors thereon for insertion in abackplane of said housing, and wherein said upper portionof said housing also has end portions reserved forconnecting said narrowband network and said plurality oftwisted copper pairs, and a lower section for housing aplurality of line termination cards in a central portionthereof, each with connectors thereon for insertion insaid backplane of said housing, and wherein said lowersection includes at least one end portion reserved for atleast one network termination card for cable connectionto said broadband network.

According to an eighth aspect of the presentinvention, line termination equipment for use in a shelfof a telecommunications system, said line terminationequipment for connection to a plurality of subscriberlines for connection to a corresponding plurality of 9 907-153 10 15 20 25 30 subscriber equipment at a plurality of subscriberpremises, wherein said line termination equipmentcomprises plural subscriber channels, each comprisinq ahybrid circuit for connection to a corresponding twistedpair from a corresponding subscriber premises, eachchannel comprising a highpass filter for isolating atelephony signal occupying a baseband position in afrequency-division multiplexed signal from a widebandsignal occupying a position above baseband, amodulator/encoder, responsive to said wideband signal forproviding an encoded and modulated wideband signal tosaid hybrid circuit for providing said encoded andmodulated wideband signal on said twisted copper pair insaid position above baseband, and a demodulator/decoder,responsive to a wideband signal from said subscriberpremises for providing a demodulated and decoded widebandsignal to said wideband network.

According to a ninth aspect of the presentinvention, a replaceable printed board assembly for usein a shelf of a telecommunications system, wherein saidshelf is for connection both to a telephone network andto a wideband network and having a plurality ofsubscriber lines for connection to subscriber equipmentat a plurality of subscriber premises, wherein saidreplaceable PBA comprises a corresponding plurality oflowpass filters, each having a first port for connectionto a plain old telephone service interface comprising aplurality of twisted copper pairs, and a second port forconnection to a corresponding second plurality of twistedcopper pairs for connection to said correspondingplurality of customer premises and to said widebandnetwork via a wideband multiplex bus of said shelf.

According to a tenth aspect of the presentinvention, a telecommunications rack for connection to anupstream network service provider for providing said 35 10 907-153 service to downstream subscriber equipment also forconnection to said rack comprises a plurality of shelves,at least one shelf for connection to said upstreamnetwork service provider by means of network terminationequipment, each shelf for connection to differentequipment of said downstream subscriber equipment bymeans of line termination equipment, wherein each of saidplurality of shelves has a same nonredundant feature, atleast one pair of redundant line termination equipment,one line termination equipment of said pair for use insaid at least one shelf in association with said samenonredundant feature thereof and a remaining linetermination equipment of said pair for use in anothershelf of said plurality of shelves in association withsaid same nonredundant feature thereof, and means forconnecting said at least one shelf and said another shelffor providing said same nonredundant feature redundantly.

According to an eleventh aspect of the presentinvention, a network termination equipment for use in ashelf of a telecommunications system, said networktermination equipment for connection to an asynchronoustransfer mode network and to a plurality of linetermination equipment also for use in said shelf forconnection to subscriber equipment, wherein said networktermination equipment comprises physical mediumtermination equipment for interfacing to a physicalmedium by means of a serial input/output connection tosaid ATM network for providing a parallel input/outputtransmission conveyance means connected to said parallelinput/output for recovering/mapping ATM cells from/toframes of a transport format of said serial input/output,ATM layer processing means connected to said transmissionconveyance means for layer processing downstream ATMcells recovered by said transmission conveyance means andfor providing upstream ATM cells to said transmission 11 907-153 conveyance means, and an ATM bus interface responsive todownstream ATM cells from said ATM layer processing meansfor providing said downstream ATM cells with a guard bytefor an ATM bus in said shelf and responsive to upstreamATM cells with a guard byte for providing said upstreamcells to said ATM layer processing means without saidguard byte.

Configurations of the architecture are taught forequipment located in local Central Offices, Remote sitesand at customers' premises, as appropriate for a varietyof cable plant topologies. The system building blocks(boards, connectors, shields, etc.) are physicallyorganized in a new shelf arrangement detailed below thatpacks all these features into a high-density shelf thatcan be installed easily in conventional central offices,and remote cabinets and vaults.

Thus, the present invention provides a high-speeddigital access communications system, covering a widerange of configurations and applications, using newpacket and xDSL technologies with the possibility tooffer subscribers the variety of QoS classes defined, forexample, in the various ATM Forum specifications. Sinceit uses the existing copper cable plant already deployedthroughout the developed world, the system is economical- allowing Local Exchange Carriers to compete withalternative service providers such as CATV companies(which are deploying heavily overbooked cable modemtechnology on their coax cable plant). The system alsopreserves the reliability and simplicity of analog"lifeline” POTS, so that subscribers and telephoneoperating companies are not required to change the wayvoice services are provided.

These and other objects, features and advantages ofthe present invention will become more apparent in lightof the following detailed description of a best mode 12 907-153

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embodiment thereof, as illustrated in the accompanyingdrawing. BRIEF DESCRIPTION OF THE DRAWINGFig. 1 illustrates a basic xDSL shelf layout, which 5 may be an ADSL shelf in the embodiment illustrated, for use, for example, in an ATM subscriber access multiplexer(ASAM) system, according to the present invention.

Fig. 1A shows the shelf of Fig. 1 in detail, and in .particular shows how front access is achieved.

10 Fig. IB shows a standard configuration of xDSL shelves in a Central Office (CO) rack, according to thepresent invention.

Fig. 1C shows a shelf without cards, with variousconnectors for connection to the backplane, a terminal 15 block, etc.

Fig. ID shows a side view of a shelf, according tothe present invention.

Fig. IE shows a rack, according to the presentinvention, for housing a selected number of shelves, 20 according to the present invention.

Fig. 2 shows a functional block diagram of the

present invention whereby high speed packetized data in,e.g., ATM format is combined with traditional POTSservice, e.g., in an xDSL shelf which may be an ADSL 25 shelf in the embodiment illustrated for providing the means whereby POTS lifeline services on a twisted copperpair are overlaid with high speed digital services forcommunicating high bandwidth services to a customer'spremises. 30 Fig· 3 shows further details of the xDSL shelf of

Fig. 2 which can be an ADSL shelf, as illustrated, forserving a plurality of customer premises, in this casewith up to 48 lines. 13 907-153

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10 15 20 25

Fig. 3A illustrates a bus access method forprioritized data wherein guaranteed bandwidth andoverbooking in a same QoS class is mixed with a fairnessfeature, according to the present invention.

Fig. 4 shows additional flexibility built into anxDSL shelf which is shown here in two differentembodiments, one called a "hub” and the other a "remote",for use in an ASAM system, according to the presentinvention.

Fig. 4A shows LT-LPF BPA wiring and LT-BPAtransceivers for supporting the "hub" applications withDS-3 links to "remote" shelves, according to the presentinvention.

Fig. 4B shows wiring with non-redundant DS-3 LT cardinstalled for the "hub" application, according to thepresent invention.

Fig. 4C shows redundant DS-3 LTs on the same shelfin a "hub" application, according to the presentinvention.

Fig. 4D shows switch signal wiring for redundant DS-3 LTs in the same shelf for a "hub" application,according to the present invention.

Fig. 4E shows a solution for DS-3 LT card redundancyin separate shelves for a "hub" application, so as toprovide IQ bus redundancy, according to the presentinvention, where only a single IQ bus is provided pershelf.

Fig. 5 shows how the hub and remotes of Fig. 4 couldbe deployed in one embodiment of an ASAM system,according to the present invention.

Fig. 6 shows four xDSL shelves in one rack of anASAM system; the shelves may be ADSL shelves asillustrated, for use with redundant IQ bus extender cards(EXT) in an "A/B" bank switchover scheme to extend the IQ 30 14 907-153 bus to additional shelves to serve, e.g., with three suchracks, up to 576 subscribers.

Fig. 7A shows a schematic block diagram of a lowpassfilter card for insertion in one of the slots 24 in theupper section 22 of the shelf 10 of Fig. 1.

Fig. 7B shows a side view of such a lowpass filtercard with four lowpass filter/splitter circuits thereon,for insertion in a slot of the upper portion 22 of theshelf 10 of Fig. 1.

Fig. 7C shows a front view of the card of Fig. 7B,as seen from the front of the shelf of Fig. 1.

Fig. 7D shows an optional separate splitter shelf,according to the present invention.

Fig. 8 shows a separate splitter shelf, such as thatof Fig. 7D, used to add xDSL service to an existing DLC,according to the present invention.

Fig. 8A shows an ADSL remote cabinet, such as shownin Fig. 8 in more detail, wherein the configuration showssupports up to 96 lines in a type 3002 cabinet.

Fig. 9 shows a compact xDSL shelf, in this case, anADSL RAM (remote access mux) shelf, according to thepresent invention.

Fig. 10 shows a functional block diagram of an LTcard, according to the present invention.

Fig. 10A shows a front view of an LT card.

Fig. 10B shows a side view of an LT card.

Fig. 11 shows a simplified block diagramillustration of a channel of an LT card in a shelfconnected to a subscriber ADSL modem via a twisted pair,according to the present invention.

Fig. 12 shows an example of frequency allocation ofthe telephony and the QAM-modulated subchannels (tones)individually optimized as a function of line impairments,according to the present invention. 15 124509/2 S07-153

Fig. 13A shows a simplified block diagram of an ADSLmodem for use in a subscriber's premises, according tothe present invention.

Fig. 13B shows the exterior of a physical embodimentof an ADSL modem such as shown in Fig. 13A.

Fig. 13C shows an LED layout for the modem of Fig. 13B.

Fig. 13D is a table showing the meanings of thevarious LED indicators of Fig. 13C.

Fig. 13E shows a more detailed functional blockdiagram of an ADSL modem for use in a subscriber'spremises, according to the present invention.

Fig. 14A is a simplified block diagram illustrationof an NT card, according to the present invention.

Fig. 14B is a table illustrating some of thedownstream and upstream functions of the NT card of Fig.14A.

Fig. 14C shows a front view of an NT card, accordingto the present invention.

Fig. 14D shows a side view of an NT card, accordingto the present invention.

Fig. 14E shows a more detailed block diagram of anNT card, according to the present invention.

Fig. 14F shows a cell header structure for an ATMcell which is the main entity which is conveyed throughan ATM network.

Fig. 14G is a table showing the routing of receivedATM cells depending upon certain bits in the cell header,combinations of which can be checked according to themodes shown in the table.

Fig. 14H shows an IQ bus cell layout, according tothe present invention.

Fig. 15A is a block diagram of an ADSL Alarm ControlUnit (ACU).

Fig. 15B lists the functions of the signals of theACU of Fig. 15A. 16 124509/2 907-153

Fig. 16 shows an actual physical embodiment of anACU card for insertion in the rightmost slot of the shelfof Fig. 1.

Fig. 17 is a side view of the ACU card of Fig. 16.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Fig. 1 shows a new shelf arrangement 10 for use in .asubscriber access multiplexer system according to theinvention. The embodiment shown is for use in an ATMsubscriber access multiplexer (ASAM) system, but itshould be understood that the invention is not limited toATM embodiments. The shelf 10 is populated by at leastone or a redundant pair of network termination (NT) cards12a, 12b, up to twelve xDSL, In this case ADSL(Asynchronous Digital Subscriber Line), line termination(LT) cards 14, an equal number of Low Pass Filter (LPF)cards 24, an optional Network Element Processor (NEP) 16a(or an optional redundant pair 16a, 16b), and an AlarmCollection Unit (ACU) 18. An LT card is described inmore detail below in connection with Fig. 10, while anetwork termination card is described in more detailbelow in connection with Fig. 14A-14E. A lowpass filtercard is disclosed in more detail below in connection withFigs. 7A, 7B and 7C. An alarm collection unit (ACU) 18is shown in block diagram form in Fig. 15, and a physicalembodiment is shown in Fig. 16.

These cards can be mounted as shown in Fig. 1 in abottom section 20 of the shelf 10 and can be, e.g., sixrack spaces in height where one rack space equals 1.75inches (4.45 cm). An upper portion 22 of the shelf canbe, e.g., three rack spaces in height for containing upto, e.g., twelve lowpass filter (LPF) cards 24, with eachLPF card dedicated to an associated ADSL-LT directlybelow it. Also in the upper portion 22 of the shelf 10may be located connections 26 for POTS (plain oldtelephone service) interfaces and connections 28 for drop 17 907-153 tip/ring leads, connections 30 for power, and a smallboard 32 for DS-3-NT equipment protection as explainedbelow. The POTS can, but heed not, be in analog basebandform. It could take other forms, such as ISDN. Notethat the lowpass filters 24 are grouped in the center ofthe upper portion 22 of the shelf, with the connections26 for POTS and connections 28 for drop tip/ring leadsfor location at ends 33 of the upper portion 22 of theshelf. Since the lowpass filters plug into the backplaneupon insertion in slots of the shelf and do not connectto cables, they are positioned in the center of the upperportion 22. The connections 26, 28, 30 and 32, on theother hand, require cabling access and are positioned,according to the present invention, at the ends 33 tofacilitate such connections near the periphery of theshelf 19, rather than requiring cables passing overcentral portions of the shelf. Similarly, the LT cards14 are positioned in the center of the lower section 20of the shelf 10, since they do not require cabling andare connected to other modules by the backplane, to whichthey are connected via a connector upon insertion. Thus,the NTs 12A, 12B, the NEPs 16A, 16B and the ACU 18 arepositioned at ends 35 of the lower section 20 to provideeasy cable access. It is also noted that the shelf isdesigned entirely for front access. The shelf 10 can bedimensioned to fit both U.S. and European equipmentracks, e.g., being 498 mm wide and 285 mm deep.

The ADSL-LTs and the LPFs are dimensioned as fourlines per card. As such, a basic shelf supports forty-eight ADSL lines in a physical configuration shown inFig. 1.

Fig. IA shows a front view of an actual shelf withredundant NT cards, 12 LT cards, 12 corresponding LPFcards, and an ACU card all inserted therein. Fig. IBshows a plurality of shelves mounted in a central office 18 907-153 rack, such as shown in Fig. IE, in a standardconfiguration for serving 192 ADSL lines. Up to fouradjacent racks can share the same feeder by usingextension units installed in place of NTs, as explained 5 below in connection with Fig. 6. In that case, a single, optionally-protected NT card can support up to 576 ADSLlines. Fig. 1C shows the shelf of Fig. IA without anycards installed and shows the connectors installed in thebackplane, into which mating connectors on the cards are . 10 insertable by sliding the cards into the slots shown. In this way, front-access-only is achieved. A side view ofthe shelf is shown in Fig. ID.

It should be realized that without modification theLTs could be located in the upper portion and the LPFs in 15 the lower portion. Similarly, the various power and connection sections can be located other than as shownexactly in Fig. 1. Thus, the ATM subscriber accessmultiplexer (ASAM) shelf described above, althoughunique, can have additional as well as other physical and 20 packaging arrangements to fit particular applications.

In addition to the above-described front-access-onlyshelf compatible with both U.S. and international racks,the above-described shelf facilitates high density, i.e.,small volume per line design. Also included is a 25 practical high-speed (155-622 Mb/s) backplane data bus.

It contains a simple, flexible shelf ID (identification)mechanism. Connectorization and wiring is designed forfuture BITS capability. It satisfies both U.S. andEuropean electromagnetic compatibility (EMC)

30 requirements. It includes card arrangement for NT and LT cabling for TWP, coaxial, or fiber.

As suggested above, it can be utilized as a full-sized LT shelf for maximum density and minimum cost, asshown in Fig. IB for a CO, or as described more fully 19 907-153 below in connection with Fig. 9 as a mini-sized ('’RAM”)shelf for small remote sites.

The POTS lowpass filters (LPF) 24 of Fig. 1 can bepassive filters that are contained as shown in separateunits for ensuring POTS immunity to xDSL failures,maintenance and "churn” as well as for lower digital/analog crosstalk. In other words, an LT card orany other aspect of the ADSL channel can be maintainedwithout disturbing the POTS. Consequently, overallperformance is increased. A’functional block diagram of an LT/LPF pair fromthe group 14, 24 of Fig. 1 is shown serving a singlecopper pair 36 in Fig. 2. Although only a single twistedcopper pair 36 is shown, it should be realized that thepreferred embodiment includes four twisted copper pairsper LT/LPF card pair. In other words, the LT/LPF blocksshown within the ADSL shelf section 34 will be replicatedfour times for each such LT/LPF pair shown in Fig. 1 (Seethe LT card of Fig. 10).

As seen in Fig. 2, an ADSL data stream formatted asATM cells are transported over the copper pair 36formerly used for telephony only (POTS service) in anoverlay fashion, through the use of highpass filters 38,39 and lowpass filters 40, 42 at both the ADSL shelf tothe left of a dash line 44 and at the subscriber premiseson the right side of the line 44. The line 44 signifiesthe place where copper distribution to the subscriberbegins. Normally, the ADSL shelf section 34 will be partof a shelf 10 such as shown in Fig. IA within a rack in acentral office, as shown in Fig. IB, within which officealso resides a CO switch 46 and a broadband switch suchas a packet switch, e.g., an ATM switch 48. Thebroadband switch could be located elsewhere, such asfurther upstream. The CO switch 46 is for connection toa switched telephone network, such as the public switched 20 907-153 telephone network (PSTN) for providing POTS service on aline 50 to the twisted copper pair 36 and into customerpremises via copper wires 52 at the customer end, asshown in Fig. 2 on the right-hand side of a dashed line54, signifying a customer premises boundary, forconnection to a telephone 56 for normal voice communication. However, the ADSL shelf 34 could just aseasily be located in a remote cabinet in association witha DLC (Digital Loop Carrier) shelf, as described further .below, with both ATM traffic and POTS being carried toit, e.g., by a SONET (Synchronous Optical NETwork)transport product.

The ATM switch 48 is for connection to an ATMnetwork which provides connection to various services,including Internet Service Providers (ISPs) and otherhigh bandwidth service providers. The ATM switch 48provides ATM formatted data bn a line 58 to a networktermination (NT) card 60 which is, in turn, connected toa plurality of ADSL line termination (LT) cards such asthe card 62 which includes the highpass filter 38 forproviding the ADSL signal on a line 64 to a junction node66 for combination with the normal telephony signalsprovided by the lowpass filter 40. The node 66 thusforms a means for frequency division multiplexing, i.e.,joining the POTS service on the line 50 at a lowfrequency with the high bandwidth services provided onthe line 58 and converted to ADSL by the LT 62 at ahigher frequency for passing through the filter 38 and onto the line 64 for combination with the telephony serviceat the node 66 of the twisted copper pair 36. Fig. 12(not to scale) shows an example of bandwidth allocationfor POTS service at baseband, e.g., 0-4 kHz, with DMTtechnology used for the ADSL signal between 40 kHz and 1.1 MHz. In this case, the spectrum allocated for usedownstream is much larger than that allocated for 21 124509/2 upstream, and hence the designation as "asymmetrical"digital subscriber line (ADSL).

Referring back to Fig. 2, at the customer end 54, anode 68 allows the signal on the line 36 to be split offon a line 70 before passing a telephony signal through alowpass filter 42 in a Network Interface Device (NID) (not shown). The NID can be an enclosure (box) formounting on the wall of a house, and both the node 68 andLPF 42 can be inside the NID. The line 70 is connectedto an ADSL modem 72 which highpass filters the signal onthe line 7 0 and demodulates and decodes the ADSL signalfor providing a high bandwidth signal on a line 74 tocustomer premises equipment such as, but not limited to,a personal computer (PC) 76. The NID enclosure can be,for example, as shown in co-owned U.S. Patent No.6,044,151 entitled "Apparatus for Mounting a Low PassFilter in a Telephone Network Interface Box".

It should be mentioned that the POTS signals in thebaseband part of the signal spectrum of the signal on theline 36 of Fig. 2 can include conventional analog modemand even mechanized loop testing (MLT) signals, neitherof which will be degraded by or affect the ADSL service.

The functional block diagram shown in Fig. 2illustrates both the data and telephony paths to thecustomer. The shelf (basic shelf) architecture isfurther illustrated in Fig. 3. The basic shelf 10includes an "IQ bus" including control leads 78, which ismore fully described in European Patent No. 881,853entitled "Method for Prioritized Data Transmission andData Transmission Arrangement", and which is herebyincorporated by reference. As was known in the priorart, whenever a number of any 22 907-153 kind of terminal units need to access a common medium orbus, some access grant criterion is needed, e.g., upon agrant signal, each terminal unit enters an arbitrationphase based on the respective priority values assigned tothe terminal unit. The problem with this is a problem offairness, in that the terminal having a low prioritymight never get access. In brief, and as illustrated inFig. 3A, the IQ bus invention makes the priorityadaptable after each grant cycle, so that if a unit does .not get access, its priority can be increased. Inaddition, the priority value can be linked to an accessmode requested by the terminal unit, e.g., a GuaranteedCell Rate GCR (CBR, VBR, ABR in case of an ATM-basedbus), Non-Guaranteed Cell Rate NGCR (VBR, ABR, EBR incase of an ATM-based bus) by allocating value ranges toeach access mode, increase of the priority then beinglimited by the boundaries of the respective ranges. Forinstance, five different levels of QoS classes are shownat the left-hand side of Fig. 3A, with the lower threeclasses having both guaranteed cell rate and non-guaranteed cell rate subclasses indicated. Naturally,the constant bit rate (CBR) and variable bit rate-realtime (VBRrt) classes do not have non-guaranteed cell rate(NGCR), since they must be guaranteed. The non-guaranteed cell rates are shown grouped at the bottom ofthe priority mapping to the right, which shows QoSsubclasses with guaranteed subclasses at the top(shaded). Nevertheless, according to the presentinvention, overbooking of non-guaranteed bandwidth isallowed by providing not only prioritization, as shown,but also an aging mechanism, as shown on the far right ofFig. 3A. When a terminal subscribing to a non-guaranteedclass of service does not get access within a predetermined period, its priority is increased accordingto a selected algorithm to a value within a range 23 124509/2 corresponding to an access mode having a higher accessprobability. One particular and non-limiting way ofdefining priority values is suggested in Fig. 3A, with215-1 priority values defined and evenly allocated (forinstance) among the QoS subclasses. As an example, for ahardened-UBR QoS class, the guaranteed cell rate (GCR) isnormally defined as a number of cells per second. Aperiod having a time defined by the inverse thereof canthus be defined as shown in Fig. 3A, indicating how thepriority of the cell from the lowest subclass (Non-Guaranteed Hardened UBR) can be increased after it is notgranted access to the bus after a waiting time T = 1/GCRseconds. In the example shown, the priority is increasedin a single step'· to that of the Guaranteed Hardened UBRsubclass, thus statistically implementing a minimum cellrate for the lowest subclass. These teachingsadvantageously provide a flexible method allowing accessbased on a type of access mode and on agreed accessparameters. The IQ bus is thus distinguished by a uniquegrant mechanism and fairness algorithm. It providesmultiple QoS classes with multiple cell priorities perclass. It features a cell aging priority mechanism, aswell as a QoS priority mechanism to ensure cells complywith the class of service parameters defined in BellcoreSpecification GR-1110. It is provided with faulttolerance and recovery mechanisms, allowing any fault onthe multiplex bus to be quickly identified and isolated.It has a redundant extension capability as well, asdescribed below in connection with Fig. 6. The IQ busbuilds upon an earlier "I* bus" (without QoS) describedin European Patent No. 858,035 entitled "Priority-BasedAccess Control Method and Arrangement", which is alsohereby incorporated by reference. 24 124509/2

As shown in both Figs. 1 and 3, the NTs 12a, 12b canbe provided in either a redundant or non-redundantconfiguration. In this architecture, the normal NEprocessing is performed by the NT, and the NT can beprovided as either a SONET User Network Interface (UNI)interface, a DS-3 UNI interface or later, a DS1 inversemultiplex UNI interface. If SONET NTs are provided asredundant pairs, Automatic Protection Switching (APS) isprovided using the normal 1+1 switchover mechanismdetailed in Bellcore document GR-253. On SONET NTs, thephysical interface (fiber) is located on the faceplate ofthe NT itself (see Figs 14C and 14D), with no need ofadditional interface circuitry. If, however, NTs areprovided as DS-3' ports, equipment protection (withoutcable protection) is provided using the DS-3 I/O board 32shown in Fig. 1 installed above the NTs in the shelf,allowing the single DS-3 facility (coax cable Tx/Rx pair)to be split and accessed by either NT (inter-NTcommunication arbitrates which one is active).

From the foregoing it will be appreciated that theheart of the ADSL shelf architecture is the above-mentioned IQ bus and control leads 78. The IQ buseffectively acts as a multiplexer at the same effectivespeed as the NT physical interface. Since ADSL-LTsprovide several classes of service (as defined inBellcore document GR-1110 and the ATM Forum Standards), agrant mechanism allows higher priority upstream cellsgreater access to this ATM MUX bus, in order to meet theQoS parameters required of the respective servicesprovided. As mentioned, two methods of cell priority canbe chosen to guarantee QoS requirements and relativefairness--a weighting priority mechanism (based onservice guarantees) and an aging mechanism (based on timea cell has been waiting for a grant). This mechanism isunique and the subject of the above-mentioned European 25 124509/2

Patent No. 881,853, which has been incorporated byreference.

The ACU 18 in Fig. 3 is shown in block diagram formin Fig. 15, and it performs the following functions: (1) collects external customer designated alarm contacts onlines 80 and forwards these events to the NT 12a vialines 78; (2) collects failure indications in the rack and forwards this information to the NT 12a; (3) receives processed alarm data from the NT and displays the alarmcondition (critical, major, minor) on the ACU's faceplateas well as providing contact closures for visual andaudible (and telemetry alarms) to a rack fuse panel andto a CO alarm interface via a line 82. The ACU alsocontains: (4) ah alarm cutoff (ACO) function to silence audible indications until a new alarm is detected (aswell as a remote ACO function via line 82); (5) a craft interface port 84 for controlling OAM and P functions ofthe ADSL NE (using a link to the processor in the NT); (6) an ethernet port for OS connection via the NEP; and (7) a lamp test function. One ACU card is provided perrack when a system spans multiple racks. An ACU isprovided per NT (or redundant NT pair) when multiplesystems reside in a given rack. Multiple systems residein a given rack when a very wide bandwidth is to beserved by, e.g., a single shelf. In such a case, asingle shelf may use up the entire bandwidth of an OC-3or DS-3 cable.

As shown in Figs. 3 and .10, each ADSL LT 14a, 14b,..., 141 communicates with up to four remote modems (ADSLNT or ANT) at corresponding customer premises via DMT(Discrete Multi-Tone) per T1.413 (see Fig. 12), using ATMcells as the data transport format, according to thepresent invention. The subscriber can have a lowpassfilter (LPF) 42 mounted, for example, on the outside wallof his home in an NID (Network Interface Device) box to 26 124509/2 separate the low frequency service (telephony) from thehigher frequency services (ADSL). As mentioned, a way tomount such an LPF within an existing design NID is shownin U.S. Patent No. 6,044,151, which is hereby incorporated by reference. The two services, once split,use different twisted pairs in the house wiring, with theADSL pair terminating in either an ANT or directly in aPC via an NIC (Network Interface Card). ANTs, forexample, can come in two types: one with an ATMF 25.6Mb/s interface, the other with an ethernet interface (inthis case the ANT. packages the ethernet data as ATM cellsusing AAL5 (ATM Adaptation Layer 5) protocol). Bothoptions can be provided on the same ANT, as shown in Fig.13B.

The basic shelf 10 also contains, as shown in Figs. 1 and 3, an optional network element processor (NEP)redundant pair 16a, 16b, which communicates over the IQbus 78 mechanism and communicates with its redundantpartner over separate leads 86 to determine which one isactive. The NEP can terminate signaling channels for SVC(switched virtual connection) services or PVC (permanentvirtual connection) services and can terminate the ACUethernet port.

Presently, the two NEP cards 16a, 16b of Figs. 1 and3 are not being implemented, although there are two slotsreserved for it. It is planned to be available later forterminating and processing SVC (Switched Virtual Circuit)signaling channels, and for providing an ethernettermination for the ACU ethernet port. There are noother functions presently planned for the NEP cards.

As shown in Fig·. 4, the basic shelf 10 may also beused as a "hub” shelf 90, with one or more ADSL-LT slotspopulated by DS-3-LTs or other cards such as OC-3, DS-1inverse mux LTs, etc. Each DS-3-LT connects the hub to a 27 907-153 concatenated ’’remote’· ADSL shelf 96, 98, as shown in Fig. 4. In such cases, for the hub, the "LPF" modules abovethe DS-3-LTs are replaced with DS-3-LT interface modules(one type for nonredundant operation and another type forredundant DS-3 "equipment protection" operation). Athird type of DS-3 LT interface module can be providedfor redundant IQ bus operation, with the DS-3-LTs beingon separate shelves for reliability purposes (due tothere being only one IQ bus per shelf). The presentarchitecture uniquely provides for each of theseredundancy options.

As shown in Fig. 4A, the LT-LPF backplane wiring isshown with LT transceivers. In this case, the LPF and LTcards can be configured for redundancy of the LT cards tobe inserted in the LT slots in either a same shelf or inseparate shelves. For example, in Fig. 4B, a non-redundant option LT is shown with a DS-3 interfaceinserted in LPF slot i, wherein input and output DS-3coax cables from a CO switch are connected to a DS-3interface card for insertion in LPF slot 1, which isconnected through the backplane to a DS-3-LT card forinsertion in LT slot 1, such as the DS-3-LT card 92 ofFig. 4. The lowpass filter function is carried out atthe remote shelf 96 of Fig. 4 where a DLC is available.The configuration shown in Fig. 4B for LT slot 1 and LPFslot 1 could also be used in connection with Fig. 4E, asexplained below.

Fig. 4C shows an application with redundant DS-3-LTcards for insertion, e.g., in LT slot 1 and LT slot 2 ofa given shelf. In that case, a different kind of DS-3I/O card is used, double wide as shown, with a centertapped transformer on the card which is connected both tothe transmit (TXA/TXB) and to the receive (RXA/RXB)backplane wiring associated with both LPF slot 1 and LPFslot 2. The NT controls which LT slot is to be active. 28 907-153

Fig. 4D is similar to Fig. 4A but additionally showsarbitration interfaces between redundant DS-3-LTs.

As suggested above, since there is only onenonredundant IQ bus per shelf, the equipment protection 5 implied by Fig. 4C with A and B redundant DS-3-LT cards in slots 1 and 2 will be ineffective if the IQ bus itselfhas a failure. If it is desired to avoid this sort offailure, a different kind of redundancy in the DS-3 cardscan be provided, as shown in Fig. 4E. In that case, half 10 of the transmit and receive signals are used in the shelf, and the other half can be routed to a differentshelf, instead of slot 2 in the same shelf. The top twocables shown in Fig. 4E would thus be routed to anothershelf and be connected into, e.g., the DS-3 out and DS-3 15 in transformers shown in Fig. 4B in another shelf. The DS-3 out and DS-3 in cables of Fig. 4E would go to the COswitch or other network element.

As will be observed in Fig. 4, an ADSL shelf 90 mayhave both ADSL-LTs 14a and aggregate type LTs such as the 20 DS-3-LTs 92, 94 shown. Service classes in both cases are provided for subscribers by separate buffers per serviceclass (CBR, VBR, UBR, etc.), each contending for upstreamaccess to the IQ bus via the control leads and the grantmechanism based in part on the priority assigned to each 25 upstream cell. In the case of aggregate LTs, such as shown in the hub 90 of Fig. 4, the service class buffershave a cell priority equal to the sum of the aggregatecell priorities in each buffer (or even some percentage),in order that the remote subscribers are assigned a fair 30 share of the hub's operating bandwidth. In times of bursty upstream traffic, congestion and DS-3-LT bufferoverflow is managed by limiting the DS-3 link bandwidthand allowing temporary buffer fill in the remote ADSL-LTs(until such time that the traffic peak subsides). It is 35 noted that POTS interfaces are not shown in Fig. 4 but 29 907-153 would normally be provided, e.g., by DLCs adjacent orincorporated in the Remotes 96, 98.

Fig. 5 shows the hub 90 of Fig. 4 located in acentral office 100 which may also include a CO switch 102 5 and an ATM switch 104. The CO switch is connected to a public switched telephone network (PSTN) 106 and the ATMswitch to an ATM network 108 which is, in turn, connectedto other services 110 which may include various Internetservice providers 112, ..., 114. As illustrated in Fig.

10 4, the hub shelf 90 may be populated by both ADSL LT cards such as the card 14a and various other cardsincluding DS-3 LT cards 92, 94. Four copper pairsemerging from the ADSL LT card 14a of Fig. 4 areillustrated as a plurality of copper pairs 116 in both 15 Figs. 4 and 5. These leads provide an ADSL link directly between the hub and the various customer premisesillustrated, including a customer premises 118 shown indetail. If the shelf 90 were used exclusively with ADSLLTs 14, such as shown in Fig. 1, all of the subscriber 20 lines would be like the lines 116 without using the shelf 90 as a hub and without the remotes of Fig. 5. In otherwords, there would be twelve groups of 4 POTS plus ADSLlines 116 serving 48 different customer premises. Theimplementation of Fig. 5 provides for many more customer 25 premises served by a single shelf, but with the accompanying increased competition for upstreambandwidth. This can be tolerated in cases where themajority of subscribers are using lower quality ofservice. 30 A lowpass filter 120 is mounted in a network interface device arrangement (not shown) for terminatingthe subscriber line at the customer's premises. Itfilters out all but the low frequency telephony signalfrom the copper pair and provides it on a line 122 to a 35 traditional telephone 124 for voice communications. It 30 907-153 also filters high frequency dial pulse or ring triptransients so that they do not interfere in the upstreamdirection with the high-speed data traffic. A secondcopper pair connected before the lowpass filter, asshown, is provided to an ADSL modem 126 which, afterhighpass filtering, demodulates and decodes the ADSLsignal and provides output bits on a line 128 to a userterminal 130 such as a personal computer, Internetcomputer, etc., e.g., for Internet access or for access , ·to other high bandwidth services 110. It should berealized that the ADSL modem also operates in the reverse(upstream) direction, albeit in a much narrowerbandwidth, to encode and modulate bits onto the ADSL linefrom the subscriber to the ATM network as per ANSI T1.413(see Fig. 12).

The remote shelves 96, 98 of Fig. 4 are also shownin Fig. 5 connected to various customer premises, whichare similar to premises 118.

Fig. 6 shows in detail the above-mentioned featureof the present architecture whereby a plurality of ADSLshelves 10a, 10b, 10c, lOd such as shown in Fig. 1 can bedaisy-chained together in a rack by means of an extendercard (EXT) in each subsequent shelf. The extender cardfunction is to effectively extend the IQ bus from shelfto shelf (daisy-chained, e.g., to a maximum of twelveshelves altogether), allowing up to, e.g., 576 ADSLsubscribers accessed to the system. In other words, theextender card allows an NT card in a first shelf to actas an NT card for another shelf or a plurality of othershelves. I.e., in this case, three racks with altogethertwelve daisy-chained shelves. The extender cards can bemounted as shown in Fig. 6 in the NT slots of subsequentshelves and may be redundant. In that case, any failureof an NT or extender card bank switches all LTs from the"A” NT/extender string to the "B” string. The active 31 907-153 string then assumes control of each shelf's IQ bus. TheIQ bus itself (within each shelf) is not redundant, butmeets reliability requirements, as the NT has the abilityto remove each LT from the IQ bus (disable) to isolate afault and remove it from service.

As suggested above, the POTS lowpass filters can beprovided for different options including "integrated" ina CO shelf for maximum packaging density, minimum cablingand installation complexity and minimum cost as describedabove or "separate" (remote, non-integrated) forregulatory flexibility and access to existing (crowded)DLC cabinets.

Fig. 7A shows a lowpass filter card, such as one ofthe LPF cards 24 shown in Fig. 1 in schematic blockdiagram form. Four different lowpass filters/splittersare shown on the card. To the left of each card is avoice port for connection to the narrowband (NB) networkvia the CO switch 46 via the line 50. On the righthandside of each lowpass filter/splitter is a port which isconnected both to the twisted copper pair 36 to thesubscriber and to the highpass filter 38 of the LT 62(see Fig. 2). A side view of the physical dimensions ofsuch a four-channel LPF card is shown in Fig. 7B, while afront view is shown in Fig. 7C.

Fig. 7D shows a splitter shelf for use inapplications where the lowpass filters need to be remotefrom the ADSL shelf. Such a shelf can be used, forexample, when (a) separate service providers areresponsible for the telephony and ADSL services, or (b)in DLC (digital loop carrier) configurations where remotecabinets of DLC equipment cannot accommodate ADSLequipment (due to lack of physical space), but since thesubscriber transmission pairs terminate in the DLCcabinet (and enough room is available for a small lowpass 32 907-153 filter "splitter”), this shelf only is installed in theDLC cabinet.

In this case, the basic xDSL shelf is used, aspreviously shown, but with the LPF boards not populated. A separate "splitter" shelf, as shown in Fig. 7, is thenprovided and has a configuration the same as, or verymuch like, the top portion of the basic xDSL shelf 10 ofFig. 1. The main difference in remote splitterconfigurations is the cabling and the use of "stackable",connectors. The splitter shelf is shown in Fig. 7, and atypical configuration using splitter shelves is shown inFig. 8. In an initial implementation, LPFs (and thesplitter shelf) need no power, as all circuitry ispassive.

Fig. 8A shows a remote cabinet that can be used whenadding ADSL service to existing metallic-fed DLCs. Thisconfiguration supports up to 96 lines in a type 3002cabinet.

It should be noted that the "separateness" of thelowpass filters 24 as shown in Fig. 1 from the LTs, aswell as the separateness of the LPFs of Figs. 7, 8 and 8Ais not only advantageous for the reason mentioned above, i.e., for facilitating separate service providers fortelephony and ADSL services, but also for the veryimportant reason, according to the present invention, forphysically separating the lifeline telephony service fromthe ADSL service. Such separateness provides anincreased level of integrity for the lifeline POTSservice, since such physical separateness itself ensuresthat any maintenance actions which may need to beperformed on the ADSL part of the system can be done in aphysically separate manner, and therefore in such a wayas to not affect the POTS service (and vice versa).

Another equipment shelf is the RAM (Remote ADSL Mux)shelf as shown in Fig. 9. This shelf is deployed very 33 907-153

<img img-format="tif" img-content="drawing" file="IL124509AD00023.tif" id="idf0003" />

much, like the remote ADSL shelves 96, 98 shown in Fig. 4,and in fact may have the same shelf architecture as thatshown in Fig. 3. The difference is that the RAM shelf ismore suited for CPE or DLC applications where, e.g., no 5 more than twenty-four lines are required, and a smaller shelf (6RS versus 9RS) is desired. As such, a RAM shelfmay be designed and physically configured, for example,as shown in Fig. 9. This shows the flexibility of thexDSL shelf of the present architecture. 10 Fig. 10 shows a functional block diagram of one of the ADSL LT cards 14a of Figs. 1, 3 and 4. Theimplementation of the various functional blocks isrealized in this implementation by the application of anADSL chip set of assignee for DMT technology. This chip 15 set consists of three chips (integrated circuits)

identified as RCHAP for ATM functions, a DACHA/SACHA chipfor Reed Solomon coding and decoding, and a front-end DSP . . chip called ADSLB. The remaining blocks are preferablycarried out by other means outside the chip set. The 20 three chip chip set RCHAP, SACHA and ADSLB are also shown in Fig. 11 in a simplified block diagram that shows thechip set in both an LT 14a in an ADSL shelf 34 and in anADSL modem 72 at a customer's premises in reverseordering of chips. 25 In regard to the ATM functions carried out by the RCHAPB chip, such takes care of the encapsulation of ATMcells in 54-byte slots and the access to two separate IQbuses, i.e., upstream and downstream. There is also adummy cell added to the 53 standard ATM cells in order to 30 allow a change-over from one LT to another on the upstream IQ interface (between cells). On the downstreamIQ interface, this byte is not filled in, and on theupstream IQ interface, the bus is in high impedance stateduring this byte. 34 124509/2

The main entity which is conveyed through an ATMnetwork is a cell which is divided into two parts, eachwith a fixed size: the header (5 bytes), and theinformation field (48 bytes). Depending on the value ofthe header of the ATM cell, a number of ATM-relatedfunctions may be performed, such as insertion andextraction of maintenance cells, cell rate decoupling,Header Error Control (HEC) generation/check, payloadscrambling, cell loopback, etc.

The data that are sent on the ADSL line are forwarderror- corrected (FEC) by Reed Solomon (RS) coding toimprove the bit error rate. To allow for an even betterprotection against burst errors an interleavingpossibility is incorporated, with the disadvantage of anincreased transfer delay for interleaved data. Also, ascrambler is included to randomize the data before the RSencoder. After the RS decoder, the data is thendescrambled.

Also carried out by the SACHA chip set, besides ReedSolomon (de)coding is mapping and demapping. In the ADSLsystem, a DMT approach may be followed in which, forexample, up to two hundred fifty-six carrier frequenciescan be used (see Fig. 12). Each of these frequencieswill carry a number of bits according to a mapping table.The function of the mapper is to assign the bits to thedifferent frequencies. The mapper can also send somespecial DMT symbols for link initialization and maintenance. The demapper will demodulate and monitorthe received symbols. After demodulation, it deliversthe data to the on-chip RS decoder. Some specialfunctions are included in the demapper for initializationand maintenance of the ADSL link. An example of an ADSLmapper may be found in European Patent Publication No.802,649, entitled "Method and Windowing Unit to Reduce 35 124509/3

Leakage, Fourier Transformer and DMT Modem Wherein the

Unit is Used".

The output of the mapper is a complex representationof all the carrier frequencies. An Inverse Fast FourierTransformer is used to transform this representation to atime signal. In cooperation with the IFFT, a carrierselective scaling can be installed. In the upstreamdirection, an FFT is used to transform the received timesignal to a frequency representation.

The main function of the front-end digital signalprocessing is to separate the received signal as much aspossible from the transmitted signal, and to correct forthe line and analog front-end characteristics.

The ADSLB chip function includes analog-to-digital(A/D) and digital-to-analog (D/A) conversion. Thefunction of the subscriber line analog front end is thetermination of the analog line interface and thetransformation of the digital data into an analogpassband signal that can be transmitted on a physicalsubscriber line 36 and vice versa. For the D/A and A/Dconversion, a sigma-delta (ΣΔ) approach is used.

As shown in Fig. 11, the subscriber line analogfront-end function includes a line driver used to amplifythe ADSLB output to the levels appropriate to be transmitted over the subscriber line. A hybrid isincluded as a passive network that performs thetermination of the subscriber line with its nominalimpedance and handles the conversion between four-wireand two-wire in the LT at the upstream end. It performsthe separation in the upstream direction between theupstream and downstream signals, and the combining in the 36 907-153 downstream direction. The reverse is performed at thedownstream end of the line.

Referring back to Fig. 10, it is noted that the LT14a includes four separate line termination paths forfour separate subscribers. Although not shown in Fig. 10or 11, it should be realized that the twisted pairconnects not only to the HP-filter and hybrid shown inFigs. 10 and 11, but also to a lowpass filter 40, such asshown in Fig. 2. Fig. 10A shows a front view of an LTcard, while Fig. 10B shows a side view.

Since POTS signals and ADSL signals are transportedfrequency-multiplexed on a subscriber line, as shown inFig. 12, a POTS lowpass filter 26 is required, whichperforms the following functions: (1) combining the POTSand ADSL transmit signals toward the subscriber premises; (2) separating the POTS and ADSL signals from thesubscriber premises; (3) protecting the POTS from audibleinterference, generated by signals from the ADSL modemand the ADSL shelf; and (4) protecting the ADSL receiverfrom all POTS-related signals, particularly dial pulses,ringing and ring trip transients.

These functions are performed while meeting all therequirements for POTS performance, such as return loss,insertion loss and group delay, such as those in ANSIStandard T1.413. The combination and separation of POTSand ADSL signals is achieved by lowpass and highpassfiltering, as shown in Fig. 2. Only the highpass filterand the hybrid are part of the LT. As mentioned above,the lowpass part preferably resides on a differentprinted board assembly (LPF).

Also shown in Fig. 10 is an on-board controller(OBC), which may be embodied as a microprocessor includedto handle a variety of tasks, such as initialization ofASICs, monitoring and processing of maintenance messages,and detection of a malfunctioning LT. On-board memory 37 907-153 may include flash-PROM and DRAM used for executable codeand data. Inventory information may also be stored on anEEPROM so as to provide the necessary data for anadequate identification of a replaceable item. Such mayinclude product identification, manufacturing informationand inventory information. Also shown in Fig. 10 arepower supply functions by way of on-board mounted DC/DCconverters. A test access port (not shown) may also beprovided.

As will be understood by anyone of skill in the art,from American National Standard for Telecommunications"Network and Customer Installation Interfaces—AsymmetricDigital Subscriber Line (ADSL) Metallic Interface", ANSITI.413-1995, the nature of the signal on the twisted pair36 shown in Fig. 11 and in Fig. 2 may be a standardizedasymmetric digital subscriber line signal that allows theprovision of plain old telephone service (POTS) and avariety of digital channels. In the direction from thenetwork to the customer premises, the digital channelsmay consist of full duplex low-speed channels and simplexhigh-speed channels; in the upstream direction, only low-speed channels are provided. The transmission system isdesigned to operate on two-wire twisted metallic cablepairs with mixed gauges. The standard is based on theuse of cables without loading coils, but bridged taps areacceptable, with the exception of unusual situations. Asshown in Fig. 12, for example, the power spectrum isshown as including a 4 KHz band reserved for POTSservice, with the portion of the spectrum between 40 KHzand 1.1 MHz occupied by a large plurality of carriers,with tone spacing of 4.3125 KHz. A small portion of thespectrum is used for upstream data, as shown, with theremainder used for downstream data. Each of the 4 KHztones is QAM-modulated and individually selected andoptimized as a function of individual subscriber line 38 907-153 characteristics. Some tones are allocated with a largenumber of bits, while others a lesser number or none atall, due to line conditions.

As shown in Fig. 11, the functions already describedin connection with an ADSL LT 14a are replicated in theADSL modem 72. In addition, a selected interface to thesubscriber PC 76 may include, e.g., an ATM-25 and/orEthernet interface, as shown in Fig. 11.

Fig. 13A shows a simplified block diagramillustration of an ADSL Network Termination (ANT) unit.

It includes a modem part which performs the ATU-Rtransmitter reference model functions, for example, asshown in Section 4.3 of ANSI Tl.413-1995. An ATMfunction is added, according to the present invention,for ATM translation and signal processing. In thedownstream direction, the ANT unit terminates the ADSLsignal, demodulates, and the interconnect functionconverts the ATM cells into a digital bitstream to thesubscriber's digital terminal equipment (DTE). In theembodiment shown, the interfacing block to the customerequipment includes both ATM and/or ethernet interfaces,as shown. Fig. 13B shows an ADSL Network TerminationUnit with the line, ATM and ethernet connections shown.The line connector is RJ14, while the ATMF-25 and lOBase-T connectors are RJ45. Fig. 13C shows five LEDindicators that are visible on the top of the box of Fig.13B for giving the indications indicated in the table ofFig. 13D. A more detailed functional block diagram of an ADSLmodem 72 (such as already shown in Fig. 11) is shown inFig. 13. The lowpass filter 42 of Fig. 2 is shown aspart of an external "splitter" in Fig. 13, which alsoincludes the node 68 of Fig. 2.

An external AC/DC inverter (6V DC/xV AC) and an on-board DC/DC power supply are shown in Fig. 13 and are 39 907-153 used to feed the power to the board. The external powersupply (AC/DC) converts the high voltage from the walloutlet to a voltage that can be handled by the ADSL modem72, such as +6 volts DC. Further conversions are shownfrom the DC/DC power supply.

An analog front-end may include the highpass filter39 already shown in Fig. 2, as well as a hybrid and linedriver such as shown in Fig. 11. The hybrid is for 2-wire to/from 4-wire conversion.

An ADSLB block is shown for terminating the analogline interface and for transformation of digital datafrom a DACHA/SACHA block into an analog passband signalthat can be transmitted on a physical subscriber line andvice versa. The ADSLB performs analog-to-digital (A/D)and digital-to-analog (D/A) conversion.

Again, the SACHA is the DMT signalmodulator/demodulator. This software-configured ASICprocesses the ATM cells (scrambled) from the RCHAP blockand delivers the DMT modulated signal to the ADSLB andvice versa. Note that there is no difference between theDACHA and the SACHA, except a lower cost for the SACHA. A DACHA can be used as well, and is especially necessaryto support a standardized 4.3125 KHz tone spacing mode.

The RCHAP provides the interconnection between theSACHA/DACHA and the rest of the system. It contains 16ATM cell buffers in both upstream and downstreamdirections, and performs virtual path/virtual channel(VP/VC) translation, extraction and insertion of ATMcells, and handles on-board tasks. A RAPID block provides interfacing between RCHAP,ATM-izer and IDT-PHY blocks. It also contains DMAcontroller and logic for ethernet functions.

The IDT-PHY block translates ATM cells between theon-board parallel data bus (with standard byte-wide 40 907-153 cells) and the serial data over the ATM Forum physicalconnector (with scrambled 4B5B coded data).

The ATM-izer is the upstream controller, responsiblefor upstream quality of service, cell shaping and 5 policing. It is responsible for translating downstream AAL5 packets into ethernet-frames and vice versa.

Handling upstream ATM Forum data is also performed by theATM-izer.

An 182596 controller performs CSMA/CD medium-access , 10 control, moves ethernet frames between SRAM packet memory and a serial ethernet transceiver. It is monitored bythe OBC. An 182503 performs a serial transceiverfunction to 802.3 10Base-T, direct interface to 182596.

For code processing, an I960 microprocessor is 15 included to handle a variety of tasks, such as initialization of ASICs, memories, etc., monitoring andprocessing of the maintenance messages, on-line/off-linetest support. Memory is included in the OBC as well,such as 2 Mb DRAM for program executables and a 1.5 Mb F- 20 PROM for boot code, power-on test, a 512 Kb for ethernet packet memory, etc. A small EEPROM (4 Kbit) is used fora remote inventor circuit.

Fig. 14A shows a simplified block diagram of anembodiment of an NT card, according to the present 25 invention. It provides a high-speed optical or electrical access to a Synchronous Optical Network(SONET) transport system. It converts AsynchronousTransfer Mode (ATM) cells to SONET packets (i.e., frames)and vice versa. Thus, the NT card adapts ATM cells 30 carried on the IQ bus to the SONET transmission system and vice versa. It also includes necessary functions aslisted in the table of Fig. 14B for operating andmaintaining the ATM subscriber access multiplexer of thepresent invention. 41 907-153

It is noted that the table of Fig. 14B is split intotwo columns representing downstream functions andupstream functions. The downstream functions, forexample, have been grouped and numbered 1-4, andsimilarly labeled in Fig. 14A in the top section of therespective four blocks. Similarly, for the upstreamfunctions, these have been grouped in the right-hand sideof the table and have been numbered 5-8, with the samenumbers shown in the lower half of the blocks of Fig. 14A. It should be realized that these functions can bemoved between blocks, and this is just an example.

In regard to the physical medium block, this can bean optical interface for interfacing an optical transportsystem with a receive and transmit optical fiber carryingsignals, e.g., with a nominal bit rate of 155.52 Mbps.

The interface is symmetric, i.e., it has the same bitrate in both directions and could operate, e.g., at awavelength of 1.3 gm. This signal can be a SONET(Synchronous Optical Network) signal at the OC-3 levelfor conversion to STM-l/STS-3c in the electrical domain.This is a serial signal which the physical mediuminterface block converts to parallel form at a slowerrate for processing on the NT card, with the paralleldownstream output locked on to the received clock.

The transmission convergence sublayer processing isdone in the second block, wherein the ATM cells aredelineated within a hierarchical transmission framestructure used to transport the ATM cells. These cellsare divided into two parts, each with a fixed size, thehead with five octets, as shown in Fig. 14F, and thepayload with 48 octets, as shown in Fig. 14H. In the ATMblock of Fig. 14A, ATM layer processing is carried out.

In the upstream direction, all fields in the ATM cellsreceived on the IQup interface are transportedtransparently, except for the Header Error Control (HEC) 42 907-153 field (see ITU-T Recommendation 1.361, "B-ISDN ATM LayerSpecification"). The HEC may be checked or not, as anoption. The routing of received ATM cells depends uponthe VPI (Virtual Path Identifier) and VCI (VirtualChannel Identifier) bits in the cell header. The fullVPI octet and the eight least significant bits of the VCIcan be checked for VPI/VCI combinations correspondingwith a data channel to be extracted. This methodprovides for a maximum of 216 channels which can be marked,for extraction. All valid cells received from the IQinterface are transmitted either upstream in a virtualcontainer or synchronous payload envelope (VC-4/SPE, orto an on-board controller.

For downstream ATM layer processing in the ATM blockof Fig. 14A, each VC-4/SPE carries the equivalent of44.151 cells (53 octets) which are octet-aligned andfloating within the VC-4/SPE. The ATM cell delineationuses the correlation between the Header Error Control(HEC) in the cell header and the cell header itself. Thecell delineation mechanism, as recommended by ITU-TRecommendation 1.432, “B-ISDN User-Network Interface-Physical Layer Specification*·, is used. When the ATMcell boundary identification in octet H4 is used, thecell delineation will start searching at the octetindicated by H4. If not, the search will start at thefirst octet of the payload period. The ATM cellinformation fields are descrambled according to the self-synchronizing scrambling/descrambling scheme recommendedby ITU-T.

Valid non-idle cells, each with its confirmed HECoctet and descrambled information field, are sent to theIQ down interface, which is the last block shown in Fig.14A. In that block, idle cell periods are added to adapta received bit rate of up to 149.76 Mbit/s to 152.64Mbit/s. 43 907-153

The routing of received ATM cells depends upon theVPI, VCI and PTI (payload type identifier) bits in thecell header. In total, 16 bits or four nibbles ofVPI/VCI combinations can be checked, according to themodes shown in Fig. 14G. In each mentioned mode,different nibbles of VPI/VCI are selected. The selectedVPI/VCI nibble combination corresponds with a specificdata channel to be extracted. Cells can be extracted bylooking only at the VPI/VCI combination or by looking atthe VPI/VCI combination and at the PTI bits. In thesecond'case, each PTI (23 in total) can be marked forextraction. This marking will then be used for allVPI/VCI combinations for which extraction is indicated,with the inclusion of the PTI check. All valid cellsreceived in the virtual container or synchronous payloadenvelope, independent of their VPI/VCI combination, aretransmitted downstream on the IQ down interface (cellsmarked for extraction are also sent to the ATM interfacebus) . ATM cell insertion and extraction is provided at theNT both in the direction of the network and in thedirection of the IQ bus, in order to provide for thetransmission and reception of Operation And Maintenanceand signaling cells. Cell insertion and extraction isunder control of an On-Board Controller (OBC).

In the upstream direction, the OBC has thepossibility of inserting ATM cells in the outgoing VC-4/SPE. The OBC has to provide a valid cell headerwithout HEC, followed by a least six bytes and, at most,the complete cell payload (a total of 52 octets). TheHEC is calculated before the cell is put into the VC-4/SPE. Interfacing between the OBC and upstream cellstream is performed by using a FIFO buffer on which aback pressure signal indicates if the OBC is allowed toinsert a cell or has to wait until the previously 44 907-153 inserted cell is transmitted. Cells received on the IQup interface have a higher priority than cells comingfrom the OBC. Synchronization is performed by asynchronization signal which indicates to the cellinsertion device where the boundary between two insertedcells in the FIFO buffer is. Downstream, the OBC has thepossibility of inserting ATM cells in the IQ down cellstream. The OBC has to provide a valid cell headerwithout HEC, followed by at least six bytes and at mostthe complete cell payload (a total of 52 octets). TheHEC is-generated when transmitted onto the IQ interface.Interfacing between the OBC and the downstream cellstream is performed by the same cell FIFO buffer as forthe upstream cell insertion. Also for downstream cellinsertion, a back pressure mechanism is implemented.

Cells received in the VC-4/SPE have a higher prioritythan cells from the OBC. Synchronization is performed bya synchronization signal, which indicates to the cellinsertion device where the boundary between two insertedcells in the FIFO buffer is.

For cell extraction in the upstream direction, suchis performed using the cell filtering mechanism describedabove. Only the first four octets of the cell header andthe complete payload are extracted from the IQ upinterface. For interfacing between the extractioncircuitry and the OBC, a FIFO buffer is used. The OBCshould synchronize to the extracted cell stream byreading blocks of 52 octets until the buffer is empty.

Downstream cell extraction is performed using thecell filtering mechanism mentioned above. Only the firstfour octets of the cell header and the complete payloadare extracted from the VC-4/SPE. Before a possibleextraction, the HEC in these cells is already checked forerrors. For interfacing between the extraction circuitryand the OBC, a FIFO buffer is used. The OBC should 45 124509/2 synchronized to the extracted cell stream by readingblocks of 52 octets until the buffer is empty. The cellwhich is extracted towards the OBC can optionally be sentto the IQ down interface also.

As suggested above, the IQ down and IQ up busestransport ATM cells with a five-octet header and a 48-octet information field. In front of each cell is onedummy octet, illustrated in Fig. 14H. The ATM cells areencapsulated in 54 octet slots and provided access to theIQ bus. The adaptation of 155.52 Mbit/s to 152.64 Mbit/s(53/54*155.52 Mbit/s) is performed by the deletion ofidle cells. This can be done due to the fact that themaximum bit rate of valid ATM cells contained in the VC-4s/SPEs is limited to 149.76 Mbit/s (26-27*155.52Mbit/s).

The dummy octet is added to the ATM.cells in orderto allow a changeover from one LT to another on the IQ upinterface (between cells). On the IQ down, interface,this octet is not filled in, on the IQ up interface, thebus is in high impedance state during this octet.

The NT card is managed by an ADSL workstation (AWS)which may be located in an operating system (OS) as shownin Fig. 5. Such an OS may communicate through an ATMnetwork and an ATM switch in a central office with the NTcard in the shelf. See co-owned U.S. Patent No. 5,991,814 entitled "ASAM Network Management System withOpen Loop Flow Control", which is hereby incorporated byreference. Fig. 14C shows a front view and Fig. 14D aside view of an NT card, such as may be used in a slot ofa shelf of Fig. 1.

Fig. 14E shows a more detailed functional blockdiagram of an NT card 12a of Fig. 1. Anoptical/electrical transceiver provides a SONET/SDH 46 907-153 compliant interface for 155.52 Mbps STM1 or STS3-Csignals in one integrated package. Clock recovery isdone in the S/UNI+. In order to do this clock recovery,it requires a reference clock. The recovered clock(155.52 MHz) is divided by eight in the S/UNI+ and servesas one of the inputs for serving as a reference clock toa PLL circuit located in a UIAC block to which a VCXOoutput clock must track (if loop timing is enabled). Theresulting clock out of the VCXO serves as input clock fortransmit data towards the optical transceiver, where thisclock is used to synthesize the transmit clock, and whichalso serves as a system clock. The reference clock inputand the VCXO output clock are further divided by a factorN in the UIAC (N = 2048 for Bellcore and N = 128 forITU). After a phase comparison between the two resultingdivided clocks, the resulting voltage is fed to a lowpassfilter, after which the signal drives the VCXO. Looptiming can be established by locking the transmit clock(system clock) on the receive clock.

At the ATM side of the S/UNI+ there are two internalfour-cell synchronous FIFO's present that are controlledby the UIAC. This interface acts as an SCI/PHY (Utopia-like) interface. Back pressure (upstream) is inherentlypresent due to the FIFO's integrated in the S/UNI. Forthe upstream direction, this means that if there is afull load of 155.52 Mbps on the IQ bus (152.64 Mbps atthe Utopia interface) and a maximum transmit capacity of149.76 Mbps ATM cells, the four-cell FIFO will be fullafter 1.5 ms.

The UIAC component is an LCA device which isprogrammed during "power-on-reset" from a serial PROM.

It uses three synchronous 512 x 9 bit FIFOs for cellinsertion and extraction and one 128K x 8 bit SRAM forrouting. The UIAC module has a SCI/PHY (Utopia-like)interface to the S/UNI+ component. ATM cell insertion in 47 907-153 both the direction of the network (SDH/SONET) and in thedirection of the LTs is handled by a 1 SIF (signalinginsertion FIFO) buffer. An OBC bus is connected directlyto the eight data inputs of the FIFO. The direction ofcell insertion is specified by the OBC by writing into anadditional UIAC register. The ninth bit of the FIFO isused for cell synchronization and insertion directionspecification. A RAM lookup table is used for cellfiltering on VPI/VCI combinations. The RAM has 128Kentries of eight bits.

Downstream cell extraction is performed by adownstream signaling extraction FIFO (DSEF). The eight-bit output data of this buffer is connected to aperipheral bus. All cells which are extracted are copiedby default to the downstream traffic stream. This can bedisabled, however, by a traffic control register in theUIAC.

Upstream cell extraction is performed via the USEF(upstream signal extraction FIFO). The eight-bit outputdata of this buffer is connected to the peripheral bus. A cell received on the upstream IQ interface is senteither to the OBC or to the upstream SDH/SONET interface.All cells which are extracted are copied by default tothe upstream traffic stream. This can be disabled,however, by the traffic control register in the UIAC.

In the downstream direction, ATM cells aretransferred to an ICOM interface. In the upstreamdirection, ATM cells are received from the ICOM.

The UIAC may be equipped by a boundary scaninterface conforming to IEEE 1149.1 (JTAG) Specification. A block diagram of an ADSL Alarm Control Unit (ACU)is shown in Fig. 15A, while the functions thereof arelisted the table of Fig. 15B. Fig. 16 shows a front viewand Fig. 17 a side view of the ACU. 48 124509/2

In addition to the foregoing disclosure, the following disclosures are hereby incorporated by reference: U.S. Pat. No. 5,636,253, issued June 3, 1997,entitled "Method for Detecting Erasures in ReceivedDigital Data"; U.S. Pat. No. 5,633,817, issued May 27, 1997,entitled "Fast Fourier Transform Dedicated Processor"; U.S. Patent No. 5,657,355, issued August 12, 1997,entitled "Signal Processor Module", disclosing ADSLselective DPLL; U.S. Patent No. 5,768,318, issued June 16, 1998,entitled "Signal Processor", disclosing a DMT-basedtransceiver; U.S. Patent No. 5,809,030, issued September 15, 1998, entitled "Frequency Division Multiple Access (FDMA)Dedicated Transmission System, Transmitter and ReceiverUsed in Such a System", disclosing a DMT modem formultiple access; U.S. Patent No. 5,812,599, issued September 22, 1998, entitled "Method for Allocating Data Elements inMulticarrier Applications and Equipment to Perform ThisMethod", disclosing ADSL bit allocation; U.S. Patent No. 5,790,550, issued August 4, 1998,entitled "Method of Allocation Data Elements to a Set ofCarriers, Mapping Unit and Modulator to Perform thisMethod", disclosing an ADSL BIGI Algorithm; U.S. Patent No. 5,907,560, issued May 25, 1999,entitled "Method for Interleaving Data Frames, ForwardError Correcting Device and Modulator Including Such aDevice", disclosing interleaving in ADSL; U.S. Patent No. 5,963,885, issued October 5, 1999,entitled "Sensing Circuit", disclosing an activitydetector for ADSL, where the CO is quietly awaiting forremote activity; 49 124509/2 U.S. Patent No. 5,870,432, issued February 9, 1999 entitled "Method for Transmission Line Impulse Response

Equalization and a Device to Perform this Method", disclosing an ISI reduction algorithm in an analog (front-end) transceiver; U.S. Patent No. 5,867,528, issued February 2, 1999,entitled "Method and Modem for Adaptive Allocation of thePilot Carrier in a Multi-Carrier System", disclosing DMTpilot tone reallocation; EP 802,649, entitled "Method and Windowing Unit toReduce Leakage, Fourier Transformer and DMT Modem,

Wherein the Unit is Used", disclosing single frequency orbanded noise immunity; U.S. Patent'No. 6, 088,386, issued July 11, 2000,entitled "Transmitter with Phase Rotor,

Modulator/Demodulator, Communications System and MethodPerformed Thereby", disclosing a rotor for DMT; EP 841,767 entitled "Method to TransparentlyTransport an Incoming Clock Signal over a Network Segmentand Related Transmitter and Receiver Unit", disclosing anATM time reference transport over ADSL; U.S. Patent No. 5,903,612, entitled "A Method toSynchronize Data and a Transmitter and Receiver RealizingSaid Method", disclosing reversal of clocks for ATM overADSL; EP 841,771 entitled "Initialization Protocol forAdaptive Data Rates and Related Transceiver", disclosingADSL rate renegotiation; EP 854,619 entitled "Method to Allocate Data Bits,Multicarrier and Transmitter and Receiver Using theMethod, and Related Allocation Message", disclosing RFIreduction in DMT systems; U.S. Patent No. 6,105,084 entitled "Priority-BasedAccess Control Method and Arrangement", disclosing anearlier I* bus for connecting an NT to LTs; 50 124509/2 U.S. Patent No. 5,951,660 entitled "Current ControlInterface Arrangement", disclosing a power-up circuit; EP 881,853 entitled "Method for Prioritized DataTransmission and Data Transmission Arrangement", 5 disclosing a preferred IQ bus for connecting an NT toLTs, as described in Fig. 3 above; and U.S. Patent No. 6,246,725, issued June 12, 2001entitled "Multicarrier Telecom System with PowerAdaptation Means". 10 Although the invention has been shown and described with respect to a best mode embodiment thereof, it shouldbe understood by those skilled in the art that theforegoing and various other changes, omissions andadditions in the’· form and detail thereof may be made 15 therein without departing from the spirit and scope ofthe invention. 51