Nova Patents
IL110218A

Miniaturized high-frequency circuits

Abstract

This record has no abstract on file.

Term

No projected expiry on record.

  1. Priority
  2. Filed
  3. Published
  4. Today

9 claims: 6 independent, 3 dependent

  1. 1
    - CLAIMS:1. An interconnection structure for a circuit, comprising: a substrate having a differential transmission line and a common potential level layer disposed substantially parallel to the differential transmission line;wherein the differential transmission line comprises first and second conductors and wherein the second conductor is substantially parallel to the first conductor, the second conductor being wider than the first conductor such that the capacitance of the second conductor to the common potential level layers is substantially equal to the capacitance of the first conductor to the common potential level layer. Q218/2
  2. 2
    An interconnection structure for a circuit, comprising- a substrate having a differential trangmias-inn line and a common potential level layer disposed substantially parallel to the differential trans-mifisinn line;wherein the differential transmission line comprises first and second conductors and wherein the second conductor is substantially parallel to the first conductor, the second conductor being wider than the first conductor such that the capacitance of the second conductor to the common potential level layer is substantially equal to the capacitance of the first conductor to the common potential level layer, the second conductor having at least one slot, the slot being arranged substantially in the center of the second conductor, the slot having a width such that the ohmic losses and the self-inductances of the second conductor are substantially equal to the oh-mic losses and the self-inductances of the first conductor. 110213/2 - 14 -
  3. 3
    An interconnection structure comprising:a substrate having a pair of input terminals and a pair of output terminals to provide external electrical coupling to the substrate;an input differential transmission line formed in the substrate coupled to the pair of input terminals and an output differential transmission line formed in the substrate coupled to the pair of output terminals;a common potential level layer disposed substantially parallel to the differential transmission line to balance the parasitic capacitances between the input and output differential transmission lines;a second substrate;a processing circuit formed into the second substrate for receiving and electrically processing a first differential signal, the electrical processing circuit having a differential input, the processing circuit having a differential output for providing a second differential signal by processing the first differential signal;and the differential input of the second substrate being electrically coupled to the output differential transmission line of the first substrate via the pair of output terminals and the differential output of the second substrate being electrically coupled to the input transmission line of the first substrate via the pair of input terminals. -
  4. 4
    An interconnection structure for miniaturized high frequency circuits comprising:a first substrate having at least a first pair of differential a second substrate having at least a second pair of differential transmission line ports;a first common potential level layer disposed below a portion of the first pair of differential transmission line ports to balance the parasitic capacitances associated with the first transmission line ports;a second common potential level layer disposed below a portion of the second pair of differential transmission line ports to balance the parasitic capacitances associated with the second transmission line ports;and conductive for connecting the differential transmission line ports of the first and second substrates, the conductive means positioned away from the first and second common potential level layers. -
  5. 5
    An interconnection structure for miniaturized High frequA-noy circuits comprising; a first substrate having at least a first pair of differential transmission line ports; a second substrate having at least a second pair of differential transmission line ports; a first common potential level layer disposed below a portion of the first pair of differential transmission line ports to balance the parasitic capacitances associated with the first transmission line ports; a second common potential level layer disposed below a portion of the second pair of differential transmission line ports to balance the parasitic capacitances associated with the second transmission line ports; and conductive means for connecting the differential transmission line ports of the first and second substrates, the conductive means positioned away from the first and second common potential level layers; wherein the at least a first pair of differential transmission line ports comprises:a first differential input port having a first pair of input terminals, and a first differential output port having a first pair of output terminals;a first transmission line formed on the first substrate coupling the first output differential port to the first pair of output terminals;and a second transmission line formed on the first substrate coupling the first pair of input terminals to the first differential input port. -
  6. 9
    An interconnection structure for miniaturized high frequency circuits comprising:a first substrate having at least a first pair of differential transmission line ports;a second substrate having at least a second pair of differential transmission line ports;a first common potential level layer disposed below a portion of the first pair of differential transmission· line ports to balance the parasitic capacitances associated with the first transmission line ports;a second common potential level layer disposed below a portion, of the second pair of differential transmission line ports to balance the parasitic capacitances associated with the second transmission line ports;and conductive m^ans for connecting the differential transmission line ports of the first and second substrates, the conductive means positioned away from the first and second common potential level layers;wherein the conductive means comprising: . a third substrate having at least a third pair of differential transmission line ports;a third common potential level layer disposed below a portion of the third pair of differential transmission line ports to balance the parasitic capacitances associated with the third transmission line ports;and bonding wires for connecting the differential transmission line ports of the first and second substrates, the bonding wires positioned away from the first, second, and third common potential level layers.