Micromechanical component and method of manufacturing a micromechanical component

Holder (s):

Agent (s): CABINET HERRBURGER.

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State of the art

The present invention relates to a micromechanical component, in particular a rotational speed acceleration sensor having functional elements movably suspended above a substrate as well as a method of manufacturing such a component.

Although the present invention relates to any micromechanical components and structures including sensors and actuators, the problem at the origin of the invention relates mainly to micromechanical acceleration sensors, manufactured according to the technique of surface micromechanics on silicon.

Acceleration sensors, in particular micromechanical acceleration sensors produced according to the technique of surface or volume micromechanics, are increasingly important in the field of vehicle equipment and are increasingly replacing vehicle sensors. piezoelectric acceleration used so far.

Known micromechanical acceleration sensors usually use a spring-mounted seismic mass which is moved relatively in one direction by external acceleration and produces a change in capacitance by this relative displacement in a differential capacitor arrangement. This change in capacitance is a measure of acceleration.

Document DE 195 37 814 A1 describes a process for manufacturing sensors in surface micromechanics.

According to this method, a first insulating layer of a thermal oxide (with a thickness of the order of 2.5 μπι) is deposited on a silicon substrate. On this insulation layer is deposited a thin layer of polysilicon (with a thickness of about 0.5 μm). This layer is then doped in the gas phase (POCI3) and it is structured by a photolithography process. This buried, conductive polysilicon layer is subdivided into different zones isolated from one another and which serves as conductive paths or surface electrodes, arranged vertically.

Using the layers applied so far, a second insulation layer is deposited. This layer is made of oxide obtained from a gas phase. Then by a photolithography process, the upper insulation layer is structured. Contact holes are thus produced in the upper insulation layer, holes through which contact is established with the polysilicon layer located below.

Then, a thin layer of polysilicon is applied, which constitutes the seeds of the silicon deposition then carried out. In another step of the process, a deposit is made, a smoothing out and a thick layer of polycrystalline silicon is doped. This deposition takes place in an epitaxial reactor. On this thick layer of silicon is then applied a metallic layer structured.

In another photolithography process, the structure of the thick silicon layer is produced. To do this, a photographic mask is applied to the upper face of the layer. This mask also protects the metal layer during the next etching. Plasma etching of the thick silicon layer is then carried out through openings in the photoetching mask according to the method described in document DE 42 410 45; in this thick layer of silicon, grooves are produced with a high aspect ratio. The grooves extend from the top face of the thick silicon layer into the second insulation layer. The layer is thus subdivided into different zones isolated from each other insofar as these zones are not connected by a buried conductive layer.

Using the grooves, the two layers sacrificed in the area of ​​structures or freely movable elements of the sensor are then removed. The oxide layers are removed by a steam etching process with a fluid containing hydrofluoric acid according to a process described in DE 43 172 74 or DE 19 704 45.

The removal of the sacrificed layer by a hydrofluoric acid vapor etching process, however, has some serious drawbacks. This etching process only makes it difficult to achieve a defined undercut etching, that is to say that the oxide will be removed not only under the functional or freely movable structures of the sensor but also above and in below buried conductive paths of polysilicon. For this, very wide conductive paths are needed to remedy the lateral undercut engraving. Due to this undercut etching, no conductive path can be made to pass under the functional structure. Another drawback lies in the attack on the metal layer by hydrofluoric acid in the vapor state.

If the water content of the gas phase is too high, sticking problems are encountered, i.e. the freely movable sensor elements stick firmly to the substrate. Due to the limited thickness of the oxide layer (linked to the deposition process) of the insulation layers, the distance between the functional structure and the substrate remains limited.

As the hydrofluoric acid vapor etching process is not compatible with the materials used in the CMOS technique, it is not possible to have any integration of the sensor elements and of the operating circuit.

Advantages of the invention

The present invention relates to a micromechanical component of the type defined above, characterized in that it comprises

- a first insulation layer above the substrate,

- a first micromechanical functional layer above the first insulation layer with areas of conductive paths,

- a second insulation layer provided above the areas of conductive paths and above the first insulation layer (2),

- a third layer of insulation above the second layer of insulation,

- a second micromechanical functional layer, above the third insulation layer with first and second grooves, the first grooves arriving at least as far as the third insulation layer next to the areas of conductive paths and next to the suspended functional elements, mobile in the second micromechanical functional layer, and the second grooves arriving at least as far as the third insulation layer above the areas of conductive paths.

The invention also relates to a method of manufacturing such a component, this method being characterized by the following steps

- a first insulation layer is produced on the substrate,

- a first micromechanical functional layer is produced above the first insulation layer,

- The structure of the first micromechanical functional layer is produced in the areas of conductive paths and in the areas of sacrificed layers,

- a second insulation layer is produced above the structure obtained,

- the second insulation layer is structured to partially free the surface of the zone of sacrificed layers,

- a third insulation layer is produced on top of the resulting structure,

- a second micromechanical functional layer is produced above the resulting structure,

- The second micromechanical functional layer is structured to form first and second grooves, the first grooves arriving at least as far as the third insulation layer above the areas of sacrificed layers and the second grooves arriving at least as far as the third layer of insulation above the areas of conductive paths,

- a fourth insulation layer is provided above the resulting structure,

- removing the third and fourth insulation layer at least from the bottom of the first grooves,

- Selective etching is carried out of the areas of sacrificed layers through the grooves to form the suspended functional elements, mobile in the second micromechanical functional layer.

The component and the method according to the invention offer the advantage that both the buried conductive paths and the layer sacrificed under the freely mobile structures or elements are produced in the same layer. Thus, there is a need for fewer layers and fewer photolithography processes.

The basic characteristic of the present invention is to develop a layered or layered structure and a corresponding process for the manufacture of micromechanical components such as for example acceleration sensors, with lateral sensitivity for which the areas of the sacrificed layer are made. in the same material as the areas of buried conductive paths, for example of polysilicon. According to this process, a determined etching of areas of sacrificed polysilicon layers is carried out while avoiding the undercut etching of the areas of buried conductive paths.

The method according to the invention allows simple fabrication of a sensor element using only method steps well known in semiconductor art. In addition, in the method according to the invention, only a few layers and photolithography steps are required.

According to an advantageous development of the invention, the first micromechanical functional layer and the second micromechanical functional layer are polysilicon layers.

According to another development, the first through the third and even the fourth insulation layer are oxide layers.

By removing the sacrificed layer, if the first micromechanical functional layer is polysilicon and the insulation layers are oxide layers, etching agents can be used such as fluorinated combinations (eg XeF2, CIF3, BrF3, ·. .) · Etching fluids have a very high selectivity towards silicon dioxide, aluminum and photographic varnish. Due to this very high selectivity, the areas of polysilicon conductive paths which should not be etched unlike the areas of sacrificed polysilicon layers, are coated with silicon dioxide. This avoids the etching or undercut etching of the areas of polysilicon conductive paths.

Thus, the component can have non-mobile branching zones in the second micromechanical functional layer, these zones being electrically connected to the mobile suspended functional elements.

This also allows conductive paths to pass under structures or mobile elements freely. As the areas of buried conductive paths, of polysilicon can no longer be etched undercut, they can be made narrower. The technique of sacrificed polysilicon layers, discussed above allows a defined and reproducible lateral and vertical removal of the areas of sacrificed polysilicon layers. Thanks to the high selectivity of the etching fluid with respect to silicon dioxide, it is possible to produce a system with several layers formed of conductive paths of polysilicon and of insulation layers with the possibility of crossing conductive paths. As for the etching of the sacrificed layer, we arrive at significant degrees of undercut, lateral, the number of etching orifices in the seismic mass is reduced or they are completely eliminated. The seismic mass is thus increased.

As the etching process for removing the sacrificed layer of polysilicon is carried out in the gas phase, there is no problem of corrosion and sticking. The sacrificial silicon layer technique is compatible with the materials used in the CMOS technique, which allows the integration of sensor elements and operating circuits.

By choosing the order of the layers and the thickness of the layers, the insulation layers can be structured by dry etching processes. This eliminates the need for wet processes and improves process tolerances. The distance between the freely movable structure and the silicon substrate layer can be selectively adjusted by the thickness of the polysilicon layer.

According to another preferred development, the areas of conductive paths and the areas of sacrificed layers are produced by local implantation followed by structuring by photolithography.

According to another interesting development, contact orifices are provided in the second and third insulation layer to connect the second micromechanical functional layer to the areas of conductive paths.

According to another preferred development, contact orifices are made in the first, the second and the third insulation layer to connect the second micromechanical functional layer to the substrate.

Drawings

The present invention will be described in more detail below with the aid of exemplary embodiments shown in the accompanying drawings in which:

- Figures 1 to 11 are schematic sectional views of the steps of the method of manufacturing an acceleration sensor corresponding to one embodiment of the invention.

Description of the implementation examples

In the figures, the same references will be used to designate the same elements or having the same function.

Figures 1 to 11 are schematic sectional views of the steps of the method of manufacturing an acceleration sensor according to an embodiment of the present invention.

FIG. 1 shows a silicon substrate 1 provided with a first insulation layer 2 carrying a polysilicon layer. For the deposition of the first insulating layer 2, it is possible to use the deposition methods known in the semiconductor technique for depositing dielectric layers. Besides silicon oxide, it is also possible to use silicon nitride, dielectric layers with a lower electrical number than that of silicon dioxide, various glasses or other ceramic layers. For the remainder of the description, it will be assumed that the first dielectric layer may be made of silicon dioxide obtained by thermal oxidation of the silicon substrate 1 and having a thickness of between 10 nm and 2.5 μm.

The polycrystalline silicon layer 3 has a thickness of between 0.5 µm and 5 µm. The polysilicon layer 3 gives, after structuring, both areas of conductive paths 4 of polysilicon, and areas of sacrificed layers 5 of polysilicon.

For the areas of buried conductive paths 4 of polysilicon, a high conductivity is required and for this the entire polysilicon layer 3 is doped, over its entire surface with a gas face (POCI3). It is also possible to use other methods to obtain a sufficiently heavily doped polysilicon layer. If the doping of the polysilicon layer 3 is only desired in the areas of conductive paths of polysilicon 4, this high conductivity can be obtained in these areas by local implantation; for this it is necessary to apply an additional photolithography process.

With a photolithography process, the polysilicon layer 3, doped or partially doped, is then structured as shown in FIG. 2. This structure of the polysilicon layer 3 is carried out by dry etching (plasma etching. ). The polysilicon layer 3 is subdivided into different zones 4, 5 isolated from each other and which serve as zones of conductive paths 4, embedded, of polysilicon or of zones of sacrificed layers 5 of polysilicon.

According to FIG. 3, a second insulation layer 6 is deposited on the structure of FIG. 2 and it is put in structure. This second insulating layer 6 in the present example also consists of silicon dioxide deposited in the vapor phase, for example by decomposition of silane. The thickness of the second insulation layer 6 must be greater than or equal to the thickness of the first insulation layer 2.

In another photolithography process, the structure of the second insulating layer 6 is produced. For this, the oxide is removed from the second insulating layer 6 in the area 7 above the areas of sacrificed polysilicon layers 5. and in the zone 8 of contact with the substrate. The second insulation layer 6 is also structured by dry etching (plasma etching).

According to FIG. 4, a third insulation layer 9 is deposited on the structure obtained in FIG. 3. The function of the insulation layer 9 is to protect or passivate the structures 25 which will then be released so as to be mobile ( see FIG. 11) at their lower side, relative to the etching medium used for etching the sacrificed layer. The third insulation layer 9 is preferably also silicon dioxide obtained from the vapor phase, for example by decomposition of silane. The insulation layer 9 is only needed in those areas 7 where the second insulation layer 6 has been removed from the areas of sacrificed polysilicon layers 5.

The third insulation layer 9 can also be produced by local thermal oxidation only in zone 7. The thickness of the third insulation layer 9 is advantageously between 5 nm and 500 nm.

On the surface of the structure according to FIG. 4, a starting polysilicon layer 10 is then deposited as shown in FIG.

5. This starting polysilicon layer 10 covers the surface of the third insulation layer 9 and serves as a seed for the subsequent deposition of polysilicon. In order to deposit the starting polysilicon layer 10, it is possible to use all the methods for depositing thin polysilicon films on dielectric layers, such as the usual methods in semiconductor manufacturing technology.

In a process step then carried out, the starting polysilicon layer 10 and the insulation layers 2, 6, 9 or 6, 9 located below are put in structure by photolithography, proceeding by dry etching (etching). plasma).

In the areas above the areas of buried conductive paths 4 of polysilicon, contact holes 11 are made in the starting polysilicon layer 10 and in the second and third insulation layers 6, 9 to bring the areas into contact. conductive paths of polysilicon 4 which lie below.

In the areas in which it is desired to make a contact orifice 12 for the substrate, the starting polysilicon layer 10 and the first, second and third insulation layer 2, 6 are structured,

9.

As shown in FIG. 6, in another step of the process, a thick silicon layer 13 is deposited. This deposit is carried out in a known epitaxial reactor. Such an epitaxial reactor is an installation for depositing silicon layers used in semiconductor technology to create monocrystalline silicon layers on a monocrystalline silicon substrate. As in the present process, the deposition in the epitaxial reactor is not carried out on a monocrystalline silicon substrate but on the starting layer of polycrystalline silicon 10, no monocrystalline silicon layer is formed but a thick polycrystalline silicon layer is formed. 13. The starting polysilicon layer 10 becomes during this step of the process part of the polycrystalline silicon layer 13, thick.

Since the polycrystalline silicon layer 13 has a rough upper surface after deposition, it is then leveled. As above the thick polycrystalline silicon layer 13, an electrical connection is made with the areas of polycrystalline conductive paths 4, the thick polycrystalline silicon layer 13 is doped.

On the upper face of the thick polycrystalline silicon layer 13, a structured metallic layer 14 is then provided. The metallic layer 14 can for example be applied over the entire surface and then be structured.

In the next step of the process, a silicon dioxide layer 15 is deposited from the vapor phase, for example by destruction of silane as indicated in FIG. 7. The silicon dioxide layer 15 has a thickness of between between 0.5 pm and 5.0 pm. The thickness of the silicon dioxide layer 15 should be greater than the thickness of the insulation layer 9. The silicon dioxide layer 15 is structured by a photolithography process applied thereafter. This structuring of the silicon dioxide layer 15 is also done by a dry etching process (plasma etching). The silicon dioxide layer 15 serves as a mask for the etching operation then carried out to structure the polycrystalline silicon layer 13, thick. This layer also serves to protect the metal layer 14 during the etching carried out subsequently. Through the openings 16 of the silicon dioxide layer 15 serving as a mask, a dry etching (plasma etching) of the thick polycrystalline silicon layer 13 is carried out, for example, in order to produce the grooves 17, 18.

This etching process stops when the third insulation layer 9 is reached because it has a very high selectivity of silicon with respect to silicon dioxide. This gives clear areas

19, 20 at the bottom of the grooves 17, 18. By an anisotropic etching process, ίο the grooves 17, 18 can be produced with a high aspect ratio, that is to say a great depth and a small lateral dimension. The grooves 17, 18 extend from the upper face of the polycrystalline silicon layer 13, thick, to the third insulation layer 9. The polycrystalline silicon layer 13 is thus subdivided into different zones isolated from each other insofar as they are not connected by zones of buried conductive paths 4 made of polysilicon.

With the aid of the grooves 17 which are located on the zones of sacrificed layers 5 of polysilicon, the functional structure is produced, that is to say the free moving structures 25 (see FIG. 11) after removal of the zones of sacrificed layers 5 by polysilicon that lie below it. The grooves 18 define or isolate the connection areas.

As shown in FIG. 8, a fourth insulation layer 21 is then deposited which covers or passive the side walls of the grooves 22 against the etching fluid used to etch the sacrificed layer. This fourth insulation layer 21 which serves for the passivation of the side walls is preferably made of silicon dioxide obtained in the vapor phase, for example by decomposition of silane. As the insulating layer 21 is only necessary on the side walls 22 of the grooves 17, 18, it can also be produced by local thermal oxidation or else with an oxide formed in oxygen plasma. The thickness of the insulation layer 21 is preferably between 5 nm and 500 nm.

To use the etching fluid to remove the areas of sacrificed polysilicon layers 5 passing through the grooves 17 to get to the sacrificed polysilicon layer 5, the third and fourth insulation layers 9, 21 are removed from the bottom. grooves 19, 20. In this way, grooves 17 are obtained with zones 23, free from the zones of sacrificed layers 5 of polysilicon.

FIG. 9 shows the result after removal of the third and the fourth insulation layer 9, 21 at the bottom of the grooves 19, 20. The removal of the insulation layers 9, 21 can be done for example by a method of vertically directed plasma etching. During this etching step, the fourth insulation layer 21 is removed not only at the bottom of the grooves 17, 18 but also at the surface 24 of the structure according to FIG. 8. The fourth insulation layer 21 then only remains on the side walls 22 of the grooves 17, 18.

The silicon dioxide layer 15 is also partially removed during this etching operation. For this reason, this silicon dioxide layer 15 must have a greater thickness than the third insulation layer 9. As between the grooves 18 and the areas of buried conductive paths 4 of polysilicon there is the second insulation layer 6 after removal of the third and the fourth insulation layer 9, 21, at the bottom of the grooves 18 there is no will have more open areas towards the areas of buried conductive paths 4 of polysilicon. As a result, the areas of buried conductive paths 4 of polysilicon remain completely surrounded by the insulation layer 9.

After opening the third and the fourth insulation layer 9, 21 at the bottom of the grooves 17, 18, isotropic etching is carried out according to FIG. 10 to remove the areas of sacrificed layers 5 of polysilicon. An etching fluid, such as, for example, xenon difluoride, chlorine trifluoride or bromine trifluoride, is passed through the grooves 17 to the areas of sacrificed polysilicon layers. These etching fluids have a very high selectivity with respect to parts which are not silicon, such as, for example, silicon dioxide.

By removing the areas of sacrificed layers 5 of polysilicon, a cavity 26 is produced with predefined lateral and vertical dimensions and above these are the free moving structures 25 of the sensor thus produced. The free moving structures 25, the areas of buried conductive paths 4 of polysilicon as well as the other areas of the thick layer of polysilicon 13 are not attacked by the etching fluid because these areas are protected all around by the oxide.

Figure 11 shows the layered structure after removing the fourth insulation layer 21 from the side walls of the grooves 17, 18, the second insulation layer 9 from the underside of the free moving structures 25 as well as the silicon dioxide layer 15 by a steam etching process with fluids containing hydrofluoric acid. The first insulation layer 2 below the free moving structures 25 can also be completely removed if necessary.

FIG. 11 thus shows an exemplary section of a sensor element. The structure of the different functional zones is released in the thick polysilicon layer 13. Under the metal layer 14 there is a connection zone 27, 28 released by setting up structure and which is completely surrounded by grooves 18. These connection zones 27 , 28 are thus completely isolated by the grooves 18 vis-à-vis the remainder of the thick layer of polysilicon 13. The connection zone 27 is in direct contact with the zone of conductive paths 4 in polysilicon, buried, making contact with the other zones of the thick layer of polysilicon 13, namely the next neighboring zone on the right side. The connection zone 28 is directly in contact with the silicon substrate 1, which corresponds to the production of a substrate contact. Above the cavity 26 are the free moving structures 25, for example parts of interdigital capacitors.

Although the present invention has been described above with the aid of preferred embodiments, it is not limited to these examples but allows multiple modifications.

In particular, the choice of materials for the diapers, given above, is only an example and can be changed. The invention is also not limited to the production of acceleration and rotational speed sensors.