Automatic vehicle monitoring identification location alarm and voice communications system

Holder: Same (Zi)

Representative: Cabinet Beau of Loménie, 55, rue d'Amsterdam, Paris (8).

Automatic monitoring, location identification and communication system with a vehicle.

(72.

Invention of:

33) (32) (31

Conventional priority: Patent application filed in the United States of America on December Ί969, n. 888.519 in the names of William M. Borman and Donald L. Walker.

copyY

Sale of booklets to I IMPRIMERIE N ATIONALE, 27. street of Convention - PARIS (15^e)

37524

A high proportion of passengers making urban trips use conventional buses that run on pre-established routes and schedules. The good performance of the bus fleet and the satisfaction of users require that the actual schedules of the cars be as close as possible to the schedules established for each line of the network. Until now, most bus systems relied primarily on car drivers to keep schedules and avoid major traffic jams and other hazards. As the streets become more and more congested and the number of people who use the buses for their transport increases, it becomes mandatory to develop a traffic regulation system which ensures precise respect of the schedules of all the buses in the network.

Currently, many transport companies place inspectors at certain intersections to control the schedules of buses whose lines pass through these intersections. Communication procedures and devices have been developed to facilitate liaison between inspectors and coordinators responsible for regulating traffic and observing timetables for the buses in the network. Such a method is however relatively inefficient and requires a large number of inspectors so that the controllers have a sufficiently precise picture of the situation on the various lines which make up the network.

In order to be able to act on the timetables for the buses of a network, the coordinators must be warned of the fact that two vehicles are driving too close to each other following a delay or an advance of one of them, creating an unbalanced situation and inefficient use of equipment, as well as disruption of schedules. It is also desirable to be notified as soon as possible when a vehicle has a mechanical failure so that a decision can be made whether to leave it in service, send it to a garage or stop it there and send a vehicle extra to replace it if necessary. In many cases, the rapid dispatch of an emergency team to a broken down bus enables it to be put back into service”? without significant disruption to the schedules of the line of which it is a part.

COPY

37524

Road traffic jams of a semi-permanent or temporary nature, such as accidents, frequently occurring on the metropolitan lines of the network, it is desirable to be able to alert the buses traveling on the obstructed line so that they can, if necessary, take a circuitous route immediately. Finally, in most metropolitan transport, the problem of safety on board buses is becoming a concern. Attacks, acts of vandalism and disorder not only have the effect of endangering the driver, but also risk dissuading travelers from using the network's vehicles. It is therefore desirable for the bus driver to have a discreet means of asking for help.

The subject of the present invention is therefore an improved system for regulating the traffic of vehicles in a transport network in which a central control station can ascertain by automatic interrogation the real position of the vehicles on a pre-established route. The system of the invention also comprises transmitters placed in the signaling terminals of the line traveled by the vehicle which is equipped with a receiver to record position information transmitted by each signaling terminal and also the duration which has elapsed since the recording of the position information, so that the interrogation of the vehicle by a central control station causes the automatic transmission of position information and elapsed time. The invention also provides an improved alarm system for a vehicle traveling on a fixed line and, in addition, a communication system between a vehicle and a central control station. This communication system allows the transmission of data and voice frequencies, the latter mode including automatic identification of the transmitting vehicle.

According to an essential characteristic of the invention, a vehicle traffic control system comprises a central control station equipped with a transmitter and a receiver to monitor the positions of the vehicles traveling on the pre-established lines of the network. A vehicle in the system is interrogated using an interrogation code specific to it and causes

BAD ORIGINAL

37524 automatic transmission of position and elapsed time information. The position information is updated each time the vehicle passes in front of a position signaling transmitter arranged on its route, the information being recorded in a memory circuit of the vehicle. Each time information is stored in the memory circuit, an elapsed time indicator is reset and begins to count the time that has elapsed since the last position information was stored.

The vehicles are also equipped with a device allowing them to transmit to the control station by an automatic data transmission channel or by a telephone channel, a vehicle identification code being automatically transmitted over the telephone channel. An alarm device allows the driver of the vehicle to automatically transmit the digital position and identification of the vehicle through the telephone channel by pressing an emergency switch, the reception of the alarm information on the telephone channel being recorded and displayed in the control post so that the coordinators can immediately take all the necessary measures.

The central control station carries out an automatic sequential interrogation of all the vehicles in the network to obtain their respective position and elapsed time information. A computer installed at the control station compares this information for each vehicle with that of the fixed line it travels.

Other characteristics and advantages of the invention will emerge from the detailed description which follows and from the drawings in which:

Figure 1 is a block diagram of a preferred form of the system of the invention.

Figures 2A and 2B are a more detailed block diagram of the vehicle-mounted system of Figure 1.

Figure 3 is an assembly diagram of Figures 2A and 2B.

Figure 4 illustrates the timing of the query and response signals of the system of Figures 1 and 2.

FIG. 5 indicates the rate of the messages exchanged in the system of the invention.

37524

Figure 6 is a detailed block diagram of the central control station of the system of Figure 1.

A preferred form of the invention will be described below in the context of a bus traffic control system of an urban transport network comprising fixed lines and pre-established timetables. It will however be understood that the same system can be used for monitoring vehicles traveling on free roads according to non-pre-established schedules.

FIG. 1 is a block diagram of a checkpoint 10 represented by a discontinuous rectangle and responsible for monitoring the traffic of a certain number of buses 11 which serve pre-established lines of an urban network. The system of FIG. 1 comprises three main modes of operation which are the location, telephony and alarm modes described below in this order.

The location mode is based on the retransmission of information acquired and recorded by the bus 11 on periodic interrogation of the control station 10 which receives the information by a radio link. Each of the lines served by the buses in the system is marked out from time to time by 12 signaling bollards equipped with transmitters, the spacing of the bollards being generally of the order of a few blocks of houses depending on the frequency at which the vehicles travel the section of line between two successive terminals 12. The terminals 12 each include a digital position information generator 14 consisting of a cyclic counter or the like which provides a digital code uniquely identifying the location of the terminal with which the code generator is associated. The code generator 14 supplies the digital identification code of the terminal to an encoder 15 which converts the binary signals into tones used to modulate a transmitter 16 in a manner identical to voice modulation. Transmitter 16 permanently transmits these modulated signals via an antenna 18 which each of the terminals 12 of the system comprises.

The transmitter 16 is at low power to have a limited range. This limited range of the transmitter is chosen so that the bus 11 receives the information only when it is close

BAD ORIGINAL

37524

2U/I/B4 of the signaling terminal. In practice, good results have been obtained with a transmitter 16 whose range was of the order of sixty meters. It is preferable to use a radioelectric transmitter rather than an inductive loop system which requires burying a cable in the roadway, resulting in a relatively expensive installation. The signaling bollard 12 can be mounted on the post of a traffic light which also supplies the electrical supply, which makes the installation of these devices relatively simple.

The tones transmitted by transmitter 16 are received by an antenna 19 associated with a terminal location receiver 20 of a bus 11 when it comes within range of the transmitter 16. Each time a bus receives a new indicative of a signaling terminal 12, the information is transmitted from the receiver 20 to a unit 21 comprising a position memory and an elapsed time counter. The recording of new signaling terminal information resets the elapsed time counter 21 to an initial value so that it indicates the time which has elapsed since the recording of the last information in the unit 21. Thus , passing in front of a signaling terminal 12, the bus 11 saves its callsign and continues to measure the time which elapses since passing in front of the terminal.

In the central control station 10, a computer 25 contains all the information relating to the lines and timetables of the various buses 11 of the monitored network, this information being continuously applied to an interface unit 26 in the form of a continuous sequence of addresses, position polling. These addresses include a callsign specific to each bus and a digitally coded position query sequence. This sequence provided by the interface 26 is applied to a data encoder 27 which modulates the output of a data transmitter 28 operating at the data polling frequency, so that the buses of the network are continuously polled sequentially d 'after a program recorded in the computer 25.

The interrogation signals are received by an antenna 29 of the bus 11 and are applied to a receiver 30. The receiver / υ «zt *«» «

Zu! I/U is capable of receiving signals at two different frequencies and is normally sensitive to the frequency of the signals transmitted by the data transmitter 28. The data signals from the transmitter 28 are continuously applied to an address comparator 31 which contains the address or unique code of the bus displayed on the manual selectors of an addressing box 32. When the query address from the transmitter 28 matches the address displayed on the bus housing 32, the comparison circuit 31 provides a query output signal to the unit 21 which includes the memory. position and elapsed time counter whose contents are directed to a transmitter 33 mounted in the bus. The transmitter 33 then automatically transmits on a data frequency the position and elapsed time signals to the control station 10.

These signals are received by a number of data receivers, two of which are shown, namely 34 and 35. Receivers 34 and 35 can be mounted outdoors in the area covered by the control station 10 and a receiver selector and decoder satellites 38 mounted in the station 10 chooses one of the receivers 34, 35 providing the best signal and transmits the decoded digital data to the interface 26 of the computer 25. The computer 25 compares the information transmitted by the bus 11 with its pre-established schedule which it stores in memory. If the bus is on time or within predetermined tolerances, the computer provides no output.

On the other hand, if bus 11 is not on time or is out of tolerance, computer 25 produces output on printer 40 which permanently keeps track of off-schedule services and, moreover, the same information is displayed on a cathode ray tube terminal 41 to immediately indicate to the coordinator the identity and position of the offending bus. The difference can be a delay or an advance compared to the schedule and, if necessary, this information can also be presented on the terminal 41 and the printer 40. In addition, one can also visualize on a plan of the network 42 the position of the offending bus by means of a luminous point or the like.

37524

In the event that the information on the deviation from the timetable is presented by the computer on the units 41 and 42, it is desirable that the coordinator be able to contact the driver of the bus at fault to notify him of any corrective action. . This function is carried out by means of a selective call device 45 by means of which the coordinator of the checkpoint 10 can selectively address the buses 11. In addition, unit 45 can be used to call a group or all of the buses in the network using different addresses. The selective call address is provided by the computer interface 26 which then provides the selective call along with a signal to the bus to switch to telephony mode in response to the call, the interface circuit 26 inserting the selective interrogation between the automatic interrogation intervals whose sequence is determined by the computer. The format of the position interrogation is such that Intervals are periodically reserved to allow selective interrogation by the call device 45. The selective call is encoded by the encoder 27 then applied to the data transmitter 28 of the same way as the automatic position interrogation signal provided by the computer 25. The selective call and the other interrogation signals transmitted in telephony mode are received by the antenna 29 of the data receiver 30 of the buses 11 and are applied to the comparator circuit 31 which compares the address displayed with the address received as described previously. The telephony mode selective call signal is also identified by circuitry (not shown in Figure 1) to produce a telephony mode indication signal out of the comparator circuit 31. This signal causes a warning light to come on or a buzzer to sound on the bus driver's dashboard.

As soon as he notices the light or hears the buzzer, the driver picks up his radio set, which has the effect of changing the reception frequency of the receiver 30 and the transmission frequency of the transmitter 33 so that communications take place. in the system's phone channel.

The bus antenna 29 then transmits a telephone signal which is received by a number of satellite receivers.

BAD ORIGINAL

37524 telephone frequency, two of which 45, 46 are shown, placed at separate points in the area covered by the control station 10. The signals received by the telephone frequency receivers are transmitted to the station 10 either by telephone lines or by radio links and a satellite receiver selector 49 chooses that of the receivers 45, 46, etc. which provides the best signal, in accordance with conventional techniques, which signal is transmitted to an identification and alarm decoder 50.

At the start of the transmission by the transmitter 33 of the bus in telephony mode, the call sign or address of the vehicle is automatically transmitted then detected and decoded by the decoder 50. The decoded digital information is then supplied to a digital display 51 on which the coordinator has a visual indication that he is in contact with the bus 11 to which the selective call was addressed. When communication has been established, the normal telephone conversation is obtained from the output of the satellite receiver selector 49 and reproduced by a loudspeaker 52. The telephone transmission to the bus 11 is effected by means of a conventional microphone 53 and a transmitter 54 transmitting a fourth frequency to the bus which is now in telephony mode and whose receiver 33 receives the transmissions and supplies a conventional loudspeaker.

For the duration of the telephone transmission between the bus 11 and the control station 10, the computer 25 continues to apply position interrogation signals to the data transmitter 28 intended for the other buses of the network, because only the bus 11 is unable to transmit its position to the checkpoint 1.0 because its transmitter 33 operates at telephone frequency. All other buses in the system continue to automatically broadcast at the data transmission frequency to the position interrogation signals from the data transmitter 28 of the control station 10. As soon as the telephone communication between the bus 11 and the station 10 ends, the bus driver hangs up and automatically switches receiver 30 and transmitter 33 to their data transmission frequencies, so bus 11

37524 s 2071784 which was in telephony mode returns to data transmission mode in which it is sensitive to the interrogation signals from the transmitter 2B.

Another device is provided in the bus 11 to allow the driver to trigger an alarm, for example in the event of vandalism, armed robbery or other in his vehicle. To trigger the alarm, the driver has a pedal 55 which switches the transmitter 33 to telephony mode although the radio telephone is still on the hook. At the same time, the transmission indicator on the dashboard is inhibited so that the transmission takes place discreetly. The actuation of the alarm pedal causes the transmitter 33 to operate at the telephone frequency modulated by the complete callsign of the vehicle and its position code provided by an identification and position generator 48 connected to the unit 21 which contains position and elapsed time information and callsign selector 32. This information is continuously transmitted for approximately two minutes and is applied from the output of decoder 50 to digital indicator 51 as well as computer interface 26 and presentation terminal 42.

Since the digital message transmitted by the bus in the event of an alarm is longer than the vehicle identification code which is inserted at the start of each normal telephone transmission, the decoder 50 can distinguish between these two modes of communication. Thus, the decoder 50, when it has detected an alarm sequence from the decoded digital information can be used to produce an audible alarm signal in addition to the digital indication of the location and the call sign. the bus on the display 51. A symbol or warning light may additionally be displayed on the network map 42 from the output of the decoder 50 and the output of the interface 26 which normally controls this peripheral .

Having the call sign and the precise position of the bus, the coordinator can request help a few seconds after the driver has pressed the alarm pedal 55. At the end of the pre-established period of two minutes for which alarm information is continuously transmitted by

37524 bus 11, the equipment returns to normal mode. This period of approximately two minutes was chosen to ensure good reception of the alarm message by the controlled station 10 without interference with the voice messages of the telephone channel.

An important feature of the alarm system is that it is not completely dependent on the computer 25 since all the necessary information is also contained in the digital display of the unit 51. Thus, if the computer 25 fails , the alarm system continues to operate although the position of the bus is no longer indicated on the network 42 map.

FIG. 2 represents a more detailed block diagram of the control logic for the reception, processing and transmission of data in the bus 11. When a bus comes within range of one of the signaling terminals 12, the position receiver 20 (FIG. 1) of the bus applies the signals encoded by frequency shifting from terminal 12 to a decoder 60 which transforms the signals manipulated by frequency shifting into binary data composed of bits “1” and “0” .

Since each interval of the information received from the signaling transmitter contains a 1” or ”0” bit, the decoded information can be used as clock signals for the processing circuits recording the information relating to the terminal. Thus, the two binary outputs of decoder 60 are applied to a signal processing circuit 61 which provides clock pulses synchronous with each received data bit decoded by circuit 60. These clock pulses are then applied through an OR gate 63 to a five-stage binary counter 64 which increments by one per pulse.

The 1” binary output of the decoder 60 is applied to the input stage of an eleven-stage shift register 66 whose shift pulses are provided by the output of the signal processing circuit 61 so that the shift of the register 66 is performed in synchronism with the progression of binary counter 64.

The clock pulses from the output of circuit 61 are also applied to an activity control circuit 68 which may be of the conventional type comprising an integrator circuit

37524 producing a signal of a certain level when the clock pulses appear at the desired frequency and producing a second lower level when no clock pulse appears at the output of circuit 61. Within the framework of the present description, it will be assumed that the output of the activity monitoring circuit becomes high or more positive in the presence of clock pulses at the output of the processing circuit 61 and becomes low after a period predetermined following the disappearance of the clock pulses. This output of circuit 68 is inverted by an inverter 69 and constitutes one of the inputs of an AND gate 71, the other input of which is supplied by binary counter 64 when it reaches twenty. When the output of circuit 68 initially goes high, the corresponding transition is transmitted through a DU gate 72 to reset binary counter 64 and synchronize the bus receiver with the input signals of decoder 60.

The format of the position signal transmitted by the transmitter 16 (FIG. 1) is a ten-bit code repeated twice and followed by a space. After the space, the sequence repeats for the next cycle of continuous transmission of the terminal position code. Consequently,

2D when the bus comes within range of the signaling terminal, the output of its decoder 60 consists of twenty successive bits followed by a space or interval which is itself followed by twenty new bits, a space, etc. . The duration of the interval separating the position codes is sufficient for the output of the activity monitoring circuit 68 to go low so that when new position information is received its output makes a low-to-high transition to reset the binary counter 64 to zero.

To ensure that the position information is transmitted without error to the shift register 66, an additional stage is provided in addition to the ten stages necessary for the recording of the position. The output of this eleventh stage is continuously compared in an EXCLUSIVE OR gate 74 with the information from the first stage of register 66, the output of gate 74 being applied to the setting input of an error flip-flop. 75. It is useless to compare the contents of shift register 66 until the eleventh bit has been received to indicate the start of the repetition of the

37524 ta 2071784 position code. Consequently, when the binary counter 64 reaches eleven under the effect of the eleventh clock pulse obtained from the output of the processing circuit 61 after the last space of the output signal of the position receiver, also corresponding to the eleventh pulse of shift applied to register 66, a pulse is applied to flip-flop 75 to reset it to the ZERD state.

As long as flip-flop 75 remains in this state, its output indicates receipt of an error-free terminal position code.

1D Thus, when the repetition or second successive transmission of the terminal position information is applied to the first stage of the shift register, it is compared bit by bit in the EXCLUSIVE 0U gate 74 with the first information received which is shifted in continuous in the last or eleventh stage of the register.

As long as the compared bits coincide, gate 74 provides no output capable of resetting flip-flop 75 to ZERO. to state IJW by the output of gate 74 and its outputs change state.

When the interval between two successive double-transmissions of the position code is reached, the output of the activity control circuit 60 becomes low and the output of the inverter 69 becomes high applying a pulse to the input of the AND gate 71. When the binary counter 64 reaches a content equal to twenty, it applies a validation pulse to the AND gate 71 and, if at the same time the flip-flop 75 is in the ZERO state (no error), the gate 71 produces an output pulse. This pulse is transmitted to a group of coincidence type transfer gates 77 which also receive the outputs of the first ten stages of the shift register 66. The outputs of the transfer gates 77 are applied to the first ten stages of a shift register 79 to transfer the position information of the signaling terminal.

At the same time, the output of AND gate 71 is used to reset another five-stage binary counter 80 as well as to Inhibit the output of a timer 81 whose time constant is twelve seconds, i.e. say who applied.

37524 ¹³ 2071784 every twelve seconds a pulse at the input of the binary counter 80. After this transfer of information, the timer 81 starts operating again and applies every twelve seconds a pulse to the counter 80 whose content represents the time elapsed since the last transfer of new position information into shift register 79, which transfer took place before the bus left the range of the signaling transmitter. The outputs of the five stages of binary counter 80 are connected to the inputs of the last five stages of shift register 79 to permanently store the contents of counter 80 in register 79. At any given time after the bus has left the span useful of the signaling transmitter, the shift register 79 contains the address of the last signaling terminal in front of which it passed and the time which has elapsed since the recording of this information.

In FIG. 4 there can be seen a sequence of messages corresponding to the automatic interrogation and response signals governed by the computer 25 of the control station 10 (FIG. 1). As shown in FIG. 4, the control station PC transmits a data query on two frequencies FD1 and FD2 used alternately. The use of two interrogation frequencies instead of just one allows the interrogation signals to be transmitted continuously while providing the necessary intervals for the insertion of selective calls or other interrogation telephone messages transmitted by the checkpoint coordinator 10.

One could obviously use more frequencies or a single frequency and a system for interrupting the interrogation cycle for the telephone transmission.

The sequences of data interrogation signals include individual bus addresses constituting the callsign of the called bus (IBn) and the mode of operation or type of response desired. This information is transmitted twice in succession to allow error control by the bus and each address being twenty bits long, the total of the latter and its repetition comprises forty bits. This sequence is followed by a single bit marking the end of the address ensuring that the data is correctly received by the decoder of

37524 ,4 2071784 the bus. On a given polling frequency_s provision is made for intervals of sufficient duration to insert therein a similar forty-one-bit address used for the selective call AS, the computer continuing during this interval the interrogation on the other data frequency so that it occurs in a continuous sequence at alternating frequencies.

Network buses that are polled by the control station computer are preset to operate on either of two polling frequencies and also to respond on either of two frequencies. response AR-FD3 and AR-FD4 in Figure 4. Bus response signals (RBn) are transmitted as thirty-one bit sequences comprising a fifteen bit response message repeated to allow error detection and followed by a single marker bit, totaling thirty-one bits. The interrogation of the buses on the interrogation frequencies FD1 and FD2 and their responses in data transmission mode on the response frequencies FD3 and FD4 are automatic and controlled by the computer 25 (FIG. 1).

In FIGS. 2 it can be seen that the receiver of a given bus is normally set to receive signals on one of the two interrogation frequencies FD1 or FD2 which has been chosen beforehand. The signals from the receiver output of the bus are applied to a poll data decoder circuit B3 which is similar to the position decoder,60 and provides the decoded binary data on two outputs, one for the bits” 1” and the other for the ”0 bits of the received poll address. The two outputs of decoder 83 are applied to a signal processing circuit 85 which derives clock pulses in the same way as processing circuit 61. Likewise, an activity monitoring circuit 86 receives the clock pulses and operates in the same way as the monitoring circuit 68.

The binary output "1" of the decoder 83 is applied to the input of a five-stage shift register 87 whose shift pulses are supplied by the clock output of the

37524 processing circuit 85. These clock pulses are also applied through an OR gate 88 to a six-stage binary counter 90 which progresses in synchronism with the application of the input signals to the shift register 87. Like activity monitor circuit 68, circuit 86 initially responds to input information with a low-to-high transition of a positive pulse which is applied through an OR gate 89 to the reset input of the six-stage binary counter 90.

FIG. 5 represents in detail the addressing format of the FADI interrogation data, the first four bits of which indicate the mode M of operation (data, telephony, etc.) desired, the same sequence being repeated during the following four bits. Mode M is followed by four bits identifying the garage number E of the called bus and twelve bits identifying the service 5 it performs. The E and S information is then repeated, and then the sequence is terminated with an MK bit marking the end of the forty-one bits. This information is applied to the input of shift register 87 in the same manner as the information was input to register 66.

To make it possible to check that the operating mode M indicated by the interrogation address does not contain an error, the shift register 87 comprises a fifth stage whose output is compared with that of the first stage in an EXCLUSIVE OR gate 92 which functions as an error detector like gate 0!J EXCLUSIVE 74. When the output of the activity monitor circuit 86 initially goes high, a reset pulse is applied to a mode evaluation control latch 94, a mode evaluation memory circuit 96 and a latch. error 98 to reset all of these circuits to ZERO.

When the binary counter 90 reaches five, it applies an output pulse to one of the two inputs of an AND gate 99 whose other input is validated by the output of the activity control circuit 86. The output of the AND gate 99 then constitutes a reset pulse of a mode error flip-flop 100 to bring the latter back to the ZERO state or no error.

The setting input to ONE of the flip-flop 100 comes from the output of the EXCLUSIVE OR gate 92 and, as long as the second group of four

37524 bits indicating the mode in the interrogation addressing format correspond to the first four bits already received, the mode flip-flop 100 remains in the ZERO state in which it continuously enables an AND gate 102. In the absence of correlation between a bit of the first group of four and a bit of the group five to eight, the error flip-flop 100 goes to the ONE state, inhibits the AND gate 102 and stops the operation of the response system at the interrogation sequence in which a correlation error was detected.

However, in the case where the transmission of the two modes matches, the received mode is assumed to be exact. The AND gate 102 is then enabled. When binary counter 90 reaches eight, indicating that the mode information has been received twice, it applies an output to flip-flop 94 to cause it to go to the ONE state in which it applies an output pulse to the AND gate. 102 to pass the control pulse of the mode evaluation circuit 96 according to the information stored in the first four stages of the shift register 87. This output pulse from flip-flop 94 is also applied through an OR gate 89 to the reset input of binary counter 90. The reset input of flip-flop 94 being sensitive only to positive transitions and the activity monitoring circuit 86 detecting continuous activity, no reset pulse is applied to the flip-flop 94 until the end of the reception of the interrogation code. Flip-flop 94 therefore cannot produce an output pulse when the binary counter once again reaches eight. Flip-flop 94 is reset to ZERO only after the end of the activity detected by circuit 86 and again serves to generate a reset pulse. The end of the choice of mode is signaled by the evaluation circuit 96 by applying a validation signal to one of the inputs of an AND gate 104 whose output is connected to the ONE input of the flip-flop. bus error 98.

Up to this point the receipt of the data query address is in no way specific to any particular bus as they all respond the same way to the part of the addressing format which specifies the mode. It is therefore

37524 necessary that the bus from which a response is desired have some means of identifying the call. This is achieved by means of the next part of the query format of Figure 5 which specifies the garage G and service S numbers of the address.

The combination of G and S numbers uniquely identifies a particular bus in the fleet serving the network.

The garage number G and the service number S are displayed on manual selectors mounted in the bus inside a box 106. The part of the address which comes from the garage number can also be pre-wired on the bus because it is normally always assigned to the same garage. Whether the address is fully displayed on selectors 106, or is partially displayed on selectors and partially wired, is immaterial to the operation of the system.

The selectors 106 are sequentially conditioned by the progress of the binary counter 90 during the first sixteen counts, then during the following sixteen counts to repeat the binary pulse sequence encoded by the position of the selectors.

This repetition of the pulse sequence corresponding to the positions of the selectors 106 is compared with the binary information received in an EXCLUSIVE OR gate 100, the information received coming from a memory register 109 with a single stage which receives the output 1 of the decoder Θ3 and which is triggered to record a bit at each clock pulse of the output of the processing circuit 85.

As long as there is a match between the bits received from the output of register 109 and the sequence produced by switches 106, gate 108 provides no output. This absence of output from gate 108, after inversion by an inverter 110, provides a high signal which constitutes one of the inputs of AND gate 104. In the event of disagreement between the position of the selectors 106 and the received data, the output of the gate 108 becomes high or positive and its inverted output becomes low inhibiting the AND gate 104. Thus, in the event of disagreement between the received and local addresses, no output can be obtained from AND gate 104.

37524

It is however assumed that the position of the address selectors corresponds to the address received in the FADI interrogation format illustrated in FIG. 5. In this case, the output of the inverter 110 remains high and, when the counter 90 reaches 32, it provides an output which is applied to the third input of AND gate 104. This gate then produces an output pulse causing bus error flip-flop 98 to be set to ONE. The flip-flop 98 provides an output pulse which is transmitted by one or the other of two AND gates 111 and 112 respectively enabled by the data transmission and telephony modes, under the control of the mode evaluation circuit 96.

If evaluation circuit 96 specifies data transmission mode, an output signal is obtained from AND gate 111, while if it specifies telephony mode, an output signal is obtained from AND gate 112. that the flip-flop 98 is set to the ONE state when the counter reaches thirty-two only if there is correspondence between the address of the selectors 106 and the address received from the interrogation format. As a result, both AND gates 111 and 112 provide no output on buses that are not addressed by the particular poll format.

If the mode evaluation circuit has decoded the data transmission mode, which requires an automatic response from the bus, and if the bus error latch 98 is in the ONE state, the AND gate 111 outputs a exit. This output is applied to a transmit frequency selection circuit 113 which provides the transmitter with an output frequency corresponding to the response frequency used for data transmission. At the same time, a signal is applied to the transmitter to turn it on and to a delay circuit 115 of the automatic response logic. The delay circuit 115 is intended to allow the transmitter 114 to ramp up before the response data is applied.

The output of delay circuit 115 is applied through OR gate 72 to reset the binary counter in case it is not already reset. Moreover, this output is

37524 transmitted through an OR gate 151 to inhibit the output of decoder 60 and through an OR gate 117 to enable a data output AND gate 118, as well as an AND gate 121 to enable it.

The bus includes a data encoder 120 equipped with a 100 kHz continuous clock which produces output pulses on a clock line 122 applied to the other input of the AND gate 121. The clock pulses are thus transmitted by the AND gate 121 and the OR gate 63 to advance the binary counter 64. In addition, these clock pulses are applied through an OR gate 124 and a momentarily enabled inhibit gate 125 as register 79 shift pulses. 120 through an OR gate 128 and the enabled AND gate 118. Encoder 120 converts the digital data into a form suitable for carrier modulation from transmitter 114 which transmits the information to central control station 10. The information in shift register 79 is sequentially shifted out of it. ci to form the FRD response format of Figure 5, the first five bits of which indicate the elapsed time stored in the last five steps of register 79. The next ten bits specify the positional information that has been transferred into register 79 through transfer gates 77, as previously described.

To allow error control of the information transmitted by the bus to the control station, it is desirable to transmit the data contained in the shift register 79 twice in succession. At the end of the application of fifteen shift pulses, the output of its last stage is connected to the input of the first to constitute a cyclic counter. Thus, as shift pulses continue to be applied to register 79, the information output for the sixteenth pulse is the same as that output for the first.

I-ί is obvious that this operation can continue indefinitely so that when the binary counter t>4 reaches thirty (corresponding to the application of thirty pulses of

BAD ORIGINAL

37524 clock line 122), an inhibit pulse is applied to gate 125 to stop the flow of the contents of register 79. This output pulse can also be used to turn off transmitter 114 and reset the mode evaluation circuit 96, these connections not having been shown to avoid cluttering the drawing. In a practical application of the system of the invention, the time elapsing between the start of the interrogation and the end of the response is less than 1/8 of a second so that 3,300 buses can be interrogated and can respond in about two and a half minutes.

As seen above, the coordinator of the checkpoint 10 can interrogate a bus to request a telephone response using its selective call address. The polling address format is the same as the polling data address format but the addressing mode is coded for telephone answering. In the bus, the reception and processing of the selective call address is carried out in the same way as for a data interrogation, except that the output of the mode evaluation circuit 96 validates the AND port 112 at the door place

AND 111. If bus error latch 98 provides an output upon completion of comparing the received garage G and service 5 numbers with the positions of the manual selectors, an output is obtained from AND gate 112 indicating the telephony mode. For an all call (all buses) the mode evaluation circuit 96 provides a direct output. The call to all output and the output of the AND gate 112 are used to supply an indicator light and/or a buzzer used to draw the attention of the driver to the fact that he is called by the coordinator of the control station . Nothing happens on the bus until the driver reacts.

When he wishes to answer the telephone query, he picks up the handset of his device and an associated switch 130 provides an output. The output of switch 130 is applied through an OR gate 131 to transmit frequency selection circuit 111 which conditions transmitter 114 to respond on a telephone frequency.

In the type of radiotelephone which is mounted on board

BAD ORIGINAL

37524 bus 11, the driver must press a transmit button 134 which initially produces a low-to-high or negative-positive transition and an output which remains stable for the duration of its actuation. This transition causes a control flip-flop 136 to go to the ONE state which applies an enable signal to two AND gates 137 and 130. At the same time, the transmit switch output pulse is passed through an OR gate 140 and OR gate 09 to reset the six-stage counter 90.

The clock pulses from data encoder 120 appearing on line 122 are passed through AND gate 130 and OR gate 00 to the input of binary counter 90. The output of the latter periodically samples the positions of the manual selectors corresponding to the sequences of garage and service numbers, so that this sequence of data bits is transmitted through a normally enabled inhibit gate 140b and the AND gate 137 which is currently validated, the OR gate 120, AND gate 110 (which is also enabled by the output of transmit switch 134) to data encoder 120 to supply the modulation signals from transmitter 114 corresponding to the positions of the manual selectors. This information is applied twice in succession during clock periods one through sixteen and seventeen through thirty-two as was the information applied to the input of the EXCLUSIVE OR gate 108 during the address comparison.

When the counter 90 reaches thirty-two at the end of the sequential double sampling of the selectors 106, it applies a reset pulse to the control flip-flop 136 to return it to the ZERO state in which it inhibits the AND gates 137 and 130. The operation of the binary counter 90 ends and the transmitter 114 can operate in normal telephony.

When he has finished answering the telephone, the driver hangs up the handset and the frequency selection circuit 113 again becomes sensitive to the output signals from the ET part 111 in the event that the bus is interrogated in the data transmission mode. Note also that the transmit frequency selector, although receiving an output from UU gate 131 to select a telephone frequency for transmitter 114, is inhibited in that it

37524 regarding the data transmission mode. To prevent the operation of the logic circuit comprising the binary counter 90 during telephone transmission, an inhibition signal is applied through an OR gate 150 to the decoder 83 blocking the application of these output signals as long as the switch 130 is on. off-hook state”.

As seen in the general description of the system shown schematically in Figure 1, there is another mode of operation called alarm mode. If the driver of the bus wishes to report to the coordinator of the checkpoint 10 an abnormal fact occurring in the bus, for example an attempt to attack or any other emergency condition, it suffices for him to press the pedal. alarm 55 (FIG. 1) which operates an alarm timer 155 (FIG. 2) associated with the bus response logic. Timer 155 has a chosen time constant of two minutes, which is sufficient time for repeated transmission of the FAL alarm response format (FIG. 5) to ensure proper reception by monitoring station 10.

The output of timer 155 inhibits data decoder 83 and position decoder 60 by the application through OR gates 150 and 151 of inhibit signals. This output also serves as an alarm enable signal which is applied to one of the three inputs of an alarm AND gate 157 to enable it and, through the OR gate 131, to the transmit frequency selector circuit 113 to switch the transmitter 114 to the telephone transmission frequency. This signal is also transmitted through the OR gate 117 to enable the AND gate 118 and through the OR gate 140 to reset binary counter 90 via OR gate 89.

In addition, this signal enables an AND gate 159 which switches to^;the and state an alarm control flip-flop 160 through an OR gate 141.

The initial part of the FAL alarm response format.

is identical to the FRT telephone response format (Figure 5) and is synchronized by the progress of the binary counter which receives its control pulses from the gate output

AND 159 via the OR gate 88. The pulses of

37524 control are the clock pulses of line 122. During the first sixteen periods, the binary counter 90 provides an output enabling an inhibit gate 162 which transmits the output pulses of the manual selectors 106 through a gate

QU 164 to AND gate 157, the latter being enabled by the ONE state output of alarm control latch 160 to supply the data output pulses transmitted by OR gate 128 and AND gate 118 currently enabled to the data encoder 120. Binary counter 90 continues to progress as it receives data encoder clock pulses over the line and when it reaches seventeen, inhibit gate 162 is turned off and a gate is turned off. inhibition 166 is validated, the binary counter 90 sequentially sampling the number of the bus which is prewired into a bus identification unit 165 so that the corresponding bit sequence is transmitted by the inhibit gate 166 through the gates 164, 157 , 128, and 118 to data encoder 120. When bit counter 90 reaches thirty, the bus number has been transmitted as shown in the FAL alarm format sequence of Figure 5. At this time, the inhibit gate 166 is blocked and no further pulses are transmitted from the identification unit 165.

When counter 90 reaches thirty, it applies an output signal to the reset input of alarm control flip-flop 160 to reset it to the ZERO state. As a result, its state output and drops sharply or becomes more negative and the AND gate 157 is inhibited to isolate the OR gate 128 from the manual selectors 106 and the identification unit 165. However, control flip-flop 160, when in the ZERO state, enables an AND gate 168 to pass the clock pulses appearing at the output of AND gate 159 through an OR gate 124 and the d gate. inhibit 125 which is currently enabled, to shift register 79. These clock pulses cause information to be shifted and output from register 79 on line 127 which carries it through OR gate 128 and AND gate 118 to data encoder 120.

BAD ORIGINAL

37524 elapsed and position contained in the shift register 79 are thus applied to the data encoder 120.

Binary counter 90 continues to advance in the same manner until a number of periods equal to forty-five for which the fifteen bits contained in shift register 79 have been transferred to data encoder 120. At this time, the counter 90 provides an output pulse through OR gate 141 to the set input of alarm control latch 160. This stops the application of shift pulses to register 79 and AND gate 157 is turned off. again validated. Binary counter 90 continues to accumulate clock pulses from forty-five to sixty-five, which number corresponds to the zero of the counter whose maximum capacity is sixty-four.

During this time, the two inhibit gates 162 and 166 are blocked so that no data signal is applied to the input of the encoder 120. Consequently, the time interval corresponding to the pulses of clock forty-six to sixty-five is transmitted by transmitter 114 as a long space. When the counter 90 returns to zero, the sequence described above repeats. Since the complete message whose information is repeated twice in succession to eliminate errors lasts about 100 ms, this same alarm message will be repeated about 1200 times during the two-minute period, which ensures that it will reach and will be properly decoded by the checkpoint. At the end of the two-minute interval set by timer 155, the system returns to normal mode in which it is ready to receive and process the signals supplied by its receiver and decoded by decoder 83.

FIG. 6 is a more detailed block diagram of the circuits of the control station ensuring the transmission of the interrogation signals to the buses and the processing of the responses received from the latter. The circuit shown in Figure 6 is substantially the same as that of the checkpoint 10 of Figure 1, but with additional details. In FIG. 6, the computer 224 which controls the transmission of the data query address formats based on line and schedule information, provides the query format through

37524 a vehicle address generator 226 which responds to the query sequence to produce the garage G and service 5 numbers required for the addressing format. The output of generator 226 is applied to a data encoder 227 which converts the digital data into tones usable to modulate the output of data transmitter 228. This transmitter operates at the data polling frequency to continuously and successively poll the buses serving the network according to the polling program contained in the 224 computer and the format of Figure 4.

As seen with reference to Figure 4, it is desirable to use at least two data transmission frequencies to provide slots or intervals intended for the insertion of selective call addresses when the coordinator wishes to contact a bus or a specific group of buses on the telephone frequency. A single data transmitter 228 is shown in Figure 6, but it is evident that two transmitters operating at two different interrogation frequencies could be automatically switched by means of an output from the computer 224 and the circuitry. interface 225.

For each of the data frequencies on which the buses automatically respond to the interrogation of the control station, a certain number of receivers tuned to^-the corresponding frequencies, FIG. 6 showing three receivers 230, 231 and 232. Each of the receivers 230, 231 and 232 respectively applies input signals to decoders 234, 235 and 236 which convert the received tones into binary digital signals capable of be processed by the other circuits of the checkpoint. The outputs of the decoders are applied to corresponding error detectors 237, 238 and 239. These circuits verify bit by bit the coincidence of the two repetitions of each piece of information in the same way as the circuits using the EXCLUSIVE OR gates 74 and 92 in the bus. If an error is detected, the circuit in question provides no output.

Since the same information can be received by several receivers 230, 231, 232 etc., it is necessary to choose one for each bus response. This operation is ensured by a

37524 satellite receiver selector 240 which analyzes the outputs of error detecting circuits 237-239 to find an error free output. The selected output is applied by selector 240 to interface 225 which transmits the received response to computer 224 for comparison with the preset schedule of the responding bus. If the schedule is adhered to, exactly or within certain predetermined tolerances, the computer provides no output. - .

On the other hand, if the answering bus is out of schedule, the computer 224 records the fact on a printer 242 which keeps track of the non-compliance with the schedule. In addition, the off-schedule bus is identified on a cathode ray tube terminal 243 and on a map presenter 244 to instantly report to the coordinator the status of buses polled by the computer 224 and which are outside the tolerances of the schedule.

A selective call generator 245 similar to generator 245 of Figure 1 allows the coordinator to contact out-of-schedule buses, using the format of polling frequency n- 1- (PC- FD1 of Figure 4). The selective call address may relate to a particular bus or a group of buses which all respond in the manner described with respect to figure 2.

When the buses respond by telephony, the telephone frequency receivers, RFT provide inputs to a receiver selector circuit 249 which chooses the strongest signal, in accordance with known techniques, and applies an output to a loudspeaker 252. coordinator communicates with the bus by means of a microphone 253 connected to a telephone transmitter 254.

As seen in the operation of the circuit in Figure 2, when a bus answers by telephone, it is identified by its garage and service numbers in the case of a conversation and by its garage number, its service number, its individual number, the time elapsed and the position in, the case of an alarm signal transmitted by telephony. This information is decoded in a decoder 250 which applies an input to an error detector 251 of similar design atx detectors 237 through 239.

37524

The error-free data is passed to a converter 253 which transforms the binary signals into digital signals presented on a display device 254. This information is also applied to an identification and alarm decoder 255.

When a telephone answer is received, only the digital indicator 254 ensures the identification of the answering bus, because, in telephony mode, the sequence comprises only thirty-three bits, whereas an alarm sequence is composed of forty-five bits repeated continuously after a free interval of twenty bits. The identification and alarm decoder circuit 255 recognizes the alarm format by its length and can control the excitation of a visual and/or audible alarm signal. This information is also applied to the computer interface 225 and to the map display device 244 which, based on the information stored in the computer 224, can be used to provide the coordinator with the precise and instantaneous position of the bus. This last characteristic is not obligatory, although it tends to facilitate the reaction of the coordinator to the reception of an alarm.

As seen in the circuit operation of Figure 2, timer 81 provides an output pulse every twelve seconds. This timer can be a free oscillator whose output applied to the binary counter 80 is simply blocked during the resetting of the latter by the inhibition signal of the output of the AND gate 71, during the transfer of information in the register offset.

Such a timer can then provide an output pulse at any time within a twelve second interval following the reset of the counter. To limit the imprecision of this device, the computer program can comprise a base of six seconds which constitutes an average around which the instant of transfer of the bus can oscillate by at most 1/10 of a minute. For normal city bus speeds, this inaccuracy represents a distance of less than forty meters.

It will also be noted that the use of a timer whose period is twelve seconds and of a binary counter 80 with five bits makes it possible to record durations going up to more than six minutes before the capacity of the counter 80 is exceeded and

ORIGINAL BAO

37524 it goes back to zero. Since all the buses are interrogated in two and a half minutes, the storage capacity of the binary counter is more than sufficient.

A device may be provided in the buses for choosing the particular group of frequencies on which it will operate, this choice being established in advance according to the way in which the computer is programmed to control the transmitters and receivers of the control station .

It is obvious that the electronic circuits of the buses 10 and of the control station can be easily extended to other monitoring functions. The basic format of the address allowing up to twelve additional forms of data restitution, in addition to the three telephone modes and the data transmission mode described in the context of the operation of the circuit of FIG. 2, it suffices to extend the capacity of the mode evaluation circuit 96 and to add additional circuits and memories to have other modes possibly necessary. Obviously, the computer programs would have to be modified so that they could interpret the responses of the buses. Among the other usable modes, mention may be made of the transmission by buses of information concerning the synchronization of traffic lights located in the vicinity of the terminals, or the automatic recording and transmission on command of information concerning the number of passengers, the rates, engine condition, etc.

The principle of the system is however no different for these other modes of operation and is well suited to automatic transmission on interrogation of the control station. It is relatively simple to. changing the system tolerances stored in the computer to account for inclement weather, such as snowstorms or the like, significantly disrupting normal schedules. Failure to do so would risk, in the event of a major traffic disruption, causing a large number of buses to be shown out of schedule, rendering the information virtually meaningless.

It will also be noted that the system of the invention can be used to monitor road or rail traffic, police cars, etc. and is not limited to monitoring a bus network.

1^·

37524