Adaptive packet/circuit switched transportation method and system.
Abstract
SYSTEM FOR THE CONFIGURATION OF A SUCCESSION OF COMPLETE TABLES IN A DATA TELEPROCESS NETWORK. IT CONSISTS OF A PLURALITY OF KNOTS (1, 2, 3, 4) TO EACH OF WHICH VARIOUS USERS OF THE TYPE OF SWITCHED CIRCUIT AND A PLURALITY OF USERS OF THE TYPE OF SWITCHED PACKAGES ARE CONNECTED; OF LINKS OF TRANSMISSION MEANS THAT LINK TO KNOTS, WHICH CAN OPERATE AT ANY SPEED OF MORE THAN 64 KILOBITIS PER SECOND; AND OF TRANSMITTER ADAPTERS, ONE FOR EVERY KNOT, THAT UNDERSTAND MEANS TO MAKE THEM TRANSMITTED THROUGH THE MIDDLE LINK IN COMPLEX PICTURES, DATA BATHS AND UNCODED INFORMATION.

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17 claims: 9 independent, 8 dependent
- 1REIVINDICACIONES Los puntos de invención propia y nueva que se presentan para que sean objeto de esta solicitad de Patente de Invenoión en España, por VEINTE años, son los que se recogen en las reivindicaciones siguientes:lfi.- Un sistema para configurar una sucesión de cuardros complejos a utilizar para intercambiar bitios conmutados por circuito síncrono y bitios conmutados por paquete asincrono entre nudos conectados a través de enlaces de un medio de transmisión que trabajan a cualquier frecuencia y de transmisión de bitios en una red de teleproceso, en donde el enlace del medio de transmisión comprende un interfaz de transmisión y un interfaz de recepción que comprenden medios transmisores y receptores conectados respectivamente al enlace, caracterizándose dicho sistema porque comprende medios gestores de acceso al medio de transmisión que calculan parámetros n, Nc, Ns indicativos de la configuración de los cuadros complejos que se han de transmitir al enlace, en don de cada cuadro complejo contiene Nc o No+1 bitios y está hecho de una sucesión de n subcuadros, comprendiendo cada subcuadro Nsi bitios utilizados para soportar un número entero de intervalos selectores conmutados por circuito y bitios conmutados por paquete asincrono, utilizándose R bitios restantes, en donde 25117 ι η R = Nc - £ Nsi para soportar f bitios de marca indicadora con el fin de delimitar los cuadros y utilizándose r=R-f bitios de relleno para soportar bitios conmutados por paquete asincrono, calculándose n como la parte entera de Ne/Nts, en donde Nts es la parte entera de v.T, siendo T el periodo de cuadros existentes de transmisión simultánea por división de tiempo (125 microsegundos), y Na es el número de bitios comprendido en un periodo T sobre un enlace del medio de transmisión que tiene una velocidad máxima V, calculándose Nsi como el número de bitios en cada duración de subcuadro, y calculándose Nc como la parte entera de v.n.T, con lo que el periodo entre dos marcas indicadoras es igual a un valor nT hasta un valor comprendido dentro de e, en donde e es menor que un periodo de bitio del enlace del medio de transmisión.
- 22s«- Un sistema de acuerdo con la reivindicación caracterizado porque los medios gestores de acceso al medio de transmisión calculan el parámetro del enlace calculando el periodo t de bitio del enlace del medio de transmisión en función de la frecuencia de repetición de bitios en el enlace del medio de transmisión en que ha de generarse el cuadro, utilizando la fórmula t=l/v, calculando el número entero teórico Nts de bitios en el periodo T, que es la parte entera de v.T, calculando n, que es la parte entera de Na/Nts, calculando el número R de bitios que quedan en el cuadro complejo, de acuerdo con la fórmula R=n.(T/t-Nts), y comparando R con el número deseado de bitios f de marca 93.434 Hoja núm 55 A.G. 25117 indicadora:si
- 33 es mayor que f, Ns se hace igual a Nts, y si no lo es, Ns se hace igual a Nts-1, y el nuevo valor correspondiente 21 de bitios que quedan en el cuadro complejo se calcula de acuerdo con la fórmula 21=n.(T/t(Nts-1)) 3 a .- Un sistema de acuerdo con la reivindicación 2fi, caracterizado porque todos los subcuadros contienen el número constante Ns de bitios.
- 44 a .- Un sistema de acuerdo con la reivindicación 2a, caracterizado porque al menos uno de los bitios restantes está situado en un subcuadro dado, de modo que los subcuadros contienen un número variable Nsi de bitios.
- 5- Un sistema de acuerdo con las reivindicaciones 3§ ó 4 a , caracterizado porque las marcas indicadoras contienen al menos dos bitios de delimitación F que están fijados a valores opuestos.
- 66S.- Un sistema de acuerdo con la reivindicación 5 a , caracterizado porque los intervalos selectores de usuario de bitio se asignan dinámicamente en el cuadro complejo bajo el control de los medios gestores de acceso al medio de transmisión que codifican los f-2 bitios restantes de la marca indicadora de al menos el primer cuadro complejo, en donde se desea un cambio de la asignación de intervalos selectores a un valor que indica que ha de añadirse o suprimirse un intervalo selector y el número de intervalo selector que ha de añadirse o suprimirse.
- 77 a ·- Un sistema de acuerdo con la reivindicación 5 a , caracterizado porque los medios transmisores comprenden medios para generar señales de control de sistema para fijar los medios transmisores en los modos de funcionamiento inhabilitado, inicial u operacional, medios de sinaro - 93.434 Hoja ndm 56 nismo del enlace del medio de transmisión que generan impulsos de sincronismo a la frecuencia de bitios del enlace del medio de transmisión, primeros medios de almacenamien to en donde los medios gestores de acceso al medio de trans misión cargan el valor Ns, segundos medios de almacenamiento en donde los medios gestores de acceso al medio de transmisión cargan el valor n, terceros medios de almacenamiento en donde los medios gestores de acceso al medio de transmisión cargan una tabla de intervalos selectores que indica si los intervalos selectores de subcuadro contienen bitios A. G. 25117 conmutados por circuito o bitios conmutados por paquete, medios de control de generación de subcuadros que funcionan bajo control de los medios de sincronismo del enlace del medio de transmisión y de los primeros medios de almarcenamiento a fin de generar una señal que controla la generación de los subcuadros sucesivos en los cuadros complejos, medios de control de generación de cuadros complejos que funcionan bajo control de los medios de control de gene ración de subcuadros y de los segundos medios de almacenamiento para generar una señal que controla la generación de los n subcuadros sucesivos de cada cuadro complejo, medios contadores de periodo T que cuentan impulsos de periodo T, medios detectores de límite ni sensibles a los medios contadores de periodo T y al contenido de los segundos medios de almacenamiento para generar señales indicativas de los límites nT, medios generadores de marcas indicadoras que responden a las señales de control de sistema, primeros medios lógicos para generar:una señal r de control de envío bajo control de los medios de control de generación de cuadros complejos, siendo activa dicha señal al final del lílti· - 93.434 mo su.bcu.adro del cuadro complejo hasta la siguiente indicai ción de límite nT generada por los medios indicadores de límite nT, controlando dicha señal el envío de los r bitios restantes del cuadro complejo, una señal de control de intervalo selector siguiente que es activa en cada límite de s bitios (s=8), siendo s el número de bitios contenidos en un intervalo selector, durante la generación de subcuadros, para explorar la tabla de intervalos selectores en los terceros medios de almacenamiento, y una señal de control de envío de marca indicadora que es activa en el intervalo de bitio que sigue a la detección de un límite nT durante f periodos de bitio, para activar los medios generadores de marcas indicadoras a fin de transmitir la marca indicadora que delimita el cuadro complejo, y segundos medios lógicos que responden a las señales de control de sistema, a la señal r de control de envío, a las señales que controlan la generación de los subcuadros y de los cuadros complejos, y a la exploración de la tabla de intervalos selectores, para generar señales de habilitación que controlan la transmisión de bitios conmutados por circuito y bitios conmutados por paquete en el interfaz de transmisión del enlace del medio de transmisión.
- 8~ Un sistema de acuerdo con la reivindicación 6 , caracterizado porque comprende medios para generar señales de control de sistema para fijar los medios transmisores en un modo inhabilitado, inicial u operacional, medios de sincronismo del enlace del medio de transmisión que generan impulsos de sincronismo a la frecuencia de bitios del enlace del medio de transmisión, primeros medios de almacenamiento A.G. 25117 medios gestores acceso 93.434 Hoja mím 58 al medio de transmisión cargan el valor Ns, segundos medios de almacenamiento en donde los medios gestoras de acceso al medio de transmisión cargan el valor n, terceros medios de almacenamiento en donde los medios gestores de acceso al me dio de transmisión cargan una tabla de intervalos selectores que indica si los intervalos selectores de subcuadro contienen bitios conmutados por circuito o bitios conmutados por paquete, siendo actualizada dicha tabla de intervalos selectores cuando han de añadirse o suprimirse intervalos selectores de bitios conmutados por circuito en los subcuadros de un cuadro complejo, medios de control de generación de subcuadros que funcionan bajo control de los medios de sincronismo del enlace del medio de transmisión y de los primeros medios de almacenamiento para generar una señal que controla la generación de los subcuadros sucesivos en los cuadros complejos, medios de control de generación de cuadros complejos que funcionan bajo el control de los medios de control de generación de subcuadros y de los segundos medios de almacenamiento para generar una señal que controla la generación de los n subcuadros sucesivos de cada cuadro complejo, medios contadores de periodo T que cuentan impulsos de periodo T, medios indicadores de límite nT sensibles a los medios contadores de periodo T y al contenido de los segundos medios de almacenamiento para generar señales indicativas de los límites nT, medios generadores de marcas indicadoras sensibles a las señales de control de sistema y a los medios gestores de acceso al medio de transmisión, que codifican, los f-2 bitios de la marca indicadora que precede al cuadro complejo en un valor que indica que ha de añadirse o suprimirse un intervalo selec30 P_ 93.434 Hoja ntím 59 i tor en el siguiente cuadro .complejo y el número del intervalo selector a añadir o suprimir, de modo que se transmiten diferentes configuraciones de marcas indicadoras depen diendo de las señales de control de sistema y de la codificación de los f-2 bitios de la marca indicadora, prime10 ros medios lógicos para generar:una señal r de control de envío bajo control de los medios de control de generación de cuadros complejos, siendo activa dicha señal al final del último subcuadro del cuadro complejo· hasta la siguiente indicación de límite nT generada por los medios indicadores de límite nT, controlando dicha señal el envío de los r bitios restantes del cuadro complejo, una señal· de control de intervalo selector siguiente que es activa en cada límite de s bitios (s=8), siendo s-el número de bitios contenidos en un intervalo selector, durante la generación ' de subcuadros, para explorar la tabla de intervalos selec20 tores en los terceros medios de almacenamiento, y una señal de control de envío de marca indicadora que es activa en el intervalo de bitio que sigue a la detección de un lí mite ni durante f periodos de bitio, para activar los medios generadores de marca indicadora a fin de transmitir . una de las configuraciones de marca indicadora, y segundosmedios lógicos que responden a las señales de control- de sistema, a la señal r de envío, a las señales que - controlar la generación de los subcuadros y de los cuadros complejos, . y a la exploración de la tabla de intervalos selectores, para generar señales de habilitación que controlan el envío de bitios connutados por · circuito y bitios conmutados por paquete en el interfaz de transmisión del enlace- del A.Cr. 25117 medio de transmisión. 93.434 Hoja nóm 60
- 99a.- Un sistema de acuerdo con la reivindicación ♦ .7a, caraccerizado porque los medios receptores comprenden medios gestores de acceso al medio de transmisión para tratar los parámetros del enlace del medio de transmisión (Nc, n,'Ns) de los cuadros complejos recibidos por los medios receptores, medios para generar señales de control de sistema que dependen del estado de funcionamiento del siste ma» primeros medios de almacenamiento en los cuales los medios gestores de acceso al medio de transmisión cargan el parámetro Ns, segundos medios de almacenamiento en donde los medios gestores de acceso al medio de transmisión cargan el parámetro n, terceros medios de almacenamiento en los cuales los medios gestores de acceso al medio de transmisión cargan una tabla de intervalos selectores que indica i si los intervalos selectores de los subcuadros contienen bitios conmutados por circuito o bitios conmutados por paquete, medios de sincronismo del enlace del medio de transmisión que generan impulsos de sincronismo a la frecuencia de repetición de bitios, medios de registro de desplazamiento de f bitios conectados al interfaz de recepción del enlace, en los cuales se ingresan los bitios recibidos, primeros medios lógicos para contar los bitios recibidos y detectar los bitios de delimitación de las marcas indicadoras . funcionando dichos medios bajo el control de los medios de sincronismo del enlace del medio de transmisión y generando una señal de periodo de marca indicadora que es activa durante el periodo de f bitios que sigue a la detección de marca indicadora, proporcionando una señal de control de reposición durante la detección de la marca indicadora, una señal r recibida y una señal de intervalo selector siguien A.G. 25117 93.434 Hoja nóm 61 te que es activa en el límite de £ bitios excepto durante * la detección de la marca indicadora y cuando es activa la señal r recibida, controlando dicha señal de intervalo selector siguiente la exploración de la tabla de intervalos selectores, medios de control de recepción ' de subcuadros que funcionan bajo el control de la señal de sincronismo del enlace del medio de transmisión y de la señal de control de reposición, para generar una señal que es activa durante el intervalo de subcuadro· recibido;medios de control de recepción de cuadros complejos que funcionan- bajo el control de los medios de control de recepción de subcuadros y de la señal de control de reposición, para generar una señal que es activa durante el intervalo de n subcuadros recibidos, siendo suministrada dicha señal· a ' los primeros medios lógicos para hacer que la señal r recibida sea activa al final de los n subcuadros hasta la detección de la marca indicadora, y segundos medios lógicos que generan a partir de las señales proporcionadas por los medios de control de recepción de subcuadros y los medios .· de control de recepción de cuadros complejos, a partir de la se ñal de periodo de marca indicadora, a partir de la señal r recibida y a partir de la exploración de la tabla de intervalos selectores, unas señales de habilitación de bitios conmutados por circuito o por paquete que son activas para tratar los bitios recibidos en la salida del registro.de desplazamiento de f bitios como. bitios conmutados por paquete o como bitios conmutados por circuito. IOS.- Un sistema de acuerdo con la reivindicación ' 8 , caracterizado porque los medios receptores comprenden medios gestores de acceso al medio· de transmisión para tra 25117 93.434 Hoja ηώη 62 tar los parámetros del enlace del medio de transmisión (Nc, n, Ns) de los cuadros complejos recibidos por los medios receptores, medios para generar señales de control de sistema que dependen del estado de funcionamiento del sistema, primeros medios de almacenamiento en los cuales los medios gestores de acceso al medio de transmisión cargan el parámetro Ns, segundos medios de almacenamiento en los cuales los medios gestores de acceso al medio de transmisión cargan el parámetro n, terceros medios de almacenamiento en los cuales los medios gestores de acceso al medio de transmisión cargan, una tabla de intervalos selectores que indica si los intervalos selectores de subcuadro contienen bitios conmutados por circuito o bitios conmutados por paquete, medios de sincronismo del enlace del medio de transmisión que generan impulsos de sincronismo a la frecuencia de bitios, medios de registro de desplazamiento de f bitios conectados al interfaz de recepción del enlace, en los cuales se ingresan los bitios recibidos, primeros medios lógicos para contar los bitios recibidos y detectar los F primeros bitios de delimitación de las marcas indicadoras, funcionando dichos medios bajo el control de los medios de sincronismo de3 enlace del medio de transmisión y generando una señal de periodo de marca indicadora que es activa durante el periodo de f bitios siguiente a la detección de las marcas indicadoras, proporcionando una señal de control de reposición durante la detección, de las marcas indicadoras, una señal r recibida y una señal de intervalo selector siguiente que es activa en el límite de s bitios excepto durante la detección de marcas indicadoras y cuando es activa la señal r recibida, controlando dicha señal de intervalo selector si30 A.G. 25117 93.434 Hoja ηώη 63 guíente la exploración de la tabla de intervalo^ selectores y detectando los f-2 bitios de marca indicadora·recibidos a fin de actualizar la tabla de intervalos selectores cuando dichos bitios de marca indicadora indican que ha de añadirse o suprimirse un intervalo selector de bitio conmutado por circuito, medios de control de recepción de subcuadros que funcionan bajo el control de la señal de sincronismo del enlace del medio de transmisión y de la señal de control de reposición, para generar una señal que es activa durante el intervalo del subcuadro recibido, medios de control de recepción de cuadros complejos que funcionan bajo el control de los medios de control de recepción de subcuadros y de la señal de control de reposición, para gene- | rar una señal que es activa durante el intervalo de los n ¡ subcuadros recibidos, siendo proporcionada dicha señal a los primeros medios lógicos para hacer que la señal r recibida sea activa al final de los n subcuadros hasta la detección de la marca indicadora, y segundos medios lógicos que generan a partir de las señales generadas por los medios de control de recepción de subcuadros y los medios de control de recepción de cuadros complejos, a partir de la señal de periodo de marca indicadora, a partir de la señal r recibida y a partir de la exploración de la tabla de intervalos selectores, unas señales de habilitación de bitio conmutados por circuito o por paquete que son activas para tratar los bitios recibidos en la salida del registro de des plazamiento de f bitios como bitios conmutados por paquete o como bitios conmutados por circuito. lis.- Un sistema de acuerdo con cualquiera de las reivindicaciones 7 fi a
- 1010 , caracterizado porque los medios A.G. 25117 93.434 Hoja ruin 64 transmisores comprenden medios para enviar una indicación de configuración inactiva (lili...
- 1111) durante el estado inhabilitado del sistema, y medios para enviar la indicación de configuración inactiva delimitada por marcas indicadoras durante el periodo en que el sistema en modo inicial, siendo el número de las que se envían entre dos marcas indicadoras igual a Nc o Nc+1.
- 1212a.- Un sistema de acuerdo con la reivindicación lia, caracterizado porque los medios de control de generación de subcuadros en los medios transmisores comprenden medios contadores de bitios que cuentan los impulsos de sincronismo generados por los medios de sincronismo del enlace del medio de transmisión, primeros medios comparadores que comparan el contenido de los medios contadores de bitios con el de los primeros medios de almacenamiento, y medios de reposición que proporcionan una señal de control de reposición a los medios contadores de bitios cuando ss detecta una igualdad por dichos primeros medios comparadores o cuando es activa la señal de transmisión de marca indicadora, con lo cual la salida de dichos primeros medios comparadores es activa durante los periodos de generación de subcuadros. A.G. 25117
- 1313 a .- Un sistema de acuerdo con la reivindicación 122, caracterizado porque los medios de generación de cuadros complejos en los medios transmisores comprenden medios contadores de subcuadros que cuentan los subcuadros bajo control de los primeros medios comparadores, segundos medios comparadores que comparan el contenido de los medios contaldores de subcuadros con el de los primeros medios de almacenamiento, y medios de reposición que generan una señal ¿Le 93.434 A.G. 25117 Hoja ndm 65 control de reposición para reponer los medios contadores ' de I -subcuadros cuando se detecta una igualdad por dichos segundos medios comparadores o cuando es activa la señal· de trann misión de marca indicadora, con lo cual la salida de dichos segundos medios comparadores es activa durante el periodo de generación de n subcuadros de los cuadros complejos.
- 1414a.- Un sistema de acuerdo con la reivindicación lia, caracterizado porque los medios de control de recepción de subcuadros en los medios receptores comprenden, medios contadores de bitios que cuentan los impulsos de sincronismo generados por los medios de sincronismo.del enlace del medio de transmisión, primeros medios comparadores que comparan el contenido de los medios contadores de bitios ¡i con el de los primeros medios de almacenamiento, y medios | de reposición que generan una señal de control de reposición cuando se detecta una igualdad por dichos primeros medios comparadores o durante el periodo de detección de . marca indicadora, con lo cual la señal de salida de dichos medios comparadores es activa durante los periodos de recepción de subcuadros.
- 1515a.- Un sistema de acuerdo con la reivindicación. 14 a , caracterizado porque los medios de control de recepción de cuadros complejos en los medios receptores comprenden medios contadores de subcuadros que cuentan los subcuadros bajo control de los medios comparadores de los medios de control de recepción de subcuadros, segundos medios comparadores que comparan el contenido de .los medios contadores de subcuadros con el de los segundos medios de _ almacenamiento, y medios de reposición que generan una seña). 93.434 de control de reposición para reponer los medios’ contadores de subcuadros cuando se detecta una igualdad por dichos segundos medios comparadores o durante el periodo de detección de marca indicadora, con lo cual la salida de dichos medios comparadores es activa durante el periodo de recepción de n subcuadros de los cuadros complejos.
- 1616a.- Un sistema de acuerdo con la reivindicación 15 a , caracterizado porque los medios receptores comprenden medios detectores de marca indicadora específica que son activos durante el periodo de modo inicial medios contadores de bitios del medio de transmisión para contar los impulsos de sincronismo del enlace del medio de transmisión generados por los medios de sincronismo del enlace del medio de transmisión entre dos marcas indicadoras, y medios para almacenar el número de impulsos contados por los medios contadores de bitios del medio de transmisión entre dos mascas indicadoras durante el periodo de modo inicial, siendo utilizado dicho número (Nc o Nc+1) por los medios gestores de acceso al medio de transmisión para tratar los parámetros del enlace.
- 1717 a ·- UN SISTEMA PASA CONFIGURAR UNA SUCESION DE CUADROS COMPLEJOS EN UNA RED DE TELEPROCESO DE DATOS. Tal y como se ha descrito en la Memoria que antecede, representado en los dibujos que se acompañan y para los fines que se han especificado. 25117 93.434 Hoja ηώη Egta Memoria consta de sesenta y siete hojas escritas a máquina por una sola caca Madrid, A.G. 25117 P93Á34 BITS NATIONAL BUSSINES MACHINES ΟΟΖΡΟΚΑΤΙΟΝ Ι/ΧΙ escala variable ’S
Independent claims17
534 paragraphs in 63 sections, as filed
p.- 93,434
OF THE PROPERTY
<img file="ES8802108A1_D0001.tif" />
<td>PRICRIAA DATA 1 ® NUMBER © DATE © PAI A <sup>1</sup></td><td>® PATENT OF INVENTION</td>
<td>85-450027.4 15.8.85 EP</td><td>© NUMBER OE REQUEST 556,132 @ RChA oe presentation I7.6.1986</td>
@ APPLICANTS,
INTERNATIONAL BUSINESS MACHINES CORPORATION
North American NACINAuOAD
HOME
<td colspan="4">ARMONK, New York 10504, USA @) ITVETTORtES) Jean CALVIGNAC and Pierre SECONDO</td>
<td colspan="4">® HOLDER (ES)</td>
<td>@) PUBLICATION 8802108</td><td>@ PUBLICATION DATE</td><td>@ PATENT OF WHAT IT IS DIVISIONARY</td><td rowspan="3">GRAPHIC only -—- A s - ==== - a = s = SlM6n ·</td>
<td colspan="3">Q Inl. C</td>
<td colspan="3">@ TITLE A SYSTEM TO CONFIGURE A SUCCESSION OF COMPLEX PICTURES IN A TELE NETWORK PROCESS DATA</td>
(57) SUMMARY by<sup>t</sup>a¿ .c%.-Olcn'ar.a si \ value juRíDiO ·
A system for configuring a succession of complex frames to be used for exchanging synchronous switching bits and asynchronous packet switching circuits and bits between connected nodes through transmission media links operating at any bit rate of transmission in a bit is described. teleprocessing network Each complex frame containing an integer number of bits equal to Nc or Nc + 1 chosen as close as possible to a predetermined number Na, is composed of a succession of subframes and delimited by indicator marks, such that the period between two marks Indicators is equal to nT + e, where T is the period of the simultaneous transmission frames by division of existing times (125 microseconds), where n is an integer greater than or equal to 1, which depends on the frequency of transmission of bits in the transmission medium link, and being e. a period of time less than a bit period of the transmission medium link.
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ifg
JOIN 4
Mod 3 106
SEVERA sagina OF THE MEMORY
93.434
AG
Sheet 1
Description of the Invention
Field of the Invention
This invention relates to a system for providing the packet switching function together with the circuit switching function through a telecommunication network. A corresponding method is also described.
Previous Technique
A telecommunication network consists of several nodes to which terminals are connected through communications controllers and that are linked through multiple links.
Due to the transitory nature of most of the data to be transported, packet communication networks have been carried out to optimize the use of network courses. However, packet transport involves large and variable traffic delays that cannot be supported by some applications in real time. The variation of the traffic delay can only be compensated by means of additional buffers in the end users, which is expensive and implies delays.
On the other hand, circuit switching networks provide constant and low traffic delays, but lead to misuse of network links when transient data is to be transported across the network.
The ISDN network (Integrated Service Digital Network) described in the I series of the International Telegraph and -Telephone Gonsulative Commitee (CCITT) xlecommendations is the
25117
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Current solution to the integration of circuit switching and packet switching. However, networks that use the ISDN integration technique are not optimized for data packet traffic since the bandwidth allocated to packet traffic is divided into channels. Additionally, the ISDN technique requires dedicated network equipment, such as digital support equipment.
Currently, most of the packet and circuit switching networks that intend to offer ISDN services will use packet switching equipment and with different circuit mutation and over a long period of migration and this will result in duplication of the equipment and adapters Reference is made to the Inclustry ISDN Seminar, March 11, 1985 given by the Bell Communication físearch group.
These types of networks that integrate the transmission of data encoded by characters and non-encoded NCI information, such as voice signal information, do not optimize network resources (links, nodes, etc).
On the one hand, users will need to transport a wide range of types of information, for example, coded and uncoded information, compressed and uncompressed information, real-time or batch information, voice signals or video signals, etc. On the other hand, common carriers will offer a wide range of resources with links capable of supporting a high frequency of bit transmission that can be greater than 2 Megabits per security based on the standard of 64 kilobit per second corresponding. I take the Time Division Multiple TDM, in coexistence cor
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primary analc
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Hojm num 3 international, therefore there is a need to build network nodes capable of handling any type of information and to use all available means of transmission of any type and any speed.
Summary of the Invention In this environment, an object of the present invention is to create a method and system that optimize the use of the bandwidth of any type of link while providing the necessary means for the transport of any type of information in a network of Telecommunications
Another object of the invention is to create a method and method such that they do not require a global synchronization of the network links.
Another object of the invention is to create such a method and system that ensures a dynamic assignment. from bandwidth to circuit or packet communication traffic according to user activity based on calls.
The transport system and method according to the invention must be used in a telecommunications network to exchange information switched by circuits corresponding to synchronous traffic, and packet switched information corresponding to asynchronous traffic, between. nodes connected through a transmission medium link that operates at any bit rate.
The method and the system according to the present invention allow to implement the conventional packet switching function together with the switching function30
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tion of circuits through the telecommunications network, sharing the same links and nodes, with the following three characteristics:
- any type of link supports can be used,
- circuit subchannels are compatible with global telephone networks.
- The bandwidth that leaves an unused circuit subchannel unoccupied is automatically reused for packet traffic.
The method and system of the invention consist in the configuration in each transmission adapter of a network node of a succession of complex frames. Each complex block contains an integer number of bits equal to Nc and is formed by a succession of subframes. Complex frames are delimited by indicator marks such that the period between two marks is equal to nT + e, where T is the period of simultaneous transmission frames by division of existing times which, at the present time, is equal to 125 microseconds, where n is an integer equal to or greater than 1 that depends on the transmission speed of the medium, and e being of a value less than the period of link bits of the transmission medium.
The subframes have a duration less than or equal to T and each subframe contains an integer number Ns of bits. The Ns bits are assigned to an integer interval the circuit switched bit selectors and the remaining bits are used as support for asynchronous packet bits.
The R bits remaining in the complex frame, being R-Nc-nsi, are used to support brand bits in
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dicadora yr «Rf potential fill bits that are filled with asynchronous packet switched bits.
For a given v value of the transmission speed of the medium link, there is a set of n, Ns and R values that meet the above requirements. The specific values that are selected in each transmission adapter depend on restrictions such as the performance or physical performance of the adapter. In a preferred embodiment of the invention, Ns has been chosen as close as possible to the number of bits contained in T to avoid the fluctuation of bits in the complex frame.
The residual bits can be placed at the end of the complex tables or they can be distributed in the specified sub-boxes. In the first case, the subframes contain the fixed number Ns of bits, and in the second case they contain a variable number of bits so that a subframe i contains Nsi bits. The residual number R1 of bits at the end of the complex table is equal to
Nc - ΣΓ Nsi i-1
In that case, the indicator mark is comprised in these R1 bits and there are residual packet bits.
This invention also relates to a mechanism for dynamically assigning the circuit selector intervals of the complex panels according to the user's activity based on calls.
Brief Description of the Drawings
Figure 1 schematically represents a telecommunication network where the pre29076 can be implemented
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sente invention.
Figures 2-A and 2-B show the complex frames that are generated according to the method of the present invention.
Figure 3 shows how the parameters of the complex tables are calculated.
Figure 4 represents the transmission paths for packet and circuit bits in two network nodes.
Figure 5 shows how pack bits are assembled for successive frames to constitute a complete package.
Figure 6 depicts the transmission means for generating the complex frames in the transmission coupling system of an outgoing transmission medium link connected to a node.
Figure 7 represents the reception means that receive the complex frame from the receiving coupling system of an incoming link connected to a node.
Figure 8 represents circuit 56 of the transmitting means.
Figure 9 represents circuit 128-1 of the receiving means.
Figure 10 shows two adjacent nodes in the network and schematically represents the protocols and coupling means defined in the system according to the invention.
Figure 11 shows the call establishment flow that results in the dynamic assignment of a circuit selector interval in the complete tables.
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Description. Detailed of the invention
A telecommunication network, as schematically represented in Figure 1, comprises a plurality of nodes, four of which (1, 2, 3, 4) are represented. Several users C of the type of switched circuit and a plurality of users P of the type of switched packets are connected to each node. These nodes are linked through means of transmission links, where the links between different nodes can operate at any speed v greater than u.64 kilobits per second, with u being the number of users in the circuit switching mode. Users connected to a node share the bar width of the link so that, in accordance with this<sup>: </sup>In a given instant, users in circuit mode change the information not encoded by characters (NCI), such as vocal information, in sübcanale ·, and the remaining bandwidth is used for packet traffic. This is schematically represented in Figure 1 by the shaded part of the links.
Users of the type of circuit switching fun clone at 64 kilobitres per second, in an 8 KHz transmission structure that corresponds to the conventional bit rate currently used, ie 8 bits every 125 microseconds. Those skilled in the art will be able to adapt the method according to the invention if different bit rates are available in the future.
In accordance with the present invention, the transmission adapter of each node comprises means for causing them to be transmitted through the medium link in complete frames.
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Sheet No. Q
29076 jos having the structure represented in figure 2, bits of data and uncoded information (NCI), such as vocal information from the users of the type of packet switching and users of the type of circuit switching connected to the node . The structure of complex frames is determined using the method of the present invention comprising the operations illustrated in Figure 3.
In attention to the explanation of the invention, the structure. ra of the theoretical complex table is represented in figv ra 2-A. Figure 2-B shows the complex picture that is generated by the means described in Figure 6 a transmitii through the medium link.
The complex table contains Nc or Nc + 1 bits and has a duration equal to nT + e, where T is the conventional simultaneous transmission interval by division of stores that, at the present time, is equal to 125 microseconds, being n a integer equal to or greater than 1, and being e less than a period of link bit, depending n on the transmission rate of the link and calculated as described with reference to Figure 3 »
Complex frames contain n subframes, and each subframe has a duration equal to or less than T in order to contain an integer number Ns of bits. The Ns bits of a subframe are assigned to the transport of a variable number of switching intervals of circuit switching bits. The number of selector intervals depends on the needs of the user, two selector intervals being represented in Figure 2, and the remaining bits are assigned to the transport of packet switching bits.
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As described above, in the preferred embodiment of the present invention, the bit selector intervals of the circuit user are dynamically assigned to active circuit users, so that the subframe structure is modified depending on the activity of the user of the circuit and The number of bits of packet data varies. However, in specific applications, this number can be set and the selector intervals can be permanently assigned, used or not.
Complex frames are delimited by a bit indicating mark that is part of the remaining R bits at the end of the complex frame, where R = Nc-nNs.
In cases where R is greater than f, the r = Rf bits are filled with asynchronous traffic bits.
Residual bits can be dispersed or distributed in given sub-boxes to avoid fluctuation. This makes a certain variable number of bits (Nsi) contained in the subframes. This results in a different R1 number of residual bits at the end of the complex table that is equal &
n
Nc - Σ Nsi i-1
As shown in Figure 2-B, the indicator mark is generated at the next link synchronization interval following the nT limits. Then, the n subframes comprising Ns bits and residual bits are transmitted through the transmission link.
The invention will be described more specifically assuming that the subframes contain a constant number of bi.30
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Hojm Nírr »
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Trios, and those skilled in the art can easily adapt the means that will be described later for formal subframes having a variable number of bits according to the above requirements.
As can be seen in the table below, depending on the transmission speed of the link (ce depending on 64 kbps modules, the complex frames do not contain a constant number of bits although, however, the variation of the Nc number of Bits in consecutive complex frames is only equal to 1. Thus, the limit of the complex frame is known by the receiving end thanks to the detection of indicator marks and set of bits. The minimum indicator mark length that allows the delimitation of complex frames is equal to 2 bits although, however, since the indicator mark can also be used for other purposes, an 8 bit indicator mark is used in most applications nes. The only requirement is that the indicator mark begins with 01 or 10. When the lowest possible number of blots in a complex frame has been counted from the beginning of the opening indicator mark, the next two bits are analyzed. An equality of these bits with the first two bits of the indicator marks means that the box contains Nc bits, and if not, the box contains Nc + 1 bits. This is illustrated below.
Indicator Mark 01
.. XXXXX represent the frame bits that can be equal to 0 or 1.
ΧΧΧΧΧΣΧΟ1 The box contains Nc bits
ΧΧΧΣΧΧΧΧ01 The box contains Nc + 1 bits
I -> · Nc count of bits' -93 .434
Hoj »no.
Consequently, when Nc bits have been counted since the beginning of the preceding indicator mark, the next two bits that include the first bit of the indicator mark and the additional bit of the table, if present, cannot simulate the delimitation pattern of 01 be whatever the value of this additional frame bit. When Nc bits have been counted, the detection of pattern 01 indicates that the box contains Nc bits.
An indicator mark that begins with 10 also has the same property.
The method used to configure the. Complex frames at each of the transmitting ends is represented in Figure 3.
The transmission rate of the link and the approximate number of bits desired in the complex frames detect the structure of the complex frame. In an embodiment. specific to the invention, which is currently intended to be used with a link transmission rate of less than or equal to 2,048 megabytes per second, Na is chosen to be equal to 256 - so that the number Nc is as close as possible to 256 bits ·, in order to maintain a higher f / Nc ratio of the indicator mark in the same range as that used for classic first-order multiple-mission simultaneous train links of the TDM type.
The method consists in calculating the interval t of link bit which is equal to 1 / v, where v 'is the frequency of transmission of bits through the link of the transmission medium (operation 1).
Next, the number of bits in the same simultaneous transmission T selector interval is calculated per di
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vision of times. The number Ns of bits in each subframe is equal to the whole part of this number. Assuming that v is expressed in kilobytes per second and T is equal to 125 microseconds, Ns is the integer part of the product 125 · v.10-5. (operation 2).
Next, the number n of subframes is calculated, this number being the integer part of the Na / Ns ratio. In the specific embodiment described in Figure 5, this number is the integer part of 256 / Ns. (Operation 3).
The residual number R of bits (Operation 4) is then calculated. This number is equal to the difference between the actual number of bits included in the interval T and the number Ns, multiplied by the number n of subframes<sub>5 </sub>and can be expressed as follows:
n. (TV10-5-Ns)
This number R is compared with f (Operation 5) · If it is greater than or equal to f, the number of bits in the subframes is made equal to the value of Ns calculated in operation 2. If not, the number of bits in the Subframes are made equal to the number Ns calculated in step 2 minus 1. The residual number r of bits corresponding to this new number of subframes is calculated.
Operations 4 and 5 are repeated while the residual number R is not greater than or equal to f.
This method is also applied when you want to have the residual bits distributed in the subframes. In this case, the theoretical numbers Ns and R are calculated according to cor. if the method described above and the residual bits are placed in specific sub-boxes identified and the new number R1 of residual bits is calculated so that the r]
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-sites, with rl ~ Rl-f, if they exist, that remain at the end of complex frames, can be filled with asynchronous traffic bits.
The following table provides the various values that are obtained according to the previous method for four link transmission speeds.
TABLE 1
<td>Speed of the transmission mission in kbps</td><td>Ns bits per subframe</td><td>Maximum number of circuit users for 64 Kbps</td><td>Number n of subframes</td><td>r</td><td>F</td><td>Number of bits Nc or Nc + 1 in the complex box</td>
<td> 72</td><td> 8</td><td> 1</td><td> 28</td><td> 20</td><td> 8</td><td> 252</td>
<td> 132</td><td> 15</td><td> 1</td><td> 16</td><td> 5</td><td> 8</td><td>253 or 254</td>
<td> 230</td><td> 27</td><td> 3</td><td> 9</td><td> 7</td><td> 8</td><td> 256 0 257</td>
<td> 1544</td><td> 185</td><td> 23</td><td> 1</td><td> 0</td><td> 8</td><td> 193</td>
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Figure 4 represents two nodes of the telecommunication network. Each node comprises similar means, which are referenced by the same number with a suffix 1 for the means in node 1 and with a suffix 2 for the means in node 2. Each node comprises media link adapters 10 and 11 composed of receiving / transmitting means and including the specific means that are needed to implement the method according to the invention. The adapters are connected to transmission medium links, each link having a specific speed, so that the complex frames on the different links tie95.434
H ojh num ñen different configurations. These frames are formed in the transmitting media of the adapters for their transmission through the links. The parameters n, Ns, R, of the complex tables are disclosed to the corresponding receiving means, so that the received bits can be treated. Complex pictures are represented schematically in the different links.
Two transmission paths are arranged in each node. A CP path is dedicated to the switching bits of cir cuitos (synchronous path) to be transmitted with constant and very short delay (<.500 microseconds) and the other PP path is dedicated to the packet switching bits (asynchronous path) that are transiently memorized and treated in packet processing means 14.
Figure 5 shows how the packages prepared to be switched in the receiving node could be reconstructed from the 'asynchronous flow composed of packet bits.
The consecutive received complex frames contain selectable C1 and C2 circuit user intervals, for example, assuming that two circuit users are involved in a call, and P switching bits of packages. The complex frame (m-1) contains packet PO bits, the complex frame · m contains the bits Pl, P2, P3, P4 packet, and the complex frame m + 1 contains the packet bits P5. For purposes of illustration, it is assumed that a packet prepared for switching is available: that is, it consists of a packet header that contains the information needed to process and switch the packet, and packet data, comprising bits Pl, P2 , P3,
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Package P4 taken from the complex box and parts of them. bits P0 and P5 of packet.
Figures 6 and 7 represent the specific means needed in the transmission medium link adapters to implement the method according to the invention. |
Figure 6 represents the transmitting means and Figure 7 represents the receiving means. For purposes of explanation, it is assumed that Figure 6 represents the means, transmitters of a first transmitting node and Figure 7 represents the receiving means of a second receiving node It is to be understood that each adapter comprises - receiving and transmitting means such as represented in figures 6 and 7. The transmission medium access manager and the finite state machine are common to the media - receivers and transmitters in an adapter.
In the preferred embodiment of the transmitting means, the link access manager 20 calculates the link parameters according to the method of Figure 5 or by consulting tables that are composed according to the method of Figure 5.
In another embodiment of the invention, the parameters can be provided to the manager by external means, - for example by operator intervention.
The media access manager also provides event indicators to the finite state machine 32 (EMG1, 2, 3) and receives the SMG3 signal from the finite state machine 32, as will be described later in relation to the diagram of the finite state machine.
The access link manager 20 for transmission-pro30
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Hoj »numm, through the general output line 21, the parameters Ns, link n and the assignment of selector interval to registers 22 and 24 and to a table 26 of selector intervals, respectively. Thus, table 26 of selector intervals contains an indication of the selector intervals of the subframes that are assigned to circuit users. In each subframe generation, the table of selector intervals is read and its output 28 is used in logic circuit 30 to generate enable signals P or C (packet or circuit).
The media access protocol is managed through the finite state machine 32, which is a logic circuit that provides control signals when specific events occur. The operation of this machine will be detailed later. It is connected to three lines 53, 54 and 55 from the associated receiving means, said lines of the BEING RECEIVING signals being carriers. INACTIVITY, RECEIVE REQUEST FOR SYNCHRONISM and RECEIVE LOST SYNCHRONISM, respectively, and to the general output line 21. Depending on the events received, it generates on its output lines 58, 59, 40, 41 control signals DISABLED, TRANSMIT SYNCHRONISM GUIDELINE, TRANSMIT APPLICATION FOR SYNCHRONISM and OPERATION, respectively. .
The bit counter 44, which operates under the control of a synchronization generator 48 operating at the speed of the transmission link, counts the bits and subframes. IF 46 counter counts the subframes. The contents of counters 44 and 46 are compared with the contents of registers 22 and 24 (Ns and n) by comparators 47 and 49. The
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Hojm No. 17 output 50 of comparator 4 * 7 is supplied to subframe counter 46 to cause this counter to be incremented each time an equality is detected by comparator 47.
The outputs 50 and 51 of the comparators, and the output 28 of the table 26 of selector intervals are supplied to the logic circuit 30 to generate the signals ENABLING P, ENABLING C and ENABLING THE MASK INDICATOR in the correct instants to build the complex panel According to the method of the present invention.
The logic circuit 30 also receives the control signal OPERATION of the finite state machine 32.
The transmission control logic circuit 56 and the indicator mark operating under the control of the pulse counter 57, the bit synchronization generator 48. of transmission link and outputs 50 and 51 of comparators 47 and 49, allows the transmission of specific patterns through the medium link in moments given under control of the signals present in lines 39, 40 and 41 of output of the finite state machine 32. This circuit also provides a counter reset signal on its output line 58. Output line 58 and output lines 50 and 51 of comparators 47 and 49 are applied to circuits<sup>H</sup>0-52 and 54 that provide the reset signal to the 44 and 46 bit counters and subframes, respectively.
The circuit 56 also generates on the output line 60, a transmission control signal r which is applied to the logic circuit 30 in order to cause the residual packet bits to be transmitted through the media link
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I Iojm No. 18 "for the purpose of generating complex frames as described with reference to Figure 2-B.
The different indicator marks are generated by circuit 56 on lines 62, 64 and 66 output. As will be described later, different indicator marks must be sent at given times. In a specific embodiment of the invention, the 01111110 mark is the delineation mark of normal complex frames, the 01111111 process interruption mark is used to request synchronization, and the UCC indicator mark is used to indicate to the receiving media that a circuit user has been added or removed, in case the dynamic bandwidth allocation feature is operational. If not, there is no need for the UCC indicator mark.
Accordingly, the generator 56 generates the marking mark 01111110 under control of the signals OPERATION and TRANSMIT SYNCHRONISM GUIDE on lines 41 and 39 from the finite state machine 32.
Circuit 56 generates the specific indicator mark 01111111 under control of the line 40 carrying the signal TRANSMIT SYNCHRONISM REQUEST from the finite state machine 32.
In the preferred embodiment of the invention, circuit 56 generates the UCC USER CIRCUIT CHANGE pattern that is used to change the. User selection intervals in the sub-boxes. This bit pattern is modified under the control of the transmission medium access manager 20, so that circuit 56 receives the pattern to be generated in the general line 21. This part has to be arranged only
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Hojm no when you want to have the ability to add or remove circuit users. When the circuit selector intervals are permanently assigned, this part is not required in the same way as all the means required in relation to this capacity.
The outputs 62, 64 and 66 of the indicator mark of circuit 56 are applied to circuit 0 * 72.
Circuit 56 also generates an indicator control transmission signal on line 68 that is applied to logic circuit 30 and which is also used during the initialization period to prevent transmission of idle configuration 111 ... 11 through of the media link during the indicator brand transmission period, as will be detailed later.
Circuit 56 generates a signal of the next selector interval on line 70, which is provided to the table of selector intervals to cause the table to be scanned in order to have the indication P or G to be supplied to the logic circuit 3θ through line 28 of output of table 26 of selector intervals.
The packet user bits coming from the transmission PP path and the circuit user bits coming from the transmission CP path or the specific guidelines coming from the 0 "72 circuit output, are transmitted through the link 96 of medium in specific moments to build complex frames through doors Y 74, 76 and 7θ and I<sup>to</sup> gate * 0 * 80. Gate Y 74 receives the ENABLE P signal from the output line 84 of the logic circuit 30 and the packet switching bits from the transmission path PP. The door
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- * γ «76 receives the ENABLE signal C of the output line 86 of circuit 50 and the circuit switching bits of the transmission path CP. Door * Y * 78 receives the ENABLING BE MARK INDICATOR signal from line 88 of the exit of circuit 50 and the specific indicator marking guidelines for the output of circuit O ”72.
The outputs of doors Y * 74, 76 and 7θ are applied “1 steps to circuit 0” 80. The output of circuit * 0 * 80 is applied to a door * Y “81 that is conditioned when it is positive, for example, The medium link sync signal. The output of the gate Y 81 activates the retention circuit 83 that is reset when the media link synchronization signal is negative. In this way, the retention circuit 83 provides at its output the bit to be transmitted through the medium link 96.
The 0 · 82 circuit that receives the DISABLED signal to the output line 38 of the finite-state machine 32 has its output connected to the circuit "0 * 80, so that the 11 ... lili idle configuration is transmitted through The medium link 96 through the gate Y 81 and the retention circuit 83 when the INHABILITE signal X) is active.
The gate Y 94 that receives the OPERATING signal of Line 41 inverted by inverter 92 and the transmission control signal indicating the line 68 of circuit 56, has its output connected to circuit 0 * 82 in order to transmit the entire configuration 111.111 mark through the middle link 96 during the initiation period, between indicator marks.
It will be described with reference to figure 8 an '95 .454
Hoj * No.> 9076
TSion of the circuit 5θ
The receiving means represented in Figure 7 <sup>I know </sup>they will now describe, so that the operation of the transmitting means will be explained in relation to the operation of the receiving means.
In the receiving means, which are supposed to be located in the adapter of the second node to be linked with the first node, which comprises the transmitting means described with reference to FIG. 6, the manager 100 for accessing the transmission means in the adapter.
The finite state machine 101 of the adapter is also schematically represented in FIG. 7, only the output line 103 OPERATION that is needed for the reception operation is represented.
The Nc, n and Ns link parameters must be known by the receiving means. They can be transmitted by the transmitting means or they can be calculated on the receiving means. In a specific embodiment of the invention, tables containing the correlation between Nc and the desired parameter values are found in the receiving media, Nc being the number of bits received between two indicator marks during the initialization period, that is, being said number an indication of the transmission rate of the link.
The media link parameters are loaded in register 102 of the data Ns, in register 104 of the data n and in table 106 of selector intervals through the general output line 101.
The receiving means also contain a .08 bit counter and a subframe counter 110. The counter '93 .434
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108 of bits works under the control of the medium link sync pulse generator 112. The comparator 114 compares the content of the counter 108 with the content of the data register 102 Ns and the comparator 116 compares the content of the counter 110 with the content of the data register 104 in order to generate signals on its lines 115 and 117 or output they are active when equal equality is detected. The output lines 115 and 117 are connected, together with the output line 119 of the interval table 106, to the logic circuit 118. The logic circuit 118 generates the ENABLE P signal or the ENABLE C signal on the lines 120 and 122 output, respectively.
The detection of an equality by comparators 114 and 116 results in the replacement of counters 108 and 110.
The bits received through the medium link 96 are supplied to two doors Y 124 and 126 by means of an 8 bit offset register 127. Doors Y 124 and 126 are conditioned by the signals ENABLING P and ENABLING 0 present on lines 120 and 122, respectively. Its outputs are applied to the packet switching bit processing means of the receiver and the circuit switching bit processing means, where the packet switching and circuit switching bits are treated in the conventional manner. These means are not described since they are not the object of the invention.
The received bits are also provided to circuit 128. Circuit 128 comprises means 128-1 for detecting the indicator marks and counting the bits of the complex frames. In normal operation mode, it is
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say after the initialization period, the output line 130 bits r received from circuit 128 is activated to make the ENABLE P signal at the output of the logic bit 118 activated, so that the residual bits are supplied to the media of packet switching bit processing through gate Y * 124.
The system also detects the UCC indicator marks when they are transmitted to the selector interval table through the general line 132 so that the receiving means take into account the user change of the circuit transmitted by the transmitting means and generate the signal , RCV UCC on line 136 and the next signal in the selector interval on line 137, which causes the contents of the table 106 of selector intervals to be scanned to enable the signals ENABLE P and ENABLE 0 in accordance with the sub-quad configurations.
Circuit 128-1 generates a reset CTR signal on line 138 that is supplied to circuits * 0 * 140 and 142. The outputs of comparators 114 and 116 are also applied to circuits <sup>w</sup>0 140 and 142 whose outputs control the replacement of counters 108 and 110.
The function of the shift register 127 is to delay the bits received in such a way that the detection of indicator marks in the circuit 128 can be performed.
Circuit 128 detects the indicator marks in the received bits and from this detection of indicating marks and bit count, part 128-2 detects when synchronism is lost to generate the signals
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SYNCHRONISM OF LOST RECEPTION and REQUEST FOR RECEPTION SYNCHRONISM on lines 35 7 34. It also detects the received bitstream 11 ... 111 of all ones to generate the reception idle signal on line 33 »These three signals are they send to the transmitting media as shown in figure 6.
A specific embodiment of part 128-1 will be described with reference to Figure 9.
The operation of the transmitting and receiving means will now be described. By forming the complex frame of transmission medium, adjacent media access elements are capable of exchanging status information and signals.
The different states are as follows:
- DISABLED: send idle pattern, that is 11 .... lili
- ENABLED: send the SYNCHRONISM (01111110) or SYNCHRONISM REQUEST (01111111) signals at the transmitting end and the SEARCH RECEIVING SYNCHRONISM at the receiving end signal,
- SYNCHRONIZED): receive SYNCHRONISM without REQUEST OF SYNCHRONISM and transmit the signal SYNCHRONISM without REQUEST OF SYNCHRONISM.
- OPERATIONAL: transmit / receive normal picture; transmit / receive the user circuit change UCC signal.
The finite state machine generates signals that depend on the occurrence of events. There are two types of signals and events, namely the events and signals of the media access manager and the events and signals of the link
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29076 c The transmission medium.
EVENTS AND SIGNS OF THE MANAGER
EVENTS:
EMG1: Load parameters Ns, n of access to the transmission medium
EMG2: Load media access parameters at reception
EMGJ: Add circuit user
SIGNS
SMG1: Circuit User Change (UCC)
MIDDLE EVENTS AND SIGNS
EVENTS:
EMD1: Receive inactivity signal, that is all
EMD2: Receive the SYNCHRONISM REQUEST signal, ie 01111111 instead of an indicator mark
EMD3: Receive the Beñ & l SYNCHRONISM LOST if the set of bits is not 01ΣΣΧΧΧΧ in each half frame
EMD4: Receive the UCC signal, ie 010CXXXX instead of indicator marks, where 01 is the two delimiting bits of the indicator marks and the next zero indicates a change of circuit user; C-0 means elimination and C «1 does add, and the combination ΣΣΧΧ means the user number from 0000 to lili. If there are no more than 16 circuit users, the user number to be added or deleted is coded in two consecutive frames.
In that case, in the first coding box,
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the UCC value that responds to the combination
01001111 it indicates that the user number of this city is coded in two consecutive frames, said number being equal to 1110 plus the ve. lor .contained in the opening mark of the following table.
EMD5: Receive normal frame
EMD6: receive GUIDELINE. OF SYNCHRONISM: normal indicator mark 01111110 with ones between the indicator marks, thus being constituted the average transmission frame by a combination of all ones' *.
SIGNS:
SMD1: Transmit idle signal
SMD2: Transmit signal SYNC20NISM0 REQUEST
SMD3: Transmit signal SYNCHRONISM GUIDELINE
SMD4: Send normal box
SMD5: Transmit circuit user change The access protocol to the transmission medium is managed according to the following state diagram through the finite state machine.
Legend:
State
I Event
I ---->
I Signal
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Hojm No. 27
STATE DIAGRAM
DISABLED ENABLED OPERATED SYNCHRONIZED
<td>EMG1</td><td>EMD6 or EMD2</td><td>EMG2</td><td>EMM-</td>
<td>SMD2</td><td>SMD3</td><td>SMD3</td><td>SMG1</td>
<td></td><td></td><td>EMD2</td><td></td>
<td></td><td></td><td></td><td> ---</td>
<td></td><td></td><td>SMD3</td><td>EMD2</td>
<td></td><td></td><td></td><td>SMD3</td>
<td></td><td></td><td></td><td> ------</td>
<td></td><td>EMD1</td><td>EMD1</td><td>EMD1</td>
<td></td><td>SMD1</td><td>SMD1</td><td>SMD1</td>
<td> <------------ <------------</td><td></td><td></td><td></td>
<-
<td>EMD3</td><td></td><td>EMD3</td><td></td><td>EMD3</td>
<td>SMD2</td><td></td><td>SMD2</td><td></td><td>SMD2</td>
<td colspan="4"></td><td></td>
___ EMD§
SMD4]
EMG3
SMD5 <----- EMD6
SMD4 w ----—> 9076
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<img file="ES8802108A1_D0017.tif" />
~ The operation of the transmitting and receiving means located at both ends of a transmission medium link between two nodes 1 and 2 will now be described.
Before an exchange between the two nodes is established, an initialization period is required for synchronization purposes. This initialization period includes the DISABLED, ENABLED and SYNCHRONIZED states, as described in the state diagram.
From the replacement by connection of the node, the following operations are carried out:
The idle configuration of all ones is transmitted, ie 11 ... 111 by the transmitting means in node 1 and by the transmitting means in node 2 that are in the disabled state. In that state, the disable signal is active and gate 0 82 provided the idle pattern to the media link 96.
The media access manager in node adapter 1 loads the media link parameters in data records 24 and 22 n and Ns of the transmission media.
Next, the transmission means generate the following signals through the signal control and signal r transmission circuit 56.
1-synchronism guideline without synchronism request if synchronism is not lost (SMD3), that is:
0111111011111111...1110111111011111...
<mark> <all about 5 <brand> <all about indian indic
nT microseconds
2-synchronism guideline with synchronism request if synchronism is lost (SMD2), that is:
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LEAF Μ ηύm
29076
01111111111 .... 111111101111111111111111. ..11101111111 <= - Indian m> <all about'j »<m. Indicated about S <m.ind> During this initialization period, the ENABLE P signal is active, so that all the bits between the indicator marks are treated as packet switching bits. The number of bits between marks indicated flush is an indication of the transmission speed of the lace that is used in the reception means to obtain the parameter Nc of reception.
The 1. at the end of the indicator marks indicates that synchronism is requested at the receiving end.
When the transmitting means of node 1 detect that the synchronization request line 34 is no longer active, which means that synchronism is no longer requested by the receiving means in node 2, the transmitting means in node 1 stops the generation of the synchronism pattern and can switch from continuous transmission of indicator marks in limits nT (Signal SMD3) to normal transmission or of indicator mark UCC (signals SMD4 and SMD5). This corresponds to the OPERATIONAL statement as defined in the state diagram.
The UCC indicator marks that are thus transmitted are used in the receiving means to load the table 106 of selector intervals.
If no UCC change signal is received from the media access manager, the normal indicator mark is sent instead of the UCC mark.
The link parameters calculated by consulting tables containing the parameters based on Nc, are loaded into registers 102 and 104 of the receiving media in
- 93.454
Hojm núm node 2.
While the system is in the operational state, all two bits of the indicator mark are transmitted in a frame between the indicator marks by nodes 1 and 2, until one of the nodes has something to transmit. At that time, table 26 of selector intervals in the middle transmitters of the node that has some information to transmit is loaded according to the configuration of the active circuit user.
In the receiving media, the table 106 of selector intervals is loaded by the UCC change detection in circuit 128.
Next, the normal complex frames constructed according to the method of the invention are exchanged between the two nodes, the comparators 47 and 49 detecting the end of the subframes and the n subframes in the complex four. This detection and scanning of the table of selector intervals causes the signals ENABLE P, C and F to be activated through the logic circuit 30 to compose the complex frames as shown in Figure 2-B.
With reference to Figures 8, 9 and 2-B, it will now be described how the residual bits and indicator marks are generated and received.
In circuit 56, the counter 57 counts the periods T (125 microseconds), and the pulse count T at the output of the counter 57 is compared by the comparator 200 with the value n provided by the register 24. The comparator 200 generates a active signal when an equality is detected, indicating this signal activates an nT limit. When detected
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Hoj «no. nT limit, retention circuit 202 is activated. The output of the retention circuit 202 and the output of the medium link synchronization generator 48 are applied - to the gate Y 204.
The - door exit Y * 204 activates circuit 206. INDICATOR BRAND retention which thus provides at its output 68 the BRAND TRANSMISSION - INDICATOR control signal that is active in the bi-sync interval following an nT limit. The retention circuits 202 and 206 are replaced by the signal present on line 208 at the output of comparator 210.
The comparator 210 compares the content of the counter of indicator marks or selector intervals which has module 8 the synchronization signal generated by the medium lithium synchronization circuit 48, with a constant equal to 8. This counter is reset in the sync pulse of transmission medium link that follows. to the nT limit or the module bit limit 8 through the O 214 port by connecting the output of the comparator 210 to an input of the O 214 gate. The other input of the gate 0 214 is connected to the output of the gate * 1 204 and to the output of the comparator 210, in order to provide the reset signal at its output 216.
The output 208 of the comparator 210 is connected -to the reset input of the retention circuits 202 and 206 in order to * reset the retention circuits in the eight bit limits to provide at the output 68 of the retention circuit 206 a signal - INDICATOR BRAND TRANSMISSION control that is active during the eight bit indicator mark periods.
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<img file="ES8802108A1_D0018.tif" />
~ The comparator output line 208 and the indicator mark transmission control line 68 are applied to the gate Y 218 which thus provides the reset signal for the counters 22 and 24 (figure 6) of data Ns and n, in the line 58. This signal is active at the end of the indicator mark transmission period, so that counters 22 and 24 are reset to zero in order to start counting bits and subframes from that moment.
The INDICATOR MASK TRANSMISSION signal on line 68 is applied to frame counter 220 which is a one-bit counter that provides an indication that the number of the transmitted frame is even or odd. This indication is required to transmit a normal indicator mark or an UCC indicator mark alternately.
The retention circuit 224 is activated at the limit of n subframes that is detected when the comparator 49 detects an equality and provides an active signal on line 51, being replenished when the indicator mark transmission period that is detected by the conqsarator 200 begins . Thus, the output of the comparator 200 is supplied to the reset input of the retention circuit 224, which is thus activated during the period of transmission of residual sites and provides the control signal for the transmission of residual bits at the output 60 (See Figure 2-B for the period of transmission of residual r bits).
Door Y "226 is connected to output 208 of comparator 210, to line 68 of INDICATOR ARRIVE TRANSMISSION PERIOD through inverter 228, and to output 30 of retention circuit 224 through inverter 230.
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Hojm No. 33
Thus, gate Y provides an active output signal at its output 70 in the eight bit limits when the control signals INDICATOR BRAND TRANSMISSION 7 TRANSMISSION r. Thus, gate_Y 226 provides on line 70 the NEXT SELECTOR INTERVAL control signal that is used to explore - table-26 of selector intervals.
The 01111110 7 01111111 indicator mark patterns are contained in the register 228 7 230 7 the UCC indicator marks are loaded into the register 232 'offset from the general line 21. The two rightmost bits of the register 232 of shift -actx go to the combination 10 7 the other bits indicate user change, if applicable, or they are activated to the combination 011111 if no user change is requested.
The displacement of the registers 228, 230 7 232 is carried out under the control of a logic circuit comprising the doors Y ”234, 236 7 238. These doors Y_ are conditioned by the signal INDICATOR BRAND TRANSMISSION on line 68 7 by the signals of synchronization of transmission media bits from circuit 48.
Gate Y 234 provides an active displacement output signal when its third input 240- is. activated by means of door 0 242 7 the door * Y<sup>W</sup> 246. The door <sup>n</sup>And 246 provides an active signal to one of the inputs of gate 0 240 when line 41 TO OPERATION from the finite-state machine 32 is activated 7 when the output of the frame counter 220 is at a corresponding first value to an odd-frame number, for example. The second entrance of the door * 0 ”receives the '95.434
<img file="ES8802108A1_D0019.tif" />
“Signal TRANSMIT SYNCHRONISM GUIDELINE of line 39 Do you exit the machine 32 of finite states.
When these conditions are met, the normal indicator mark 01111110 contained in register 228 on line 62 is supplied to be sent by gate Y 78 (Figure 6) via link 96 of the transmission medium.
The Y ** 236 gate provides an active displacement signal during the period of transmission of the indicator mark when the. signal TRANSMIT SYNCHRONISM REQUEST on line 40 from the finite state machine 32. Thus, during this period the process interrupt mark 01111111 is supplied to the gate Y * 78 (Figure 6) for transmission through the medium link 96.
Gate * Y 238 provides an active displacement output signal during the indicator mark transmission period when gate Y 248 is activated, ie when the OPERATION signal is active on line 41 from the finite state machine 32 and when the frame counter 220 indicates an even frame number. Thus, during this period, the UCC indicator mark is applied to gate Y "78 for transmission through link 96 of transmission medium.
Figure 9 represents the part 128-1 that performs the indicator mark treatment and generates the control signal that allows the activation of the line 120 ENABLING P when the residual bits are received.
It comprises circuit 300 that detects the configuration. of the indicator mark during the initialization period, that is when the 103 OPERATING signal from 1i.
29076
Sheet * No. 101 finite state machine is not active. Circuit 300 comprises a counter 302 that counts ones "in the received bit string. The bit string received from link 9θ is applied to gate Y 310 which also receives the middle link sync signal of circuit 112. The output of gate Y 310 is applied to counter 302 of ones ”. The content of the counter 302 is compared cor 6 in the comparator 304, so that when six consecutive ones are found in the received bit string, the output 306 of the comparator is activated and the counter 302 is reset.
output 306 of comparator 304 is applied to the door ”Y<sup>W</sup> 512 which also received the bit string in the lace 96 inverted in the inverter 314 and the OPERATING signal of the line 303 inverted in the inverter 31θ · In this way, the gate Y ”312 provides in its output line 318 a signal eight-bit indicator mark detection that is activated during the initialization period when six consecutive ones are received followed by a zero.
The Nc value or the Nc + 1 value of the bits of the complex panel are found during the initialization period by means of the 320 bit counter, the 522 register of Nc / Nc + 1, the comparator 524 and the Y * gates 526. Counter 520 counts the media link synchronization pulses from circuit 112 and is replaced by counter reset signal Na and n from line 158. The content of the counter 320 is transmitted by the gate Y 326 when the signal of line 518 is activated in register 322. Accordingly, register 322 with 29076
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Sheet No. has the number of complex frame bits between two mar10
3rd
29076 cas indicators.
The media access manager loads the calculated parameters of Nc / Nc + 1 and starts up.
Next, the content of register 322 is compared to the content of the media bit counter in comparator 324, which provides an output signal on line 328 that is activated when the media bit counter 320 reaches the value recorded in register 322. This active signal sets the "retention circuit 330" which controls the detection of the first bits 01 of the indicator mark received.
The output line 332 of the retention circuit 330 is applied to the gate Y 334 to which the media bit received from link 96 and "1 last bitic of media received taken in register 127 (figure 7) and inverted are also applied. on inverter 336. Accordingly, gate Y "334 provides an output signal on line 338 indicating that the delimitation configuration 01 of the indicator mark has been received. This signal is used to preset the 340 bit counter of the selected interval to 2. The selector interval bit counter counts the selector interval bits and its content is compared with 8 in comparator 342. The output line 344 of comparator 342 is activated when an equality is detected indicating an average link limit of 8 bits The counter 340 is replaced by the output of gate 0 346 which receives the 8-bit indicator mark detection signal through line 318 and the 8-bit medium link limit signal through line 344 .
Hojm No. 37
- The retention circuit 348 is activated by the two-bit delimitation pattern of the indicated mark signal received on line 338 and is replaced by the 8-bit medium link limit signal on line 344 "of so that it remains activated for a period of six bits after the detection of the pattern 01 delimiting the indicator mark.
Line 350 output circuit, 348 of. retention is applied to the door I 352 which also receives the output line 344 of the comparator 342. In this way, the output signal of the gate Y 352 is activated in order to provide the reset signal of the meter of n and Ns through of line 138 during the indicator mark detection period.
The retention circuit 354 is activated by the signal present on the line 138 and is replaced by the 8-bit medium link limit signal 344 and supplies, to the logic circuit 118 of Figure 7, the period signal INDICATOR MARK / ÜCC on line 134 that is activated during the eight bit period following the last bit of the indicator mark. This signal is needed to compensate for the delay of the received bit string introduced by the shift register 127 of Figure 7.
During the six-bit period that follows, to the setting 01 of delimitation of the indicator mark, the received media bits are shifted in register 356 through gate * Y 358 whose inputs are connected to link 96 and line 350 output 'del, circuit 348 retention. The general output line 132 of the UCC register 356 is connected to the access manager 100 of me? 9076
Hoju No. 38 '93-434 gave and is used to update the table 106 of selector intervals.
The output 350 of the holding circuit 348 provides the receiving UCC signal on line 156 which is applied to the logic circuit 118 of Figure 7 corresponding to event EMD4 of the finite state machine diagram.
The gate Y<sup>w</sup> 360 receives the 8-bit media link limit signal through line 344, the indicator mark detection signal on line 350 inverted by inverter 362 and the signal received r on line 130 inverted by inverter 366, and provides on its output line 137 the NEXT SELECTOR INTERVAL signal used, to explore the table 106 of selector intervals of the figure
7.
The received signal r on line 364 is provided by the retention circuit 368 that is activated when the comparator 117 detects an equality and is replaced by the reset signal that appears on line 138. Consequently, this retention circuit is active in order to activate line 120 ENABLING P to transfer the residual bits 1 to the packet transmission PP path.
It will now be described how bandwidth is allocated based on the activity of the circuit user.
During the initialization phase, once the transmitting and receiving ends are put in the nal operated state, that is, once the parameters are loaded in the transmit and receive parameter registers, all the bits that are transmitted between two indicator marks they are interpreted as packet switching bits until the user selection intervals of
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Η ο; μ num
29076 circuit. These bits are encoded and decoded by the ends of the link as a normal HDLC channel. They constitute an HDLC chain, which has a conventional format. Each HDLC frame contains a packet and the first two octets of the packet data field contain a logical channel LCN number as defined in CCITT recommendation X.25. This LCN value is set to expensive to indicate that the corresponding packet 1 is a control packet used to manage a call on the network. This arrangement constitutes a logical control channel similar to the * D channel<sup>M</sup> of ISDN. Packets that have their LCN values other than 0 are used for another flow that includes the data flow.
The types of packets are those defined by the X25 protocol, for example:
-Application, call
-Call connected
-Erase request
-Erase confirmation
Figure 10 represents two adjacent nodes in a network, a transmission medium link comprising transmission and reception branches being represented between the two nodes. However, other media links are actually arranged that connect said nodes with other nodes of the network, as shown schematically in Figure 1. Figure 10 more specifically represents the pro-colos and coupling systems defined in the system of agreement With the invention. The media coupling unit 400 defines the complex frames of transmission medium. Da unit 402 of media access coupling defines the orders used by the media access manager for
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<img file="ES8802108A1_D0020.tif" />
control the media access elements as shown in Figures 6 and 7, to add or release circuit switching bandwidth by direct action on the complex frame.
The coupling configuration unit M00 404 of the medium configuration defines the format of the messages, ie the packet bits circulating in the logical channel 0 (LCN-O), which are the control packets as explained above. Do previously.
The circuit switching function coupling unit 406 defines the commands for the circuit switching function 408 in order to synchronize this function with the medium configuration. For this purpose, the circuit switching function 408 comprises two switching tables. These tables are updated by the service manager 412 through the coupling unit 406 in order to correlate the complex frame selector interval number in the receiving branch of a node input link, with the selector interval number of complex picture in the transmission bypass of the outbound link that is used to process the call packets. In the extreme nodes, that is to say the origin and destination nodes, the switching tables correlate the circuit user number with a link and the intervals are incoming and outgoing readers in this link.
The packet switching function coupling unit 410 defines the necessary commands and signals between the service manager 412 and the packet switching function 414 in order to manage the packet flow, including the data and packet flows. of control.
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Hoju no.
The network service coupling unit 4146 defines the messages exchanged between the system manager 418 and the network service function that includes the configuration service, the directory service, the measurement service and the maintenance service.
There are two types of protocols, namely the media access MAP protocol that describes the exchanges through the medium at a complex medium frame level and which is described in relation to Figures 6 and 7, 7 the SMP protocol of service manager that describes the exchanges between two system managers.
The residual erase channel is configured within the complex frames constructed as described above, to support bit packets using, for example, the virtual circuit VC / LCN number / logic channel of the X25 protocol.
As explained above, the number LCN = O is reserved and the package circulating with this value LCN is sent to the system service manager 418, as the network service communication channel used in cooperation with the configuration services of net. This channel is schematically represented as a configuration service CSC channel in Figure 10.
Figure 11 represents the call establishment flow through a system node in a specific case. It is assumed that the circuit user X connected to the originating node A wishes to establish a call with the circuit user Z connected to the destination node C, through an intermediate node B. The service manager 412 in node A makes that the sequence enters the initiation phase
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<img file="ES8802108A1_D0021.tif" />
-call. During this phase that uses the asynchronous packet flow (LCN-O), a call request packet is sent by the node A of origin to the node B. This package includes the called number and potentially the number that calls it, information that indicates that a circuit switching call must be established, and the selector interval number assigned to user X at the incoming branch of link L1 that connects node A to node B. The opening indicator mark of the subsequent complex frame generated by the transmitting means in node A is activated at a value 0101xx, indicating that a circuit user must be added and that the number xx * of the selector interval is assigned thereto. For example, if the complex panels contained two circuit selector intervals, the interval 3 is assigned to the user X in the subsequent complex frames transmitted. The table of selectable intervals of the transmission means in node A is updated. The decoding by node B of this new UCC indicator mark indicates to node B the complex frame whose change is effective.
The service manager of node B waits for the two correlated information, the call request packet and the UCG value mark 0101xx, to determine if it is the destination node or if the call request packet has to be propagated to another node found as usual in the network consulting route tables.
If node B is, as has been assumed, an intermediate node, the service manager in node B checks whether a circuit user selector interval can still be assigned in the complex frame to be generated in the outgoing branch
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Hojm núm I read link L2 of medium between node B and node 0 of desti no. If so, the call packet is propagated to node C, said calling packet including the called number, information indicating that a switched circuit call has to be established, and the number yy of the selector interval assigned to user X in the frame complex generated from B to C on link L2. The table of selectable intervals in the associated transmission media. To the L2-media link between B and C is updated and the UCC indicator mark in the subsequent tables- transmitted through this link is activated at the value -0101 yy **, where yy indicates the selector interval number assigned to user X in this in. lace
The receiving means in node 0 connected to this link receive the complex frames thus generated. The service manager of node C determines the user. Destination Z is associated with this node and transmits to the node B a 'packet connected by -call that indicates that the selector interval zz is- assigned in the complex frame. a. Generate from node.C to node B, to user Z. The indicator mark UCC is activated to the value 0101zz.
Detection in node B of the connected call packet and the correct correlation with the 0101zz flag makes the connected call packet propagate to node A, and the selected interval table in the receiving means of node B that is updated is updated. they control the in L2 lace of medium between C and B.
The connected call packet is propagated by node B to node A through the link Ll. The service manager at node B assigns the selector interval tt ”to the user 95,454
<img file="ES8802108A1_D0022.tif" />
River Z and the indicator mark UCC is activated at value 0101tt in the subsequent tables generated by the transducer means of node B that control the link L1 between B and A.
Detection at node A of the connected call packet and of the indicator mark 0101tt causes that the table of selectable reception intervals of link L1 between node B and node A is actuated and completes the phases of call initiation and termination call.
The switching tables in each node are updated when the call control packets, namely the call request packet and the connected call packet, are propagated through the node in order to contain Go correlation between the selector interval number on the incoming link with the identification of the outgoing link and the selector interval number on this link. For example, in node B, the switching selector interval tables follow the correlation track between xx on link L1 and yy on link L2 and zz on link L2 and tt on link Ll.
Call control packets may have to propagate through several intermediate nodes depending on the network route address capabilities. The same operations described above are performed at each node.
If it is in one of the intermediate nodes that a circuit user selector interval cannot be assigned, and this occurs when there is no more bandwidth available for circuit users, an erase request packet is transmitted by this intermediate node to the intermediate node. origin knot.
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H oj · * No. 4-5
In case the node B was not an intermediate node, but the destination node, the connected call packet, or the deletion packet, as the case may be, is sent directly by the node · B to the node A with the mark 0l01tt indicator correlated with the connected call packet.
When the call initiation phase and the call termination phase are completed as described above, there is a new complete double transmission circuit referenced by the selectcr interval numbers between nodes A and C. The bandwidth used To use these selector intervals it has been removed from the asynchronous flow.
Consequently, complex tables must include at any time some bits dedicated to asynchronous flow. It is the responsibility of the node service manager to determine the minimum bandwidth that should be available for asynchronous flow. Actually, call control packets are transmitted using these bits in so many complex frames - as required for transmission. Whenever this minimum number is reached, any attempt to establish an additional circuit selector interval (erase phase) is rejected.
The same mechanisms described above are used in relation to the call initiation and call termination phases for the erase initiation and erase phases to eliminate the inter-user circuit selectors, with the exception that the indicator mark C is set to zero instead of one and the call request package is replaced
29076
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Rwm do sheet with a delete request packet and the connected call packet is replaced with a delete confirmation packet. This eliminates the selector intervals that were previously assigned during the call initiation and call termination phases.
In the above description, it has been assumed that the control packages were sent through the same links as the tables in which selection intervals have to be added or removed. However, this is not a requirement. Call control packets can be transmitted on media links through network nodes specifying in which links connected to the same nodes circuit selection intervals should be added or removed. Indicator marks are changed in the frames transmitted through these links. The service manager at each node expects two information: selector interval number and link in the control packets, and new UCC indicator mark, as described in relation to Figure 11.
The establishment of a circuit connection between two nodes may involve up to four different links in the most general case, instead of the single link L1 as shown in Figure 11:
- the first incoming link carrying the call request packet, in this case the call control information, comprises, in addition to the selector interval number, the called number, the calling number, and the identification of a second incoming link in which the circuit selector interval must be established.
- the third outbound link that carries the package
-93. 434
Connected call number sheet, in this case the call control information, includes, in addition to the selected interval number, the called number, the calling number, and the identification of a fourth outgoing link on which the call is to be established. circuit selector interval.
<img file="ES8802108A1_D0023.tif" />
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Hoj «no.
Translation of the legends of the figures
Figure 1
I Transmission medium link
Figure 2A
I Synchronous circuit switching selector interval
II Asynchronous packet bits
III Subframe
IV Complex picture
Figure 2B
I Next media link sync interval
II Limit of subframe n
III Indicator mark
Figure 3
I Calculate bit interval
II Calculate. number of bits in
III Whole part of
IV Calculate
V Keep
VI AND CALCULATE
Figure 4
I knot
II Package treatment unit
III Package transmission path
IV Circuit transmission path
V Adapter
VI Complex picture
VII Media links between network nodes
VIII
Intermediate memories
29076
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Sheet »no.
Figure 3
<td></td><td>I</td><td>Complex frame number</td>
<td></td><td>II</td><td>Portion 0 indicator mark of the previous package</td>
<td></td><td>III</td><td>Complete package</td>
<td> 5</td><td>IV</td><td>Ready to be switched in a conventional way</td>
<td></td><td>V</td><td>Next portion of package 0 indicator mark</td>
<td></td><td>SAW</td><td>Package Reconstruction</td>
<td></td><td>VII</td><td>Fill bits-part of</td>
<td> 10</td><td>VIII</td><td>Packet bits</td>
<td></td><td>IX</td><td>Circuit Selector Intervals</td>
<td></td><td>X</td><td>PH contains the information necessary to switch the packet</td>
<td></td><td>XI</td><td>Packet header</td>
<td> 15</td><td>XII</td><td>Package data</td>
<td></td><td>XIII Figure 6</td><td>Package Indicator Mark</td>
<td></td><td>I</td><td>Signal</td>
<td></td><td>II</td><td>Event</td>
<td> 20</td><td>III</td><td>Of 32</td>
<td></td><td>IV</td><td>Next selector interval</td>
<td></td><td>V</td><td>N value of</td>
<td></td><td>SAW</td><td>- 48 media link sync</td>
<td></td><td>VII</td><td>+ 48 media link sync</td>
<td> 25</td><td>VIII</td><td>of 56</td>
<td></td><td>IX Figure 7</td><td>Next selector interval 7θ</td>
<td></td><td>I</td><td>PP packet transmission path</td>
<td></td><td>II</td><td>Transmission path CP circuit</td>
<td> 30 29076</td><td>III</td><td>Last bit of media link received</td>
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<img file="ES8802108A1_D0024.tif" />
ηύπι
<img file="ES8802108A1_D0025.tif" />
Ίύ
Figure 8
I
II
III
IV
V
SAW
VII
Figure 9
I
II
III
IV
V
SAW
VII
VIII
IX
Figure 10
I
II
III
IV
V
SAW
VII
VIII
Bits received from link 96 of medium
Impulse T
Value n of 24
NT signal
Of the medium bit synchronization generator 48
Displacement
Odd 222 check counter
222 square meter counter
From medium link sync generator 112
Bits received from 96 to 100
Bits received from 96 last bit received from 127 of 112 counter preset to 2
Displacement
Detection period of indicator mark
Transmitter / receiver media (figures 6 and 7)
Circuit switching function
Circuits
Media access protocol (ΜΑ.Ρ)
Service Manager Protocol (SMP)
Residual erasure
Channel
Media configuration control
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<img file="ES8802108A1_D0026.tif" />
<td>FORMER ζ α XII xni XIV χν XVI XVII XVIII XIX XX Figure</td><td>Complex picture Access to the transmission medium Media Access Sector Packet switching function Circuit switching control Packet Switching Control n circuits Complex picture Circuit switching control Packet Switching Control Media Access Manager Access to the transmission medium . eleven</td>
<td>I</td><td>Link</td>
<td>II</td><td>Particular coding of the half-frame indicator mark</td>
<td>III</td><td>Deletion Request</td>
<td>IV</td><td>Connected call</td>
<td>V</td><td>Selector interval</td>
<td>SAW</td><td>Add user selector interval</td>
<td>VII</td><td>Call request</td>
<td>VIII</td><td>Call</td>
<td>IX</td><td>Selector interval</td>
<td>X</td><td>Add user selector interval</td>
<td>XI</td><td>Package Reassembly Mechanism</td>
<td>XII</td><td>Package</td>
<td>XIII</td><td>Y</td>
<td>XIV</td><td>Extreme knot</td>
<td>XV</td><td>Available bandwidth</td>
<td>XVI</td><td>Call request</td>
' 95.434
Hojm num lo
XVII
XVIII
XIX
XX
XXI
XXII
XXIII
XXIV
XXV
XXVI
XXVII
XXVIII
XXIX
XXX
XXXI
XXXII
Call
Selector interval
Add user selector interval
Connected call
Selector interval
Add user selector interval
Link
This knot
Previous knot: call origin knot
Packet flow
Circuit flow
Next node: call destination node
Propagation
Package
Y
Service call manager
2nd
29076
<img file="ES8802108A1_D0027.tif" />
<img file="ES8802108A1_D0028.tif" />
93.434
Contents63
28 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13 Sheet 14 Sheet 15 Sheet 16 Sheet 17 Sheet 18 Sheet 19 Sheet 20 Sheet 21 Sheet 22 Sheet 23 Sheet 24 Sheet 25 Sheet 26 Sheet 27 Sheet 28
8 members in 6 offices
Priority claims3
| Document | Office | Kind | Date |
|---|---|---|---|
| 85430027 | European Patent Office (EPO) | A | |
| 85430027 | – | – | – |
| EP19850430027 | – | – | – |
Members8
| Document | Office | Kind | |
|---|---|---|---|
| JPS6243936A | Japan | A | |
| EP0214352A1 | European Patent Office (EPO) | A1 | |
| ES556132A0 | Spain | A0 | |
| ES8802108A1This record | Spain | A1 | |
| US4761781A | United States of America | A | |
| CA1250936A | Canada | A | |
| EP0214352B1 | European Patent Office (EPO) | B1 | |
| DE3580276D1 | Germany | D1 |
1 legal event, as the office reported them to INPADOC
Events
| Event | Code | |
|---|---|---|
| Patent lapsedLapsedFD1A | FD1A |
Numbers
- Publication
- 8802108
- Publication, DOCDB
- 8802108
- Publication, EPODOC
- ES8802108
- Application
- 556132
- Application, DOCDB
- 556132
- Application, EPODOC
- ES19860556132
Titles2
- English
- Adaptive packet/circuit switched transportation method and system.
- Spanish
- UN SISTEMA PARA CONFIGURAR UNA SUCESION DE CUADROS COMPLEJOS EN UNA RED DE TELEPROCESO DE DATOS.
Classification
- CPC, 2
- H04J3/1629
- H04L12/64
- IPC, 2
- H04J3 16
- H04L12 64