Power saving methode and system

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DESCRIPTION

Energy saving procedure and system.

This invention belongs generally to the field of energy saving by reducing the energy consumption of electrically driven systems, and more particularly to reducing the energy consumption of electronic mass storage devices, and even more particularly to reducing energy consumption. of this type in mobile information and entertainment (infotainment) products.

Mobile storage devices generally comprise mass storage devices, such as hard disk drives (HDDs, Hard Disk Drives) or optical bit engines. The energy consumed by these HDDs or optical bit engines forms a significant part of the overall energy consumed by such a mobile device. Since such portable devices, for example information and entertainment devices, run on a limited power source, i.e. a battery, it is desired that the operating time with a fully charged battery is as long as possible until the battery need to be replaced or recharged. This is one of the reasons why the device should consume as little power as possible.

A primary solution to saving energy when using such a storage device is to turn off the device, when no data is being read or written. However, in this case, data access is very slow when the storage device reboots after being idle. Alternatively, a storage device has been disclosed in WO01 / 15161, which has various levels of power consumption modes. The device progressively switches to lower power consumption modes as time passes since the last read or write access to / from the device. However, this device also suffers from the disadvantage of long access times when returning to the full power state from a substantially lower power state, that is, partial shutdown or shutdown of the storage device.

For audio, video or audiovisual streaming applications, for example in mobile information and entertainment devices, such as portable MP3 or DVD players, the total energy consumed can, in addition to the aforementioned procedure, be significantly reduced. using a buffer and buffering schemes. These schemes take advantage of the fact that it is more efficient to read or write data in bursts at a high bit rate and then power down the unit, or alternatively put the unit into standby mode for as long as possible. During the time the unit is off or in standby mode, data is read or written respectively from or to the buffer. An example of this type of buffered data transfer is given in US-B-6,496,915.

To this end, the solid state RAM is used to buffer the audiovisual data until it is ready for further processing, either being consumed by a decoder in the case of playback or written to the storage medium in the case of recording. This procedure is independent of the storage medium used, where typical storage media are for example HDD, CD, DVD, BluRay discs or SFFO (Small Form Factor Optical) discs. However, for the sake of simplicity, the remainder of this description will only deal with HDD. The total energy consumed by such a subsystem is determined by the sum of the energies consumed by both the HDD and the internal memory storage solid-state RAM. Although the power consumed by RAM seems small at first glance compared to the power consumption of disk drives, it is not insignificant, especially in the case of DRAM. Buffer power consumption is roughly proportional to buffer size. Also, the larger the buffer size, the less power the disk drive consumes. However, at the same time, the power consumption of the buffer increases with size. In JP-2000298935, it has been proposed to reduce the power consumption of a buffer by providing a hardware buffer solution that has a small capacity part for high frequency use and a large capacity part for low frequency use. . However, this solution is not flexible, as different bit rates to / from the storage device require different ratios of the two buffer parts. Furthermore, the number of physical chips and internal banks determines in such a design the power consumption, which is fixed and cannot be further reduced due to the design disclosed in JP-2000298935.

Therefore, the object of the invention is to provide an adaptive minimization of the total power consumption of a subsystem comprising a mass storage device and a buffer memory, without impairing the performance of the subsystem under different operating conditions.

The present invention overcomes the deficiencies in the art identified above and solves at least the problems identified above by providing a method, an apparatus and a computer-readable medium to adaptively minimize the total power consumption of a subsystem comprising a storage device. bulk and a buffer, according to the appended patent claims.

The general solution according to the invention is to adaptively modify the characteristics of a buffer with respect to operational entities of a subsystem, comprising a mass storage device

ES 2 322 271 T3 and the buffer, to minimize the power consumption of the subsystem in total, so that the subsystem has an optimally low power consumption for a given set of operating entities of the subsystem.

More particularly, an ideal buffer size is determined, and certain areas of the buffer are turned off, so that an optimally low power consumption is achieved for a predetermined performance of the subsystem.

In accordance with aspects of the invention, a method, apparatus, and computer-readable medium are disclosed for adaptively minimizing the total power consumption of an apparatus comprising a mass storage device and a buffer memory.

The present invention has the advantage over the prior art that it adapts the buffer size with respect to current requirements, thus optimally using the subsystem with a given performance within a wide performance range and with a minimum of power.

Additional objects, features, and advantages of the invention will become apparent from the following description of embodiments of the present invention, with reference to the accompanying drawings, in which Figure 1 is a graph illustrating the influence of buffer size on the total energy consumption of the subsystem;

Figure 2 is a schematic illustration of a subsystem comprising a mass storage device and a buffer memory;

Figure 3 is a flow chart of one embodiment of the invention;

Figure 4 is a schematic illustration of a mobile device according to an embodiment of the invention; and Figure 5 is a schematic illustration of a computer-readable medium 5 according to an embodiment of another aspect of the invention.

According to one embodiment of one aspect of the invention, the characteristics of the following three entities are in steps of a procedure 3, as shown in figure 3, determined and adaptively modified to minimize the energy consumption of a subsystem 2 , as shown in figure 2, comprising a mass storage device 21, such as a HDD, and an SDRAM buffer 22:

• the HDD 21st bit optical engine • the SDRAM scheduling buffers 22 • the bit rate of the audio / video stream 24.

The data stream 23 to / from the HDD to the buffers 22 is generally performed at a fixed rate, where the rate is fixed for a given HDD location. Actual speed generally varies with location on the disk due to the constant angular velocity with which data is read from the disk. The actual value can be determined in each case, alternatively an average can be used for a given continuous flow. Furthermore, the data rates of optical drives with Constant Angular Velocity (VAC) are also location dependent. On the other hand, optical drives with Constant Linear Speed ​​(VLC) have a fixed data transmission rate, which is independent of the location of the disk, so in this case a fixed data transmission rate can be assumed. Also, the data is read in bursts, as described above. Calculations and verification experiments carried out by the inventors have shown that the HDD power consumption is asymptotically reduced to a minimum value determined by dividing the bit rate of the stream and the maximum overall performance of the HDD in a function of the scheduler buffer size. Also, the overall maximum HDD performance depends on the location of the disk, that is, there are different zones. Outer zones have a higher bit density than inner zones, that is, higher bit density results in higher overall performance in a VAC system. On the other hand, the power consumption of SDRAMs generally increases linearly as the size of the SDRAM increases. From the literature it is known that the energy of SDRAM increases linearly with the size of the SDRAM. Calculations for existing SDRAM chips also verify this. Note that SDRAM power does not increase with buffer size but it does with SDRAM size. The buffer size can be smaller than the size of the SDRAM. The power consumption of both SDRAM and HDD is plotted on the diagram shown in Figure 1 for a typical drive, showing typical SDRAM sizes for a 4 Mbps video stream.

As can be seen in Figure 1, the overall power consumption is optimal for a particular combination of the three aforementioned entities with a certain size of the scheduler buffer.

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Furthermore, it is assumed that the power consumption characteristics of the HDD and SDRAM are that it is stationary over time, except for the wear and tear of the HDD. A slight variation in performance can be easily tracked by measuring the actual overall data throughput as an alternative to assuming a constant value.

The optimal buffer size for a low bit rate application, such as playing music for example at 128 kbps, is different from that of a high bit rate application such as a portable video camera recording for example with 27 Mbps. Therefore the optimal buffer size of the subsystem buffer will vary over time with respect to different applications using the subsystem.

In case of multiple simultaneous streams, the sum of the bit rates of all streams is considered.

Therefore, the subsystem buffer must be large enough in size to provide low subsystem power consumption as a total for high bit rates. However, this leads to unwanted excessive power consumption in low bit rate applications.

The above-mentioned procedure, shown in Fig. 3, starts in step 30, when for example a HDD scheduler starts a new stream, after which in step 31 the HDD data rate is determined. In step 32 the stream bit rate to / from the buffer is determined, where the stream bit rate is generally the average bit rate of the stream, although it may be variable within certain limits for bit rate encodings. Subsequently, the optimal buffer size is determined in step 33, that is, the buffer size with the above-described minimum of subsystem power consumption. This can be done for example by actively varying the buffer size and measuring / feedback the power consumption, calculating the optimal buffer size from a formula or by means of a look-up table. When the optimal buffer size that guarantees the lowest power consumption of the subsystem is determined, this optimal buffer size is adjusted in step 34. Subsequently, the subsystem operates with the lowest possible power consumption for a rate of stream bit stream given. It is to be noted that, in variable bit rate streams, the average bit rate will vary within a certain range.

According to an embodiment of another aspect of the invention a mobile device is provided. The mobile device comprises at least one SDRAM IC having a number of internal memory banks. Mobile SDRAMs often have a feature that allows them to selectively turn off some of these memory banks. This is sometimes called a Partial Array SelfRefresh (PASR).

The disk scheduler that is responsible for accessing the HDD and SDRAM buffer uses knowledge about the HDD and SDRAM to dynamically determine the optimal memory configuration. More precisely, this action is performed each time a new stream is admitted for streaming transmission. The characteristics of the HDD and SDRAM are stored in the application. If changes are expected over time, for example in the case of the HDD, these characteristics can be recalled from the unit itself, for example via a special command that is based for example on measurements of the HDD.

Figure 4 illustrates the current embodiment in more detail. An exemplary subsystem 4 comprises an application device 41 reading or writing data from or to a HDD 48, as indicated by data transmission arrow 49. Data is not transmitted directly from / to the HDD, but via a low power HDD scheduler 42. Scheduler 42 controls data streams 50, 51 from / to buffer chips 43, 44, such as SDRAM, data stream 52 to / from the HDD, and data stream 49 to / from application 41. The streaming rate of the data stream 52 to / from the HDD is set and determined by the hardware, where the dominant factor is the actual media access speed, which in turn is determined by rotations per minute and / or characteristics of the environment. Usually the bus connected to the HDD is faster than the real storage medium. In personal computers the hardware interface is usually faster than the HDD. However, in CE applications this might not be the case. Furthermore the scheduler 42 controls which memory banks 45 B1, ... B4 are active. This is done by switches 46 having control lines 47 connected to scheduler 42, that is, scheduler 42 determines the memory bank configuration by turning these memory banks on or off. If the banks are internal, switching can be done by establishing a register in the SDRAM. Therefore, the only unknown entity at the time of designating subsystem 4 is the bit rate of continuous streams 49, 50 and 51, where the total bit rate depends on the type of application or the number of simultaneous continuous flows. Each time the application 41 requests the scheduler 42 to start a new stream, it recalculates the optimal buffer size for that particular configuration of the stream, or the plurality of streams. Subsequently, the scheduler 42 activates the optimal memory bank configuration. This means that a number of internal memory banks 45 are activated, guaranteeing the minimum power consumption, according to the previous reasoning with reference to figure 1, for the given characteristics of the HDD 48, the SDRAM 43, 44 and the rate of bit stream of the stream.

Therefore, the buffer size is determined in a number of banks / chips and therefore the actual calculated number will be rounded to a whole number of banks for implementation reasons.

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In a dynamic configuration with multiple simultaneous streams, two different situations are distinguished. First, when the scheduler supports a new stream, and second, when the scheduler stops and removes a stream. The first case is achieved by activating additional memory banks. For the second case, it has to be considered that the memory banks that still contain buffered data should not be turned off, otherwise the data will be lost. Therefore, the shutdown of such a memory bank is either delayed for example or the buffered data of that memory bank is moved to another memory bank which will remain activated, after which the first memory bank.

The scheduler 42 or both the scheduler 42 and the application 41 can be realized as dedicated circuits 1 (ASIC, Application-Specific Integrated Circuit) or one or more programmed microprocessors, thus providing a processing unit 60 that carries out this embodiment of the procedure according to the invention.

A further embodiment of the invention is illustrated in Figure 5, which shows a computer-readable medium 5. Computer-readable medium 5 is any data storage device that can store data, which can then be read by a computer system. Examples of computer-readable media include hard drives, Network Attached Storage (NAS), read-only memory, random access memory, CD-ROM, CD-R, CD-RW, magnetic tapes, and other optical and non-optical data storage devices. The computer-readable medium can also be distributed through a computer system attached to the network so that the computer-readable code is stored and executed in a distributed manner.

A computer-readable medium 5 has implemented therein a computer program for processing by a computer 55. The computer program comprises a plurality of code segments 56, 57, 58, 59 to adaptively minimize the total power consumption of a subsystem comprising a mass storage device and a buffer memory. By means of the code segments an optimal buffer size is calculated for which the power consumption of said subsystem is minimal for a given streaming bit rate from said buffer. Furthermore, by means of the code segments, the buffer size of said buffer is adjusted to said optimal buffer size, so that the power consumption of said subsystem is minimal. More precisely, when for example a HDD scheduler starts a new stream, the code segment 56 determines the HDD data rate. An additional code segment 57 determines the stream bit rate to / from the buffer. Subsequently, the optimal buffer size, that is, the buffer size at the above-described minimum of subsystem power consumption, is determined by the code segment 58. When code segment 58 determines the optimal buffer size that guarantees the lowest power consumption of the subsystem, this optimal buffer size is adjusted by code segment 59. Subsequently, the subsystem operates with the lowest possible power consumption for a given streaming bit rate.

The applications and use of the above-described computer-readable method, device and medium according to the invention are diverse and include exemplary fields such as the field of portable devices, for example portable digital video cameras, personal digital assistants (PDAs ), but additionally also other systems that comprise the aforementioned subsystem, in which energy reduction is important. For example, the field of computer servers that have a large number of such subsystems and in which it is desired to minimize dissipated heat, which is proportional to the energy consumed.

The present invention has been described above with reference to specific embodiments. However, embodiments other than the preferred ones above are also possible within the scope of the appended claims, for example mass storage devices other than those described above, which implement the above-mentioned procedure by hardware or software, etc.

Furthermore, the term "comprising / comprising", when used in this specification, does not exclude other elements or steps, the terms "a" and "a" do not exclude a plurality and a single processor or other units may fulfill the requirements. functions of several of the circuits or units set forth in the claims.