Glucose test data acquisition and management system

IS 2 162 176 T3

DESCRIPTION

Zero power reception detector for serial data interconnection.

This invention relates to a zero power receive detector for a serial data interface. Communication line drivers dissipate considerable power. In a normally battery powered system, such dissipation should be kept to a minimum to increase battery life. This problem is solved by the use of a zero power reception detector according to claim 1.

Previous technique

Today, instruments of various types for glucose monitoring by reading a test strip are in common use. There are, for example, the ACCUTREND, ACCU-CHEK II, ACCU-CHEK III and ACCU-CHEK EASY instruments, all of which are available from Boehringer Mannheim Corporation, 9115 Hague Road, Indianapolis, Indiana 46250-0528, USA. There are also the instruments described in US patents: 4,685,059; 4,168,469; 4,747,060; 4,751,648; 4,791,570; 4,882,704; 4,882,705; 4,902,948; 3,907,503; 3,980,437; 4,160,646; 4,509,859; 4,676,653; 4,871,258; 4,934,817; 5,037,614; 5,039,615; 5,053,199; 5,059,394; 5,055,261; 5,047,351; 4,791,461; 4,309,112; 3,989,383; 3,881,992; and 4,093,849, in published European patent application EP 387,630 A2; Japanese published patent applications 63-269,046 and 63-61,147, German published patent application 2,319. 465; in Diabetes, vol. 33, Supplement 1, edited May 1984, by D. Michaels et al., "A reflectance glucose meter with memory for automatic data recording", entry 498, p. 103A, in Diabetes, vol. 33, Supplement 1, edited May 1984, by J. Silverstein et al., "Comparison of systems for monitoring blood glucose with an ACCU-CHEK meter and a glucometer", entry 502, p. 131A, in Diabetes, vol. 33, Supplement 1, edited May 1984, by D. Hiennen et al. "Accuracy check of 11 machines for glucose monitoring, for home use", entry 503, p. 131A, and in Diabetes, vol. 33, Supplement 1, edited May 1984, by VG Kuykendall et al., "Information management for reflectance photometer for glucometer with memory", entry 507, page. 132A.

U.S. Patent 5,153,416 describes a portable, microcomputer-controlled device that includes a barcode reader for reading the barcode from a patient's identification bracelet and for printing sample bottle labels, which include the identification of samples. a patient, the test (s) to be performed on the samples, the time, the date and the like. US Patents 4,118,687 and 4,121,574 also describe bar code readers for use in this field. US Patent 3,872,448 describes a data management system for hospitals. US Patent 4,715,385 describes a patient monitoring system with a detachable surveillance signal processing section, which can be plugged into stationary or mobile display devices to activate them. US Patents 4,890,832; 4,523,297 and 4,853,682 all describe systems having a common component, such as a base, and various special components adaptable to the base. US Patent 4,571,702 describes a remote zero power program storage and retrieval system. US Patent 5,110,226 describes a system that communicates with an external computer. US Patents 4,731,726 and 5,019,974 describe diabetes management systems. US Patents 4,519,398; 4,546,436 and 4,779,199 describe monitors for patients.

Many healthcare providers, such as hospitals, have substantial numbers of instruments, of various types, for measuring glucose, with which numerous glucose level measurements are carried out each day on numerous patients. Instruments have typically been purchased by the healthcare provider at different times and therefore different types of instruments are routinely used. Generally, it is desirable to retain patient glucose level readings and related data for extended periods of time in order to be able to perform certain calculations, such as statistical studies, on such data, and print hard copies. raw data, calculation results, etc. Often times, the glucose monitoring instruments themselves are not equipped to connect to, for example, printers, in order to provide hard copies. Similarly, glucose measuring instruments, themselves, may lack the ability to store large numbers of glucose readings from patients or to perform desired calculations, even on the small number of readings they are prepared for. to stock.

Description of the invention

An instrument has the ability to: (1) interface with a printer to print quality control reports, patient records, and the like; (2) storing patient glucose readings and related data in larger numbers than glucose measuring instruments typically are capable of storing; (3) perform various calculations on the data; (4) interconnect several different types of glucose measurement instruments and a "portable" type computer, which is capable of providing even greater possibilities of data storage and calculation capacity than the instrument of the invention itself; and (5) provide a system hang if the unit's quality control results fall outside of a range.

A system is provided to adapt one of several different types of instruments to a common protocol. Each instrument has a first serial input-output (I / O) port, first means of controlling the serial port of

ES 2

I / O, and second means for supplying operating current to the instrument. The system includes one type of housing for each different type of instrument. Each type of housing includes means defining openings through which selected displays and controls of a respective one of the instruments can be accessed. Each housing includes third means for coupling to a respective type of instrument's first serial I / O port and fourth means for coupling to a respective type of instrument's second means.

Illustratively, the second means comprises a battery enclosure having first and second battery terminals. The fourth means comprise a battery emulator having third and fourth terminals for application with the first and second battery terminals, respectively, when an instrument of the respective type is arranged in a housing of the respective type. Fifth means couple the third and fourth terminals through an operating current source for the respective instrument.

Also illustratively, the apertures include an aperture for an on / off control for a respective instrument, an aperture for the display of warning / test results for the respective instrument, and an aperture for introducing unreacted / unreacted test strips. have reacted for the respective instrument. Illustratively, the apertures further include an aperture through which a timer control for a respective instrument can be accessed.

Additionally illustratively, the third means comprise a first microprocessor. Sixth means are provided for conditioning the signals at the first I / O gate. There are seventh means provided for coupling the first I / O port to the sixth means. Eighth means are provided for coupling the sixth means to the first microprocessor.

Also illustratively, the system also includes a data processing module. The data processing module includes a first multi-conductor connector. Each type of housing includes a second multi-conductor connector, for connection to the first multi-conductor connector, when a respective housing is coupled to the data processing module.

Illustratively, the data processing module further comprises first sliding means. Each type of housing further includes complementary second slide members for engagement with the first slide members, when a respective housing is coupled with the data processing module.

Illustratively, the data processing module further comprises a power supply source for the data processing module. Ninth media couple the power supply via a pair of conductors from the first multi-conductor connector. The coupling of a respective housing with the data processing module

176 T3 4 connects that respective housing, its first respective microprocessor and a respective instrument housed in that respective housing, with the power supply of the data processing module.

Illustratively, the data processing module further comprises two means for coupling the data processing module to an external power supply source, and a twelfth means for coupling the external power supply via a pair of conductors of the first multi-conductor connector. Coupling a respective housing to the data processing module connects that respective housing, its respective first microprocessor, and a respective instrument housed in that respective housing, with the external power supply.

Also illustratively, the data processing module further comprises a second microprocessor having a second microprocessor I / O. Twelfth means couple respective conductors of the first multi-conductor connector via a first set of I / O pins of the second microprocessor. Thirteenth means couple a second set of I / O pins of the second microprocessor with respective terminals of the second serial I / O port.

Also illustratively, the thirteenth media comprise an RS232 to transistor-transistor logic (TTL) / TTL to RS232 interface.

In addition, illustratively, the thirteenth means comprise an optical isolator. A data receiving terminal of the second serial I / O port is coupled to a light source portion of the optic isolator. Fourteenth halves couple a photo-activated switch portion of the optic isolator to a RS232 to TTL received data output terminal of the RS-232 to TTL / TTL to RS232 interconnect.

The fourteenth media comprise a second microprocessor I / O interrupt pin.

Additionally, fifteenth media switches power to the RS-232 to TTL / TTL to RS232 interconnect. The fifteenth media are coupled to the second media, to an operating power terminal of the RS-232 to TTL / TTL to RS232 interconnect, and to the second microprocessor I / O interrupt pin. The reception of data in the data reception terminal of the second serial I / O port causes current to be fed from the second media to the operating current supply terminal of the RS232 to TTL / TTL to RS232 interconnection, to activate the RS-232 to TTL / TTL to RS232 interface and to activate a switch on the RS232 to TTL output terminal of the RS-232 to TTL / TTL to RS232 interface.

In accordance with the invention, a zero power receive detector is provided for a serial data interface including a data receiving terminal, a received serial data output terminal, and a serial data terminal.

ES 2 162 176 T3 of operating current supply. The detector comprises first means for supplying operating current to the interface, and second means for connecting and disconnecting current to the interface. The second means are coupled between the first means and the operating power supply terminal of the interconnect. Third means are provided for coupling a light source portion of an optic isolator to the data receiving terminal. Middle quarters couple a photo-activated switch portion of the ooptic isolator with the second half.

Illustratively, in accordance with the invention, the fourth means fixes the second means in its state in which current is supplied from the first means to the operating current supply terminal.

Also illustratively in accordance with the invention, the fourth means disable the second means by preventing them from responding to more signals from the photo-activated switch portion of the ooptic isolator.

Furthermore, illustratively, according to the invention, fifth means switches the serial data output line with the received serial data output terminal. These fifth means are coupled between the received serial data output terminal and the received serial data output line. Illustratively, the fourth means switch to the second means. Also illustratively, the fourth media comprises a microprocessor.

Brief description of the drawings

The invention can be better understood by referring to the following description and accompanying drawings, which illustrate the invention. In the drawings:

Fig. 1 illustrates an exploded perspective view of an instrument;

Fig. 2 illustrates a perspective view of the instrument of Fig. 1 assembled, with a housing containing one of the glucose measuring instruments with which the instrument of Fig. 1 can be interconnected, removed from oil;

Fig. 3 illustrates the glucose measuring instrument of Fig. 2 and its housing in an exploded perspective;

Fig. 4 illustrates, partially in block form and partially in schematic form, a circuit contained within the housing of Fig. 3;

Fig. 5 illustrates another glucose measuring instrument with which the instrument of Fig. 1 and the housing for that glucose measuring instrument can be interconnected in an exploded perspective;

Fig. 5a illustrates an enlarged, fragmentary sectional view of a detail of Fig. 5 taken generally along section lines 5a-5a of Fig. 5;

Fig. 6 illustrates, partially in block form and partially schematic, a circuit contained in the housing of Fig. 5;

Fig. 7 illustrates another glucose measuring instrument with which the instrument of Fig. 1 can be interconnected, and the housing for that glucose measuring instrument in exploded perspective;

Fig. 8 illustrates, partially in block form and partially in schematic form, a circuit contained in the housing of Fig. 7;

Fig. 9 illustrates another glucose measuring instrument with which the instrument of Fig. 1 can be interconnected, and the housing for that glucose measuring instrument in exploded perspective;

Fig. 10 illustrates, partially in block form and partially in schematic form, a circuit contained in the housing of Fig. 9; and Fig. 11 illustrates, partially in block form and partially schematic, circuits contained in the instrument of Fig. 1.

Ways to put the invention into practice

Fig. 1 illustrates an exploded perspective view of a remote glucose test station (GTS) 40 for incorporating a selected one of several different glucose meters, illustratively the ACCU-CHEK II 42, ACCU-CHEK III meters. 44, ACCU-CHEK EASY 46, and ACCUTREND 48 from Boehringer Mannheim Corporation. The GTS 40 includes the ability to store data, such as date, time, glucose reading and patient identifier, related to various glucose readings of each of several patients, taken from meter 42, 44, 46 or 48 in built-in oil, to provide this information (a) in formats suitable for a printer (not shown) coupled to a printer port of the GTS 40 and / or to supply this information in such formats to a hospital data management (HDM) system (not shown ) through a door provided for such communication in the GTS 40. A suitable printer is one supported by the IBM / Epson standard. A suitable HDM system would be, for example, the DEC320P portable computer (Model PCP11) from Digital Equipment Corporation. The GTS 40 also includes a barcode reader door for coupling a barcode reader (not shown) such as, for example, a Welch Allyn model 6180 / A-25999247 barcode reader to the GTS. 40.

The GTS 40 includes a top 50 with a recess 52 for a keyboard 54. The keyboard 54 is provided with an opening 56 covered by a lens 58 through which a display 60 is visible. In the upper part 50 a cavity 61 is provided for, for example,

ES 2 a vial of blood glucose test strips, unreacted. A mid-board 62 on which the GTS main printed circuit board (PCB) 64 and other GTS hardware are mounted, is captured between the top 50 and base 66 of the GTS by appropriate threaded fasteners extending downward. up through base 66 and midplate 62 and into top 50. PCB 64 is mounted on midplate 62 by means of appropriate threaded fasteners. The base 66 is provided with a central battery cavity 68, which houses, for example, six "C" -type batteries (not shown) which are inserted into the cavity 68 from below the base 66. A cover 70 for the battery cavity The batteries are snap-mounted in the closing orientation to close the cavity 68.

A storage drawer 72 can be slid between base 66 and midplate 62. A lid 74 is hinged at 75 at the rear of base 66. Drawer 72 is prevented from being inadvertently slid out of base 66 and the lid 74 is prevented from inadvertently opening when closed, by applying a tab 76 on the front of the drawer 71, into an opening 78 in the front of the lid 74. Drawer 72 is provided with left and right storage compartments 80, 82, respectively, each of which can accept longitudinal 84 or transverse 86 dividers to divide compartment 80, 82 into smaller compartments. These compartments are convenient for storing bandages, antiseptic swabs and other equipment necessary for taking, for example, blood samples from finger pricks of diabetic patients for measurements with a 42, 44, 46 or 48 glucose meter , incorporated into the GTS 40 in a way that was described.

The central area 90 of drawer 72 is provided with a "comment code" graphic 92 which desirably contains comments to the patient record data, encoded in the form of barcodes. In operation, a healthcare provider may wish to add comments to data in a patient's record after a reading is taken for storage in the GTS 40. The healthcare provider can take the correct code from graph 92, run the barcode reader over the barcode that accompanies that comment, and enter that comment along with the patient's record data. A connector 96 and associated insulated conductors feed current from battery cavity 68 to battery power socket 98 on PCB 64. Alternatively, current may be fed from an external low voltage direct current source, through a socket 100 accessible through the rear of the base 66 and associated insulated conductors, to a connector 102 and an external socket. 104 DC power supply, provided on PCB 64. A barcode reader door 106 is accessible with the cover 74 closed or open via notches 110, 112 on the lower left side edges of the top 50 and the cover 74, respectively. Insulated and connected conductors

176 Appropriate T3 8 res extend from port 106 and an I / O port 108 (RS232) to sockets 114, 116 provided on PCB 64, for bar code input and serial I / O, respectively. A printer door 118 mounted on PCB 64 is accessible with cover 74 open, thanks to notch 110.

The area 120 on the front right side of the top 50 is generally flat and is provided with a pair of somewhat inverted, parallel L-cross section sliders 122. As best illustrated in Fig. 2, these sliders 122 allow one of four housings 124 (Figs. 2-3), 126 (Fig. 5), 128 (Fig. 7), 130 (Fig. 9), each one of them provided with a pair of parallel sliders 125, 127, 129, 131, complementary, respectively, is made to slide from the right on the sliders 122 until the respective housing 124, 126, 128, 130 occupies the area 120. An appropriate threaded fastener can then be inserted through base 66 into an opening (not shown) provided for this in the bottom of housing 124, 126, 128, 130, in order to lock housing 124, 126, 128, 130 on the GTS 40. A nine-pin connector 132 provided on PCB 64 plugs into a complementary connector socket 134, 234, 334, 434, associated with the respective housing 124, 126, 128, 130, when housing 124, 126, 128, 130 it has been slid all the way into place on the GTS 40. By this act, all required electrical connections are made between the meter in housing 124, 126, 128 or 130 and the remaining electronics of the GTS 40.

Housing 124 and its contents are best illustrated in FIG. 3, which is an exploded perspective view of these components. The meter 42 illustrated is an ACU-CHEK II blood glucose meter from Boehringer Mannheim Corporation. Housing 124 includes a housing bottom 138 provided with the previously mentioned sliders 125 and a back 140 extending generally perpendicular to bottom 138. A wall 142 extends forward from the back 140, along the left edge of the bottom 138, to mount the connector socket 134. An insulated multi-conductor cable 144 extends from socket 134 to complementary connectors 146, 148 provided on a printed circuit board (PWB) 150, on which is mounted an adaptive communications processor (ACP) 152, illustrated in Partially blocky and partially schematic circuit form in Fig. 4. The PWB 150 was mounted on the bottom 138 at its rear, next to the back 140, using appropriate threaded fasteners. The meter 42 is electrically connected to the circuitry of the PWB 150 via a complementary connector 154 and socket 156. Connector 154 is mounted on PWB 150. Socket 156 is provided at one end of an insulated, multi-conductor cable 158, whose conductors are divided into two groups between the ends of cable 158 and provided with separate adapter sockets, 160 and 162, to supply current to meter 42, and connection to the serial I / O port of the

ES 2 162 176 T3 meter 42, respectively.

The upper part 124 of the housing is divided into a rear part 164 and a front part 166, which are hinged to each other at 168. The rear upper part 164 is secured to the bottom 138 by a suitable threaded fastener that simultaneously captures the PWB 150 between the rear upper part 164 and the bottom 138 and by elastic-like fasteners 170 provided in the bottom 138, which they are snap-fitted into openings 179 provided for them in a front wall 174 of the upper rear portion 164. The gauge 42 is retained in position within the housing 124 by a mounting 176 provided along its front and rear edges with elastic fasteners 179, like nails, which engage in openings 180 provided for them in the front and rear walls. , 182, from the front top 166. The snap mount application of fasteners 178 in openings 180 captures meter 42 against the underside of the front top 166 and offers user interface of meter 42 (i.e., your display 184, your reader 185 of calibration bar code, slot 186 for test strips that have already reacted, timer button 188 and ON / OFF button 190) in appropriate locations 192, 193, 194, 196, 198 of the front top 166. Small hook and loop synthetic material circles 200, VELCRO, provided on the bottom 138 and on the underside of the mount 176, normally hold the front top 166 in a closed orientation. The hinged mount 168 from the front top 166 to the rear top 164, the VELCRO fasteners 200, and an opening 199 provided in the mount 176, allow the front top 166 to be lifted and the calibration code calibration strip to be lifted. bars for a vial of unreacted glucose test strips, is fed to the calibration bar code reader 185 and retrieved as it exits port 199.

The following block, schematic, and circuit diagram descriptions identify specific integrated circuits and other components and, in many cases, specific sources for them. Specific terminal and pin names and numbers are generally given in conjunction with them for a more complete description. It is to be understood that these terminal and pin identifiers are offered for these specifically identified components. It is to be understood that this does not constitute a representation, nor should it be inferred from this that the sources or specific components are the only available ones of those or any such components. other sources, capable of performing the necessary functions. It should further be understood that other suitable components, available from the same or different sources, may not use the same terminal / spike identifiers as offered in the description.

Turning now to Fig. 4, meter 42 is activated by a MeTeRPoWeR potential feed, maintained through the two conductors, pins 1 and 2, associated with socket 160. One of these conductors is also ground. for the ACP 152. The I / O of the meter 42 is provided through the three conductors associated with the socket 162. The ACP 152 associated with the meter 42 includes a microprocessor (> P) 204 Intel 80C51, mounted on the PWB 150 . The nine socket sockets 134 are coupled as follows: socket sockets 1, 2, 4, 7 and 9 to the ground of the system; pin receptacle 3 is the data transmission terminal (TXD) of the ACP 152; pin receptacle 5 is the data receiving terminal (RXD) of the ACP 152; spike receptacle 6 mates with terminal P2.4 of pP 204; and the pin receptacle 8 is coupled with the supply V_DC. Pin 3 of socket 162 mates with pin 2 of socket 160. The ungrounded terminals, pins 4 and 5, of socket 162 are coupled through respective inductors of an ESD / EMI protector in common mode (rolled in a common core), to terminals P0.1 and P0.7, respectively, of pP 204. The terminals of TXD and RXD, receptacles 3 and 5, respectively, of socket 134, are coupled to the terminals of TXD and RXD, respectively, from pP 204.

Terminal P0.1 of pP 204 is also coupled, through a 100Ω resistor, to the control electrode of a Siemens field effect transistor (FET) 208 type BSS138. The drive electrode of the FET 208 is coupled to V_DCthrough a 0.47 // F capacitor and to ground through a 1ΜΩ resistor. The source electrode of the FET 208 is coupled to ground, its output electrode is coupled to V_DC through a resistance of 100Ω, to the control electrode of a FET 210 Siemens type BSS84 through a capacitor of 0.47 // F and directly to the output electrode of a FET 212 type BSS138. The control electrode of the FET 210 is coupled with V_DC across a 100Ω resistor. The source electrode of the FET 212 is coupled to ground. The drive electrode of the FET 212 is coupled to terminal P2.2 of pP 204. The source electrode of the FET 210 is coupled to V_DC. The output electrode of the FET 210 is coupled to the RST terminal of pP 204 and to ground through a 4.75Ω resistor. Terminals INT1 and EA of pP 204 are coupled, through respective resistors from 10Ω to V_DC. The V terminal_DC of pP 204 is coupled to V_DC and, through a 0.1 // F capacitor to ground. The GND (GND) terminal of pP 204 is coupled to ground. Terminals P1.2, P1.3 and P1.4 of pP 204 are coupled to ground, through respective 100Ω "customization" resistors, which match the characteristics of meter 42 for ACP 152. Terminal P2. 3 of pP 204 is coupled to the control electrode of a FET 216 type BSS138. The source electrode of the FET 216 is grounded. The output electrode of the FET 216 is coupled with V_DC through a 1Ω resistor and directly to the command electrode of a Samsung FET 220 type IRFR9020. The source electrode of FET 216 is coupled to ground. The source electrode of the FET 220 is

ES 2 coupled with V_DC. The output electrode of the FET 220 is coupled to the terminal of the MeTeRPoWeR. A time base for the ACP 152 is provided by a 1.8432MHz crystal coupled across the X1-X2 terminals of the μΡ 204. Each of the X1 and X2 terminals of the μΡ 204 is also coupled to ground through of a respective 33 pF capacitor.

Housing 126 and its contents are best illustrated in FIG. 5, which depicts an exploded perspective view of these components. The illustrated meter 44 is an ACCU-CHEK III blood glucose meter from Boheringer Mannheim Corporation. Housing 126 includes a housing bottom 238 provided with the aforementioned sliders 127 and a back 240 extending generally perpendicular to bottom 238. A wall 242 extends forward from the back 240, along the left edge of the bottom 238, to mount the connector socket 234. An insulated multi-conductor cable 244 extends from socket 234 to connector 246 provided on a PWB 250 on which an ACP 252 is mounted, illustrated as a partially block circuit and partially schematic in Fig. 6. The PWB 250 is mounted to the bottom 238 using appropriate threaded fasteners.

The meter 44 is electrically connected to the circuitry of the PWB 250 via a complementary connector 254 and socket 256. The connector 254 is mounted on the PWB 250. The socket 256 is provided at one end of an insulated multi-conductor cable 258, the other end of which is provided with a socket 262 for connection to the socket of the serial I / O port. meter 44. The meter 44 is also coupled to the circuitry of the PWB 250 by a battery emulator 261 that fits into the battery cavity of the meter 44 when the battery cavity cover has been removed from it. The general configuration of battery emulator 261 can best be appreciated by reference to Fig. 5a, which is a fragmentary, sectional view taken generally along section lines 5a-5a of Fig. 5. The current to operate the meter 44 is fed from the circuitry of the PWB 250, best illustrated in FIG. 6, through the emulator 261 to the meter 44, to operate it. The top 264 of the housing 126 is secured to the bottom 238 by a suitable threaded fastener. Meter 44 is held in position within housing 126 by four meter positioning tabs 276, provided on PWB 250 by battery emulator 261 and captured between mounted PWB 250 and top 264 of housing 126. This The provision presents the user interface of the meter 44 (that is, its screen 284, the reader

285 gauge bar code, the slot

286 for test strips that have already reacted, the timing button 288 and the ON / OFF button 290) in appropriate locations 292, 293, 294, 296, 298 on the top 264.

176 T3 12

Turning now to Fig. 6, meter 44 is powered by the MeTeRPoWeR potential feed maintained across the two pairs of conductors, pins E2, E4 and E1, E3, associated with battery emulator 261. A pair, E1, E3, of these conductors also constitute the mass of the ACP 252. A 0.00 ^ F capacitor is coupled between E2, E4 and E1, E3. The I / O of meter 44 is provided through the three conductors associated with socket 262. The ACP 252 associated with meter 44 includes an Intel 80C51 μP 304, mounted on PWB 250. The nine socket receptacles 234 are coupled as follows: spike receptacles 1, 2, 4, 7, and 9 to system ground; receptacle for pin 3 is the TXD terminal of ACP 252; pin receptacle 5 is the RXD terminal of the ACP 252; pin receptacle 6 is coupled to terminal P2.4 of µP 304 and pin receptacle 8 is coupled to the Vcc power supply.

The pin 1 of the socket 262 is coupled to the ground of the system. Pins 2 and 3 of socket 262 are coupled to terminals P0.1 and P0.7, respectively, of μP 304. Terminals of TXD and RXD, receptacles 3 and 5, respectively, of socket 234 are coupled to terminals of TXD and RXD, respectively, of the µP 304. The P0.1 terminal of the µP 304 is also coupled through a 100Ω resistor to the command electrode of a BSS138 type FET 308. The control electrode of the FET 308 is coupled with V_DC through a 0.47μF capacitor and to ground through a 1ΜΩ resistor. The source electrode of the FET 308 is grounded. The output electrode of the FET 308 is coupled through a 100Ω resistor with V_DC, through a 0.47μF capacitor with the command electrode of a FET 310 type BSS84 and directly with the output electrode of a FET 312 type BSS138. The control electrode of the FET 310 is coupled with V_DC across a 100Ω resistor. The source electrode of the FET 312 is coupled to ground. The drive electrode of the FET 312 is coupled to terminal P2.2 of the μP 304. The source electrode of the FET 310 is coupled with Vcc. The output electrode of the FET 310 is coupled to the RST terminal of the μP 304 and to ground, through a 4.75Ω resistor. The INT 1 and EA terminals of the μP 304 are coupled with V_DC, through respective 10Ω resistors. The V terminal_DC of the μP 304 is coupled to V_DC and to ground through a ^ F capacitor. The GND (GROUND) terminal of the μP 304 is coupled to ground.

Terminals P1.2 and P1.4 of μP 304 are coupled to ground through respective 100Ω resistors. Terminal P1.3 of μP 304 is coupled to V_DC across a 10Ω resistor. Terminal P2.3 of μP 304 is coupled to the drive electrode of a Type BSS84 FET 316 and to the drive electrode of a Type BSS138 FET 318. The source electrode of the FET 316 is coupled to V_DC. The source electrode of the FET 318 is coupled to ground. The output electrode of the FET 316 is coupled to the output electrode of the FET 318 through a resistor of

IS 2 162 176 T3

100Ω. A PoWeR op amp for a National Semiconductor 320 difference amplifier, type LP339M, is powered from the output electrode of the FET 316. The output electrode of the FET 318 is coupled to the drive electrode of a FET 322 type IRFR9020. The source electrode of the FET 322 is coupled to V_DC. The output electrode of the FET 322 is coupled to the source electrode of a BSS84 type FET 324. The output electrode of the FET 324 is coupled to the inverting input terminal (-) of the amplifier 320 and, through a 300Ω resistor, to the output terminal of the amplifier 320. The command electrode of the FET 324 is coupled to the terminal P2.3 of μΡ 304. The output electrode of the FET 322 and the source electrode of the FET 324 are coupled to MeTeRPoWeR. The non-inverting (+) input terminal of amplifier 320 is coupled to OAPWR through a 1Ω resistor and to the cathode of a 1N5225B type Zener diode, the anode of which is grounded. A time base for the ACP 252 is provided by a 1.8432MHz crystal coupled across the X1-X2 terminals of the μP 304. Each of the X1 and X2 terminals of the μP 304 is also coupled to ground through of a respective 33pF capacitor.

Housing 128 and its contents are best illustrated in FIG. 7, which depicts an exploded perspective view of these components. The illustrated meter 46 is an ACCU-CHEK EASY blood glucose meter from Boheringer Mannheim Corporation. Housing 128 includes a housing bottom 338 provided with the aforementioned sliders 129 and a back 340 extending generally perpendicular to bottom 338. A wall 342 extends forward from the back 340, along the left edge of the bottom 338, to mount the connector socket 334. An insulated multi-conductor cable 344 extends from socket 334 to mating connectors 346, 348, provided on a PWB 350 on which an ACP 352 is mounted, illustrated as a partially block circuit and partially schematic in Fig. 8. PWB 350 is mounted to bottom 338 using appropriate threaded fasteners. The meter 46 is electrically connected to the circuitry of the PWB 350 via a complementary connector 354 and socket 356. The connector 354 is mounted on the PWB 350. The socket 356 is provided at one end of an insulated multi-conductor cable 358, the other end of which is provided with a plug 362 for connection of the PWB 350 with the I / O serial port. S of meter 46. A battery emulator 361, of configuration no different from that of the emulator 261 of Figs. 5 and 5a, it is provided in the PWB 350 to supply the operating current of the meter 46.

A socket 363 for a ROM code key is provided on the PWB 350 for the purpose set forth in US Patent 5,053,199. The various terminals of socket 363 are electrically connected via a socket 365 provided on the PWB 350, a socket 367, an insulated multi-conductor cable 369, and a code key emulator socket 371 in

ROM, with the meter's ROM code key socket 46. Housing 128 includes a top 364 secured to bottom 338 by a suitable threaded fastener. Meter 46 is held in position within housing 128 by two meter positioning tabs 376, provided on PWB 350 by battery emulator 361 and captured between mounted PWB 350 and top 364 of housing 128. This arrangement presents the user interface of the meter 46 (that is, the ROM code key socket 363 of the housing 128, the display 384, the slot 386 for test strips that have already reacted and the ON / OFF pushbutton 390 ) in appropriate places 392, 394, 396, 398 of the top 364.

Turning now to Fig. 8, meter 46 is powered by the MeTeRPoWeR potential feed maintained across the two pairs of conductors, pins E2, E4 and E1, E3, associated with battery emulator 361. A pair, E1, E3, of these conductors also constitute the mass of the ACP 352. A 0.00 ^ F capacitor is coupled between E2, E4 and E1, E3. The I / O of meter 46 is provided through the three conductors associated with socket 362. The ACP 352 associated with meter 46 includes an Intel 80C51 μP 404, mounted on PWB 350. The nine spike sockets of socket 334 are coupled as follows: spike sockets 1, 2, 4, 7, and 9 to system ground; receptacle for pin 3 is the TXD terminal of the ACP 352; pin receptacle 5 is the RXD terminal of the ACP 352; pin socket 6 is coupled to terminal P2.4 of µP 404 and pin socket 8 is coupled to the Vcc power supply.

The pin 1 of the socket 362 is coupled to the ground of the system. Pin 3 of socket 362 is coupled to terminal P0.7 of µP 404. Terminals TXD and RXD, pins 3 and 5, respectively, of socket 334 are coupled to terminals TXD and RXD, respectively, of µP 404. Terminal P0.7 of μP 404 is also coupled through a 100Ω resistance to the control electrode of a BSS138 type FET 408. The drive electrode of the FET 408 is coupled with V_DC through a 0.47μF capacitor and to ground through a 1 MΩ resistor. The source electrode of the FET 408 is grounded. The output electrode of the FET 408 is coupled through a 100Ω resistor with V_DC, through a 0.47μF capacitor with the command electrode of a FET 410 type BSS84 and directly with the output electrode of a FET 412 type BSS138. The control electrode of the FET 410 is coupled with V_DC across a 100Ω resistor. The source electrode of the FET 412 is coupled to ground. The drive electrode of the FET 412 is coupled to terminal P2.2 of the µP 404. The source electrode of the FET 410 is coupled to Vcc. The output electrode of the FET 410 is coupled to the RST terminal of the µP 404 and through a 4.75Ω resistance to ground. Terminal EA of μP 404 is coupled to V_DC through a 10Ω resistor. The terminal

ES 2 of V_DC del μΡ 404 is coupled to V_DC and, through a 1μΡ capacitor, to ground. The GND (GND) terminal of the μΡ 404 is coupled to ground. Terminal P1.2 of μΡ 404 is coupled to V_DCacross a 10 ΚΩ resistor. Terminals P1.3 and P1.4 of the μΡ 404 are coupled to ground through respective 100Ω resistors. Terminal P2.3 of the μΡ 404 is coupled to the command electrode of a BSS138 type FET 416. The source electrode of the FET 416 is coupled to ground and its output electrode is coupled to V_DC through a 1Ω resistor and directly to the control electrode of a FET 418 type IRFR9020. The source electrode of the FET 418 is coupled to V_DC and the output electrode of the FET 418 is coupled to the terminal E2, E4 of the MeTeRPoWeR associated with the battery emulator 361.

Housing 130 and its contents are best illustrated in FIG. 9, which depicts an exploded perspective view of these components. The illustrated meter 48 is an ACCU-TREND blood glucose meter from Boheringer Mannheim Corporation. Housing 130 includes a housing bottom 438 provided with the aforementioned sliders 131 and a back 440 extending generally perpendicular to bottom 438. A wall 442 extends forward from the back 440, along the left edge of the bottom 438, to mount the connector socket 434. An insulated, multi-conductor cable 444 extends from socket 434 to complementary connectors 446, 448 provided on a PWB 450 on which an ACP 452 is mounted, illustrated as a partially block circuit and partially schematic in Fig. 10. The PWB 450 is mounted on the bottom 438, at its rear, next to the back 440, by appropriate threaded fasteners. The meter 48 is electrically connected to the circuitry of the PWB 450 via a complementary connector 454 and socket 456. Connector 454 is mounted on PWB 450. Socket 456 is provided at one end of an insulated, multi-conductor cable 458 provided with a socket 462 to provide a connection to the serial I / O port of meter 48. A battery emulator 461 of similar configuration to that of the battery emulators 261, 361 of Figs. 5-5a and 7, is provided on PWB 450 to supply operating current to meter 48. Housing 130 includes a top 464 secured to bottom 438 by a suitable threaded fastener that simultaneously captures PWB 450 between top 464 and bottom 438. Meter 44 is held in position within housing 130 by the emulator. 461 battery and being trapped between the mounted PWB 450 and the top 464 of the housing 130. This arrangement presents the user interface of the meter 48 (that is, its display 484, the slot 486 for test strips that have already reacted, and the ON / OFF pushbutton 490) in appropriate places 492, 494, 496 of the part. superior 464.

Turning now to Fig. 10, meter 48

176 T3 16 is activated by the MeTeRPoWeR potential feed maintained across the two pairs of conductors, pins E2, E4 and E1, E3, associated with battery emulator 461. A pair, E1, E3, of these conductors also make up the mass of the ACP 452. A 0.00 ^ F capacitor is coupled between E2, E4 and E1, E3. The I / O for meter 48 is provided through the three associated conductors, socket 462. The ACP 452 associated with meter 48 includes an Intel 80C51 μΡ 504, mounted on PWB 450. The nine socket receptacles of socket 434 will be coupled as follows: the socket receptacles 1, 2, 4, 7 and 9 to the ground of the system; receptacle for pin 3 is the TXD terminal of the ACP 452; pin receptacle 5 is the RXD terminal of the ACP 452; pin receptacle 6 is coupled to terminal P2.4 of μΡ 504 and pin receptacle 8 is coupled to Vcc power supply.

Pin 1 of socket 462 is coupled to the ground of the system. Pins 2 and 3 of socket 462 are coupled to terminals P0.1 and P0.7, respectively, of μΡ 504. Terminals of TXD and RXD, receptacles 3 and 5, respectively, of socket 434 are coupled to terminals of TXD and RXD, respectively, of the μΡ 504. The P0.1 terminal of the μΡ 504 is also coupled through a 100ΚΩ resistance to the command electrode of a FET 508 type BSS138. The control electrode of the FET 508 is coupled with V_DC through a 0.47μF capacitor and to ground through a 1ΜΩ resistor. The source electrode of the FET 508 is grounded. The output electrode of the FET 508 is coupled through a 100Ω resistor with V_DC, through a 0.47μF capacitor with the command electrode of a FET 510 type BSS84 and directly with the output electrode of a FET 512 type BSS138. The drive electrode of the FET 510 is coupled with V_DC across a 100Ω resistor. The source electrode of the FET 512 is coupled to ground. The drive electrode of the FET 512 is coupled to terminal P2.2 of the μΡ 504. The source electrode of the FET 510 is coupled with Vcc. The output electrode of the FET 510 is coupled to the RST terminal of the μΡ 504 and to ground, through a 4.75 ΚΩ resistor. The terminals INT 1 and EA of the μΡ 504 are coupled with V_DC, through respective 10 ΚΩ resistors. Terminal V_DC del μΡ 504 is coupled to V_DC and to ground through a 1 μΡ capacitor. The GND (GND) terminal of the μΡ 504 is coupled to ground. The terminals P1.2 and P1.3 of the μΡ 504 are coupled to V_DC through respective 10Ω resistors. The P1.4 terminal of the μΡ 504 is coupled to ground through a 100Ω resistor. Terminal P2.3 of μΡ 504 is coupled to the command electrode of a FET 516 type BSS138. The source electrode of the FET 516 is coupled to ground and its output electrode is coupled to V_DC through a 1MΩ resistor, and directly to the command electrode of a FET 518 type IRFR9020. The source electrode of the FET 518 is coupled to V_DCand the FET 518 output electrode is coupled to MeTeRPoWeR terminal E2, E4 associated with

ES 2 162 176 T3 the 461 battery emulator.

The main processor of Fig. 11 is mounted on PCB 64 and communicates via connector 132 with ACP 150, 250, 350, 450 in a respective housing 124, 126, 128, 130. The main processor includes, in Illustratively, a Toshiba TC 110G11-0262 Application Specific Integrated Circuit (ASIC) 524. Keypad 54 plugs into a 526 socket that includes 526-1 ... 526-12 contacts. Each of the 526-2 contacts ... 526-5 was coupled, through two respective 1kQ series resistors to a respective terminal KBD-R0 ... KBD-R3 of the ASIC 524. Each of the KBDR0 ... KBD-R3 terminals was coupled, through of an actuation resistance of 100Ω relative to the NOV supply of 5V. The common terminal of each pair of 1Ω resistors in series is coupled to ground through a respective 68pF capacitor. Each of the 5266 ... 526-10 contacts is coupled, through two respective 100Ω series resistors to a respective terminal KBD-C0 ... KBD-C4 of the ASIC 524. The common terminal of each pair of resistors in series of 100Ω, it is coupled to ground through a respective 68 pF capacitor. Each of the KBD-C0 ... KBD-C4 terminals is coupled to the 5V NOV power supply through a respective 15KΩ actuation resistor. Each of the contacts 526-1, 526-12 is coupled to ground and, through a 0.001 pF capacitor, ^{to V}DC.

The display 60 plugs into a socket 528 that includes contacts 528-1 ... 52814. Each of the contacts 528-1 ... 528-8 is coupled to a respective terminal 9, 12, 7, 14, 5, 16, 3, 18 of a National Semiconductor 74HC244 buffer integrated circuit 530. Contacts 528-9 ... 528-11 are coupled to respective terminals 16, 3, 18 of a second buffer 532 74HC244. Terminals 2, 17, 4, 15, 6, 13, 8, and 11 of buffer 530 are coupled to terminals DB0-DB7, respectively, of ASIC 524. Terminals 2, 17, and 4 of buffer 532 are coupled to terminals AD0, AD1 and DISP EN, respectively, of ASIC 524. Terminals 1, 10 and 19 of both buffers 530, 532 and terminals 15, 6, 13, 8 and 11 of buffer 532 are, all coupled to ground.

Printer door 118 includes contacts 118-1 ... 118-25. Each of the contacts 118-2 ... 118-12, 118-15 and 118-16 is coupled, through a ferrite bead 2743019446 or 2743019447 from Fair-Rite Products PN, to a terminal BUFDB0, BUFDB7, PACK (P-ACKNOWLEDGE RECEIPT), P-BUSY (P-BUSY), P-PE, DOG, and P-INIT (P-INITIALIZE), respectively, of the ASIC 524. Each of the terminals 118-1 ... 118- 12, 118-15 and 118-16 are coupled to ground through a 0.001 pF capacitor. Terminal 118-1 is coupled, through a ferrite bead to the output terminal of a FET 537 type BSS138 and through an actuation resistance of 10KΩ, to V_DC. The terminals BUFDB0-BUFDB7, P-ACK, P-BUSY, P-PE, PERROR and P-INIT of the ASIC 524 are coupled, through respective actuation resistors of 10KΩ and 1 / 8W, to the output electrode of a FET 538 type BSS84. The source electrode of the FET 538 is coupled to the 5V NOV supply. The control electrode of the FET 538 is coupled to the 5V NOV power supply through a 100KΩ resistor and to the output electrode of a FET 540 type BSS138. The source electrode of the FET 540 is coupled to ground. The control electrode of the FET 540 is coupled to the P-INIT terminal of the ASIC 524 and through a 100KΩ resistor to the 5V NOV supply. Terminals 118-18 ... 118-25 of printer port 118 are coupled to ground and through a 0.001 pF capacitor to V_DC.

The terminal P-STROBE (P_FIX) of the ASIC 524 is coupled, through a 470 pF capacitor to the command electrode of a FET 544 type BSS84 and, through a 100KΩ resistor, to the 5V NOV power supply. The control electrode of the FET 544 is coupled, through a 47.5KΩ resistor, to V_DC. The source electrode of the FET 544 is coupled to V_DC. The output electrode of the FET 544 is coupled, through a 23.7KΩ resistor, to the command electrode of the FET 537. The command electrode of the FET 537 is coupled, through a parallel RC circuit that includes a 23.7KΩ resistor and a 270 pF capacitor, to ground. The source electrode of the FET 537 is coupled to ground. This circuit conditions the signal at terminal 118-1 of printer gate 118.

A power supply and regulator circuit includes battery current socket 98 and external DC power socket 104. The pins 1 of both sockets 98, 104 are coupled together. The pins 2 of both sockets 98, 104 are coupled together. Pins 1 and 2 of socket 98, 104 and pin 3 of socket 104 are coupled through respective common EDS / EMI rejection inductors wound on a common core. The pins 1 of the sockets 98, 104 are coupled through one of these inductors, to ground. The pins 2 of the sockets 98, 104 are coupled through one of these inductances to the anode of a diode 550 of type SC015-04 and, through a 0.001pF capacitor, to ground. Pin 3 of socket 104 is coupled, through one of these inductances, to the anode of a Schottky diode 552 type SE014 and through a 0.001pF capacitor, to ground. The circuit that includes diodes 550 and 552 is a voltage control circuit for the battery and the AC adapter. The cathodes of diodes 550, 552 are joined and coupled, through a 1pF capacitor, to ground and, through a 3/4 A fuse, to the collector of a 554 Samsung transistor type MJD3055 mounted in a metallized area. for heat dissipation from the main processor PCB. The collector of transistor 554 forms an ANALOG (ANALOG) terminal PoWeR of the circuit illustrated in Fig. 11. The collector of transistor 554 is coupled, through a 200KΩ resistor, to the non-inverting input terminal (+) of a power amplifier. difference 556 type ICL7611 from Maxim Integrated Products. The

ES 2 output terminal of difference amplifier 556 is coupled, through the 15 Ω resistor to the base of transistor 554. The emitter of transistor 554 forms the NOV 5V supply terminal of the circuit of Fig. 11. The 5V NOV terminal is coupled through a parallel RC circuit that includes a 1Ω resistor and a 1 ^ F capacitor to the inverting input terminal (-) of the 556 difference amplifier. The 5V NOV terminal is also coupled through 0.1 ^ F and 10 ^ F tontal capacitors in parallel, to ground and, through a 1ΜΩ resistance, to the control electrodes of the FETs. 560, 562 of type BSS138 and type IRFR9020, respectively. The source electrode of the FET 560 is grounded through a 10Ω 1 / 8W resistor. The output electrode of the FET 560 is coupled to the V supply._DC (+ 5V DC) for the GTS 40. The output electrode of the FET 560 is coupled to the output electrode of the FET 562 that forms the Vcc supply. The output electrode of the FET 562 is coupled to ground through an I0 // 1 · 'capacitor. The source electrode of the FET 562 was coupled to the 5V NOV terminal. The collector of transistor 554 is coupled to the drive electrode of a BSS84-type FET 564 and to ground through a parallel RC circuit that includes a 0.001 ^ F capacitor and a 10mΩ resistor. The source electrode of the FET 564 was coupled to the 5V NOV terminal. The output electrode of the FET 564 is coupled to the INTER0 terminal of the ASIC 524 and to ground through a 1Ω resistor. The FET 564 operates to provide a "current removed" interrupt signal. The 5V NOV terminal is grounded through a 120Ω 1 / 4W series resistor 566 and a 0.47 ^ F capacitor. A Schottky diode 568 type SE014 is coupled across resistor 566. The input terminal - of difference amplifier 556 is coupled across a 1Ω resistor to ground. The input terminal + of the difference amplifier 556 is coupled to the cathode of a National Semiconductor type LM385 voltage reference diode, the anode of which is coupled to ground.

The ANALOG PoWeR terminal is coupled, through a 332kΩ resistor 570 and a 200Ω resistor 572, in series, to ground. The common terminal of resistors 570, 572 was coupled to the input terminals - of two difference amplifiers 574, 576. The output terminals of difference amplifiers 574, 576 are coupled, through 4.75Ω and 1.5Ω resistors, respectively, to their respective + input terminals. The input and output + terminals of the difference amplifier 574 are coupled through 137Ω and 681ΚΩ resistors, respectively, to V_DC. The + input terminal of difference amplifier 574 was also coupled through a 115kΩ resistor to ground. The input and output + terminals of the difference amplifier 576 are coupled, through resistors of 124ΚΩ and 825ΚΩ, ​​respectively, to Vdc. The + input terminal of difference amplifier 576 is also coupled, via

176 T3 20 a resistance of 137ΚΩ, to ground. The output terminals of difference amplifiers 574 and 576 are coupled to terminals GIO-1 and GIO-0, respectively, of ASIC 524.

Vcc is coupled, through a 200Ω resistor, to the input terminal of a 580 difference amplifier. A 0.33F capacitor is coupled between the - input terminal of the difference amplifier 580 and ground. A resistive voltage divider that includes a 100Ω resistor and a 105Ω resistor, is coupled between Vcc and ground. The common terminal of these two resistors is coupled with the input terminal + of the difference amplifier 580. The output terminal of the 580 difference amplifier is coupled, through a 4.12Ω resistor to its input terminal +, through a resistance of 576Ω to Vdc and directly to the input terminal - of a 582 difference amplifier. . A series resistive voltage divider, including two 100Ω resistors, was coupled between Vcc and ground. The common terminal of these resistors was coupled to the + input terminal of difference amplifier 582. The output terminal of difference amplifier 582 is coupled through a 100Ω resistor at Vdc. The output terminals of the difference amplifiers 580, 582 are coupled to the RESET terminal of a microprocessor (μΡ) 584 ORI 80C88 and to the RESET-NO terminal of the ASIC 524, respectively. Difference amplifiers 574, 576, 580 and 582 are illustratively LP339M type difference amplifiers.

The READY, V terminals_DC and Μ ^ ΜΧ * of the μΡ 584 are coupled to V_DC. The TEST ΉΜΣ, HOLD, and V terminals_H.H of the μΡ 584 are coupled to ground. The ALE, WR *, CLR and RD * terminals of the μΡ 584 are coupled, through respective 51.1 Ω resistors, to the ALE, WR, OSC OUT and RD terminals, respectively, of the ASIC 524 The IO / Μ * terminal of the μΡ 584 is coupled to the IO-MEMN terminal of the ASIC 524. The A16-A19 terminals of the μΡ 584 are coupled to the A16-A19 terminals, respectively, of the ASIC 524. The INTA terminal^* of the μΡ 584 is coupled to the INT-A terminal of the ASIC 524. The terminals AD0-AD7 of the μΡ 584 are coupled to the terminals DB0-DB7, respectively, of the ASIC 524. The terminals A8-A15 of the μΡ 584 are coupled to the terminals A8-A15, respectively, of a 590 Signetics type 27C010 programmable read-only memory (PROM). The INTR terminal of the μΡ 584 is coupled to the INT terminal of the ASIC 524.

The terminals AD0-AD7 and AD16L of the ASIC 524 are coupled, through respective 100Ω actuation resistors, to ground. Terminals AD0-AD7 and AD16L of ASIC 524 are also coupled to terminals A0-A7 and A16, respectively, of PROM 590. Terminals DQ0-DQ7 of PROM 590 are coupled to terminals DB0-DB7 of ASIC 524. The CE * terminal of the PROM 590 is coupled to the CE0 terminal of the ASIC 524. The OE terminal^* of the PROM 590 is coupled to the RD terminal of the ASIC 524. The WE *, V terminals_DC and V_pp of the

IS 2 162 176 T3

PROM 590 are V-coupled_DC. Terminal V_H.H of the PROM 590 is grounded.

A static Hitachi type HM628128LFP-12 592 random access memory (RAM) includes I / O1-I / O8 terminals coupled to terminals DB0-DB7, respectively, of ASIC 524. Terminals A0-A16 of RAM 592 are on coupled to terminals A0-A16, respectively, of PROM 590. The 5V NOV power supply is coupled, through a Schottky diode type SE014 594, to terminal V_dd of RAM 592. Terminal V_dd It is also coupled through a 0.47pF capacitor, to ground and through a 100Ω resistor to terminal CE1 * of RAM 592. Terminal CE1 * of RAM 592 is coupled to terminal CE3 of ASIC 524. The current for the RAM 592 when NOV 5V is not available, is fed from two batteries in series type CR4250-FT5-4 through four diodes in series type MMBD914L, to terminal V_ddfrom RAM 592. The CE2 terminal of the RAM 592 is coupled to the GATE ARRAY RESET, the output terminal of the differential amplifier 582. The R / W terminal of the RAM 592 is coupled to the WR terminal ASIC 524. Terminal V_H.H RAM 592 is grounded.

Terminals CE0-CE2, CE4 and REFRESH (RENEW) of ASIC 524 are coupled through respective 100Ω resistors, at NOV 5V. ASIC 524 terminals EE-CE2, EE-CLK2, EEDI2 and EE-D02 are attached to pins 1, 2, 3 and 4, respectively, of a Samsung type KM93C46GD read-only, programmable, electronically erasable memory (EEPROM). , 596. The POLARITY terminals, TX2 and TX1 of the ASIC 524, are coupled through respective 100Ω resistors, to the NOV terminal of 5V. The TX0 terminal of the ASIC 524 is coupled, through a 100Ω resistor, to ground. The TEST MODE terminals PWR DETCT and TEST MODE 2 of the ASIC 524 are coupled, through respective 100Ω to V resistors._DC, V_DC and NOV 5V, respectively. The GIO-2 terminal of the ASIC 524 is coupled to the command electrode of a FET 600 type BSS138 activating a 598 buzzer. The output electrode of the FET 600 is coupled to the - terminal of a 598 Mallory type MCP320B2 buzzer, whose + terminal is coupled to V_DC. The source electrode of the FET 600 was coupled, through a 124Ω, 1 / 8W resistor, to ground. Type SE014 Schottky diodes are coupled across buzzer 598 and the FET 600 output electrode to ground. The command electrode of the FET 600 is grounded through a 100Ω resistor.

The time bases required for the circuit illustrated in Fig. 11 are generated by crystal oscillator circuits associated with the ASIC 524. In a first of these, a 10Ω resistor and a 3.6864 MHz crystal 604 are coupled in series through the SYS-XTAL1 and SYS-XTAL2 terminals of the ASIC 524. The NOV 5V power supply was coupled to the source electrode of a BSS84 type FET 606, whose output electrode was coupled to the SYSXTAL1 terminal. The drive electrode of the FET 604 was coupled to V_DC. Both terminals of crystal 604 are coupled to ground through 33 pF capacitors. A ϋ ^ Ω resistor is coupled across the SYS-XTAL1 and SYSXTAL2 terminals.

In the second of the time base generators, a 470pF capacitor is coupled across the RT-XTAL1 and RT-XTAL2 terminals of the ASIC 524. The time base generator is the date / date timer. The output terminal of an inverter 610, such as a 74HC04 hex type inverter, was coupled to terminal RT-XTAL1. A 32.768RHz crystal 612 and a 475Ω resistor 614, in series, are coupled between the input and output terminals of inverter 610. A 20MΩ resistor is also coupled between the input and output terminals of inverter 610. A 22pF capacitor is coupled between the input terminal of inverter 610 and ground. A 33pF capacitor was coupled between the common terminal of crystal 612 and resistor 614 and ground.

The EE-CE1 terminal of the ASIC 524 is coupled to the command electrode of a BSS138 type FET 620. The source electrode of the FET 620 is coupled to ground. The output electrode of the FET 620 was directly coupled to the command electrode of a FET 622 type BSS84 and, through a resistance of 475 ΚΩ, to V_DC. The source electrode of the FET 622 is coupled to V_DC. The output electrode of the FET 622 is coupled, through an ESD / EMI common mode rejection inductance device, to a terminal, pin 114-3, of the barcode reader socket 114. Another choke of the common mode rejection device is coupled to ground at one end and to pins 114-1 and 114-4 of the barcode reader socket 114 at its other end. The pins 114-2 and 114-5 of the socket 114 of the bar code reader are coupled, through respective inductors of the common mode rejection device, to the terminals TX0 and RX0, respectively, of the ASIC 524. The terminal RX0 It was also coupled through a 10Ω resistor to ground.

Socket 132 includes pins 132-1, -4, -5, -6 and -7 coupled to ground and, through a 0.001pF capacitor, to V_DC. Pins 132-2 and 132-3 of socket 132 are coupled to terminals RX2 and TX2, respectively, of ASIC 524. Pin 132-8 of socket 132 is coupled to the drive electrode of FET 560. Pin 132-9 Socket 132 was coupled to 5V NOV and, through a 0.001pF capacitor, to ground.

Controllers in a communications line dissipate considerable power. In a normally battery powered system, such as the GTS 40, such dissipation must be kept at the same level to prolong battery life. In the GTS 40, a circuit 630 monitors the RS232 communication channel through gate 108 and only connects the line controllers when communication is established. When there is no signal present on the RS232 port

IS 2 162 176 T3

108, circuit 630 draws no current. Once a signal is detected on the RS232 port 108, the circuit 630 connects itself and indicates it to the ASIC 524. The ASIC 524 acknowledges this by changing the position of one of the contacts of the RS232 port 108. The Circuit 630 draws current until the system is reset.

The 630 circuit includes a Motorola 632 optic coupler MOC211 type, whose pin 2 is coupled, through a 698Ω resistance, to contact 116-1 of the RS232 port 108. Pin 2 of the 632 ooptic coupler is coupled with the a diode 634, whose cathode was coupled with pin 1 of optic coupler 632 and to ground. Pin 5 of optical coupler 632 is directly coupled to ground. Pin 7 of optic coupler 632 was coupled, through a 1 ΜΩ resistance, to ground. Pin 6 of ooptic coupler 632 was coupled to the command electrode of a BSS84 type FET 636 and, through a 47.5Ω resistor, to the INTER1 terminal of ASIC 524, and to ground through a 475Ω resistor. The GIO-3 terminal of the ASIC 524 was coupled to the control electrodes of three FETs 640, 642, 644, type BSS138 and to ground through a 100Ω resistor. The source electrode of the FET 640 is coupled to ground and its output electrode is coupled to the INTER1 terminal of the ASIC 524. The output electrode of the FET 642 is coupled to the RX1 terminal of the ASIC 524 and, through an actuation resistor of 100Ω, to the NOV 5V supply. The source electrode of the FET 642 is coupled to an output terminal, pin 12, of a Linear Technology RS232 to TTL / TTL to RS232 interconnect integrated circuit 650, type LT1281. Terminal TX1 of ASIC 524 was coupled to pin 10 of interconnect 650. Pin 7 of interconnect 650 is coupled to contact 116-2 of RS232 port 108. Pin 13 of interconnect 650 was coupled to contact 116 -1 of door 108. Contact 116-3 of door 108 is grounded. 0.001 μF 'capacitors are coupled between each of pins 116-1 and 116-2 and ground. 1 pF capacitors are coupled between each of the V + and V- terminals of interconnect 650 and ground. Respective 0.1pF capacitors are coupled across terminals C1 + and C1- and through terminals C2 + and C2- of interconnect 650. The output electrode of the FET 644 is directly coupled to the command electrode of a FET 652 type. BSS84 and, through a resistance of 475Ω, to V_DC. The source electrode of the FET 652 is coupled to V_DC. The output electrode of the FET 652 is coupled to pin 16 of interconnect 650, through a 0.1pF capacitor to ground and, through a 47.5Ω resistance, to pin 11 of interconnect 650.

In operation, circuit 630 remained disconnected and will not draw any current as long as a signal does not appear on pin 116-1 of gate 108. The remaining circuitry of GTS 40 can operate normally with circuit 630 disconnected. However, when a negative Rxd signal arrives at pin 116-1 of gate 108, the FET 636 is driven by the output of the optic coupler 632. The ASIC 524 acknowledges receipt of the INTER1 signal generated by the turning on of the FET 636 by increasing the value of the signal in its GIO-3 terminal. This puts the FET 640 on conduction, further masking INTER1 interrupts. Also, it conducts the FET 644 and 652, feeding V_DC to pin 16 of interface 650. Finally, it conducts FET 642, allowing current to flow from its output electrode to its source electrode when pin 12 of interface 650 dissipates current (when signal is present). This allows the FET 642 output electrode voltage to drop from NOV 5V.