Carrier substrate for electric components and manufacturing method for carrier substrate

0001The present invention relates to a carrier substrate for electrical, in particular electronic, components and a method for producing a carrier substrate.

0002Support substrates are, for example, as printed circuit boards or boards from the<patcit id="pcit0001" dnum="DE102004033933A1"><text>DE 10 2004 033 933 A1</text></patcit> known. Electrical components and conductor tracks are typically arranged on one component side of the carrier substrate, it being possible for the electrical components and the conductor tracks to be interconnected to form electrical circuits. For special applications, such carrier substrates have proven to be particularly advantageous which have an insulating layer with high electrical insulation strength for the electrical insulation of the individual electrical components and conductor tracks, such as, for example a primary layer made of ceramic.

0003During operation of these carrier substrates, the electrical components are typically stressed in such a way that they heat up and local heat sources form on the component side. In order to avoid damage to the electrical components or the carrier substrate caused by the heating, the prior art therefore knows, for example, from<patcit id="pcit0002" dnum="DE102009022877A1"><text>DE 10 2009 022 877 A1</text></patcit> Heat sinks or cooling structures, which are generally soldered to a cooling side opposite the component side, which is formed, for example, as a copper layer or copper base adjoining the primary layer. In order to provide sufficient thermal capacity through the heat sink or through the cooling structure, the heat sinks and/or the cooling structures must be dimensioned accordingly large, which disadvantageously means that a space-filling design for the carrier substrate cannot be avoided.

0004In addition, certain electrical components and their power density place increased demands on the cooling performance of the carrier substrate. Furthermore, when using the electrical components, parasitic inductances can occur on the carrier substrate, which have a disadvantageous effect on the operation of the carrier substrate. Finally, with such carrier substrates, the electromagnetic compatibility places high demands on the conductor structures or components used. the metallic structures in general.

0005From the<patcit id="pcit0003" dnum="EP2892074A1"><text>EP 2 892 074 A1</text></patcit> there is known a power module substrate in which a plurality of circuit layer metal plates made of copper are bonded in a layered state with a first ceramic substrate interposed. A second ceramic substrate is also provided, with a metal layer being arranged between the first ceramic substrate and the second ceramic substrate. A heat radiation layer made of aluminum is further provided on the second ceramic substrate.

0006From the<patcit id="pcit0004" dnum="US2010065962A1"><text>U.S. 2010 065 962 A1</text></patcit> Another power module is known that provides a layered structure of multiple metal layers and ceramic layers.

0007From the<patcit id="pcit0005" dnum="WO2016121660A1"><text>WO 2016 121 660 A1</text></patcit> a metal-ceramic substrate is known which has a metallic intermediate layer between two ceramic layers which is thicker than the ceramic layers.

0008It is therefore an object of the present invention to improve carrier substrates with a primary layer made of ceramic, for example, in particular with regard to size, weight, cooling performance, electromagnetic compatibility and parasitic inductances.

0009This object is achieved by a carrier substrate for electrical components according to claim 1 and a method according to claim 14. Further advantages and features of the invention result from the subclaims and the description and the attached figures.

0010According to the invention, a carrier substrate for electrical components, in particular electronic components, is provided, the carrier substrate having a component side and a cooling side opposite the component side with a cooling structure, the carrier substrate for electrical insulation facing the component side and in particular made of ceramic, e.g. Al₂O₃, si₃N₄, AIN or HPSX ceramic (ie a ceramic with an Al₂O₃- Matrix containing an x ​​percentage of ZrO₂ includes, e.g. Al₂O₃ with 9% ZrO₂ = HPS9 or Al₂O₃ with 25% ZrO₂ = HPS25), manufactured primary layer and, to stiffen the carrier substrate, comprises a secondary layer facing the cooling side, with a metallic intermediate layer being arranged between the primary layer and the secondary layer for heat transfer from the component side to the cooling side, the metallic intermediate layer being thicker than the primary layer and the secondary layer .

0011The primary layer has an insulating layer with high electrical insulation strength, preferably more than 5kV/mm, particularly preferably more than 10, 20 or even more than 30kV/mm and/or with high thermal conductivity, preferably more than 10W/mK, particularly preferably more than 20W/mK or even more than 60W/mK, such as e.g. B. technical ceramics or filled with thermally conductive materials organic insulation materials. The thickness of the primary layer and/or the secondary layer is preferably designed or selected in such a way that it meets the requirements for dielectric strength or breakdown field strength. It has been found that in the majority of applications this requires a thickness of the primary layer and/or the secondary layer of 0.1-0.4 mm made of the ceramic materials already mentioned. In the case of such carrier substrates, the z in the case of high-voltage direct current transmission, require a dielectric strength of 10 - 15 kV with novel semiconductor components working on a SiC basis, however, layer thicknesses of the primary layer and/or the secondary layer of up to 2mm and more are required.

0012Compared to the prior art, the carrier substrate is provided in a sandwich construction, in which the primary layer and the secondary layer are spaced apart by the metallic intermediate layer. The heat flow emanating from the local heat source can flow through the intermediate layer in the direction of the secondary layer or spread out better on the cooling side and ensure a more extensive heat distribution on the cooling side, which forms the critical heat transfer surface for heat dissipation. This allows the static thermal resistance (R_th) of the entire carrier substrate, ie the thermal resistance that occurs during steady-state operation of the carrier substrate. For example, static thermal resistance can be improved by up to 30% in this way. As a result, an oversized cooling structure, which would otherwise comprise a 3 mm to 5 mm thick bottom plate, on the cooler side of the carrier substrate can be dispensed with. This not only advantageously means that material can be dispensed with and thus the manufacturing costs can be reduced, but it also allows the carrier substrate to be designed symmetrically - in particular with regard to a metal coating on the component side and on the cooling side - which means that in Operation thermally induced mechanical stresses or mechanical leverage can be counteracted. Such mechanical stresses can otherwise lead to bending of the carrier substrate--for example in the form of a bi-metal effect--and in particular when thick cooling structures are used.

0013In addition, the intermediate layer causes the transient or dynamic thermal resistance (Z_th) is adequately dimensioned, since the intermediate layer can absorb or store the heat for a short time during switch-on processes or power peaks. It must be taken into account here that the carrier substrate is preferably designed with regard to its static thermal heat resistance. In this case, the static thermal heat resistance preferably sets in after approx. 20 to 30 s and is advantageously to be measured on the component. To compare the dynamic behavior of different systems, it is also conceivable to measure the thermal resistance 300 ms after the start of the switch-on process.

0014Furthermore, it has proven to be advantageous that the comparatively thick intermediate layer contributes to the stiffening or stabilization of the entire carrier substrate. In this case, the carrier substrate proves to be particularly resistant both to internal stresses and to external forces, such as those exerted, for. B. act by the cooling liquid on the carrier substrate, as sufficiently stiff. Furthermore, the layer thickness of the ceramic layers can be advantageously reduced.

0015According to a preferred embodiment of the present invention, it is provided that the intermediate layer is between 1.1 and 10 times, preferably between 1.2 and 5 times, particularly preferably between 1.3 and 3 times or even essentially 1 5 times as thick as the primary layer and/or the secondary layer. However, the intermediate layer can also have other thicknesses. In particular, the intermediate layer is between 1 mm and 10 mm, preferably between 1 mm and 5 mm, particularly preferably between 1.5 mm and 5 mm or even essentially 1.5 mm thick. Surprisingly, it has been shown that the static thermal resistance deteriorates outside of these value ranges, ie both with increasing and with decreasing intermediate layer thickness, in particular in relation to the thicknesses of the primary layer and/or the secondary layer. Accordingly, in order to optimize the cooling performance, it is advantageous to adjust the thickness of the intermediate layer accordingly.

0016According to a preferred embodiment of the present invention, it is provided that the intermediate layer is between 2.5 and 100 times, preferably between 3.5 and 50 times, particularly preferably between 10 and 25 times or even essentially 20 times as thick is like the primary layer and/or the secondary layer. However, the intermediate layer can also have other thicknesses. In particular, the intermediate layer is between 1 mm and 10 mm, preferably between 1 mm and 5 mm, particularly preferably between 1.5 mm and 5 mm or even essentially 3 mm thick. Such thick intermediate layers advantageously enable optimal heat spreading in the intermediate layer, as a result of which the transported heat is advantageously distributed as evenly as possible before it is dissipated via the cooling structure.

0017According to a further embodiment of the present invention, it is provided that the intermediate layer is thicker than 1 mm, preferably thicker than 1.4 mm and particularly preferably thicker than 1.9 mm. These comparatively thick intermediate layers prove to be advantageous for heat spreading, in particular for a majority of different carrier substrate types. In this case, it is advantageously possible to make the intermediate layers so thick that the size of the cooling structure on the cooling side can in turn be made smaller. It is even conceivable that, despite the increase in the thickness of the intermediate layer, the cooling structure can be dimensioned smaller in such a way that the overall thickness of the carrier substrate can be reduced overall.

0018It is expediently provided that the cooling structure has a base body area and a web area, with a ratio (SD/BD) between a web area thickness and a base body thickness having a value between 1.2 and 6, preferably between 1.4 and 3 and particularly preferably between 1 .6 and 2.5 assumes. With a comparable cooling capacity, it has been shown to be advantageous that the web area, ie for example the fins of a heat sink, can be dimensioned significantly shorter. The result is a more compact design of the carrier substrate and optimized flow conditions. It has proven to be particularly advantageous to select the ratio between 1.6 and 2.5, since this allows both an improved cooling effect to be achieved and a comparatively compact design of the carrier substrate. The web area is preferably formed by webs or Finns formed, while the base body area forms in particular a solid or closed area. It is also conceivable that the webs are inclined relative to a perpendicular orientation to the base body area. In particular, the thickness of the web area and the thickness of the base body are measured in a direction running perpendicularly to the main plane of extension.

0019A cooling structure thickness, in particular an effective cooling structure thickness, is preferably 0.03 to 1 time, preferably 0.1 to 0.5 and particularly preferably 0.15 to 0.3 times as large as the metallic intermediate layer. Surprisingly, it has been shown that such thin cooling structure thicknesses can be realized. In addition to reducing the overall thickness, it is advantageously possible to dimension the cooling structure thicknesses such that they have a thickness, in particular an effective cooling structure thickness, which is comparable to the thickness of a metallization on the opposite side of the component. The effective cooling structure thickness also takes into account that the cooling structure is not flat but structured, ie a thickness equivalent of the structured cooling structure to a non-structured cooling body is assumed.

0020In principle, the primary layer, which is in particular made of ceramic, is flat and plate-shaped and preferably extends over the entire component side of the carrier substrate, with the secondary layer being aligned in particular parallel to the primary layer. On the component side, more specifically on the side of the primary layer facing away from the intermediate layer, metal connection elements and conductor tracks are arranged in particular, which are preferably provided for controlling electrical components attached to the connection elements, which are electrically conductively connected to the metal connection elements. Furthermore, according to one embodiment of the invention, it is provided that the cooling structure is directly connected to the secondary layer on the cooling side, ie no soldering metal or the like is arranged between the cooling structure and the secondary layer, with the exception of the soldering metals that directly connect the cooler to the Enable secondary layer, for example through an active soldering process or a DCB process. Furthermore, a part of the cooling structure that extends continuously parallel to the primary layer and directly adjoins the secondary layer is thinner than the metallic intermediate layer. The layer thickness is the extent of the respective layer running perpendicular to the main plane of extension of the primary layer, ie the intermediate layer, the primary layer and the secondary layer, the primary layer, the intermediate layer and the secondary layer being stacked or arranged one above the other in particular along the direction perpendicular to the main plane of extent of the primary layer.

0021Furthermore, it is conceivable that the intermediate layer is configured in multiple layers. In this case, the carrier substrate can be formed by joining together an at least three-layer upper multi-layer consisting of conductor track (possibly equipped with components), primary layer and first layer of the intermediate layer and an at least three-layer lower multi-layer consisting of a second layer of the intermediate layer, secondary layer and cooling structure, getting produced. The upper and lower multi-layer layers can be bonded by means of a DCB process, a DAB process, diffusion welding, a soldered joint or a sintering process, such as silver sintering, or a further layer, such as a thermally conductive, adhesive insulation layer, such as an epoxy layer or a polyamide layer. be connected to each other.

0022In addition, it is also conceivable that the carrier substrate in the sandwich construction has one or more additional primary layers for electrical insulation, one or more additional secondary layers for stabilizing the carrier substrate and/or a number of additional intermediate elements for heat transport from the component side to the cooling side. The electrical component is, for example, a semiconductor component made of Si, SiC or GaN.

0023Further advantages and features result from the following description of preferred embodiments of the subject according to the invention. Individual features of the individual embodiment can be combined with one another within the scope of the invention.

0024In order to ensure sufficient heat capacity of the intermediate layer, it is also provided that the layer thickness of the intermediate layer is greater, preferably more than twice as large, preferably more than three times as large and particularly preferably more than five times as large as the added layer thickness of the primary layer and the secondary layer. It is also conceivable that the ratio between the layer thickness of the intermediate layer and the total thickness of the carrier substrate has a value between 0.2 and 0.8, preferably a value between 0.3 and 0.7 and particularly preferably a value between 0.4 and 0. 6 accepts. The overall thickness of the carrier substrate is measured in a direction running perpendicularly to the primary layer, from the conductor tracks on the component side to the end of the cooler structure on the cooling side of the carrier substrate. In a particularly compact embodiment, the total thickness of the carrier substrate is less than 8 mm, preferably less than 6 mm and particularly preferably essentially 4 mm.

0025Provision is preferably made for the conductor tracks, the metallic connection elements, the intermediate layer and/or the cooling structure to be produced from a material comprising aluminum, molybdenum, tungsten, CuMo, CuW, Invar, Kovar and/or silver. The conductor tracks, the metallic connection elements, the intermediate layer and/or the cooling structure are particularly preferably made from a material comprising copper. It is also conceivable that the conductor tracks, the metal connection elements, the intermediate layer and/or the cooling structure are made of composite materials such as a lamination of the metals mentioned or are realized as a metal matrix composite produced by powder metallurgy. Such composite materials can preferably be made of the metals already mentioned, which, however, are realized for the purpose of CTE adaptation and increased rigidity with metal-matrix composite materials that are filled with ceramic particles such as Al with Al₂O₃ and/or SiC and/or Si₃N₄ or graphite or diamond powder. In order to ensure sufficient stability of the carrier substrate, the primary layer and/or the secondary layer is designed in such a way that a modulus of elasticity for the primary layer and/or the secondary layer is greater than the modulus of elasticity of the conductor tracks. In addition, an advantageous embodiment provides that the primary layer and optionally the secondary layer are made of a material whose electrical insulation strength is greater than 5 kV/mm, preferably greater than 10 kV/mm and particularly preferably greater than 20 kV whose thermal conductivity is greater than 10 W/mK, preferably greater than 20 W/mK and particularly preferably greater than 60 W/mK.

0026For example, these are technical ceramics or, in particular, the secondary layer is an organic insulating material filled with heat-conducting materials, such as e.g. B Epoxy resin or polyimide. Al has proven to be particularly advantageous for forming the primary layer and/or the secondary layer or as a filler for the organic insulating materials₂O₃, si₃N₄, AlN, BeO, SiC or MgO. Ceramics on Al have proven to be just as advantageous₂O₃ Basis which, in addition to typical sintering additives, can have different ZrO2 contents for the purpose of strengthening the conversion, such as Al₂O₃ with 9% ZrO₂ - HPS9 or Al₂O₃ with 25% ZrO₂ - HPS25.

0027According to a further embodiment of the present invention, it is provided that the metallic intermediate layer is configured as a single layer. Single-layer is to be understood in particular as meaning that the metallic intermediate layer is designed in one piece and continuously connects the primary layer and the secondary layer to one another at least in regions. In other words: the single-layer intermediate layer borders on the primary layer on one side and on the secondary layer on the other side. The single-layer configuration advantageously reduces the outlay involved in producing the carrier substrate, since stacking and connecting a plurality of layers to form the intermediate layer can be dispensed with.

0028In a particularly advantageous embodiment of the present invention, it is provided that a primary substrate and a secondary substrate are adapted to one another in terms of their thermal expansions, in particular in terms of their coefficients of expansion, in order to avoid sagging of the carrier substrate. In this case, the primary substrate includes a part of the intermediate layer and the interconnect layer in addition to the primary layer, and the secondary substrate includes a further part of the intermediate layer and the cooling structure in addition to the secondary layer. The intermediate substrate or the middle part of the intermediate layer is arranged between the primary substrate and the secondary substrate. The layer thicknesses and/or the materials of the primary substrate and/or the secondary substrate are preferably matched to one another in such a way that the carrier sub-substrate expands equally in the area of ​​the primary layer and in the area of ​​the secondary layer. The result is that thermal stresses that can occur as a result of temperature during operation or during the production of the carrier substrate can be counteracted in an advantageous manner and the probability of a bimetal effect arching the carrier substrate can be reduced without affecting the electrical insulating properties of the carrier substrate deteriorate.

0029For this purpose, the carrier substrate is preferably designed to be thermomechanically mirror-symmetrical to the intermediate layer, ie the layer thickness and the materials from which the primary layer and the secondary layer are made correspond to one another, in particular in terms of thermomechanical behavior. Alternatively, it is also conceivable that with the same geometry of primary layer and secondary layer, the material of the secondary layer has a coefficient of expansion that corresponds to that of the material of the primary layer, or is at least comparable in terms of its size so that a uniform expansion of the primary layer and that of the secondary layer which occurs for the expected temperature distribution. It is also conceivable that when selecting and designing the primary layer and the secondary layer, a possible or expected temperature gradient across the carrier substrate is also taken into account.

0030Advantageously, a cooling structure provided for fluid cooling as a termination of the carrier substrate directly adjoins the secondary layer on the cooling side, the cooling structure being designed in particular as a rib, needle and/or knob structure. In particular, the cooling structure is integrated into the carrier substrate. In principle, gases and cooling liquids are conceivable as fluids. By using a cooling liquid that comes into contact with the cooling structure for heat exchange, the heat transported to the cooling side can be conducted away from the carrier substrate as quickly and efficiently as possible. This advantageously further increases the cooling performance. The use of the metallic intermediate layer also results in a synergetic effect in that a profile depth of the cooling structure can be reduced. For example, the cooling structure has an aspect ratio that is less than 8, preferably less than 3, and particularly preferably less than 1. Another advantage of cooling structures with small aspect ratios is their stability. Furthermore, the cooling structure for corrosion protection is preferably provided with an anti-corrosion layer, such as. B. in particular a NiP, Ni, SiO₂, Al₂O₃, TiOx, NiAu, NiPdAu layer, coated. As a result, the realized cooling performance of the carrier substrate can be maintained for as long as possible over the service life of the carrier substrate, as well as the service life of the entire cooling system or its additional components.

0031According to a further embodiment of the present invention, it is provided that the primary layer has a via and/or the intermediate layer has a contact element to form a further conductor track. As a result, the metallic intermediate layer can be used advantageously as a further conductor track, via which currents for controlling individual components can be conducted, which means that parasitic inductive interference fields or Interference effects to improve the driving of the electrical components and the electromagnetic compatibility can be reduced or improved and a low-inductance carrier substrate can be provided.

0032In order to connect the intermediate layer in an electrically conductive manner to the metallic connection elements on the primary layer, the plated-through holes or vias are provided. The vias are designed as through-holes in the primary layer, with the through-hole being filled with an electrically conductive filling material, in particular an electrically conductive paste. The vias are preferably arranged directly below a metal connection element in a direction running perpendicularly to a main plane of extension of the primary layer. In order to control the metallic intermediate layer or to apply a voltage, it is provided that the metallic intermediate layer has its own contact element or via a plated-through hole with a contact element on the component side, ie on the side of the primary layer facing away from the intermediate element, is in an electrically conductive connection. It is also conceivable that the electrical components on the component side are not controlled via a through-hole plating, but rather by conductor tracks that partially or partially encircle the primary layer and thus create a contact between the component side and the intermediate layer.

0033According to the invention, the secondary layer is made of molybdenum, tungsten or composite materials based on WCu or MoCu. A particularly stable carrier substrate can be provided with a secondary layer made of ceramic, with the secondary layer made of ceramic being particularly suitable for electrical insulation if the intermediate layer is used as a further conductor track. Therefore, the use of a secondary layer made of ceramic proves to be advantageous when a semiconductor element made of SiC or GaN is provided as an electrical component. In order to reduce the production costs, however, a secondary layer made of molybdenum can also be used in an advantageous manner, in particular in those cases in which a corresponding insulation is not required and is of secondary importance.

0034In a further embodiment of the present invention, it is provided that the metallic intermediate layer, the conductor track and/or the cooling structure has etched structures on the side facing the primary layer and/or the secondary layer to increase the thermal shock resistance. This creates openings on the surface of the intermediate layer, the conductor tracks and the metallic connection elements, ie "hidden dimple" - structures which are directed towards the primary layer and/or the secondary layer, whereby the thermal shock resistance of the carrier substrate can advantageously be increased up to 10-fold. These structures are etched in in the form of points or lines. The metallic intermediate layer preferably has etched-in structures both on the side facing the primary layer and on the side facing the secondary layer. It is also conceivable that the intermediate layer has at least one etched-through hole or has punctiform etched-in structures arranged along a line, which are not arranged one above the other.

0035Provision is preferably made for the carrier substrate to have a housing part encasing the component side, in particular a housing part designed as a cast part, the housing part preferably terminating flush with the cooling structure arranged on the cooling side. The housing part advantageously protects the electrical components on the component side from external influences. In order to communicate with the electrical components on the carrier substrate, the contact elements preferably run through the housing part and are available to a user as contacts on the outside of the housing part. The flush termination of the housing part with the cooling structure has proven to be advantageous in that it gives the user the option of mounting the carrier substrate on a heat sink, in particular on a solid body serving as a heat sink, for example together with other carrier substrates, or on the cooling structure to couple a shell element or a component to form a fluid channel, in particular a liquid channel.

0036In an advantageous embodiment of the present invention, it is provided that the cooling structure has a recess in the metal layer to form an expansion joint in an area adjacent to the edge profile of the secondary layer. In particular, it is provided that the recess serving as an expansion joint is not covered by the secondary layer. It is thereby possible in an advantageous manner that a thermal longitudinal expansion of the cooling structure does not lead to the formation of mechanical stresses, in that the recess serving as an expansion joint absorbs the longitudinal expansion of the cooling structure.

0037Another object of the present invention is a method for producing a carrier substrate. All of the features described for the carrier substrate according to the invention and their advantages can also be transferred to the method according to the invention and vice versa.

0038Specifically, the method for producing a carrier substrate proposes that the interconnect layer, the primary layer, the secondary layer, the intermediate layer and the cooling structure are joined or bonded using a uniform connection method, in particular simultaneously in a common method step. In particular, it is provided that the cooling structure is connected to the secondary layer as part of the production of the carrier substrate. Through the simultaneous joining or Bonding of the individual layers can advantageously avoid sagging of the individual layers during manufacture, as is usual when the cooling structure is subsequently attached. A DCB process, active soldering, hard soldering or gluing is conceivable as a joining process or connection method.

0039Alternatively, it is also conceivable to manufacture two or more sub-substrates separately in a first step using the joining methods already mentioned, such as the primary layer with the conductor track layer and part of the metallic intermediate layer, and the secondary layer with part of the metallic intermediate layer and the cooler structure. These two individual laminates are joined in a second joining step to form the substrate according to the invention, using common joining processes such as DCB process, brazing, soft soldering, diffusion welding or a sintering process.

0040The person skilled in the art understands a “DCB method” (Direct Copper Bond Technology) to be such a method which, for example, is used to bond metal layers or sheets (eg copper sheets or foils) to one another and/or to ceramic or ceramic layers serves, namely using metal or copper sheets or metal or Copper foils which have a layer or coating (reflow layer) of a chemical compound of the metal and a reactive gas, preferably oxygen, on their surface sides. In this example in the<patcit id="pcit0006" dnum="US3744120A"><text>U.S. 3,744,120A</text></patcit> or in the<patcit id="pcit0007" dnum="DE2319854C2"><text>DE23 19 854 C2</text></patcit> In the method described, this layer or coating (reflow layer) forms a eutectic with a melting temperature below the melting temperature of the metal (e.g. copper), so that by placing the foil on the ceramic and heating all the layers, they can be bonded together, and namely by melting the metal or copper essentially only in the area of ​​the melting layer or oxide layer.

0041In particular, the DCB method then z. B. the following process steps:<ul id="ul0001" list-style="dash" compact="compact"><li>oxidizing a copper foil so that a uniform copper oxide layer results;</li><li>laying the copper foil on the ceramic layer;</li><li>heating the composite to a process temperature between about 1025 to 1083°C, e.g. B. to about 1071 ° C;</li><li>Cool down to room temperature.</li></ul>

0042Under an active solder process z. B. for connecting metal layers or metal foils, in particular copper layers or copper foils with ceramic material, a method is to be understood which is also used specifically for the production of metal-ceramic substrates, at a temperature between approx. 650-1000°C a connection between a metal foil, e.g. copper foil, and a ceramic substrate, e.g. aluminum nitride ceramic, produced using a hard solder, which also contains an active metal in addition to a main component such as copper, silver and/or gold. This active metal, which is for example at least one element from the group Hf, Ti, Zr, Nb, Ce, creates a connection between the solder and the ceramic by chemical reaction, while the connection between the solder and the metal is a metallic brazing connection .

0043In particular, it is provided that the cooling structure is connected or joined as part of the production of the carrier substrate. This increases the temperature stability in the interface areas up to the areas of the carrier substrate affected by brazing or the DCB process. The consequence is that the carrier substrate can also be used for components made of semiconductor materials such as SiC or GaN, which can be operated at temperatures above 200 °C. there are no limitations up to e.g. 400°C with regard to the process temperatures in the subsequent assembly and connection processes for module production

0044According to a further embodiment of the present invention, the carrier substrate is virtually divided into a primary substrate, a secondary substrate and preferably. broken down into a virtual intermediate layer d15.2 located in between. The primary substrate is formed from the layers d12, d10 and d15.1 and the secondary substrate from the layers d15.3, d20 and d30. When dimensioning a thermomechanical symmetry between the primary substrate and the secondary substrate is sought, ie the coefficient of thermal expansion (CTE) of both substrates should preferably be the same or at least similar, for example match within a tolerance of +/-20% or preferably +/-10%, particularly preferably +/-5%. This is necessary in order to reduce possible thermomechanical stresses and the resulting deflection effects. The resulting coefficient of thermal expansion CTE` of a layered composite material is approximately calculated as follows:<maths id="math0001"><math display="block"><mi mathvariant="italic">CTE</mi><mo>′</mo><mo>=</mo><mfrac><mstyle displaystyle="true"><msubsup><mo>∑</mo><mrow><mi>i</mi><mo>=</mo><mn>1</mn></mrow><mi>n</mi></msubsup><mrow><mi mathvariant="italic">CTEi</mi><mspace width="1ex" /><mi mathvariant="italic">egg</mi><mspace width="1ex" /><mi mathvariant="italic">you</mi></mrow></mstyle><mstyle displaystyle="true"><msubsup><mo>∑</mo><mrow><mi>i</mi><mo>=</mo><mn>1</mn></mrow><mi>n</mi></msubsup><mrow><mi mathvariant="italic">egg</mi><mspace width="1ex" /><mi mathvariant="italic">you</mi></mrow></mstyle></mfrac></math><img file="EP3559989B1_D0001.tif" /></maths>

0045The person skilled in the art understands by approximately here in particular that the determined coefficient of thermal expansion deviates from the actual coefficient of thermal expansion by up to 2 to 4%.

0046It is assumed here that the respective sub-substrate does not bend or bends only insignificantly. In addition to the respective expansion coefficient CTE_i The modulus of elasticity E also applies here_i and the layer thickness d_i a. The possible bending is avoided in that the metallizations on both sides are the same or similar from a thermomechanical point of view, which means that, for example, in the case of full-area metallizations, both metal layers are of the same or at least similar thickness. From this it follows that preferably d15.1=d12 and d15.3=d30E, where d30E is an effective layer thickness of the cooler layer, in which a possible structuring of the cooling structure is taken into account.

0047The following therefore applies to the primary substrate:<maths id="math0002"><math display="block"><mi mathvariant="italic">CTE</mi><mn>10</mn><mo>′</mo><mo>=</mo><mfrac><mrow><mi mathvariant="italic">CTE</mi><mn>12</mn><mspace width="1ex" /><mi>E</mi><mn>12</mn><mspace width="1ex" /><mi>i.e</mi><mn>12</mn><mo>+</mo><mi mathvariant="italic">CTE</mi><mn>10</mn><mspace width="1ex" /><mi>E</mi><mn>10</mn><mspace width="1ex" /><mi>i.e</mi><mn>10</mn><mo>+</mo><mi mathvariant="italic">CTE</mi><mn>15.1</mn><mspace width="1ex" /><mi>E</mi><mn>15.1</mn><mspace width="1ex" /><mi>i.e</mi><mn>15.1</mn></mrow><mrow><mi>E</mi><mn>12</mn><mspace width="1ex" /><mi>i.e</mi><mn>12</mn><mo>+</mo><mi>E</mi><mn>10</mn><mspace width="1ex" /><mi>i.e</mi><mn>10</mn><mo>+</mo><mi>E</mi><mn>15.1</mn><mspace width="1ex" /><mi>i.e</mi><mn>15.1</mn></mrow></mfrac></math><img file="EP3559989B1_D0002.tif" /></maths> and the secondary substrate holds:<maths id="math0003"><math display="block"><mi mathvariant="italic">CTE</mi><mn>20</mn><mo>′</mo><mo>=</mo><mfrac><mrow><mi mathvariant="italic">CTE</mi><mn>15.3</mn><mspace width="1ex" /><mi>E</mi><mn>15.3</mn><mspace width="1ex" /><mi>i.e</mi><mn>15.3</mn><mo>+</mo><mi mathvariant="italic">CTE</mi><mn>20</mn><mspace width="1ex" /><mi>E</mi><mn>20</mn><mspace width="1ex" /><mi>i.e</mi><mn>20</mn><mo>+</mo><mi mathvariant="italic">CTE</mi><mn>30</mn><mspace width="1ex" /><mi>E</mi><mn>30</mn><mspace width="1ex" /><mi>i.e</mi><mn>30</mn><mi>E</mi></mrow><mrow><mi>E</mi><mn>15.3</mn><mspace width="1ex" /><mi>i.e</mi><mn>15.3</mn><mo>+</mo><mi>E</mi><mn>20</mn><mspace width="1ex" /><mi>i.e</mi><mn>20</mn><mo>+</mo><mi>E</mi><mn>30</mn><mspace width="1ex" /><mi>i.e</mi><mn>30</mn><mi>E</mi></mrow></mfrac></math><img file="EP3559989B1_D0003.tif" /></maths> where d30E is the thermomechanically effective thickness of the cooling structure 30. The thickness d30E depends on the structuring of the cooling structure 30, for which the following applies:<maths id="math0004"><math display="block"><mi>i.e</mi><mn>30.1</mn><mo>≤</mo><mi>i.e</mi><mn>30</mn><mi>E</mi><mo>≤</mo><mi>i.e</mi><mn>30</mn></math><img file="EP3559989B1_D0004.tif" /></maths>

0048If it is not reasonably possible to set a complete thermomechanical symmetry (CTE10' = CTE20') when dimensioning the individual components or layers of the carrier substrate, a temperature-dependent bending is to be expected. The approach described primarily serves to optimize the layer structure from a thermomechanical point of view with the aim of realizing carrier substrates that are as flat as possible.

0049The selection of the intermediate layer 15 and thus the thickness of the resulting virtual intermediate layer d15.2 depends on the required thermal mass, which decisively defines the behavior of the carrier substrate 1 over time. The layers relevant for the thermal mass are the conductor tracks d12, the intermediate layer d15 and the base thickness d30.1 of the cooling structure 30. The thickness of the thermal buffer layers is thus<i>dCu_th</i> = d12 + d15 + d30.1 defined. The thickness of the thermal buffer layers<i>dCu_thst</i> between 1 and 10 mm, preferably between 1.1 and 5 mm, particularly preferably between 1.2 and 3 mm.

0050The optimal deflection h is zero in most applications. The amount of bending h is less than 200 μm, preferably less than 100 μm and particularly preferably less than 50 μm.

0051All of the information given above is to be understood as an approximation, since the respective structuring, in particular of the conductor tracks d12 and the cooling structure 30, and deviating edge effects at the edges of the components cannot be taken into account across the board. The above models are based on a purely elastic behavior of the materials. The influence of plastic deformation plays a subordinate role here.

0052According to a further embodiment of the present invention, it is provided that a transverse contraction behavior is also taken into account when determining the coefficient of thermal expansion CTE. In particular, it is provided that the coefficient of thermal expansion is determined as a function of a Poisson's ratio v or vi, preferably according to<maths id="math0005"><math display="block"><mi>CTE</mi><mo>′</mo><mo>=</mo><mfrac><mstyle displaystyle="true"><msubsup><mo>∑</mo><mrow><mi>i</mi><mo>=</mo><mn>1</mn></mrow><mi>n</mi></msubsup><mrow><mi mathvariant="italic">CTEi</mi><mfrac><mi>E</mi><mfenced><mn>1</mn><mo>−</mo><mi mathvariant="italic">νi</mi></mfenced></mfrac><mi mathvariant="italic">you</mi></mrow></mstyle><mstyle displaystyle="true"><msubsup><mo>∑</mo><mrow><mi>i</mi><mo>=</mo><mn>1</mn></mrow><mi>n</mi></msubsup><mrow><mfrac><mi mathvariant="italic">egg</mi><mfenced><mn>1</mn><mo>−</mo><mi mathvariant="italic">νi</mi></mfenced></mfrac><mi mathvariant="italic">you</mi></mrow></mstyle></mfrac></math><img file="EP3559989B1_D0005.tif" /></maths>

0053This allows the coefficient of thermal expansion to be determined even more precisely.

0054Further advantages and features emerge from the following description of preferred embodiments of the subject according to the invention with reference to the attached figures. It shows:<dl id="dl0001"><dt><b>Fig.1:</b></dt><dd>a carrier substrate for electrical components according to a first exemplary embodiment of the present invention.</dd><dt><b>2</b></dt><dd>an electrical component mounting substrate according to a second exemplary embodiment of the present invention</dd><dt><b>3</b></dt><dd>an electrical component mounting substrate according to a third exemplary embodiment of the present invention</dd><dt><b>4</b></dt><dd>an electrical component mounting substrate according to a fourth exemplary embodiment of the present invention</dd><dt><b>figure 5</b></dt><dd>the carrier substrate<figref idref="f0004">figure 4</figref> in a bent state</dd><dt><b>6</b></dt><dd>a cooling structure for a carrier substrate according to a fifth embodiment of the present invention.</dd></dl>

0055In<figref idref="f0001"><b>figure 1</b></figref> a carrier substrate 1 for electrical components 13 according to a first exemplary embodiment of the present invention is shown schematically in a sectional view. This is preferably a ceramic-containing carrier sub-substrate 1 that is advantageous for special applications. In particular, the carrier substrate 1 has a component side 4 on which electrically insulated metallic conductor tracks 12, for example made of copper or aluminum, are provided for electrical components 13 or modules. By connecting electrical components 13 to the metallic conductor tracks 12 and connecting the conductor tracks 12, electrical circuits can be implemented with which the electrical components 13 can be controlled. A cooling structure 30 integrated into the carrier substrate 1 is provided on a cooling side 5 opposite the component side 4 in order to counteract heat development occurring during operation and emanating from the electrical components 13 , in particular heat development occurring locally in areas with electrical components 13 .

0056In particular, the cooling structure 30 is a metallic needle or pin structure along which a fluid, preferably a cooling liquid, flows during operation, whereby the heat given off by the cooling structure 30 to the fluid can advantageously be continuously transported away .

0057In order to ensure electrical insulation between the individual conductor tracks 12 on the component side 4 , a primary layer 10 made of ceramic is provided on the component side 4 . In this case, the primary layer 10 is designed in the form of a plate. In addition to the primary layer 10, a secondary layer 20 is provided to provide sufficient stability or rigidity. It is provided here that the material from which the primary layer 10 and the secondary layer 20 are made has a modulus of elasticity or modulus of elasticity that is greater than that of the material from which the conductor tracks are made. In order to counteract a bimetal effect that occurs during temperature changes and causes the carrier substrate 1 to arch, it is also preferably provided that the carrier substrate 1 is thermally mirror-symmetrical or essentially thermomechanically mirror-symmetrical to a metallic intermediate layer 15, which is arranged between the primary layer 10 and the secondary layer 20 is to shape.

0058For example, the carrier substrate 1 is mirror-symmetrical with regard to its layer sequence, ie with regard to the number and type of layers, with regard to the respective layer thicknesses and/or with regard to the materials used for the layers, or the individual layers are adapted to one another in this regard. In particular, the secondary layer 20 is made of a material whose coefficient of expansion preferably corresponds to that of the material from which the primary layer 10 is made. It is provided according to the invention that the secondary layer 20 is made of ceramic, molybdenum, tungsten or composite materials based on WCu or MoCu. In the illustrated embodiment, the secondary layer 20 is made of ceramic. It is also conceivable that the coefficients of expansion of the primary substrate 10' and of the secondary substrate 20' match within a specified tolerance range. The expansion coefficients of the primary substrate 10' and the secondary substrate 20' preferably deviate from one another by less than +/-20%, preferably less than +/-10%. By selecting the materials appropriately with regard to the coefficients of expansion for the primary substrate 10' and the secondary substrate 20', the configuration of the carrier substrate 1 with the primary substrate 10' and the secondary substrate 20' not only advantageously increases the rigidity of the carrier substrate 1 , but in addition any thermal stresses which occur during the production of the carrier substrate 1 or during its intended operation, counteracted.

0059In order to improve the heat transport from the component side 4 to the cooling side 5 , provision is also made for a multi-layer or a single-layer metallic intermediate layer 15 to be arranged between the primary layer 10 and the secondary layer 20 . The metallic intermediate layer 15 is thicker than the primary layer 10 and/or the secondary layer 20, in particular thicker than the sum of the primary layer thickness and the secondary layer thickness. The intermediate layer 15 is preferably greater than twice, preferably greater than three times or particularly preferably greater than five times the total layer thickness of the primary layer 10 and the secondary layer 20. A thermal mass is thereby formed in the form of the intermediate layer 15.

0060The arrangement of the metallic intermediate layer 15, which acts as a thermal mass, between the primary layer 10 and the secondary layer 20 proves to be advantageous in that the intermediate layer 15 serves as an intermediate store, which proves to be particularly advantageous in turn-on and/or overload situations in particular. As a result, higher short-term peak powers can be intercepted via the heat capacity of the intermediate layer 15 and in the event of a failure of the heat exchanger or heat sink connected to the cooling side, the time span in which the failure can be reacted to without permanent damage to the carrier substrate is increased 1 stay behind. Furthermore, the secondary layer 20 ensures sufficient stability that allows the layer thickness of the primary layer 10 to be reduced. Due to the immediate proximity of the primary layer 10 to the heat-generating components 13 on the carrier substrate 1, this has a particularly advantageous effect on the thermal resistance. In addition, the heat emanating from the local heat sources on the component side 4 is distributed over a larger area in the intermediate layer 15, since the thickness of the intermediate layer 15 allows the heat to spread sufficiently or undirectedly over a comparatively large distance, which also has an advantageous effect on the thermal resistance affects. Furthermore, the comparatively large thickness of the intermediate layer 15 proves to be advantageous in that it further increases the rigidity of the carrier substrate 1 and thus prevents sagging caused by different expansion coefficients and external stresses and forces such as those caused by the pressure of the cooling liquid on the substrate , counteracts.

0061In order to reduce parasitic induction effects occurring on the carrier substrate 1 during operation, provision is also preferably made for the metallic intermediate layer 15 to be used as a further conductor track. In this case, a via 11, ie a via provided in the primary layer 10, via which a current can be applied to the metallic intermediate layer 15 or via which an electrically conductive connection between the metallic intermediate layer 10 and a metallic connection element on the primary layer 10 is realized. In order to ensure adequate electrical insulation, in the case of carrier substrates 1 with a via 11, the secondary layer 20 is in particular an electrically insulating layer, for example a further ceramic layer. in the in<figref idref="f0001">figure 1</figref> In the embodiment illustrated, contact elements are provided on the component side, ie on the primary layer, via which a voltage can be applied to the metallic intermediate layer 15 .

0062In the embodiment shown, it is provided that the intermediate layer thickness b is between 1.1 and 10 times, preferably between 1.2 and 5 times, particularly preferably between 1.3 and 3 times or even essentially 1.5 times as thick is like the primary layer thickness a¹ and/or the secondary layer thickness a². For example, the intermediate layer thickness b assumes a value between 1 mm and 10 mm, preferably between 1 mm and 5 mm, particularly preferably between 1.5 mm and 5 mm, or even a value of essentially 1.5 mm. Further intermediate layer thicknesses deviating from this, in particular greater, are also possible.

0063Alternatively, it is provided that the intermediate layer thickness b is between 2.5 and 100 times, preferably between 3.5 and 50 times, particularly preferably between 10 and 25 times or even essentially 2.0 times as thick as the primary layer thickness a¹ and/or the secondary layer thickness a². For example, the intermediate layer thickness b assumes a value between 1 mm and 10 mm, preferably between 1 mm and 5 mm, particularly preferably between 1.5 mm and 5 mm, or even a value of essentially 3 mm.

0064Furthermore, it is preferably provided that the primary layer thickness a¹ the secondary layer thickness a² essentially corresponds. Alternatively, it is conceivable that the secondary layer thickness a² is essentially 1.5 times to 5 times, preferably 1.3 times to 2.5 times and particularly preferably 1.1 to 2 times as thick as the primary layer thickness a¹. Furthermore, the thickness ratios can be structured in such a way that a² = 0.5 - 2.0 a¹, preferably a² = 0.7 - 1.6 a¹, particularly preferably a² = 0.8 - 1.2a¹ is.

0065In other words: the thickness ratios can be structured in such a way that a² = 0.5 a¹ up to 2.0 a¹, preferably a² = 0.7 a¹ up to 1.6 a¹, particularly preferably a² = 0.8a¹ up to 1.2 a¹ is.

0066Provision is also made for the cooling structure 30 to have a base body region B1 and a web region S1. The web area S1 is preferably formed by webs or fins protruding perpendicularly from the base body area B1, while the base body area B1 forms in particular a solid area or unstructured body. The base body area B1 and the web area S1 are preferably formed in one piece. A ratio between a web area thickness SD and a base body thickness BD assumes a value between 1.2 and 6, preferably between 1.4 and 3 and particularly preferably between 1.6 and 2.5. Furthermore, it is provided that a cooling structure thickness KD, in particular an effective cooling structure thickness d30.E, is 0.03 to 1 times, preferably 0.1 to 0.5 and particularly preferably 0.15 to 0.3 as large as the intermediate layer thickness b.

0067In the<figref idref="f0002"><b>figure 2</b></figref> a carrier substrate 1 for electrical components 13 according to a second exemplary embodiment of the present invention is shown schematically in a sectional view. The carrier substrate 1 agrees essentially with that from the<figref idref="f0001">figure 1</figref> match. In contrast to the embodiment<figref idref="f0001">figure 1</figref> a contact element 16 is provided on the intermediate layer 15 in this case. This contact element 16 allows direct contacting of the intermediate element 15 in order to apply a voltage to it in order to reduce parasitic inductive effects on the carrier substrate 1 and thus cause a current in the intermediate layer 15 . Provision is also made for the carrier substrate 1 to be surrounded by a housing part 40 on the component side 4 . In particular, this is a cast housing part 40. In order to contact the conductor tracks 12 on the primary layer 10, a contact element 16 is also provided. In order to apply a voltage to the conductor track 12 on the primary layer 10 and the intermediate layer 15 , it is provided that the contact elements 16 of the intermediate layer 15 and the upper side of the primary layer 10 are routed through the housing part 40 . In this case, the contact elements 16 preferably protrude from the housing part 40 on the same side of a housing part wall.

0068In the embodiment shown, the carrier substrate 1 comprises a shell element 50, in particular a plastic-containing shell element 50, to form a fluid channel 32, in which a cooling liquid, for example, is transported along a direction of flow during operation, which shell element is preferably clipped to the cooling structure 30. To seal the connection between the cooling structure 30 and the shell element 50 , a sealing element 31 is provided, which is embedded in a corresponding recess in the shell element 50 . The needles or pins of the cooling structure 30 arranged on the cooling side 5 of the carrier substrate 1 protrude into the fluid channel 32 filled with the cooling liquid during operation.

0069In the<figref idref="f0003"><b>figure 3</b></figref> a carrier substrate 1 for electrical components 13 according to a third exemplary embodiment of the present invention is shown schematically in a sectional view. Here, the carrier substrate 1 agrees essentially with the from<figref idref="f0002">figure 2</figref> match. In addition to the features of the carrier substrate 1 from the<figref idref="f0002">figure 2</figref> it is provided here that the cast housing part 40 terminates flush with the cooling structure 30 on the cooling side 5 . Advantageously, this allows the carrier substrate 1 to simply be placed on or fastened to a cooling structure, for example to a shell element 50 . As a result, the carrier substrate 1 can be used particularly flexibly. For this purpose, provision is made in particular for the cooling structure 30 to have an undercut or a recess in one or more edge regions, so that the cooling structure 30 interacts with the housing part 40 in a form-fitting manner along a direction running perpendicular to the primary layer 10 .

0070In<figref idref="f0004"><b>figure 4</b></figref> 1 is illustrated an electrical component mounting substrate according to a fourth exemplary embodiment of the present invention. In order to dimension the primary layer, the secondary layer and the metallic intermediate layer, it is provided that the carrier substrate 1 is virtually broken down into a primary substrate 10′, a secondary substrate 20 and preferably into a virtual intermediate layer 15′ located in between. The primary substrate 10' is formed from the layers d12, d10 and d15.1 and the secondary substrate from the layers d15.3, d20 and d30. When dimensioning a thermomechanical symmetry between the primary substrate and the secondary substrate is sought, ie the coefficient of thermal expansion (CTE) of the primary substrate 10` and the secondary substrate 20' should preferably be the same or at least similar, for example match within a tolerance of +/- 20 or preferably +/- 10%. This is necessary to reduce possible thermo-mechanical stresses and the resulting deflection effects. The resulting coefficient of thermal expansion CTE` of a layered composite material is approximately calculated as follows:<maths id="math0006"><math display="block"><mi mathvariant="italic">CTE</mi><mo>′</mo><mo>=</mo><mfrac><mstyle displaystyle="true"><msubsup><mo>∑</mo><mrow><mi>i</mi><mo>=</mo><mn>1</mn></mrow><mi>n</mi></msubsup><mrow><mi mathvariant="italic">CTEi</mi><mspace width="1ex" /><mi mathvariant="italic">egg</mi><mspace width="1ex" /><mi mathvariant="italic">you</mi></mrow></mstyle><mstyle displaystyle="true"><msubsup><mo>∑</mo><mrow><mi>i</mi><mo>=</mo><mn>1</mn></mrow><mi>n</mi></msubsup><mrow><mi mathvariant="italic">egg</mi><mspace width="1ex" /><mi mathvariant="italic">you</mi></mrow></mstyle></mfrac></math><img file="EP3559989B1_D0006.tif" /></maths>

0071It is assumed here that the respective sub-substrate does not bend or bends only insignificantly. This possible bending is avoided in that the metallizations on both sides are the same or similar from a thermomechanical point of view, which means that, for example, in the case of full-area metallizations, both metal layers are of the same or at least similar thickness. It follows that preferably d15.1 = d12 and d15.3 = d30E.

0072The following therefore applies to the primary substrate:<maths id="math0007"><math display="block"><mi mathvariant="italic">CTE</mi><mn>10</mn><mo>′</mo><mo>=</mo><mfrac><mrow><mi mathvariant="italic">CTE</mi><mn>12</mn><mspace width="1ex" /><mi>E</mi><mn>12</mn><mspace width="1ex" /><mi>i.e</mi><mn>12</mn><mo>+</mo><mi mathvariant="italic">CTE</mi><mn>10</mn><mspace width="1ex" /><mi>E</mi><mn>10</mn><mspace width="1ex" /><mi>i.e</mi><mn>10</mn><mo>+</mo><mi mathvariant="italic">CTE</mi><mn>15.1</mn><mspace width="1ex" /><mi>E</mi><mn>15.1</mn><mspace width="1ex" /><mi>i.e</mi><mn>15.1</mn></mrow><mrow><mi>E</mi><mn>12</mn><mspace width="1ex" /><mi>i.e</mi><mn>12</mn><mo>+</mo><mi>E</mi><mn>10</mn><mspace width="1ex" /><mi>i.e</mi><mn>10</mn><mo>+</mo><mi>E</mi><mn>15.1</mn><mspace width="1ex" /><mi>i.e</mi><mn>15.1</mn></mrow></mfrac></math><img file="EP3559989B1_D0007.tif" /></maths> and the secondary substrate holds:<maths id="math0008"><math display="block"><mi mathvariant="italic">CTE</mi><mn>20</mn><mo>′</mo><mo>=</mo><mfrac><mrow><mi mathvariant="italic">CTE</mi><mn>15.3</mn><mspace width="1ex" /><mi>E</mi><mn>15.3</mn><mspace width="1ex" /><mi>i.e</mi><mn>15.3</mn><mo>+</mo><mi mathvariant="italic">CTE</mi><mn>20</mn><mspace width="1ex" /><mi>E</mi><mn>20</mn><mspace width="1ex" /><mi>i.e</mi><mn>20</mn><mo>+</mo><mi mathvariant="italic">CTE</mi><mn>30</mn><mspace width="1ex" /><mi>E</mi><mn>30</mn><mspace width="1ex" /><mi>i.e</mi><mn>30</mn><mi>E</mi></mrow><mrow><mi>E</mi><mn>15.3</mn><mspace width="1ex" /><mi>i.e</mi><mn>15.3</mn><mo>+</mo><mi>E</mi><mn>20</mn><mspace width="1ex" /><mi>i.e</mi><mn>20</mn><mo>+</mo><mi>E</mi><mn>30</mn><mspace width="1ex" /><mi>i.e</mi><mn>30</mn><mi>E</mi></mrow></mfrac></math><img file="EP3559989B1_D0008.tif" /></maths>

0073Where d30E is the thermomechanically effective thickness of the cooling structure 30. The thickness d30E is dependent on the structuring of the cooling structure 30, for which the following applies:<maths id="math0009"><math display="block"><mi>i.e</mi><mn>30.1</mn><mo>≤</mo><mi>i.e</mi><mn>30</mn><mi>E</mi><mo>≤</mo><mi>i.e</mi><mn>30</mn></math><img file="EP3559989B1_D0009.tif" /></maths>

0074If it is not sensibly possible to set complete thermomechanical symmetry (CTE10′=CTE20′) when dimensioning the individual components or layers of the carrier substrate 1, temperature-dependent bending is to be expected. The approach described primarily serves to optimize the layer structure from a thermomechanical point of view with the aim of realizing carrier substrates 1 that are as planar as possible.

0075The selection of the intermediate layer 15 and thus the thickness d15.2 of the resulting virtual intermediate layer, ie the intermediate substrate 15′, depends on the required thermal mass, which decisively defines the behavior of the carrier substrate 1 over time. The layers or layer thicknesses relevant for the thermal mass are those of the conductor track d12, the intermediate layer d15 and the base thickness d30.1 of the cooling structure 30. The thickness of the thermal buffer layers is therefore<i>dCu_th</i> = d12 + d15 + d30.1 defined. The thickness of the thermal buffer layers<i>dCu_th</i> is between 1 and 10 mm, preferably between 1.1 and 5 mm, particularly preferably between 1.2 and 3 mm. The optimal deflection h is zero in most applications. The amount of bending h is less than 200 μm, preferably less than 100 μm and particularly preferably less than 50 μm. All of the information given above is to be understood as an approximation, since the respective structuring, in particular of the conductor tracks d12 and the cooling structure 30, and deviating edge effects at the edges of the components cannot be taken into account across the board. The above models are based on a purely elastic behavior of the materials. The influence of plastic deformation plays a subordinate role here.

0076In the<figref idref="f0005"><b>figure 5</b></figref> 1 shows the mounting substrate 1 for electrical components 13 according to the fourth exemplary embodiment of the present invention. In this case, the carrier substrate 1 is shown in a bent state, in which the carrier substrate 1 has a bend h.

0077In the<figref idref="f0006"><b>figure 6</b></figref> FIG. 12 is a cooling structure 30 for a carrier substrate 1 according to a fifth embodiment of the present invention. It is provided here that a recess 8 is arranged on the side of the metal layer designed as a cooling structure 30 that faces the secondary layer 20 and/or the primary layer 10 . In particular, it is provided that the recess 8 is arranged offset relative to the primary layer 10 and/or the secondary layer 20 in a direction running parallel to the main plane of extension, with the cooling structure 30 protruding relative to the primary layer 10 and/or the secondary layer 20 . In particular, it is provided that the recess is designed as an expansion joint in order to prevent the thermal expansion of the cooling structure 30 from causing mechanical stresses in the entire carrier substrate 1 . The scope of protection of the patent is determined by the patent claims.

Reference List

0078<dl id="dl0002" compact="compact"><dt>1</dt><dd>carrier substrate</dd><dt>4</dt><dd>component side</dd><dt>5</dt><dd>cooling side</dd><dt>8</dt><dd>recess</dd><dt>10</dt><dd>primary layer</dd><dt>10`</dt><dd>primary substrate</dd><dt>11</dt><dd>via</dd><dt>12</dt><dd>trace</dd><dt>13</dt><dd>electrical component</dd><dt>16</dt><dd>contact element</dd><dt>15</dt><dd>intermediate layer</dd><dt>15'</dt><dd>intermediate substrate</dd><dt>20</dt><dd>secondary layer</dd><dt>20'</dt><dd>secondary substrate</dd><dt>30</dt><dd>cooling structure</dd><dt>31</dt><dd>sealing element</dd><dt>32</dt><dd>fluid channel</dd><dt>40</dt><dd>housing part</dd><dt>50</dt><dd>shell element</dd><dt>a¹</dt><dd>primary layer thickness</dd><dt>a²</dt><dd>secondary layer thickness</dd><dt>KD</dt><dd>cooling structure thickness</dd><dt>BD</dt><dd>base body thickness</dd><dt>SD</dt><dd>web area thickness</dd><dt>b</dt><dd>interlayer thickness</dd><dt>H</dt><dd>bend</dd><dt>d12, d10 and d15.1</dt><dd>Layer thickness contributions to the primary substrate</dd><dt>d15.3, d20 and d30</dt><dd>Layer thickness contributions to the secondary substrate</dd><dt>d15.2</dt><dd>Layer thickness of the intermediate substrate</dd><dt>d30.E</dt><dd>effective layer thickness of the cooler structure</dd><dt>d30.1, d30.2</dt><dd>Layer thickness contributions to the cooling structure</dd></dl>