Distributed mesh-based memory and computing architecture

FIELD

0001The present disclosure relates generally to distributed computing and/or memory architectures and, more specifically, to a mesh topology that allows high bandwidth and redundant interconnects between nodes within the system.

BACKGROUND

0002Various topologies are known for enabling data communications between various computing components. Two common topologies are the bus and star topologies. Bus topologies use a multi-drop configuration to connect a variety of resources. For example, processing, memory, and input/output (I/O) components may be interconnected with a bus, using the bus to transfer data between the different components. Such a bus is commonly incorporated into a backplane that is used to interconnect different components. In systems requiring relatively high amounts of data transfer, however, bus topologies can limit system performance. For example, bus-based architectures using present day bus technology generally have a limit of approximately 2 Gigabits/second (Gbps) per backplane bus. Thus, systems requiring higher throughput may employ multiple backplane busses, which can present I/O challenges. Furthermore, bus architectures may present reliability concerns, as any resource on the bus can compromise the integrity of the whole system. In systems requiring high reliability, this can be a significant design consideration. For example, in a space environment, radiation effects may require that various electronic designs be capable of high-reliability even in the event of detrimental radiation effects on the electronic systems.

0003For example, radiation effects on electronics systems in a space environment generally fit into one of two categories, destructive (permanent) or non-destructive (not permanent). Destructive radiation effects, for the types of components as would be typically used to construct this type of system, may include single event latchup (SEL) and total ionizing dose (TID). Other destructive effects may also include single event dielectric rupture (SEDGR), single event gate rupture (SEGR) and single event gate burnout (SEB). Single event type errors can occur at any point in the mission duration. TID is a cumulative effect is generally more likely to occur later in a mission. Non-destructive radiation effects include single event upset (SEU), single event functional interrupt (SEFI), and single event transient (SET). SEU, SEFI and SET generally require mitigation at the system level. Some classes of these errors may require ground intervention. In any event, high reliability systems to be used in such applications may be required to continue operation after such events.

0004Traditional star topologies include multiple nodes that use point-to-point connections from each node to send/receive data from a central resource or switching function. Data transfer may be accomplished through data packets that comprise a header portion that instructs the switching function as to the destination node of the packet. In traditional star topologies, each packet sent by a node must pass through the switching function so that switching function can route the packet to its destination node. The switching function in such networks may be incorporated in a switch card in a chassis, for example, which provides the data/packet distribution for the system. Each node in such a star system may be an individual payload or a sub-network, and can be a leg on a star of the next layer in a hierarchy. Star topologies require redundancy to provide reliability. Reliance on a single switching function can cause a loss of all elements below a failure point. Dual star topologies may be used for high availability applications. However, even in a dual star configuration, the star topology still has a "choke" point that may restrict the speed and efficiency of packet transfer and may create a potential failure point within a network. In applications that require high reliability and high availability, a failure in such a network may not be able to be tolerated.

0005<patcit id="pcit0001" dnum="US7281055B2"><text>US 7,281,055 B2</text></patcit> discloses a multi-processor computer system in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters.

0006<nplcit id="ncit0001" npl-type="s"><text>SUKHTANKAR S ET AL: "A novel switch architecture for high-performance computing and signal processing networks" (2004</text></nplcit>) discloses a low-latency switch architecture for high performance packet-switched networks.

SUMMARY

0007Methods, systems, and devices for distributed computing are provided. Clusters of nodes are provided, each node have a communication link to a primary I/O switch as well as to two other nodes, thereby providing redundant alternative communication paths between different components of the system. Primary and redundant I/O switching modules may provide further redundancy for high availability and high reliability applications, such as applications that may be subjected to radiation effects such as described above Nodes in a cluster may provide data storage, processing, and/or input/output functions, as well as one or more alternate communications paths between system components. Multiple clusters of nodes may be coupled together to provide enhanced performance and/or reliability.

0008According to the present invention a distributed computing apparatus is provided, comprising a first and a second distributed computing system. Each distributed computing system comprises: a primary and a secondary input/output (I/O) switch module responsive to a command to transmit data to a location external to the distributed computing system, each input/output (I/O) switch module comprising an external I/O interface and a plurality of communications modules configured to transmit and receive data on a plurality of channels; a number of nodes each comprising a number of communications modules and one or more of a memory module, a processing module, or an input/output (I/O) module, wherein each of the communications modules are coupled to transmit and receive data to and from at least two other nodes and at least one of the I/O switches. The distributed computing apparatus is configured to send data to the first I/O switch module to transmit data to a location external to the distributed computing apparatus; and in the result of a failure of the first I/O switch module, send data to the second I/O switch module to transmit data to a location external to the distributed computing apparatus. The primary and secondary I/O switches of the first and second distributed computing systems are communicatively coupled. Each node of the plurality of nodes in the first distributed computing system is interconnected with a corresponding node in the plurality of nodes in the second distributed computing system.

0009The communications modules may transmit and receive data in data packets, the data packets comprising a header with address information and a payload. The communications modules, according to some embodiments, may comprise serializer/deserializer modules. In some embodiments, the I/O switch comprises an external I/O interface, and connections between each node have different data rate then the data rate of the external I/O interface.

0010The foregoing has outlined rather broadly the features and technical advantages of examples according to the disclosure in order that the detailed description that follows may be better understood. Additional features and advantages will be described hereinafter.

0011The conception and specific examples disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. Such equivalent constructions do not depart from the spirit and scope of the appended claims.

0012Features which are believed to be characteristic of the concepts disclosed herein, both as to their organization and method of operation, together with associated advantages will be better understood from the following description when considered in connection with the accompanying figures. Each of the figures is provided for the purpose of illustration and description only, and not as a definition of the limits of the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

0013A further understanding of the nature and advantages of the present invention may be realized by reference to the following drawings. In the appended figures, similar components or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label by a dash and a second label that distinguishes among the similar components. If only the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the second reference label. <ul id="ul0001" list-style="none"><li><figref idref="f0001">FIG. 1</figref> shows a block diagram of a distributed computing system in accordance with various embodiments;</li><li><figref idref="f0002">FIG. 2</figref> shows a block diagram of an exemplary I/O module in accordance with various embodiments;</li><li><figref idref="f0003">FIG. 3</figref> shows a block diagram of a node module in accordance with various embodiments;</li><li><figref idref="f0004">FIG. 4</figref> shows a block diagram of another node module in accordance with various embodiments;</li><li><figref idref="f0005">FIG. 5</figref> shows a block diagram of another node module in accordance with various embodiments;</li><li><figref idref="f0006">FIG. 6</figref> shows a block diagram of a satellite system in accordance with various embodiments;</li><li><figref idref="f0007">FIG. 7</figref> shows a block diagram of a distributed computing system in accordance with various embodiments;</li><li><figref idref="f0008">FIG. 8</figref> shows a block diagram of a distributed computing system in accordance with other various embodiments;</li><li><figref idref="f0009">FIG. 9</figref> shows a block diagram of a distributed computing system in accordance with other various embodiments;</li><li><figref idref="f0010">FIG. 10</figref> shows exemplary operational steps of a method in accordance with other various embodiments; and</li><li><figref idref="f0011">FIG. 11</figref> shows exemplary operational steps of a method in accordance with other various embodiments.</li></ul>

DETAILED DESCRIPTION

0014Methods, systems, and devices for distributed computing are provided. Clusters of nodes are provided, each node have a communication link to a primary I/O switch as well as to two other nodes, thereby providing redundant alternative communication paths between different components of the system. Primary and redundant I/O switching modules may provide further redundancy for high availability and high reliability applications. Nodes in a cluster may provide data storage, processing, and/or input/output functions. Multiple clusters of nodes may be coupled together to provide enhanced performance and/or reliability.

0015Thus, the following description provides examples, and is not limiting of the scope, applicability, or configuration set forth in the claims. Changes may be made in the function and arrangement of elements discussed without departing from the spirit and scope of the disclosure. Various embodiments may omit, substitute, or add various procedures or components as appropriate. For instance, the methods described may be performed in an order different from that described, and various steps may be added, omitted, or combined. Also, features described with respect to certain embodiments may be combined in other embodiments.

0016Referring first to <figref idref="f0001"><b>FIG. 1</b></figref><b>,</b> a block diagram illustrates an example of a distributed computing system 100 in accordance with various embodiments. The system 100 includes an input/output (I/O) switch module 105 and a plurality of nodes, node A 110 through node H 145. In the embodiment of <figref idref="f0001">FIG. 1</figref>, I/O switch module 105 includes a primary I/O switch module 150 and a redundant I/O switch module 155. While both the primary I/O switch module 150 and redundant I/O switch module 155 are illustrated within switch module 105, it will be readily understood that each of these switch modules 150 and 155 may be located physically separately from one another and may have separate power sources, in order to provide redundant switching capability. In some embodiments, each I/O switch module 150, 155, is communicatively coupled with each of the nodes 110-145. Furthermore, in some embodiments, each node 110-145 may be communicatively coupled with two other of nodes 110-145, thereby providing alternate communication paths between different nodes 110-145. Various examples of topologies of nodes 110-145 and switches 150, 155, will be described in more detail below.

0017Some embodiments of the present disclosure can be used to handle situations in which one or more nodes 110-145 and/or switches 150, 155, encounters a fault. For example, a fault can arise from the interaction of ionizing radiation with processor(s) and/or memory device(s) located within the nodes 110-145 or switches 150, 155. Specific examples of ionizing radiation include highly-energetic particles such as protons, heavy ions, electrons, and neutrons. A flux of highly-energetic particles can be present in environments including terrestrial and space environments. As used herein, the phrase "space environment" refers to the region beyond about 50 miles (80 km) in altitude above the earth.

0018Faults can arise from any source in any application environment such as from the interaction of ionizing radiation with one or more of the processors or memories. In particular, faults can arise from the interaction of ionizing radiation with the processor(s) in the space environment. It should be appreciated that ionizing radiation can also arise in other ways, for example, from impurities in solder used in the assembly of electronic components and circuits containing electronic components. These impurities typically cause a very small fraction (e.g., &lt;&lt; 1%) of the error rate observed in space radiation environments.

0019Various embodiments can be constructed and adapted for use in a space environment, generally considered as 80 km altitude or greater, and included as part of the electronics system of one or more of the following: a satellite, or spacecraft, a space probe, a space exploration craft or vehicle, an avionics system, a telemetry or data recording system, a communications system, or any other system where distributed memory synchronized processing may be useful. Additionally, embodiments may be constructed and adapted for use in a manned or unmanned aircraft including avionics, telemetry, communications, navigation systems or a system for use on land or water.

0020With reference now to <figref idref="f0002"><b>FIG. 2</b></figref><b>,</b> a block diagram illustration of an I/O switching module 200 in accordance with various embodiments is described. In the example of <figref idref="f0002">FIG. 2</figref>, primary I/O switching module 150-a includes a primary I/O interface 205 which, in various embodiments, provides a primary 40 Gbps I/O interface to one or more external systems. Primary I/O switching module 150-a also includes one or more processor module(s) 210, a memory 215 that contains software 220 for execution by processor module 425, and a number of serial communications modules 225-260. A redundant I/O switch module interface 265 is provided that provides communications to redundant I/O switch module (e.g., module 155 of <figref idref="f0001">FIG. 1</figref>) which may be present in various embodiments. Redundant I/O switch module interface 265, in some embodiments, provides communications with a redundant I/O switch module, such as module 155 of <figref idref="f0001">FIG. 1</figref>, at data rates of 40 Gbps, although it will be readily understood that other data rates may be employed according to other embodiments. Such a redundant I/O switch module 155 may include the same components as primary I/O switch module 150-a, and provide redundant capabilities for use in high availability and high reliability applications.

0021The primary I/O switching module 150-a is connected to each node (e.g., nodes 110-145 of <figref idref="f0001">FIG. 1</figref>) through a respective serial communications modules 225-260. In this example, eight serial communications modules 225-260 are able to transmit and receive data to and from eight nodes (e.g., nodes 110-145 of <figref idref="f0001">FIG. 1</figref>). In a set of embodiments, each serial communications module 225-260 is capable of communications at a data rate of 10 Gbps. In some embodiments, data is communicated between nodes and primary I/O switching module 150-a using data packets that include a header and payload. The header may include, for example, address and routing information that relates to the particular node the packet is to be sent to. In one particular example, Serial RapidIO protocol addressing is used, although other protocols may be used, such as PCIE, XAUI, GigE, Infiniband, etc., as well as custom protocols. In some embodiments, each of the communications modules 225-260 includes a serializer/deserializer (SerDes), which provides data transfer for the communications modules 225-260.

0022The basic SerDes function of some embodiments, as is well known, is made up of two functional blocks: the Parallel In Serial Out (PISO) block (i.e., Parallel-to-Serial converter) and the Serial In Parallel Out (SIPO) block (i.e., Serial-to-Parallel converter). While an example is described here using SerDes, it will be understood that the architecture is not restricted to SerDes and PISO/SIPO, and that other interfaces may be used, such as optical interfaces, for example. The PISO block may have a parallel clock input, a set of data input lines, and input data latches. It may use an internal or external Phase-locked loop (PLL) to multiply the incoming parallel clock up to the serial frequency, for example. In some examples, the PISO has a single shift register that receives the parallel data once per parallel clock, and shifts it out at the higher serial clock rate. Implementations may also have a double-buffered register. The SIPO block, in some embodiments, may have a receive clock output, a set of data output lines and output data latches. The receive clock may be recovered from the data through a serial clock recovery technique. In some embodiments, SerDes may not transmit a clock, and use reference clock to lock the PLL to the correct Tx frequency, avoiding low harmonic frequencies present in the data stream. The SIPO block may then divide the incoming clock down to the parallel rate, Some implementations may have two registers connected as a double buffer, one register used to clock in the serial stream and the other used to hold the data for the slower, parallel side.

0023Referring first to <figref idref="f0003"><b>FIG. 3</b></figref><b>,</b> a block diagram illustrates an example of a node 300 in accordance with various embodiments. In the example of <figref idref="f0003">FIG. 3</figref>, node 110-a includes one or more storage module(s) 305, one or more processor module(s) 310, a memory 315 that contains software 320 for execution by processor module(s) 310, and a number of serial communications modules 325-340. The serial communications modules 325-340, according to various embodiments, are used to provide connections between node 110-a and two other nodes, and each of a primary and redundant I/O switching module. In embodiments such as illustrated in <figref idref="f0001 f0002">FIGS. 1-2</figref>, eight nodes are provided, with each node having a serial communications connection with two other nodes and with each of the primary and redundant I/O switching modules. Such an architecture may provide a fault tolerant, highly reliable, and high performance system that may be used in harsh environmental conditions such as may be encountered in a space environments. The connections to other nodes may provide communications between nodes that is fault tolerant, such that alternative communications paths may be employed in the event of a failure in one or more nodes. Such a failure may be the result of, for example, a radiation-induced malfunction in one or more of the nodes or modules within a node. In the embodiment of <figref idref="f0003">FIG. 3</figref>, node 110-a includes storage module(s) 305 which may be used for storage of data from one or more external systems, such as one or more satellite systems, for example. In one embodiment, the system includes eight nodes, each of which is configured as illustrated in <figref idref="f0003">FIG. 3</figref>, to provide a high performance and high reliability solid state recorder. One or more modules, such as module 110-a, may include volatile memory, non-volatile memory, and/or a combination thereof.

0024In other embodiments, nodes may be configured to provide processing or I/O functions, rather than storage functions, <figref idref="f0004"><b>FIGS. 4</b></figref><b>and</b><figref idref="f0005"><b>5</b></figref> illustrate block diagrams of nodes 110-b and 110-c, respectively, that may provide processing (<figref idref="f0004">FIG. 4</figref>) or I/O (<figref idref="f0005">FIG. 5</figref>) functions. In the example of <figref idref="f0004">FIG. 4</figref>, node 110-b includes one or more processing module(s) 405, one or more processor module(s) 410, a memory 415 that contains software 420 for execution by processing module(s) 404 and/or processor module(s) 410, and a number of serial communications modules 425-440. In the embodiment of <figref idref="f0004">FIG. 4</figref>, node 110-b includes processing module(s) 405 which may be used for processing of data or information from one or more external systems, such as one or more satellite systems, for example. Processing module(s) 405 may provide specific processing functions for one or more external systems, while processor module(s) may provide processing functions for communications with other nodes and/or I/O switches. The serial communications modules 425-440, according to various embodiments, are used to provide connections between node 110-b and two other nodes, and each of a primary and redundant I/O switching module, similarly as described above with respect to the node 110-a of <figref idref="f0003">FIG. 3</figref>.

0025In the example of <figref idref="f0005"><b>FIG. 5</b></figref><b>,</b> node 110-c includes one or more I/O module(s) 505, one or more processor module(s) 510, a memory 515 that contains software 520 for execution by processor module(s) 510, and a number of serial communications modules 525-540. In the embodiment of <figref idref="f0005">FIG. 5</figref>, node 110-c includes I/O module(s) 505 which may be used to provide communications with other systems or networks, such as one or more satellite systems and/or one or more other clusters of nodes and I/O modules such as illustrated in <figref idref="f0001 f0002 f0003 f0004 f0005">FIGS. 1-5</figref>, for example. The serial communications modules 425-440, according to various embodiments, are used to provide connections between node 110-c and two other nodes, and each of a primary and redundant I/O switching module, similarly as described above with respect to the node 110-a of <figref idref="f0003">FIG. 3</figref> and node 110-b of <figref idref="f0004">FIG. 4</figref>. In some embodiments, one or more nodes (e.g., nodes 110-145 of <figref idref="f0001">FIG. 1</figref>) may provide one or more different functions (i.e., processing, storage, or I/O functions) to a system.

0026With reference now to <figref idref="f0006"><b>FIG. 6</b></figref><b>,</b> a block diagram illustration of a distributed computing system incorporated into a satellite platform 600 in accordance with various embodiments is described. In this example, a distributed computing system 100-a, such as described with respect to <figref idref="f0001 f0002 f0003 f0004 f0005">FIGS. 1-5</figref>, is included as part of a satellite platform 605. The satellite 605 may include communications module(s) 610, sensor module(s) 615, and distributed computing system 100-a. In the example of <figref idref="f0006">FIG. 6</figref>, distributed computing system 100-a is coupled with a primary controller 620 which is coupled with a primary command/telemetry unit 625. Distributed computing system 100-a is also coupled with a redundant controller 630 which is coupled with a redundant command/telemetry unit 635. In some embodiments, the primary I/O switching module is coupled with the primary controller 620, and the redundant I/O switching module is coupled with the redundant controller 630. In such a manner, redundant satellite systems are coupled with redundant systems in the distributed computing system 110-a to provide a highly reliable and fault tolerant satellite system 605. Such a redundant system may be used to provide highly reliable systems capable of withstanding a failure in one or more nodes and/or switches of distributed computing system 110-a, for example. Such a failure may be the result of, for example, a radiation-induced malfunction in one or more of the electronic components of the satellite platform 600.

0027Distributed computing systems such as described with respect to <figref idref="f0001 f0002 f0003 f0004 f0005 f0006">FIGS. 1-6</figref> may be implemented in mash-type architectures to provide various different system functionalities. For example, <figref idref="f0007"><b>FIG. 7</b></figref> illustrates a distributed computing system 700 of an embodiment that is implemented as a solid state recorder. The system 700 of this embodiment, similarly as discussed above, may use serial interconnects to connect nodes and I/O switches, which may use an internal communications protocol. The components are configured in a topology for redundancy and high reliability. The architecture of this embodiment uses a depleted mesh topology that allows redundant interconnect between nodes within the system, as illustrated by the arrows between components. Arrows between components, according to various embodiments, may use a SerDes based network to construct a highly reliable fault tolerant memory and/or computing system for use in a space system (such as a satellite). As will be recognized, the system is memory, processor, I/O and even network protocol agnostic. There are multiple levels of redundancy in the system 700 that may be enhanced for high performance in the environmental conditions found in space (radiation, thermal, etc.). As depicted the Primary I/O Switch has a SerDes connection to all other nodes in the system (in this example memory nodes) except for the Redundant I/O. Similarly the Redundant I/O Switch has a SerDes connection to all nodes in the system except the Primary I/O Switch. There is a direct point to point high-speed SerDes link between every adjacent node in the system, providing an alternate path from any I/O or node to any other node with non-uniform network hops. This configuration provides four separate interfaces to each node.

0028Such an architecture also allows customization of system input and output structures to gain access to the internal mesh network via either a mezzanine or direct connection using a node in the mesh, for example. Examples of specific node designs include, but are not limited to, 1) data storage using volatile memory technology, 2) data storage using non-volatile memory technology, 3) data processing based on processor, ASIC, and / or FPGA technology, and 4) with digital and/or mixed signal I/O capability. The technology required to implement the architecture may be employed in any device that supports SerDes. This could be, for example, discrete components, FPGAs and/or custom ASICs including radiation hardened and/or commercial off the shelf (COTS) electronic components. <figref idref="f0008"><b>FIGS. 8</b></figref><b>and</b><figref idref="f0009"><b>9</b></figref> provide two examples of extensions of the architecture. In the example of <figref idref="f0008">FIG. 8</figref>, system 800 provides a high-bandwidth interconnection between primary and redundant I/O switches of two distributed computing systems, thereby providing a high performance system with enhanced capabilities relative to a system employing a single cluster of nodes. In the example of <figref idref="f0009">FIG. 9</figref>, system 900 provides multiple clusters in which nodes in each cluster are interconnected with a node of a neighboring cluster as well as another node within the same cluster. Such a configuration may provide additional redundancy for a high availability and high reliability system.

0029With reference now to <figref idref="f0010">FIG. 10</figref>, a flow chart illustrating the operational steps 1000 of various embodiments is described. The operational steps 1000 may, for example, be performed by one or more components of <figref idref="f0001 f0002 f0003 f0004 f0005 f0006 f0007 f0008 f0009">FIGS. 1-9</figref>, or using any combination of the devices described for these figures. Initially, at block 1005, at a first node having a plurality of serial communications modules, a plurality of packets are received on a plurality of channels, each packet comprising a header with address information and a payload. In some embodiments, similarly as described above, the plurality of serial communications modules may be coupled with a second node, a third node, and a first I/O switch module. Data included in the payload is stored, according to block 1010, when address information corresponds to an address of the first node. For example, the packet header information may indicate that data from the payload is to be stored in a memory module associated with the first node. At block 1015, one or more packets are forwarded to the second node when address information of the packets corresponds to the second node. One or more packets are forwarded to a fourth node via the second node when address information of the packets corresponds to the fourth node, as indicated at block 1020. One or more packets are sent to the first I/O switch module responsive to a command to transmit data to a location external to the distributed computing system, at block 1025. In such a manner, data may be communicated to different components of the system through one or more different alternate paths. Such a configuration provides redundancy and may provide an available path for data communications in the event of a failure of one or more components of the system.

0030With reference now to <figref idref="f0011"><b>FIG. 11</b></figref><b>,</b> a flow chart illustrating the operational steps 1100 of various embodiments is described. The operational steps 1100 may, for example, be performed by one or more components of <figref idref="f0001 f0002 f0003 f0004 f0005 f0006 f0007 f0008 f0009">FIGS. 1-9</figref>, or using any combination of the devices described for these figures. Initially, at block 1105, at a first node having a plurality of serial communications modules, a plurality of packets are received on a plurality of channels, each packet comprising a header with address information and a payload. In some embodiments, similarly as described above, the plurality of serial communications modules may be coupled with a second node, a third node, and a first I/O switch module. Data included in the payload is stored, according to block 1110, when address information corresponds to an address of the first node. For example, the packet header information may indicate that data from the payload is to be stored in a memory module associated with the first node. One or more packets are sent to the first I/O switch module responsive to a command to transmit data to a location external to the distributed computing system, at block 1115. At block 1120, it is determined that the first I/O switch module has failed. Such a determination may be made through, for example, the first I/O switch being unresponsive to any communications requests. The failure may be the result of any of a number of situations. For example, in systems operating in a space environment, radiation effects such as described above may impact communications on part of the spacecraft, resulting in a temporary failure of communications between two or more components. Failures may also be permanent, such as damage to one or more components resulting in the loss of operation of the component. Such permanent failures may be, for example, radiation induced or the result of elevated thermal environments as may be found in space vehicles. In any event, in the result of a failure of the first I/O switch, one or more packets are sent to a second I/O switch module responsive to a command to transmit data to a location external to the distributed computing system, as indicated at block 1125. In the examples of <figref idref="f0010">FIGS. 10</figref> and <figref idref="f0011">11</figref>, the various operational steps may be performed at system such as described above, in which a distributed computing system comprises eight nodes, and each of the nodes is coupled with two other nodes, the I/O switch, and secondary (or redundant) I/O switch. The I/O switches may be coupled with primary/redundant controllers, to provide redundant systems. In some embodiments, connections between each of the nodes may have different data rates than a data rate of the external I/O interfaces.

0031The detailed description set forth above in connection with the appended drawings describes exemplary embodiments and does not represent the only embodiments that may be implemented or that are within the scope of the claims. The term "exemplary" used throughout this description means "serving as an example, instance, or illustration," and not "preferred" or "advantageous over other embodiments." The detailed description includes specific details for the purpose of providing an understanding of the described components and techniques. These techniques, however, may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form in order to avoid obscuring the concepts of the described embodiments.

0032The various illustrative blocks and modules described in connection with the disclosure herein may be implemented or performed with a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

0033The functions described herein may be implemented in hardware, software executed by a processor, firmware, or any combination thereof. If implemented in software executed by a processor, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Other examples and implementations are within the scope and spirit of the disclosure and appended claims. For example, due to the nature of software, functions described above can be implemented using software executed by a processor, hardware, firmware, hardwiring, or combinations of any of these. Features implementing functions may also be physically located at various positions, including being distributed such that portions of functions are implemented at different physical locations. Also, as used herein, including in the claims, "or" as used in a list of items prefaced by "at least one of" indicates a disjunctive list such that, for example, a list of "at least one of A, B, or C" means A or B or C or AB or AC or BC or ABC (i.e., A and B and C).

0034Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage medium may be any available medium that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code means in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above are also included within the scope of computer-readable media.

0035The previous description of the disclosure is provided to enable a person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Throughout this disclosure the term "example" or "exemplary" indicates an example or instance and does not imply or require any preference for the noted example. Thus, the disclosure is not to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.