PLS Header Coding for Efficient Signaling of Modulation and Coding Schemes for Broadband Satellite Communications Systems

BACKGROUND

0001Over recent decades, developments in data communications technologies have continued to provide enhanced multimedia services (e.g., voice, data, video, etc.) to end-users. Such communications technologies encompass various delivery platforms, including terrestrial wire-line, fiber and wireless communications and networking technologies, and satellite communications and networking technologies. Further, in recent years, the proliferation of mobile communications has spurred an exponential growth in the provision of such enhanced multimedia services over mobile communications networks (both terrestrial and satellite based). As part of the continued evolution of such communications platforms and supporting technologies, the Digital Video Broadcasting (DVB) organization was formed (as an industry-led, global consortium of broadcasters, manufacturers, network operators, software developers, regulatory bodies and others) to advance the design of open interoperable standards for the global delivery of digital media and broadcast services.

0002As part of the standardization process for digital media and broadcast services, the DVB organization managed the adoption and publication of the DVB-S2 standard via recognized standards setting organizations (e.g., ETSI and TIA). DVB-S2 is a digital satellite transmission system standard covering framing structure, channel coding and modulation systems, designed for broadcast services (for standard and high definition television), interactive services (e.g., Internet access for consumer applications), and other broadband satellite applications. DVB-S2 represents a flexible standard, covering a variety of data and multimedia services delivered over satellite communications systems. The DVB-S2 standard covers various technological features, such as a flexible input stream adapter (suitable for operation with single and multiple input streams of various formats), a robust forward error correction coding (FEC) system based on low-density parity check (LDPC) codes concatenated with Bose Chaudhuri Hocquenghem (BCH) codes, a wide range of code rates (from 1/4 up to 9/10), four signal constellations (ranging in spectrum efficiency from 2 bit/s/Hz to 5 bit/s/Hz), and adaptive coding and modulation (ACM) functionality (optimizing channel coding and modulation on a frame-by-frame basis).

0003Since its inception, the DVB-S2 standard has been adopted globally as a predominant standard for broadcast, interactive and other broadband applications and services over satellite communications networks. Currently, there are applications and services for terminals, particularly in the field of mobile communications, that require operation at lower signal-to-noise ratios (<i>E_S</i>/<i>N</i>₀). The current modulation and coding schemes (e.g., the modulation and coding schemes of the DVB-S2 standard), however, are unable to support the operational requirements for such current mobile and other low signal-to-noise ratio (SNR) terminals (e.g., below -3 dB). Further, such current modulation and coding schemes are unable to support the operational requirements for higher end terminals (e.g., above 15.5 dB). Additionally, the modulation and coding schemes of the current DVB-S2 standard lack sufficient granularity to meet the requirements of terminals in the growing field of broadcast, interactive and other broadband applications and services over satellite communications networks.

0004Further, in order for systems to provide for expanded sets of modulation and coding schemes, the associated signaling provided to the receiver for proper decoding (e.g., the physical layer header signaling) must similarly be expanded to support identification of the expanded modulation and coding. One method for expanding the physical layer header signaling to support expanded modulation and coding scheme sets would simply be to increase the header size to directly support the expanded header signaling. Bandwidth resources and system efficiencies, however, are already being pushed to the limits in support of new wideband systems and higher data rate applications. The addition of additional signaling bits in the physical layer headers would thus create the undesirable effect of utilizing already scarce bandwidth for additional signaling overhead. An alternative method has been proposed in technical literature, whereby two different scramblers could be employed to provide the signaling of an additional bit. Essentially, one scrambler would be used to signify an additional bit (e.g., the most significant bit) as being zero (0), and the other scrambler would be used to signify the bit as being one (1). This approach, however, suffers from disadvantages associated with cross-correlation of the two scramblers, which could never be zero, and thus, there will be more degradation from the original Reed-Muller code in performance.

0005The 3GPP draft document "<nplcit id="ncit0001" npl-type="s"><text>Transport Block Size and MCS Signaling for E-UTRA" 3GPP RAN WG1, R1-074591, 29/10/2007</text></nplcit> discloses methods to signal MCS to E-UTRA. In order to increase the number of MCS without increasing the number of MCS bits signalled on the PDCCH, or to signal groups of MCS (high CQI MCS and low CQI MCS), it is suggested that the UE blindly detects the number of CCE used for PDCCH transmission, the number of CCE used for PDCCH transmission being related to the selected set of MCS.

0006<patcit id="pcit0001" dnum="WO001030A"><text>WO001030</text></patcit> "Signalling transmission using phase rotation techniques in a digital communications system", discloses a way to signal a selected modulation (and coding) scheme without generating any overhead. This is achieved by rotating a modulation constellation of the signal by a specific phase determined according to the selected modulation (and coding) scheme. All the symbols of a preamble can be rotated for instance.

0007What is needed, therefore, is an improved coding approach for providing efficient header signaling in broadband satellite communications networks, to provide support of expanded modulation and coding scheme sets that facilitate an expansion of the operational ranges of user terminals within such networks and finer granularity within such operational ranges.

SOME EXAMPLE EMBODIMENTS

0008The present invention advantageously addresses the foregoing requirements and needs, as well as others, by providing a system and methods for an improved coding approach, providing efficient header signaling in broadband satellite communications networks in support of expanded modulation and coding schemes that facilitate an expansion of the operational ranges of user terminals within such networks and finer granularity within such operational ranges. Independent claims 1 and 5 define methods to transmit and receive a mode indicator field according to the invention respectively. Corresponding apparatus are defined in independent claims 9 and 13 respectively. Preferred embodiments are defined in the dependent claims.

0009Still other aspects, features, and advantages of the present invention are readily apparent from the following detailed description, simply by illustrating a number of particular embodiments and implementations, including the best mode contemplated for carrying out the present invention. The present invention is also capable of other and different embodiments, and its several details can be modified in various obvious respects, all without departing from the scope of the present invention. Accordingly, the drawing and description are to be regarded as illustrative in nature, and not as restrictive.

BRIEF DESCRIPTION OF THE DRAWINGS

0010The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which: <ul id="ul0001" list-style="none"><li><figref idref="f0001">FIG. 1A</figref> illustrates a communications system capable of employing modulation and coding protocols, in accordance with example embodiments of the present invention;</li><li><figref idref="f0002">FIG. 1B</figref> illustrates a satellite communications system capable of employing modulation and coding protocols, in accordance with example embodiments of the present invention;</li><li><figref idref="f0003">FIG. 2A</figref> illustrates a block diagram of an example transmitter configured to operate in the systems of <figref idref="f0001">FIGs. 1A</figref> and <figref idref="f0002">1B</figref>;</li><li><figref idref="f0004">FIG. 2B</figref> illustrates a block diagram of an example receiver configured to operate in the systems of <figref idref="f0001">FIGs. 1A</figref> and <figref idref="f0002">1B</figref>;</li><li><figref idref="f0005">FIG. 3</figref> illustrates the frame format of a physical layer frame in accordance with the DVB-S2 framing structure, channel coding and modulation systems standard;</li><li><figref idref="f0006">FIGs. 4A</figref> and <figref idref="f0007">4B</figref> illustrate a block diagrams of example receivers configured to operate in the systems of <figref idref="f0001">FIGs. 1A</figref> and <figref idref="f0002">1B</figref>, in accordance with example embodiments of the present invention;</li><li><figref idref="f0008">FIG. 5</figref> illustrates a flow chart of an example process for encoding and modulating a source data sequence of information bits, in accordance with example embodiments of the present invention;</li><li><figref idref="f0009">FIG. 6</figref> illustrates a flow chart of an example process for demodulating and decoding a received data signal transmission, in accordance with example embodiments of the present invention;</li><li><figref idref="f0010">FIG. 7</figref> illustrates a block diagram of a chip set that can be utilized in implementing communications system protocols, according to example embodiments of the present invention.</li></ul>

DETAILED DESCRIPTION

0011A system and methods for an improved coding approach, providing efficient header signaling in broadband satellite communications networks in support of expanded modulation and coding schemes that facilitate an expansion of the operational ranges of user terminals within such networks and finer granularity within such operational ranges, is described. In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the invention. It is apparent, however, that the invention may be practiced without these specific details or with an equivalent arrangement. In other instances, well known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the invention.

0012<figref idref="f0001">FIG. 1A</figref> illustrates a communications system capable of employing modulation and coding protocols, in accordance with example embodiments of the present invention. With reference to <figref idref="f0001">FIG. 1A</figref>, a broadband communications system 110 includes one or more transmitters 112 (of which one is shown) that generate signal waveforms for transmission to one or more receivers 116 (of which one is shown). The signal waveforms are transmitted across a communications channel 114, which (for example) may comprise a channel of a terrestrial, wireless terrestrial or satellite communications system. In this discrete communications system 110, the transmitter 112 has a signal source that produces a discrete set of data signals, where each of the data signals is transmitted over a corresponding signal waveform. The discrete set of data signals may first be encoded (e.g., via a forward error correction (FEC) code) to combat noise and other issues associated with the channel 114. Once encoded, the encoded signals may then be modulated onto a carrier for transmission over the channel 114. The signal waveforms are attenuated, or otherwise altered, by communications channel 114.

0013FEC is required in terrestrial and satellite systems to provide high quality communication over a radio frequency (RF) propagation channel, which induces signal waveform and spectrum distortions, including signal attenuation (freespace propagation loss), multi-path induced fading and adjacent channel interference. These impairments drive the design of the radio transmission and receiver equipment; example design objectives include selecting modulation formats, error control schemes, demodulation and decoding techniques and hardware components that together provide an efficient balance between system performance and implementation complexity. Differences in propagation channel characteristics, such as between terrestrial and satellite communication channels, naturally result in significantly different system designs. Likewise, existing communications systems continue to evolve in order to satisfy increased system requirements for new higher rate or higher fidelity communication services.

0014<figref idref="f0002">FIG. 1B</figref> illustrates a satellite communications system capable of employing modulation and coding protocols, in accordance with example embodiments of the present invention. With reference to <figref idref="f0002">FIG. 1B</figref>, satellite communications system 120 includes a satellite 121 that supports communication among multiple satellite terminals (STs) 123a-123n, user terminals (UTs) 127a-127n, and a hub 127. The HUB 127 may assume the role of a Network Operations Center (NOC), which controls the access of the STs 123a-123n and UTs 127a-127n to the system 120, and also provides element management functions and control of the address resolution and resource management functionality. The Satellite communications system 120 may operate as a traditional bent-pipe system, where the satellite essentially operates as a repeater. Alternatively, the system 120 may employ a switching or processing satellite supporting mesh communications (point-to-point communications directly between a pair of the STs 123a-123n and UTs 127a-127n).

0015In a traditional bent-pipe system of an example embodiment, for example, the satellite operates as a repeater or bent pipe, and communications between the STs 123a-123n and UTs 127a-127n are transmitted over a double-hop path. For example, in a communication from ST 123a to ST 123n, over the first hop, the communication is transmitted, via the satellite, from the ST 123a to the HUB 127. The HUB 127 decodes the communication and determines the destination as ST 123n. The HUB 127 then appropriately addresses and repackages the communication, encodes and modulates it, and transmits the communication over the second hop, via the satellite, to the destination ST 123n. Accordingly, the satellite of such a system acts as a bent pipe or repeater, transmitting communications between the HUB 127 and the STs/UTs.

0016In an alternate embodiment, with a communications system 120 that employs a processing satellite (e.g., including a packet switch operating, for example, at a data link layer), the system may support direct unicast (point-to-point) communications and multicast communications among the STs 123a-123n and UTs 127a-127n. In the case of a processing satellite, the satellite 121 decodes the received signal and determines the destination ST(s)/UT(s) (as the hub 127 would in a bent-pipe system). The satellite 121 then addresses the data accordingly, encodes and modulates it, and transmits the modulated signal, over the channel 114, to the destination ST(s)/UT(s). Further, the STs 123a-123n may each provide connectivity to one or more respective hosts (e.g., hosts 125a-125n, respectively).

0017Further, based on recent trends in the advancement of current applications and services and in the development of new applications and services, it is envisioned that systems employing a multiplexing of data signals on the same channel 114 (e.g., time multiplexed), where (on a frame-by-frame basis) such data signals may be destined for different receive terminals of different capabilities (e.g., any combination of STs 125a-125n and UTs 127a-127n. For example, data signals destined for high S/N terminals (e.g., any of the STs 125a-125n) may be multiplexed with data signals destined for lower S/N terminals (e.g., any of the UTs 127a-127n), on the same channel 114 (on a frame-by-frame basis).

0018<figref idref="f0003">FIG. 2A</figref> illustrates a block diagram of an example transmitter configured to operate in the systems of <figref idref="f0001">FIGs. 1A</figref> and <figref idref="f0002">1B</figref>, in accordance with example embodiments of the present invention. With reference to <figref idref="f0003">FIG. 2A</figref>, the transmitter 210 is equipped with a data encapsulation module 211 that accepts the original application layer source data and performs the upper layer encapsulation to from the baseband frames. The encoder (e.g., an FEC encoder) 213 receives the baseband frames from the data encapsulation module 211, and outputs a coded stream of higher redundancy suitable for error correction processing at the receiver (shown in <figref idref="f0009">FIG. 6</figref>). The encoded signal is fed to the modulator 215, which maps the encoded messages to signal waveforms, based in part on modulation signal constellations. For example, the data encapsulation module 211 performs the upper layer encapsulation to generate the baseband frames based on the source data bits, and then the encoder 213 and modulator 215 collectively perform the modulation and coding of the baseband frames and the generation of the physical layer frames, in accordance with the example embodiments of the present invention. The physical layer frames are then transmitted (as signal waveforms), via the transmit antenna 217, over the communication channel 114 to the satellite 121.

0019<figref idref="f0004">FIG. 2B</figref> illustrates a block diagram of an example receiver configured to operate in the systems of <figref idref="f0001">FIGs. 1A</figref> and <figref idref="f0002">1B</figref>, in accordance with example embodiments of the present invention. With reference to <figref idref="f0004">FIG. 2B</figref>, the receiver 220 comprises receive antenna 229, sync module 227 demodulator 225, decoder 223 and de-encapsulation module 221. The receive antenna 229 receives the signal waveform transmitted over the channel 114 from the satellite 121. The sync module 227 detects the unique word, performs synchronization and determines the modcod and other PLS signaling of the PL Header. The demodulator 225 demodulates the received signal waveforms, based in part on the signal constellation employed for the modulation, to obtain the encoded signals. The decoder 223 then decodes the demodulated bit sequence to generate the encapsulated message data, and the de-encapsulation module 221 de-encapsulates the message data to regenerate the original source data.

0020As mentioned above, as one example embodiment for broadcast and broadband communications services over satellite networks, the DVB-S2 standard has been adopted globally as a predominant standard for broadcast, interactive and other broadband services and applications. The framing structure, channel coding and modulation systems of the DVB-S2 standard are described in the European Telecommunications Standards Institute (ETSI) publication, ETSI EN 302 307 V1.3.1. DVB-S2 represents a flexible standard, covering a variety of data and multimedia services delivered over satellite communications systems. Generic Stream Encapsulation (GSE) protocols may be employed to provide a data link layer protocol that facilitates the transmission of user or application data from packet oriented protocols (e.g., Internet protocol or IP) on top of a unidirectional physical layer protocol (e.g., DVB-S2). According to the GSE protocol, application data in the form of packet data units (PDUs) are first encapsulated within the baseband frames of the communications network (e.g., DVB-S2 baseband packets in a satellite communications system).

0021The DVB-S2 standard, for example, was designed to facilitate robust synchronization and signaling at the physical layer, and synchronization and detection of the modulation and coding parameters by a receiver before demodulation and FEC decoding. At the physical layer, baseband frames are first encoded to form an output stream of FEC frames. For example, the baseband frames are encoded by the FEC encoder 213, which comprises a t-error BCH outer coding via the BCH encoder 213a, an LDPC inner coding via the LDPC encoder 213b, and bit interleaving via the bit interleaver 213c. The interleaver 213c reorders the encoded sequence of symbols or bits from the LDPC encoder 213b in a predetermined manner. Each FEC frame is then modulated based on one of various options specified in the standard for modulation of the data payload (e.g., QPSK, 8PSK, 16APSK, or 32APSK). For example, each FEC frame is serial-to-parallel converted, and each resulting parallel sequence is mapped based on a signal constellation, generating an (I, Q) sequence of variable length depending on the selected modulation efficiency (η_MOD bits/Hz). The resulting output sequence is referred to as a complex FEC frame or XFEC frame, composed of 64,800/η_MOD(normal XFEC frame) modulation symbols for a normal XFEC frame, or 16,200/η_MOD(short XFEC frame) modulation symbols for a short XFEC frame. Physical Layer framing is then performed, by slicing the XFEC frames into a number of fixed length slots (of length M = 90 symbols each), to generate the physical layer frames, as specified in Section 5.5 of the above-referenced DVB-S2 publication, ETSI EN 302 307.

0022<figref idref="f0005">FIG. 3</figref> illustrates the frame format of a physical layer frame in accordance with the prior art DVB-S2 framing structure, channel coding and modulation systems standard. With reference to <figref idref="f0005">FIG. 3</figref>, at a high level, the DVB-S2 physical layer framing comprises the structuring of the baseband frames (resulting from the upper layer encapsulation of user or application data) as a regular sequence of periodic physical layer frames (PL Frames) 311. Every PL Frame is composed of a physical layer data payload (PL Payload) 313 and a physical layer header (PL Header) 215. The payload comprises the modulation symbols resulting from the encoding and modulation of the source data bits, generated by encoding and modulating the source data bits according to the selected modulation and coding scheme, as described above. The PL Payload 313 corresponds to a code block of a concatenated LDPC/BCH FEC. The PL Header 315, which is intended for receiver synchronization and physical layer signaling, contains synchronization and signaling information (e.g., Start of Frame or UW field, type of modulation and FEC rate, frame length, presence/absence of pilot symbols). The PL Header, for example, comprises one slot of 90 symbols, and the PL Payload comprises an integer multiple of 90 symbols (excluding pilot symbols). The PL Header, is modulated based on a <i>π</i>/2 binary phase shift keying (BPSK) to generate the 90 modulation symbols, as follows: <maths id="math0001" num=""><math display="block"><mi>I</mi><msub><mo>.</mo><mrow><mn>2</mn><mi>i</mi><mo>−</mo><mn>1</mn></mrow></msub><mo>=</mo><mi>Q</mi><msub><mo>.</mo><mrow><mn>2</mn><mi>i</mi><mo>−</mo><mn>1</mn></mrow></msub><mo>=</mo><mfenced><mrow><mn>1</mn><mo>/</mo><msqrt><mn>2</mn></msqrt></mrow></mfenced><mfenced><mrow><mn>1</mn><mo>−</mo><mn>2</mn><msub><mi>y</mi><mrow><mn>2</mn><mi>i</mi><mo>−</mo><mn>1</mn></mrow></msub></mrow></mfenced><mo>,</mo><mi>I</mi><msub><mo>.</mo><mrow><mn>2</mn><mi>i</mi></mrow></msub><mo>=</mo><mo>−</mo><mi>Q</mi><msub><mo>.</mo><mrow><mn>2</mn><mi>i</mi></mrow></msub><mo>=</mo><mo>−</mo><mfenced><mrow><mn>1</mn><mo>/</mo><msqrt><mn>2</mn></msqrt></mrow></mfenced><mfenced><mrow><mn>1</mn><mo>−</mo><mn>2</mn><msub><mi>y</mi><mrow><mn>2</mn><mi>i</mi></mrow></msub></mrow></mfenced><mo>,</mo><mi> for </mi><mi>i</mi><mo>=</mo><mn>1,</mn><mi mathvariant="normal"></mi><mn>2,</mn><mi mathvariant="normal"></mi><mo>…</mo><mi mathvariant="normal"></mi><mo>,</mo><mi mathvariant="normal"></mi><mn>45.</mn></math><img file="EP2804337B1_D0001.tif" /></maths>

0023By way of example, according to the DVB-S2 standard, the PL Header is composed of a Start of Frame (SOF) field (also referred to herein as the Unique Word or UW) 321 (e.g., comprising 26 symbols). The UW is uniform from frame to frame, and is inserted generally as a synchronization word for frame detection. The UW is used as a reference for detection of a burst or frame, and as a timing and frequency reference for decoding the header and payload portion of the frame. The UW field is followed by a Physical Layer Signaling (PLS) field 323 (e.g., comprising 64 symbols). The PLS field reflects seven signaling bits representing a mode indicator to identify the modulation and coding scheme applied to the PL data payload. The PLS field is encoded via a very low-rate block code (suitable for soft-decision correlation decoding, such as Fast Hadarmad Transform decoding), and a minimized number of signaling bits to reduce decoding complexity and global efficiency loss. The PLS field is always encoded in this fashion, because it is the first entity to be decoded by the receiver and provides the requisite information (e.g., modcod and type information, discussed below) necessary for enabling the receiver to decode the PL Data Payload, and thus the header must be decodable under worst-case link conditions. For example, in DVB-S2, the PLS field is bi-orthogonally coded via a non-systematic binary code of length 64 and dimension seven (64, 7), such as a first order Reed-Muller code under permutation. The PLS field is thereby encoded into 64 bits to form a bi-orthogonal signal set, which performs extremely well in noisy channels.

0024The seven signaling bits of the PLS field comprise two fields, a 5-bit modulation and coding or "modcod" field 331, and a 2-bit type field 333. The modcod field identifies the modulation and coding applied to the data payload (e.g., the modulation and coding applied to convert the baseband frames into the encoded and modulated XFEC frames - the XFEC frame modulation and FEC code rate). The type field identifies the FEC frame length (either 64,800 bits or 16,200 bits) and indicates the presence or absence of pilot symbol blocks. The modcod field comprises 5-bits identifying the modulation and code rate applied to the PL payload data. Each unique combination of the 5-bit modcod field reflects one of 28 possible modulation/code-rate schemes (plus 3 reserved modcod values and one value reflecting a dummy PL Frame). For example, the 32 values for the 5-bit modcod field of the DVB-S2 standard reflect the following modcod schemes: <tables id="tabl0001" num="0001"><table frame="all"><tgroup cols="4"><colspec colnum="1" colname="col1" colwidth="29mm" /><colspec colnum="2" colname="col2" colwidth="39mm" /><colspec colnum="3" colname="col3" colwidth="29mm" /><colspec colnum="4" colname="col4" colwidth="39mm" /><thead><row><entry align="center" valign="top">MODCOD Value</entry><entry align="center" valign="top">Mode (Modulation:Rate)</entry><entry align="center" valign="top">MODCOD Value</entry><entry align="center" valign="top">Mode (Modulation: Rate)</entry></row></thead><tbody><row><entry align="center">1</entry><entry align="center">QPSK:1/4</entry><entry align="center">17</entry><entry align="center">8PSK:9/10</entry></row><row><entry align="center">2</entry><entry align="center">QPSK:1/3</entry><entry align="center">18</entry><entry align="center">16APSK:2/3</entry></row><row><entry align="center">3</entry><entry align="center">QPSK:2/5</entry><entry align="center">19</entry><entry align="center">16APSK:3/4</entry></row><row><entry align="center">4</entry><entry align="center">QPSK:1/2</entry><entry align="center">20</entry><entry align="center">16APSK:4/5</entry></row><row><entry align="center">5</entry><entry align="center">QPSK:3/5</entry><entry align="center">21</entry><entry align="center">16APSK:5/6</entry></row><row><entry align="center">6</entry><entry align="center">QPSK:2/3</entry><entry align="center">22</entry><entry align="center">16APSK:8/9</entry></row><row><entry align="center">7</entry><entry align="center">QPSK:3/4</entry><entry align="center">23</entry><entry align="center">16APSK:9/10</entry></row><row><entry align="center">8</entry><entry align="center">QPSK:4/5</entry><entry align="center">24</entry><entry align="center">32APSK:3/4</entry></row><row><entry align="center">9</entry><entry align="center">QPSK:5/6</entry><entry align="center">25</entry><entry align="center">32APSK:4/5</entry></row><row><entry align="center">10</entry><entry align="center">QPSK:8/9</entry><entry align="center">26</entry><entry align="center">32APSK:5/6</entry></row><row><entry align="center">11</entry><entry align="center">QPSK:9/10</entry><entry align="center">27</entry><entry align="center">32APSK:8/9</entry></row><row><entry align="center">12</entry><entry align="center">8PSK:3/5</entry><entry align="center">28</entry><entry align="center">32APSK:9/10</entry></row><row><entry align="center">13</entry><entry align="center">8PSK:2/3</entry><entry align="center">29</entry><entry align="center">Reserved</entry></row><row><entry align="center">14</entry><entry align="center">8PSK:3/4</entry><entry align="center">30</entry><entry align="center">Reserved</entry></row><row><entry align="center">15</entry><entry align="center">8PSK:5/6</entry><entry align="center">31</entry><entry align="center">Reserved</entry></row><row><entry align="center">16</entry><entry align="center">8PSK:8/9</entry><entry align="center">0</entry><entry align="center">Dummy</entry></row></tbody></tgroup></table></tables>

0025According to example embodiments, an additional set of 32 modulation/code-rate schemes may be signaled or identified using the same 7-bit signaling, without including any additional signaling bits in the PLS field or in the PL Header overall (which otherwise would consume additional bandwidth/overhead). In other words, an additional "virtual" flag bit (e.g., a virtual most significant bit (MSB), referred to here as a virtual bit, because an additional bit need not actually be transmitted to communicate the bit value) can be signaled or identified via the encoding of the PLS field (the 7-bit mode indicator). By way of example, to signal or communicate a virtual flag bit of a value of zero "0," the 7-bit PLS field would be <i>π</i>/2 BPSK modulated in the same manner as specified by the DVB-S2 standard. Alternatively, to signal or communicate a virtual flag bit of a value of one "1," the 7-bit PLS field would be modulated 90 degrees (90°) out of phase as compared to the normal <i>π</i>/2 BPSK modulation (e.g., modulated at a 90 degree lag or advance. All other aspects of the transmission would be the same. In other words, the one-bit virtual flag information is embedded in the phase of the Reed-Mueller code block. In that manner, under normal modulation, the 5-bit modcod field, for example, would reflect or identify the 32 modcod schemes of the DVB-S2 standard, while, under the out-of-phase modulation, the 5-bit modcod field would reflect or identify an additional 32 modulation/code-rate schemes. Alternatively, under the out-of-phase modulation, one or both of the 2 bits of the type field may additionally be used for the modcod field, increasing the number of additional modulation/code-rate schemes up to 64 or 128 (depending on whether just one or both of the type bits are used for additional modcod field bits). The SOF or UW pattern would still be transmitted without any phase shift. Moreover, while the foregoing example specifies a modulation phase shift of 90 degrees, it is contemplated that alternative methods of altering the modulation of the PLS filed may be employed to signal different states of such a "virtual" flag or indicator bit.

0026<figref idref="f0006">FIG. 4A</figref> illustrates a block diagram of an example receiver configured to operate in the systems of <figref idref="f0001">FIGs. 1A</figref> and <figref idref="f0002">1B</figref>, in accordance with example embodiments of the present invention. With reference to <figref idref="f0006">FIG. 4A</figref>, for illustration purposes, the PLS field demodulators/decoders and data demodulator and decoder are broken out separately. As would be recognized, however, these components may be implemented according to various different hardware/software/firmware configurations. The receiver 420 comprises the antenna 429 and sync module 427. The sync module 427 establishes/maintains synchronization based on the SOF or UW field. Based on the synchronization, the PLS field information is fed to two different PLS field demodulator/decoder pairs 433a/435a and 433b/433a. For example, the decoders comprise two Reed-Muller decoders operating in parallel. Based on the synchronization established by the SOF, one decoder operates in-phase with the "normal" PLS field modulation, while the other decoder operates out-of-phase by 90 degrees from the "normal" PLS field modulation. Each decoder picks a codeword out of the 128 possible Reed-Muller codewords of 64 bits that best matches the received signal samples. The receiver then picks the better correlation of the two to determine the intended value of the "virtual" flag or indicator bit. For example, in the case of a zero value, the decoder adds a zero "0" as a new most significant bit of the 7-bit PLS field - in which case the 5-bit modcod field value remains as transmitted (e.g., the modcod field remains as the transmitted value from 0-31 identifying a one of the 32 modes of the DVB-S2 standard). Alternatively, in the case of a one value, the decoder adds a one "1" as a new most significant bit of the 7-bit PLS field - in which case the transmitted 5-bit modcod field value is effectively increased by 32 (e.g., the modcod field takes on a value of the transmitted value + 32, taking on a value from 32-63 identifying a one of 32 additional modes or modulation/code-rate schemes). Additionally, under the out-of-phase scenario, if one of the type field bits (e.g., the short/long code indicator bit) is also used for the modcod field, then 6 bits are available for modcod identifiers - increasing the additional mdocod schemes to 64. Similarly, if both type field bits are used for the modcod field, then all 7 bits are available for modcod scheme identifiers (e.g., an additional 128 modcod schemes). The appropriate information is then communicated to the data demodulator 425 and decoder 423 for proper demodulation and decoding of the PL data payload, in accordance with the identified modcod scheme. The data de-encapsulation module 421 then de-encapsulates the data to generate the source bit stream.

0027<figref idref="f0007">FIG. 4B</figref> illustrates a block diagram of a further example receiver configured to operate in the systems of <figref idref="f0001">FIGs. 1A</figref> and <figref idref="f0002">1B</figref>, in accordance with example embodiments of the present invention. With reference to <figref idref="f0007">FIG. 4B</figref> (as with <figref idref="f0006">FIG. 4A</figref>), for illustration purposes, the PLS field demodulator/decoder and data demodulator and decoder are broken out separately. As would be recognized, however, these components may be implemented according to various different hardware/software/firmware configurations. In contrast to the receiver 420, the receiver 440 comprises only a single PLS field demodulator/decoder pair 443 and 445. The receiver 440, however, operates in the same manner as the receiver 420, except that the PLS field demodulator/decoder of the receiver 440 must operate at least at twice the speed of each the PLS field demodulator decoder pairs of the receiver 420. The PLS field demodulator/decoder 443/445 operates on each received PLS field in one phase at a time (e.g., first at the phase of the "normal" PLS field modulation, and then at a phase orthogonal to - out of phase by 90 degrees with respect to - the "normal" phase. The demodulator/decoder 443/445 then determines the best correlation of the 2 phases and adds the appropriate 8^th bit (MSB) to the 7-bit PLS field. The speed must be increased to maintain synchronization since the demodulator/decoder is not operating in both phases in parallel, and thus take a proportional additional amount of time to determine the intended value of "virtual" flag modcod signal bit.

0028<figref idref="f0008">FIG. 5</figref> illustrates a flow chart of an example process for encoding and modulating a source data sequence of information bits, in accordance with example embodiments of the present invention. With reference to <figref idref="f0008">FIG. 5</figref>, the process begins with the receipt of the source data frames. At step 511, the source data frames are encoded and modulated in accordance with a desired modulation and coding (modcod) scheme selected from a set of predetermined modcod schemes to generate the PL data payload. At step 513, the modcod and type fields are set according to the selected modcod scheme applied to the data (the modcod and type fields make up the PLS field of the PL Header), and the resulting PLS field bits are encoded. At step 517, a synchronization (sync) header (e.g., UW or SOF field) is appended to the PLS field to form the PL Header. At step 517, if the modcod field value corresponds to a modcod scheme of a first set of modcod schemes (e.g., in the case of DVB-S2, the modcod field is of a value from 0-31 signifying one of the DVB-S2 modcod schemes), then the PLS field is modulated at the "normal" phase. Alternatively, at step 517, if the modcod field value corresponds to a modcod scheme of a second set of modcod schemes (e.g., in the case of DVB-S2, the modcod field is of a value from 32-63 signifying one of an additional set of modcod schemes), then the PLS field is modulated at a phase shifted by 90 degrees from that of the "normal" PLS field modulation. At step 519, the PL Header is appended to the PL data payload to form the PL Frame.

0029<figref idref="f0009">FIG. 6</figref> illustrates a flow chart of an example process for demodulating and decoding a received data signal transmission, in accordance with example embodiments of the present invention. For example, the process may be performed by one or more modules of a receiver (e.g., the receiver 420 of <figref idref="f0006">FIG. 4A</figref> or the receiver 440 of <figref idref="f0007">FIG. 4B</figref>). With reference to <figref idref="f0009">FIG. 6</figref>, the process the process starts at step 611, where the data signals transmitted over the satellite channel are received by the receiver 420/440. At step 613, the sync module 427 detects the unique word and acquires synchronization. At step 615, the PLS field demodulator/decoder determines the phase of the modulation applied to the PLS field at the transmitter. At step 617, the data demodulator 425 demodulates the data payload signal, and the data decoder 423 decodes the demodulated data payload signal based on the determined modulation and coding schemes.

0030<figref idref="f0010">FIG. 7</figref> illustrates a block diagram of a chip set that can be utilized in implementing communications system protocols, according to example embodiments of the present invention. With reference to <figref idref="f0010">FIG. 7</figref>, chip set 700 includes, for instance, processor and memory components described with respect to <figref idref="f0008">FIG. 5</figref> incorporated in one or more physical packages. By way of example, a physical package includes an arrangement of one or more materials, components, and/or wires on a structural assembly (e.g., a baseboard) to provide one or more characteristics such as physical strength, conservation of size, and/or limitation of electrical interaction.

0031In one embodiment, the chip set 700 includes a communication mechanism such as a bus 701 for passing information among the components of the chip set. A processor 703 has connectivity to the bus 701 to execute instructions and process information stored in, for example, a memory 705. The processor 703 includes one or more processing cores with each core configured to perform independently. A multi-core processor enables multiprocessing within a single physical package. Examples of a multi-core processor include two, four, eight, or greater numbers of processing cores. Alternatively or in addition, the processor 503 includes one or more microprocessors configured in tandem via the bus 701 to enable independent execution of instructions, pipelining, and multithreading. The processor 703 may also be accompanied with one or more specialized components to perform certain processing functions and tasks such as one or more digital signal processors (DSP) 707, and/or one or more application-specific integrated circuits (ASIC) 709. A DSP 707 typically is configured to process real-world signals (e.g., sound) in real time independently of the processor 703. Similarly, an ASIC 709 can be configured to performed specialized functions not easily performed by a general purposed processor. Other specialized components to aid in performing the inventive functions described herein include one or more field programmable gate arrays (FPGA) (not shown), one or more controllers (not shown), or one or more other special-purpose computer chips.

0032The processor 703 and accompanying components have connectivity to the memory 705 via the bus 701. The memory 705 may comprise various forms of computer-readable media, e.g., including both dynamic memory (e.g., RAM) and static memory (e.g., ROM) for storing executable instructions that, when executed by the processor 703 and/or the DSP 707 and/or the ASIC 709, perform the process of example embodiments as described herein. The memory 705 also stores the data associated with or generated by the execution of the process.

0033The term "computer-readable medium" or "computer-readable media," as used herein, refers to any medium that participates in providing instructions for execution by the processor 703, and/or one or more of the specialized components, such as the one or more digital signal processors (DSP) 707, and/or one or more application-specific integrated circuits (ASIC) 709. Such a medium may take many forms, including but not limited to non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, read only memory (ROM), included within memory 705. Volatile media, for example, may include dynamic random access memory (RAM), included within memory 705. Transmission media may include conductive wiring, fiber optics, or other physical transmission media, including the media that comprise bus 701. Transmission media can also take the form of wireless data signals, such as radio frequency (RF) and infrared (IR) data communications. Common forms of computer-readable media include, for example, magnetic storage media (e.g., magnetic hard disks or any other magnetic storage medium), solid state or semiconductor storage media (e.g., RAM, PROM, EPROM, FLASH EPROM, a data storage device that uses integrated circuit assemblies as memory to store data persistently, or any other storage memory chip or module), optical storage media (e.g., CD ROM, CDRW, DVD, or any other optical storage medium), a or any other medium for storing data from which a computer or processor can read.

0034Various forms of computer-readable media may be involved in providing instructions to a processor for execution. For example, the instructions for carrying out at least part of the present invention may initially be borne on a magnetic disk of a remote computer. In such a scenario, the remote computer loads the instructions into main memory and sends the instructions over a telephone line using a modem. A modem of a local computer system receives the data on the telephone line and uses an infrared transmitter to convert the data to an infrared signal and transmit the infrared signal to a portable computing device, such as a personal digital assistance (PDA) and a laptop. An infrared detector on the portable computing device receives the information and instructions borne by the infrared signal and places the data on a bus. The bus conveys the data to main memory, from which a processor retrieves and executes the instructions. The instructions received by main memory may optionally be stored on storage device either before or after execution by processor.

0035Moreover, as will be appreciated, a module or component (as referred to herein) may be composed of software component(s), which are stored in a memory or other computer-readable storage medium, and executed by one or more processors or CPUs of the respective devices. As will also be appreciated, however, a module may alternatively be composed of hardware component(s) or firmware component(s), or a combination of hardware, firmware and/or software components. Further, with respect to the various example embodiments described herein, while certain of the functions are described as being performed by certain components or modules (or combinations thereof), such descriptions are provided as examples and are thus not intended to be limiting. Accordingly, any such functions may be envisioned as being performed by other components or modules (or combinations thereof), without departing from the general scope of the present invention.

0036While example embodiments of the present invention may provide for various implementations (e.g., including hardware, firmware and/or software components), and, unless stated otherwise, all functions are performed by a CPU or a processor executing computer executable program code stored in a non-transitory memory or computer-readable storage medium, the various components can be implemented in different configurations of hardware, firmware, software, and/or a combination thereof. Except as otherwise disclosed herein, the various components shown in outline or in block form in the figures are individually well known and their internal construction and operation are not critical either to the making or using of this invention or to a description of the best mode thereof.

0037In the preceding specification, various embodiments have been described with reference to the accompanying drawings. It will, however, be evident that various modifications may be made thereto, and additional embodiments may be implemented, without departing from the broader scope of the invention as set forth in the claims that follow. The specification and drawings are accordingly to be regarded in an illustrative rather than restrictive sense.