Opto-electronic semiconductor body and method for the production thereof

0001This patent application claims the priority of German patent applications <patcit id="pcit0001" dnum="DE102007019773"><text>102007019773.1</text></patcit> and <patcit id="pcit0002" dnum="DE102007022947"><text>102007022947.1</text></patcit>.

0002The print <patcit id="pcit0003" dnum="DE102005007601A"><text>DE-A-10 2005 007 601</text></patcit> Describes various optoelectronic semiconductor bodies and methods for their production.

0003The invention relates to an optoelectronic semiconductor body and a method for producing an optoelectronic semiconductor body.

0004It is an object of the present invention to provide an optoelectronic semiconductor device with improved efficiency and / or improved electrical properties.

0005These objects are achieved by an optoelectronic semiconductor body and by a method for producing an optoelectronic semiconductor body according to the independent patent claims. The invention relates to an optoelectronic semiconductor body according to claim 1 and to a method for producing an optoelectronic semiconductor body according to claim 12.

0006Embodiments and further developments of the invention are given in the respectively dependent claims, the disclosure content of which is expressly incorporated herein by reference.

0007An optoelectronic semiconductor body according to the invention has a semiconductor layer sequence which contains an active layer suitable for producing electromagnetic radiation.

0008The active layer has a pn junction, a double heterostructure, a single quantum well (SQW), or a multi quantum well (MQW) for radiation generation. The term quantum well structure does not have any significance with regard to the dimensionality of the quantization. It thus includes, among other things, quantum wells, quantum wires and quantum dots, and any combination of these structures. Examples of MQW structures are in the printings<patcit id="pcit0004" dnum="WO0139282A"><text>WO 01/39282</text></patcit>. <patcit id="pcit0005" dnum="US5831277A"><text>US 5,831,277</text></patcit>. <patcit id="pcit0006" dnum="US6172382B1"><text>US 6,172,382 B1</text></patcit> and <patcit id="pcit0007" dnum="US5684309A"><text>US 5,684,309</text></patcit> , The disclosure content of which is hereby incorporated by reference.

0009The semiconductor body is provided for emitting electromagnetic radiation from a front side. A first and a second electrical connection layer are arranged on a rear side facing the front. The first and second electrical connection layers are electrically insulated from each other by means of a separating layer.

0010"Located on a rear side facing the front" means that at least a part of the first or second electrical connection layer follows the semiconductor layer sequence in the direction from the front side to the rear side. However, it is not necessary for the entire first or second electrical connection layer to be arranged on the rear side. Rather, a partial region of the second electrical connection layer extends from the rear side through an opening of the active layer towards the front side. However, the first electrical connection layer, the second electrical connection layer and the separating layer are designed in such a way that they overlap laterally, in particular at the rear side.

0011In an embodiment of the semiconductor body, the first and / or the second electrical connection layer reflect a part of the electromagnetic radiation emitted from the active zone toward the rear in the direction of the front side.

0012Advantageously, the light-emitting front face of the semiconductor layer sequence is free of electrical contact points such as bond pads. The danger of shading and / or absorption of a part of the electromagnetic radiation emitted by the active zone during operation by the electrical contact points is thus reduced. In complicated process steps in connection with the production of such a contact point on the front side of the semiconductor layer sequence, for example the polishing of the front surface of the semiconductor layer sequence and / or the production of metal webs for current expansion which have a large thickness but a small lateral extent and / or measures Which restricts or prevents the current injection into regions of the semiconductor layer sequence below the electrical contact point,

0013In a further embodiment, the semiconductor body is a thin-film light-emitting diode chip. In particular, it has a carrier substrate on its rear side. In one embodiment, the first and the second connection layer are arranged at least in places between the semiconductor layer sequence and the carrier substrate.

0014A thin-film light-emitting diode chip is distinguished by at least one of the following characteristic features:<ul><li>A reflective layer is applied or formed which at least partially converts the electromagnetic radiation generated in the semiconductor layer sequence into the semiconductor substrate Reflected back;</li><li>The thin film light-emitting diode chip has a carrier element which is not the growth substrate on which the semiconductor layer sequence has been epitaxially grown but a separate carrier element which has subsequently been attached to the semiconductor layer sequence;</li><li>The semiconductor layer sequence has a thickness in the range of 20 <i>M</i>M or less, in particular in the range of 10 <i>M</i>M or less;</li><li>The semiconductor layer sequence is free of a growth substrate. In the present case, "free of a growth substrate" means that a growth substrate used for growth, if any, is removed from the semiconductor layer sequence or at least strongly thinned, in particular it is thinned in such a way that it is not free alone or together with the epitaxial layer sequence Of the highly thinned growth substrate is, in particular, unsuitable as such for the function of a growth substrate;</li><li>The semiconductor layer sequence contains at least one semiconductor layer with at least one surface which has a mixing structure which ideally leads to an approximately ergodic distribution of the light in the semiconductor layer sequence, that is to say it has the most ergodically stochastic scattering behavior.</li></ul>

0015A basic principle of a thin-film light-emitting diode chip is, for example, in the printed copy <nplcit id="ncit0001" npl-type="s"><text>I. Schnitzer, et al., Appl. Phys. Lett. 63 (16) October 18, 1993, pages 2174-2766</text></nplcit> , The disclosure content of which is hereby incorporated by reference. Examples of thin-film light-emitting diode chips are given in the printed documents<patcit id="pcit0008" dnum="EP0905797A2"><text>EP 0905797 A2</text></patcit> and <patcit id="pcit0009" dnum="WO0213281A1"><text>WO 02/13281 A1</text></patcit> , The disclosure of which is hereby incorporated by reference.

0016A thin film light-emitting diode chip is, to a good approximation, a Lambertian surface radiator and is thus, for example, well suited for use in a headlamp, such as a motor vehicle headlamp.

0017In a further embodiment, the semiconductor body has a semiconductor or electrical insulating mirror layer at least in places between the semiconductor layer sequence and the first and / or the second electrical connection layer. A refractive index of the mirror layer, for example, deviates by 1 or more from the refractive index of a layer of the semiconductor layer sequence, which follows the mirror layer towards the front side and in particular adjoins the latter. In one embodiment, the mirror layer contains a dielectric such as SiO₂. In a further embodiment, the separating layer is designed at least in places as an electrically insulating mirror layer.

0018In a further development, the semi-conducting or electrically insulating mirror layer contains a distributed Bragg reflector (DBR), which contains at least one layer pair with alternating high and low refractive index.

0019The semiconducting or electrically insulating mirror layer in one embodiment covers 50 percent or more of a backside main surface of the semiconductor layer stack. In a further embodiment, the mirror layer has a plurality of openings through which partial regions of the first and / or the second electrical connection layer extend to the semiconductor layer sequence.

0020The semiconducting or electrically insulating mirror layer has a particularly high reflection coefficient, for example due to the change in the refractive index, so that it emits electromagnetic radiation emitted from the active zone in the direction of the back side in a particularly efficient manner in the direction of the front side. By means of a mirror layer which has a plurality of openings through which partial regions of the first and / or the second electrical connection layer extend, the operating current is impressed particularly homogeneously into the semiconductor layer sequence.

0021In a further embodiment, the semiconductor layer sequence has a current spreading layer adjacent to the rear side. The current spreading layer contains, for example, a transparent conductive oxide (TCO). By means of the current spreading layer, the homogeneity of the current injection is further improved.

0022In another embodiment, the first and / or the second electrical connection layer has a multilayer structure. For example, the first and / or the second electrical connection layer has an adhesion-imparting layer, a reflector layer and / or a current-distribution layer.

0023The adhesion-imparting layer is expediently facing the semiconductor layer sequence. Preferably, it has a thickness of 1 nm or less, more preferably 0.5 nm or less. The adhesion-promoting layer may, for example, be a monolayer and / or a non-closed layer of atoms and / or molecules. The reflector layer is, in particular, arranged downstream from the semiconductor layer sequence and is particularly adjacent thereto.

0024The adhesion-imparting layer improves the adhesion of the reflector layer to a layer preceding the first or second electrical connection layer, in particular a semiconductor layer of the semiconductor layer sequence, such as the current-spreading layer, or the separation layer. Depending on the properties of the reflector layer, the adhesion-imparting layer can also be dispensed with.

0025The adhesion-promoting layer has, for example, platinum and / or titanium. The reflector layer comprises or consists of an electrically conductive material, in particular a metal, with a high reflection coefficient, for example silver.

0026In a further embodiment, the first and / or the second electrical connection layer has a current distribution layer, which in particular contains a material with a particularly good electrical conductivity, for example gold.

0027In a further embodiment of the optoelectronic semiconductor body, the first electrical connection layer has an electrical contact area, for example a bonding pad, which is suitable for electrically contacting the semiconductor body from its front side. In addition or alternatively, it may have an electrical contact area which is suitable for the electrical contacting of the semiconductor body from its rear side. In an analogous manner, the second electrical connection layer can have a contact area which is suitable for electrically contacting the semiconductor body from its front side and / or an electrical contact area which is suitable for electrical contacting of the semiconductor body on its rear side.

0028An electrical contact area, which is suitable for electrically contacting the semiconductor body from its front side, is expediently arranged laterally from the semiconductor layer sequence. The electrical contact regions can advantageously be designed over a large area since they do not impair the emission of electromagnetic radiation from the semiconductor body. The semiconductor body is therefore particularly well suited for use with high operating currents. In other words, it advantageously has a high current carrying capacity.

0029The arrangement of the contact regions is advantageously freely selectable. The semiconductor body can be used for p-side contacting and n-side contacting of the semiconductor layer sequence from its front side, for p-side and n-side contacting from its rear side, for p-side contacting from its front side and for n-side contacting From its rear side, for the n-side contacting from its front side and for the p-side contacting from its rear side, as well as for the n- and / or p-side contacting from both the front and rear sides. The p-side contacting is produced or reversed by means of the first electrical connection layer and the n-sided contacting by means of the second electrical connection layer.

0030In a further embodiment, the semiconductor layer sequence has a buffer layer which is adjacent to the front and which in particular has a low electrical conductivity. For example, the buffer layer is undoped or weakly n-doped. In a further development, the buffer layer is an ESD protective layer (ESD, E-lectrostatic Discharge), which reduces the risk of a destruction of the semiconductor body by an electrostatic discharge.

0031A buffer layer with a low electrical conductivity is understood here to mean a buffer layer which is not suitable for conducting an operating current to the active zone and whose electrical conductivity is, for example, less than or equal to 20 (Ωcm)^-1 Is. In a further development, the electrical conductivity, also referred to as a specific conductance, is less than or equal to 1 (Ωcm)^-1. Under a weak n-type doping, an n-type doping of 2 × 10 is used¹⁷ Atoms / cm³ Or less understood.

0032A method according to the invention for producing an optoelectronic semiconductor body has the following steps:<ul><li>Epitaxially growing a semiconductor layer sequence which has an active layer suitable for generating electromagnetic radiation and is provided for emitting electromagnetic radiation from a front side on a growth substrate;</li><li>Applying a first electrical connection layer on a rear side of the semiconductor layer sequence opposite the front side;</li><li>Forming a breakthrough in the active layer;</li><li>Forming a separation layer on the rear side of the semiconductor layer sequence; and</li><li>Applying a second electrical connection layer at the rear side of the semiconductor layer sequence,</li></ul>Wherein the first electrical connection layer, the second electrical connection layer and the separating layer are formed laterally overlapping, a partial region of the second electrical connection layer is formed in the opening, and the second electrical connection layer is isolated by means of the separating layer from the first electrical connection layer.

0033In an embodiment of the method, the first and / or the second electrical connection layer are designed to be reflective.

0034In a further embodiment of the method, at least a portion of the growth substrate is removed after the growth of the semiconductor layer sequence. The removal of the growth substrate may take place before or after the application of the first or the second connection layer. For example, the part of the growth substrate is separated, for example by means of a laser lifting method.

0035In another embodiment, a carrier substrate is arranged or formed on the rear side of the semiconductor body. The carrier substrate can be a separate carrier element, which is connected to the semiconductor layer sequence, for example, by means of a soldering or adhesive step by means of a solder or adhesive layer. Alternatively, the first and / or the second electrical connection layer can represent the carrier substrate. For this purpose, the first and / or the second electrical connection layer is, for example, galvanically reinforced.

0036In one embodiment of the method, a semiconductor or electrically insulating mirror layer is formed on the rear side of the semiconductor layer sequence. In a development of this embodiment, openings are formed in the semiconducting or electrically insulating mirror layer. This can be done, for example by means of a mask, already during the application of the mirror layer. Alternatively, the openings, for example by means of a lithography process, can be produced in the latter after the application of the mirror layer. The first and / or the second electrical connection layer is expediently applied such that partial regions of the first and / or second electrical connection layer extend through the openings of the mirror layer.

0037In another embodiment of the method, a current spreading layer is applied to the rear side of the semiconductor layer sequence, which layer contains, in particular, a transparent conductive oxide.

0038In a further embodiment, the epitaxial growth of the semiconductor layer sequence on the growth substrate comprises the growth of a buffer layer. The buffer layer is arranged, in particular, between the active zone and the growth substrate. It has, for example, a low electrical conductivity and is preferably undoped or weakly n-doped. In a further development of the method, the buffer layer is released when removing the growth substrate.

0039Further advantages and advantageous embodiments will emerge from the following in conjunction with the <figref idrefs="f0004 f0005 f0006 f0007 f0008">Figures 1 to 8</figref> Described embodiments.

0040Show it:<dl id="dl0001"><dt>Figures 1A to 1G,</dt><dd>Schematic cross sections through an optoelectronic semiconductor body at various stages of a method of its manufacture according to a first exemplary embodiment,</dd><dt>2</dt><dd>A schematic cross-section through an optoelectronic semiconductor body according to a second exemplary embodiment,</dd><dt>3</dt><dd>A schematic cross-section through an optoelectronic semiconductor body according to a third exemplary embodiment,</dd><dt>4,</dt><dd>A schematic cross-section through an optoelectronic semiconductor body according to a fourth exemplary embodiment,</dd><dt>Figures 5A, 5B and 6,</dt><dd>Schematic plan views of various embodiments of electrical connection layers, and FIG</dd><dt>Figures 7 and 8,</dt><dd>Schematic cross sections through partial regions of the optoelectronic semiconductor body according to the third exemplary embodiment.</dd></dl>

0041In the exemplary embodiments and figures, identical or identically acting components are provided with the same reference symbols. The figures and the size ratios of the elements shown in the figures are, in principle, not to be regarded as scale-appropriate. Rather, individual elements, such as layers, can be shown to be large or thick, exaggerated, for the sake of better understanding and / or for better displayability.

0042<figref idrefs="f0001 f0002 f0003 f0004">Figures 1A to 1G</figref> Show a process for the production of an optoelectronic semiconductor body according to a first exemplary embodiment in schematic sectional representations at different stages of the method.

0043First, a semiconductor layer sequence 2 is epitaxially grown on a growth substrate 1. (please refer<figref idrefs="f0001">FIG. 1A</figref>). The semiconductor layer sequence 2 is based, for example, on a III / V compound semiconductor material or on an II / VI compound semiconductor material. The semiconductor layer sequence 2 has a thickness between 5 and 7 in the present case<i>M</i>M.

0044A III / V compound semiconductor material has at least one element from the third main group, such as Al, Ga, In, and an element from the V main group, such as B, N, P, As. In particular, the term "III / V compound semiconductor material" includes the group of binary, ternary or quaternary compounds containing at least one element from the third main group and at least one element from the fifth main group, in particular nitride and phosphide compound semiconductors . Such a binary, ternary or quaternary compound may, for example, also contain one or more dopants and additional constituents. The III / V compound semiconductor material includes, for example, nitride III compound semiconductor material and phosphide III compound semiconductor material such as GaN, GaAs,

0045Accordingly, an II / VI compound semiconductor material has at least one element from the second main group such as Be, Mg, Ca, Sr and a element from the sixth main group, such as O, S, Se. In particular, an II / VI compound semiconductor material comprises a binary, ternary or quaternary compound comprising at least one element from the second main group and at least one element from the sixth main group. Such a binary, ternary or quaternary compound may, for example, also contain one or more dopants and additional constituents. The II / VI compound semiconductor materials include, for example, ZnO, ZnMgO, CdS, CnCdS, MgBeO.

0046The semiconductor layer sequence 2 has an n-doped layer 21, which in the present case is adjacent to the growth substrate 1, and a p-doped layer 22. The p-doped layer 22 is arranged here on the side of the semiconductor layer sequence 2 facing away from the growth substrate 1. The active zone 23 is arranged between the n-doped layer 21 and the p-doped layer 22.

0047In one embodiment, the semiconductor layer sequence 2 is designed as an npn layer sequence in which a further n-doped layer is formed on the side of the p-doped layer 22 facing away from the n-doped layer 21. In another embodiment, the p-doped layer 22 is adjacent to the growth substrate 1, and the n-doped layer 21 faces away from the growth substrate 1.

0048In a variant of the method, a buffer layer is applied, in particular epitaxially grown (not shown in the figures), on the growth substrate 1 prior to the growth of the semiconductor layer sequence 2. The buffer layer effects, for example, an adaptation of the lattice constants between the growth substrate 1 and a layer of the semiconductor layer sequence 2 subsequently grown on the buffer layer. In a suitable embodiment, the buffer layer is undoped or weakly n-doped. For example, the concentration of one or more n-type dopants of the buffer layer is 2 × 10¹⁷ Atoms / cm³ Or less.

0049The undoped or weakly n-doped buffer layer is not suitable for being traversed by the operating current of the semiconductor body. However, this does not disadvantageously because the semiconductor body is not intended to be supplied with the operating current through the growth substrate 1 or from a side of the semiconductor layer stack 2 facing the growth substrate 1. Rather, the buffer layer in the finished semiconductor body reduces the risk that this is damaged or destroyed by an electrostatic discharge.

0050Subsequently, at least one breakthrough is formed in the active zone 23 (see FIG <figref idrefs="f0001">1B</figref>). For this purpose, a depression 3 is formed in the semiconductor layer sequence 2, for example by means of etching through a mask, starting from a second main surface 202 of the semiconductor layer sequence 2. A plurality of separate openings 3 are preferably formed, as a result of which a particularly homogeneous lateral current distribution is advantageously achieved.

0051The recess 3 extends from the second main surface 202 in the direction of a first main surface 201 of the semiconductor layer sequence 2 opposite the second main surface 202. The recess 3 has, for example, the shape of a circular cylinder or an elliptical cylinder, a cuboid, a cone or truncated cone, Of a pyramid trunk. Alternatively, the recess 3 can also be designed as a trench. Preferably, the trench has a substantially planar bottom surface. In one embodiment, the cross section of the trench increases from the bottom surface to the second main surface 202.

0052Before or after the formation of the recess 3, a first contact layer 4 is applied, for example vaporized, onto the second main surface 202. The first contact layer 4 preferably comprises a material, in particular a metal, with a high reflection coefficient, such as silver. The first contact layer 4 can have first and second partial regions whose layer thicknesses differ from each other. For example, the first partial regions have a lesser layer thickness than the second partial regions.

0053Subsequently, a separation layer 5 is formed on a part of the surface of the recess 3 and on a part of the surface of the first electrical connection layer 4 (see FIG. 1C). For example, the separating layer 5 covers a circumferential side wall or side walls of the depression 3 at least in places, but preferably completely. Expediently, the separating layer 5 extends in the recess 3 from the second main surface 202 at least as far as the active zone 23 and preferably up to the bottom surface of the depression 3.

0054The separating layer 5 also expediently covers the side surfaces 403 of the first electrical connection layer 4 which are adjacent to the depression 3 and, in particular, adjoins the depression 3. In addition, the separating layer 5 in the present case covers the main surface 402 of the first electrical connection layer 4 remote from the semiconductor layer sequence 2. For example, the separating layer 5 covers the main surface of the thinner, first partial regions of the first electrical connection layer 4 facing away from the semiconductor layer sequence 2. The separating layer is electrically insulating and has, for example, a dielectric such as SiO.sub.2₂, Without_X Or Si-ON or consists thereof.

0055Subsequently, as shown in FIG <figref idrefs="f0002">1D</figref> , A second electrical contact layer 6 is produced. A partial region of the second electrical contact layer 6 is arranged in the recess 3 and preferably fills it completely. Due to the lining of the side walls of the recess 3 with the separating layer 5, no short circuit of the active zone 23 occurs through the partial region of the second electrical connection layer 6 arranged in the depression 3.

0056The second electrical connection layer 6 covers the first electrical contact layer 4, in plan view, on the second main surface 202 of the semiconductor layer sequence 2. For example, the second electrical contact layer extends from the recess 3 in a lateral direction to the edge region of the semiconductor layer sequence 2 via the first partial region or the first partial regions of the first electrical connection layer 4. The separating layer 5 is between the first and second electrical connection layer 4, So that no electrical short circuit occurs between the first and second electrical connection layers 4, 6.

0057As in <figref idrefs="f0003">1E</figref> A carrier substrate 7 is fixed on the first and the second electrical connection layer 4, 6 on the first and second electrical connection layer 4, 6 by means of a solder or adhesive layer 8 on the rear side of the semiconductor layer sequence 2 facing away from the growth substrate 1. In the present case, the adhesive layer 8 has a low electrical conductivity, in particular it is electrically insulating. The support substrate comprises or consists, for example, of aluminum nitride. Other, in particular insulating, carrier substrates 7, such as glass carrier substrates, are also conceivable.

0058It is also conceivable to produce the connection instead of with an adhesive layer by means of an electrically conductive solder layer. Expediently, in this variant, the separating layer 5 is also formed on the surface of the first and / or second electrical connection layer 4, 6 facing the carrier substrate 7.

0059In a subsequent process step (cf. <figref idrefs="f0003">1F</figref>), The growth substrate is thinned or completely removed. This can be carried out, for example, by means of a laser lift-off method known in principle to a person skilled in the art. For this purpose, the growth substrate 1 or the semiconductor layer sequence 2 preferably has a sacrificial layer which is decomposed when irradiated with laser radiation, so that the growth substrate 1 is detached. The irradiation with laser radiation takes place, for example, through the growth substrate 1.

0060Finally, the semiconductor layer sequence 2 is removed in places in order to release electrical contact points 41, 61 of the first and second electrical connection layer 4, 6, respectively. The removal is carried out, for example, by means of an etching process, both dry etching processes and nashermic etching processes being suitable.

0061In a further development of the method, the side flanks of the semiconductor layer sequence 2, the first electrical connection layer 4 and / or the second electrical connection layer 6 are likewise covered, at least in places, but preferably completely, by an electrically insulating layer 5 (cf. <figref idrefs="f0004">1G</figref>).

0062The <figref idrefs="f0004">1G</figref> Is intended to emit electromagnetic radiation generated by the active zone 23 during operation through the first main surface 201 of the semiconductor layer sequence 2 in the direction of its front side facing away from the carrier substrate 7. In the exemplary embodiment shown in FIG. Electromagnetic radiation emitted from the active zone 23 in the direction of the rear side, ie, in the direction of the second main surface 202, is reflected back from the first electrical connection layer 4, the second electrical connection layer 6 and / or from the separating layer 5 in the direction of the front side.

0063The operating current for the operation of the optoelectronic semiconductor body is impressed into the semiconductor layer sequence via the first electrical contact point 41 and the second electrical contact point 61 from the front side. The electrical contact points 41, 61 are here arranged laterally from the semiconductor layer sequence 2.

0064Advantageously, the electrical contact points 41, 61 are not located in the beam path of the electromagnetic radiation emitted in the direction of the front. At the same time, a particularly good thermal coupling to the carrier substrate 7 is achieved by means of the electrical connection layers 4, 6, so that heat losses generated during operation of the semiconductor body are dissipated particularly efficiently from the semiconductor layer sequence.

0065By means of the first electrical contact point 41 and the first electrical connection layer 4, the semiconductor layer sequence 2 is contacted on the p-side. The n-side contacting is effected here by means of the second electrical contact point 61 and the second electrical connection layer 6. However, the n- and the p-side of the semiconductor layer sequence 2, in particular the n-doped layer 21 and the p- To be interchanged.

0066The <figref idrefs="f0006">5A and 5B</figref> Show various variants for the shape of the breakthrough 3 through the active zone 23 in a schematic plan view of the front side of the optoelectronic semiconductor body according to FIG <figref idrefs="f0004">1G</figref>. The semiconductor layer sequence 2 is omitted for the sake of simplicity.

0067In the case of the <figref idrefs="f0006">FIG. 5A</figref> The recesses 3 have the form of trenches, of which <figref idrefs="f0004">1G</figref> For a simplified illustration of only one. The partial regions of the second electrical connection layer 6, which extend through the openings 3 of the active layer 23, are strip-shaped in this variant. Apart from the openings 3, the first contact layer 4 makes a full-area contact with the semiconductor layer sequence 2.

0068In the case of the <figref idrefs="f0006">FIG. 5B</figref> The breakthroughs 3 are not in the form of a trench but have the form of cylinders or truncated cones. Correspondingly, the partial regions of the second electrical connection layer 6 extending through the openings 3 of the active layer 23 have a circular cross-section.

0069Both in the embodiment of FIG <figref idrefs="f0006">FIG. 5A</figref> As in the case of the <figref idrefs="f0006">FIG. 5B</figref> The electrical contact points 41, 61 are strip-shaped and extend essentially over an entire side length of the semiconductor body.

0070This in<figref idrefs="f0004">FIG</figref> The second exemplary embodiment of an optoelectronic semiconductor body differs from the first exemplary embodiment in that the semiconductor layer sequence 2 has a roughening or structuring on its front side. For example, the first main surface 201 is structured, for example by means of pyramidal, conical, pyramidal and / or frustoconical projections and / or depressions. The roughening or structuring preferably acts as a diffuser for electromagnetic radiation emitted by the active zone 23. Such a roughening is also suitable for the other exemplary embodiments in which no roughening is shown.

0071A further difference from the first exemplary embodiment is that the semiconductor layer sequence 2 in the present case has a current distribution layer 9 on its rear side. The current spreading layer 9 preferably has a transparent conductive oxide, for example indium tin oxide (ITO, indium tin oxides) or indium zinc oxide (IZO, indium zinc oxides). For example, the current spreading layer is evaporated onto the epitaxially grown semiconductor layers.

0072Advantageously, the homogeneity of the operating current impressed by the first electrical connection layer 4 into the semiconductor layer sequence 2 during operation is further increased by means of the current spreading layer 9, which is again suitable for the remaining exemplary embodiments. This may, for example, be expedient if the p-doped layer 22 does not have sufficient transverse conductivity. As a rule, the transverse conductivity of the n-doped layer 21 is higher than that of the p-doped layer 22. A current widening layer adjoining the second electrical connection layer 6 is therefore dispensed with in the present second exemplary embodiment.

0073Furthermore, in contrast to the first exemplary embodiment, the second electrical connection layer 6 runs in the second exemplary embodiment according to FIG <figref idrefs="f0004">FIG</figref> In the direction of the front side to the rear side of the optoelectronic semiconductor body, a first partial region of the first electrical connection layer 4, then a partial region of the second electrical connection layer 6, and finally a further partial region of the first electrical connection layer 4 on top of each other.

0074For manufacturing purposes, for example, the first partial region of the first electrical connection layer 4 is first applied to the semiconductor layer sequence and is provided with a separating layer 5. Subsequently, the second electrical connection layer is formed. This is done, in particular, analogously to the first exemplary embodiment (cf.<figref idrefs="f0002">Figures 1C and 1D</figref>). Subsequently, a separating layer 5 is also applied to the second electrical connection layer 6 before the first electrical connection layer 4 is finished by forming the subregion following the second electrical connection layer 6.

0075In such an embodiment, electromagnetic radiation, which emerges from the semiconductor layer sequence 2 in the direction of the rear side via the separating layer 5, is at least partially reflected back into the semiconductor layer sequence 2 and thus in the direction of the front side. The efficiency of the semiconductor body is thus further increased in this way.

0076Finally, the first electrical contact point 41 in the exemplary embodiment of FIG <figref idrefs="f0004">FIG</figref> Is not provided for contacting the semiconductor body from its front side. Rather, the optoelectronic semiconductor body according to the second exemplary embodiment has an electrically conductive carrier substrate 7, which in the present case is mechanically and electrically conductively fixed to the first electrical connection layer 4 with a solder layer 8, which has a soldering metal such as AuZn. Also, an electrically conductive adhesive such as silver-filled epoxy resin adhesive is suitable as a material for the mounting layer 8. By means of the carrier substrate, the semiconductor body, in the present case p-type, can be contacted via its first electrical connection layer 4 from its rear side. The second electrical contact point 61, as in the first exemplary embodiment, is provided for contacting from the front side.

0077In the case of the <figref idrefs="f0005">FIG</figref> The second electrical contact layer 6 is electrically connected to the carrier substrate 7 instead of the first electrical contact layer. The first electrical contact layer 4 is electrically insulated from the electrically conductive carrier substrate 7 by means of the separating layer 5.

0078According to the third exemplary embodiment, the first and the second electrical contact layer 4, 6 have a reflector layer 410 or 610, which is adjacent to the semiconductor layer sequence 2 and contains a metal with a high reflection coefficient, for example silver, and a current transport layer 420 or 620, having.

0079A particularly efficient reflection of electromagnetic radiation is achieved by means of the reflector layer 410, 610. A particularly low-loss supply of the operating current to the semiconductor layer sequence 2 is achieved with the current distribution layer 420, 620.

0080The reflector layer preferably has a thickness between 50 nm and 200 nm, particularly preferably between 100 nm and 140 nm, the boundaries being enclosed in each case. The first and / or second electrical connection layer 4, 6 may additionally have an adhesion-imparting layer (not shown in the figures). The adhesion-promoting layer is, for example, platinum or titanium and has, for example, a thickness of 0.1 nm. The reflector layer 410, 420 and the current transport layer 420, 620 suitably follow the adhesion-imparting layer in the direction from the front to the rear.

0081In the present exemplary embodiment, a separate carrier substrate 7 is fixed by means of an electrically conductive solder or adhesive layer 8 to a partial region of the separating layer 5 and to the second electrical connection layer 6. Alternatively, however, the second electrical connection layer 6 may also be designed as a carrier substrate 7. The fastening layer 8 can then be dispensed with. For example, the second electrical connection layer 6 is reinforced by means of electrodeposition in such a way that it is a mechanically stable and, in particular, cantilevered carrier substrate 7. In this embodiment, the optoelectronic semiconductor body preferably has no further carrier substrate 7.

0082In a variant of the semiconductor body with amplified first and / or second electrical connection layer 4, 6, neither of the two connection layers is guided laterally beyond the semiconductor layer sequence in order to provide a connection surface on the front side. The semiconductor body preferably has the first and the second contact point 41, 61 on its rear side. In this embodiment, the semiconductor body can also have, as an alternative or in addition to the reinforcement of the first and / or second electrical connection layer, a carrier substrate 7 on its rear side, which has the first and second electrical contact points 41, 61 on the rear side.

0083A further difference between the optoelectronic semiconductor body according to the third exemplary embodiment and the semiconductor body according to the first two exemplary embodiments is that the semiconductor layer sequence 2 has a semi-conducting or electrically insulating mirror layer 10 on its rear side. The mirror layer 10 in particular adjoins or is at least adjacent to the second main surface 202.

0084The mirror layer can be a dielectric such as SiO.sub.2₂ contain. A refractive index of the mirror layer and a refractive index of a layer of the semiconductor layer sequence which is adjacent to or adjacent to the second main area 202 differ in particular by 1 or more. In the present case, the mirror layer 10 contains a distributed Bragg reflector (DBR). The distributed Bragg reflector has at least one pair of layers with alternately high and low refractive index. Bragg reflectors made of dielectric layers are known to a person skilled in the art in principle and are therefore not explained in detail at this point. Alternatively to layer pairs of dielectric layers, the Bragg reflector can also have layer pairs of transparent conductive oxides such as ITO. A mirror layer 10 with a Bragg reflector with layer pairs of transparent conductive oxides may be semiconducting or even electrically conductive. By means of the mirror layer 10, a particularly high reflectivity is achieved.

0085For example, the first electrical connection layer 4, the second electrical connection layer 6 and possibly the mirror layer 10 reflect 80% or more, preferably 90% or more, and particularly preferably 95% or more of the electromagnetic radiation emitted by the active layer 23 in the direction of the rear Direction of the front.

0086The mirror layer 10 preferably covers 50 percent or more of the second main area 202 of the semiconductor layer sequence 2. It has one or more openings 110 through which the first electrical connection layer 4 extends. In the region of the openings 110, the first electrical connection layer 4 is electrically conductively connected to the semiconductor layer sequence 2. Preferably, the mirror layer 10 has a plurality of openings 110 which can be arranged irregularly or regularly, for example at lattice points of an imaginary lattice. The dimensions of the openings are preferably relatively small, they then form so-called knotted contacts for the electrical contacting by means of the first electrical connection layer 4.

0087Such an embodiment is described in <figref idrefs="f0007">FIG</figref> In a plan view of the front side of the semiconductor body, the semiconductor layer sequence 2 with the current distribution layer 9 being omitted. In contrast to the<figref idrefs="f0005">FIG</figref> Is the second electrical contact area 61 in FIG <figref idrefs="f0007">FIG</figref> Is not arranged at the rear side of the semiconductor body, but is provided, as in the first exemplary embodiment, for contacting the semiconductor body from its front side. In the present case, the electrical contact regions 41, 61 extend essentially over the entire side length of the semiconductor body.

0088The mirror layer 10 has a plurality of openings 110, which in the present case have a circular cross-section. The openings 110 are arranged at the lattice points of an imaginary rectangular or square lattice. Partitions of the first electrical connection layer 4 are arranged in the first openings 110. A partial region of the second electrical connection layer 6 extends through second openings 110. The first and the second openings 110 are in each case arranged in columns. Other arrangements are also conceivable.

0089In a further development of this exemplary embodiment, which is also suitable for the other embodiments, the separating layer 5 is designed at least in places as an electrically insulating mirror layer, which in particular has a distributed Bragg reflector (DBR). For example, at least one part of the separating layer 5, which is arranged in the recess 3 and / or adjoins the latter, is designed in such a way.

0090Details of the optoelectronic semiconductor body of FIG. 3 are shown in FIGS <figref idrefs="f0008">7 and 8</figref> Schematically, the current spreading layer 9 and the mirror layer 10 being omitted for the sake of simplicity.

0091<figref idrefs="f0008">FIG</figref> Shows an edge region of the semiconductor body with the first electrical contact point 41. The sectional view is opposite <figref idrefs="f0005">FIG</figref> Is rotated through 180 degrees so that the first electrical contact point 41 on the right side of the <figref idrefs="f0008">FIG</figref> Is arranged. The first electrical contact point 41 is designed as a bonding pad. During the production of the semiconductor body, an opening is then produced in the separating layer 5, for example, after removal of the edge region of the semiconductor layer sequence, and the bonding pad 41 is subsequently deposited in the opening.

0092<figref idrefs="f0008">FIG</figref> Shows a schematic cross-section of the trench-shaped depression 3, the side walls of which are covered by the separating layer 5.

0093<figref idrefs="f0005">FIG</figref> 10 shows a fourth exemplary embodiment of an optoelectronic semiconductor body. In contrast to the preceding exemplary embodiments, the breakthrough 3 is implemented by the active zone 23 as a breakthrough over the entire thickness of the semiconductor layer sequence 2 in this exemplary embodiment. The breakthrough 3 therefore extends in this case from the first main surface 201 to the second main surface 202. The breakthrough thus represents a hole or a slot in the semiconductor layer sequence 2.

0094A further current spreading layer 9 ', in the present case in addition to the current spreading layer 9 arranged on the rear side of the semiconductor layer sequence 2, is arranged on the first, roughened, first main surface 201. The further current spreading layer 9 'likewise has, for example, a transparent conductive oxide such as ITO. With the further current spreading layer 9 ', a particularly homogeneous supply of the operating current to the active zone 23 is achieved by means of the second electrical connection layer 6.

0095As in the third exemplary embodiment, the semiconductor body according to the fourth exemplary embodiment also has a mirror layer 10. The mirror layer 10 is arranged alternatively or additionally to the separating layer 5 between the second main area 202 of the semiconductor layer sequence 2 and the second electrical connection layer 6.

0096While in the first three exemplary embodiments the second electrical connection layer 6 extends in the direction from the rear side to the front at least through a partial region of the first electrical connection layer 4, this is not the case with the fourth exemplary embodiment. In the fourth exemplary embodiment, the first connection layer 4 covers the second connection layer 6 at least in places, as viewed from the top, on the rear side of the semiconductor body.

0097The invention is not limited by the description by means of the exemplary embodiments.