EP1997006A4

Validating data using processor instructions

Abstract

In one embodiment, the present invention includes a method for determining from a data block in a buffer a number of first operands in a first portion of the buffer and a number of second operands in a second portion of the buffer. Based on these numbers, a cyclic redundancy checksum (CRC) operation may be iteratively performed on the first and second operands to obtain a checksum result. The first and second operands are of a different length, and the checksum operation may be executed using processor instructions corresponding to the different lengths. Other embodiments are described and claimed.

Term

0.5 yearsto projected expiry

Projected expiry 14 March 2027, counted from filing; an application has no term until it is granted.

  1. Priority
  2. Filed
  3. Published
  4. Today
  5. Projected expiry

Every citation, both ways

Citations
DocumentRelationOfficeCategoryCited duringRelevant claims
EP0609595A1CitesEuropean Patent Office (EPO)ASearch report1-6
US5701316ACitesUnited States of AmericaASearch report1-6
EP0609595ACitesEuropean Patent Office (EPO)