Method for controlling a display panel by capacitive coupling

0001The invention relates to active matrix panels which allow images to be displayed using arrays of light emitters, for example light-emitting diodes, or arrays of optical valves, for example liquid crystal valves. These transmitters or valves are generally distributed in rows and columns.

0002The term “active matrix” designates a substrate which integrates networks of electrodes and circuits capable of controlling and supplying emitters or optical valves supported by this substrate. These electrode networks generally comprise at least one network of addressing electrodes, a network of selection electrodes, at least one reference electrode for addressing and at least one base electrode for supplying these transmitters. . Sometimes the reference electrode for addressing and the base electrode for power are confused. The panel also comprises at least one upper supply electrode, generally common to all the valves or to all the transmitters, but which is not integrated into the active matrix. Each valve or transmitter is generally interposed between a base supply terminal connected to a base electrode for supply and the upper supply electrode which generally covers the entire panel.

0003Each control circuit comprises a control terminal connected or coupled to an address electrode via a selection switch, a selection terminal which corresponds to the control of this switch and which is connected to a selection electrode, and a terminal reference connected or coupled to a reference electrode.

0004Each control circuit therefore comprises a selection switch capable of transmitting to this circuit the addressing signals coming from an addressing electrode. Closing the circuit selection switch corresponds to the selection of this circuit.

0005Generally, each addressing electrode is connected or coupled to the control terminals of the control circuits of all the transmitters or of all the valves in the same column; each selection electrode is connected to the selection terminals of the control circuits of all the transmitters or all the valves on the same line. The active matrix can also include other row or column electrodes.

0006The addressing electrodes are used to send control signals, analog in voltage or current, or digital, to the control circuits; during transmission periods, each control signal intended for the control circuit of a valve or of a transmitter is representative of image data of a pixel or sub-pixel associated with this valve or with this transmitter .

0007In the case of an optical valve panel, each control and supply circuit comprises a memory element, generally a capacitor capable of maintaining the control voltage of this valve for the duration of an image frame; this capacitor is connected in parallel directly to this valve. The control voltage of a valve is the potential difference across this valve. In a particularly simple case of a control circuit, the control terminal of the circuit is connected or coupled to one of the terminals of the valve.

0008In the case of a panel of current controllable transmitters, for example of light-emitting diodes, in particular of organic diodes, each control and supply circuit generally comprises a current modulator, generally a TFT transistor, provided with two terminals of current flow, a source terminal and a drain terminal, and a gate terminal for voltage control; this modulator is then connected in series with the transmitter to be controlled, this series being itself connected between an (upper) supply electrode and a base electrode for the supply; generally, it is the drain terminal which is common to the modulator and to the transmitter, and the source terminal, connected to the base electrode for the supply, is thus at a constant potential; the control voltage of the modulator is the potential difference between the gate and the source of the modulator; each control circuit comprises means for generating a control voltage of the modulator as a function of the signal sent to the control terminal of this circuit; each control circuit also comprises, as before, a holding capacitor capable of maintaining the control voltage of the modulator for the duration of each image or image frame. In a particularly simple case of a control circuit, the control terminal of the circuit corresponds to the gate terminal of the modulator.

0009There are conventionally two types of control: voltage control or current control. In the case of a voltage command, the addressing signals are voltage steps; in the case of current control, the addressing signals are current steps.

0010In the case of current control of transmitter panels, each control circuit is adapted in a manner known per se to "program", from a current signal, a control voltage of the modulator of this circuit, which is therefore applied to the gate terminal.

0011The addressing electrodes and the selection electrodes are themselves controlled by control means ("drivers" in English) arranged at the ends of these electrodes, at the edge of the panel; these means generally include controllable switches.

0012To ensure good image display quality and / or to improve the lifetime of the panel, it is important to regularly invert the control voltage of the modulators of the control circuits, and / or the supply voltage of the valves or transmitters:<ul id="ul0001" list-style="dash" compact="compact"><li>in the case of optical valve panels, in particular of liquid crystals, the voltage at the terminals of the valves is generally alternated to avoid initiating a continuous component of polarization of the liquid crystal;</li><li>in the case of light emitter panels, where the emitters are light emitting diodes, it may be advantageous to regularly reverse the voltage across the emitters, as described for example in the documents <patcit id="pcit0001" dnum="EP1094438A"><text>EP1094438</text></patcit> and <patcit id="pcit0002" dnum="EP1197943A"><text>EP1197943</text></patcit> ; however, during the periods when this supply voltage is reversed, these emitters obviously emit no light, the diodes then being polarized in opposite directions;</li><li>in the case of panels of current controllable transmitters, the control circuits of which include a current modulator, where these modulators are transistors comprising active layers of amorphous silicon, it may be advantageous to regularly reverse the control voltage of the modulators, in particular to compensate for drifting threshold voltage of this type of transistors: documents <patcit id="pcit0003" dnum="US2003052614A"><text>US2003 / 052614</text></patcit>, <patcit id="pcit0004" dnum="WO2005071648A"><text>WO2005 / 071648</text></patcit> illustrate such a situation. When displaying images, a distinction is then made, for each control circuit, between display or emission periods, where the sign of this voltage is adapted to make the modulator pass, and so-called depolarization periods, where the sign of this voltage is reversed and does not allow the modulator to pass. For the overall control of the panel, the emission periods and the depolarization periods may overlap: while the emitters or valves of certain lines emit light, the circuits, emitters or valves of other lines may be in the process of depolarization. However, overall, the alternation of these periods is detrimental to the maximum luminance of the panel, since the overall duration available for the emission of the transmitters is reduced by the duration of the depolarization periods.</li></ul>

0013Still in the case of current controllable transmitter panels, in order to avoid this reduction in luminance, the document <patcit id="pcit0005" dnum="WO2005073948A"><text>WO2005 / 073948</text></patcit> offers a panel where each transmitter has two control circuits and is controlled alternately by one and by the other, which requires doubling the network of addressing electrodes. Other solutions require, conversely, to add a network of line electrodes.

0014The document <patcit id="pcit0006" dnum="US2003112205A"><text>US2003 / 112205</text></patcit> describes a specific solution: by controlling the control circuit described in FIG. 6 as indicated in paragraphs 44 and 45 of this document, where a negative voltage Vee is applied to the addressing reference electrode (which is also the base electrode for the power supply), during so-called “non-luminescence” periods, reverse polarization is obtained at the terminals of the emitter (here, a light-emitting diode), and, during this reverse polarization, the command of the current modulator Tr2 which is in series with this transmitter is canceled (source and grid of this modulator are at the same potential because of the closing of the switch shorting the holding capacitor).

0015Using the solutions described in the documents <patcit id="pcit0007" dnum="US2003052614A"><text>US2003 / 052614</text></patcit>, <patcit id="pcit0008" dnum="WO2005071648A"><text>WO2005 / 071648</text></patcit>, the means for controlling the addressing electrodes must then be adapted to transmit addressing signals of opposite signs or polarity; the solution described in the document<patcit id="pcit0009" dnum="US2003052614A"><text>US2003 / 052614</text></patcit> requires adding a “toggle” element at the top of each addressing electrode; this adaptation constraint leads to a significant additional cost of the column "drivers".

0016An object of the invention is to avoid this drawback.

0017In the prior art, the addressing signals are generally transmitted to the control circuits by direct conduction between the addressing electrodes and the circuit control terminals, via the selection switch: in the case of analog voltage control of transmitter panels, where the circuit control terminal corresponds to the gate terminal of the modulator, this gate voltage of the modulator is then equal to the voltage of the addressing electrode which controls this circuit, at least while this circuit is selected.

0018The document <patcit id="pcit0010" dnum="US6229506B"><text>US6229506</text></patcit> describes the case where these addressing signals are on the contrary transmitted to the control circuits by capacitive coupling: in the case of voltage control (<figref idref="f0002">figures 3</figref> and 4 of this document), a coupling capacity (referenced respectively 350 and 450) ensures here the connection without direct conduction between the addressing electrode and the control terminal of the circuit. When such a circuit is selected, this arrangement makes it possible to add the voltage jump signal coming from the addressing electrode to a trigger threshold voltage of the modulator, previously stored in the circuit. The connection by capacitive coupling, and not by conduction, between the addressing electrodes and the control terminals of the circuits here makes it possible to compensate for the differences in trigger thresholds of the modulators of these circuits, so as to obtain better uniformity of luminance of the screen and better image display quality. For the same purpose, the other documents<patcit id="pcit0011" dnum="US6777888B"><text>US6777888</text></patcit>, <patcit id="pcit0012" dnum="US6618030B"><text>US6618030</text></patcit>, <patcit id="pcit0013" dnum="US6885029B"><text>US6885029</text></patcit> describe a capacitive coupling between the addressing electrodes and the control of the current modulators of the transmitters.

0019An essential aspect of the invention consists in using such a capacitive coupling for another purpose, namely for the purpose of reversing the voltages at the terminals of valves or at the terminals of transmitters, or the control voltages of the modulators of the circuits of control of these transmitters, without having to reverse the addressing signals, which avoids the need for expensive means of controlling the addressing electrodes.

0020Thus, according to the invention, the voltage signal which is transmitted by capacitive coupling is in particular an address signal for transmission, which is representative of image data and / or an address signal (likewise sign) for depolarization, in particular for depolarization of the current modulator of a transmitter.

0021In general, capacitive coupling makes it possible to modify the voltage of a terminal by a voltage jump. Thus, a voltage step signal of algebraic value ΔV transmitted via capacitive coupling by an addressing electrode to a control terminal prior to the potential V_cal, pass the potential of this terminal from V to V_cal + ΔV. This voltage jump is independent of the value V_ini of the initial potential (before the jump) of the addressing electrode. When it is desired that the potential of the control terminal of a circuit decrease by a value ΔV (ΔV <0) from an initial value V_cal to the point of reaching a potential V_cal + ΔV of opposite sign to that which is applied to obtain the emission of the transmitter controlled by this circuit, thanks to capacitive coupling, it is sufficient, according to the invention, that the initial value V_ini (e.g. V_ini > 0) of the potential of the addressing electrode coupled to this terminal is high enough for the algebraic sum V_ini + ΔV (ΔV <0) retains the same sign as V_ini , so choose | V_ini| > | ΔV |.

0022For the implementation of the invention as described below in detail, the control of each control circuit of a transmitter comprises, during the display of each image frame, two periods, a period of emission of this transmitter and a depolarization period of the modulator of the control circuit of this transmitter.

0023For the implementation of the invention as described below, during each piloting period of a circuit, at least depolarization, if not also emission:<ol id="ol0001" compact="compact"><li>-1 / this circuit is selected by capacitively coupling the control terminal of this circuit to an addressing electrode and the potential of this terminal is “wedged” at potential V_cal a reference terminal which therefore becomes a “calibration terminal” of this circuit; during this selection and this “setting”, a potential V is applied to the addressing electrode_ini, with no effect other than transient, due to stalling, on the potential of the control terminal which remains at the value V_cal ;</li><li>-2 / the circuit still being selected but the control terminal no longer being calibrated at the timing terminal, a voltage jump signal ΔV is applied to the addressing electrode which is reflected by the capacitive coupling at the terminal command, which thus passes from the potential V_cal at potential V_prog = V_cal + ΔV. During the rest of the period (emission or depolarization) in progress, the potential of the control terminal is maintained at this value by the holding capacitor, as in the prior art.</li></ol>

0024So we see that the value of V_ini does not affect the potential of the control terminal. According to the invention, in periods of voltage inversion or depolarization, the value of V is therefore adapted._ini so that | V_ini| ≥ | ΔV | so that the signal to be applied to the addressing electrode to get V_prog on the control terminal does not change sign. Advantageously, this avoids the need for expensive means for controlling the address electrodes.

0025The same principle can be applied for the purpose of reversing the voltages at the valve terminals or at the transmitter terminals, without having to reverse the polarity between the supply electrodes.

0026The control method specific to the invention can be used either only during the depolarization periods - and then conventional conduction addressing is used during the emission periods, or both during the emission and depolarization periods.

0027An advantage of this control method is that it makes it possible to address a specific depolarization signal to each circuit, and to adapt the depolarization operation to the level of polarization of the modulator of each circuit, level which depends in particular on the signal d 'issue sent during the preceding issue period.

0028The subject of the invention is therefore a method for controlling a display panel which comprises:<ul id="ul0002" list-style="dash" compact="compact"><li>a network of light emitters or optical valves,</li><li>an active matrix comprising an array of electrodes for addressing voltage signals, an array of selection electrodes, an array of timing electrodes, at least one reference electrode for addressing, an array of capable circuits to control each of said transmitters or valves and each provided with a voltage control terminal capable of being coupled to an addressing electrode via a coupling capacitor and a selection switch which are connected in series, a voltage clamping terminal capable of being connected to said control terminal via a timing switch, and a holding capacitor mounted between said control terminal and said timing terminal,</li></ul><ul id="ul0003" list-style="none" compact="compact"><li>... the setting terminal being connected to the at least one reference electrode, the control of said selection switch being connected to a selection electrode and the control of said setting switch being connected to a setting electrode,</li><li>.... said method comprising emission periods during which a predetermined emission voltage V_prog-data, which has a first polarity, is applied and maintained at the control terminal of at least one control circuit of said panel,</li><li>... where this method also includes depolarization periods during which a predetermined depolarization voltage V_prog-pol, which has a second polarity, opposite to the first polarity, is applied and held at the control terminal of at least one control circuit of said panel.</li></ul>

0029The emitters or valves are able to be supplied between at least two supply electrodes, namely a base electrode for the supply which is generally part of the active matrix, and a so-called “upper” supply electrode, which covers generally all the transmitters or valves.

0030The holding capacitor is able to maintain an approximately constant voltage on said control terminal for the duration of an image when said first selection switch and said setting switch are open.

0031Other switches than the setting switch, in particular the selection switch itself, can be used to connect the voltage setting terminal to the control terminal.

0032In practice, during periods of emission or depolarization, a predetermined emission or depolarization voltage is generally applied and maintained at the control terminal of each of said control circuits of said panel.

0033Preferably, said predetermined emission voltage V is applied._prog-data or depolarization V_prog-pol to the control terminal of the at least one control circuit by capacitive coupling according to the following steps:<ul id="ul0004" list-style="dash" compact="compact"><li>a setting step, during which, said reference electrode of the panel being brought to a setting potential, a selection signal is applied to the selection electrode which controls the selection switch and a setting signal to the timing electrode which controls the timing switch of said control circuit, these signals being able to close said switches, and, during the simultaneous application of said selection signal and said timing signal, an initial voltage signal V is applied_ini-E, V_ini-P to the addressing electrode to which said control terminal is able to be coupled,</li><li>a circuit addressing step, during which, having terminated said setting signal but maintaining said selection signal, after obtaining the setting of the potential of the control terminal to the setting potential V_cal of the timing terminal connected to said reference electrode and after application of said initial signal, a final signal of voltage V is applied_data, V_pol to said addressing electrode, this final signal generating a voltage jump ΔV_data = V_data - V_ini-E, ΔV_pol = V_pol - V_ini-P on this addressing electrode which itself generates a voltage jump ΔV_prog-data = V_prog-data - V_cal , ΔV_prog-pol = V_prog-pol - V_cal on said control terminal which is coupled to said addressing electrode, the values ​​of said initial signal V_ini-E, V_ini-P and of said final signal V_data, V_pol being adapted to obtain after said voltage jump on said control terminal said predetermined voltage V_prog-data, V_prog-pol.</li></ul>

0034The control of the panel is generally intended for the display of a succession (or sequence) of images; each transmitter or valve on the panel then corresponds to a pixel or sub-pixel of the images to be displayed; during each transmission period, each transmitter or valve of the panel is associated with a predetermined transmission voltage for controlling this transmitter or valve, this voltage being adapted to obtain the display of said pixel or sub-pixel by this transmitter or valve; during each depolarization period, each emitter or valve of the panel is associated with a predetermined depolarization voltage capable of depolarizing this emitter, this valve, and / or its control circuit.

0035Thus, the predetermined voltage to be applied and maintained at the control terminal of the control circuits of said panel is intended:<ul id="ul0005" list-style="dash" compact="compact"><li>that the transmitter or the valve of the panel which is controlled by this circuit emits a pixel or sub-pixel of the image to be displayed,</li><li>or / and that the transmitter or the valve of the panel, or the control circuit, or, where appropriate, the current modulator of this circuit, be depolarized, at least partially.</li></ul>

0036After the addressing step, the selection signal is terminated, which has the effect of opening the selection switch of the control circuit. At this instant, the voltage of the control terminal is therefore equal to said predetermined voltage, and is maintained approximately at this value for the rest of the duration of the period thanks to the holding capacitor to which this terminal is connected.

0037The obtaining thus obtained of said predetermined voltage at the control terminal results from a voltage jump caused at this terminal by capacitive coupling to the addressing electrode itself subjected to a voltage jump; from this predetermined voltage, it is possible to deduce the jump in voltage to be obtained at the control terminal by difference with the potential of the reference electrode at which this terminal has been previously set; from this voltage jump to be obtained at the control terminal, it is possible to deduce the voltage jump to be generated at the addressing electrode, depending, in particular, on the level of coupling with the control terminal.

0038Preferably, whatever the emission or depolarization period, and the polarity of said predetermined emission voltage V_prog-data or of said predetermined depolarization voltage V_prog-pol, we choose said initial voltage signal V_ini-P and said final voltage signal V_pol so that said signals all have the same first polarity.

0039In practice, for example for a depolarization period and a predetermined depolarization voltage V_prog-pol to be applied to the control terminal (C) of a control circuit, the difference ΔV is first chosen_pol = V_pol - V_ini-P suitable for obtaining this depolarization voltage V_prog-pol; we then choose a sufficiently high value of V_ini-P with the first polarity, so that the value of V_pol-l, arising from said difference ΔV_pol, also has the first polarity. Preferably, when the value of ΔV_pol allows it, we choose V_ini-P = 0.

0040The polarity of the signals is evaluated with respect to a reference electrode for the control voltage of the circuits; it may in particular be a basic electrode for supplying transmitters or valves.

0041Thus, the voltage of the addressing electrode never changes sign and it is advantageous to use conventional and economical means for controlling the addressing electrodes.

0042Preferably, said panel comprises a network of light emitters able to be supplied between at least one supply base electrode and at least one upper supply electrode, and each of said transmitter control circuits comprises a modulator current comprising a voltage control electrode forming the control electrode of said circuit and two current flow electrodes, which are connected between one of said supply electrodes and a supply electrode of said transmitter. Generally, such a modulator is a TFT transistor; the current delivered by the modulator is then a function of the potential difference between the gate terminal and the source terminal of this transistor; this potential difference is generally a function, if not equal, of the potential difference between the control terminal and a reference electrode for the control voltage of the circuit; the reference electrode for the circuit control voltage is then formed by the supply base electrode.

0043Preferably, said current modulator is a transistor comprising a semiconductor layer of amorphous silicon.

0044Preferably, said emitters are organic light-emitting diodes.

0045The invention will be better understood on reading the description which follows, given by way of nonlimiting example, and with reference to the appended figures in which:<ul id="ul0006" list-style="dash" compact="compact"><li>the <figref idref="f0001">Figures 1 and 2</figref> describe two embodiments of panel control circuits according to the invention;</li><li>the <figref idref="f0002">figure 3</figref> is a timing diagram of the signals applied during a succession of periods and frames for controlling the circuit of the <figref idref="f0001">figure 1</figref> when controlling a panel according to the first method of the invention (logic signals V_YS, V_YC, address signals V_XD); this timing diagram also illustrates the evolution of the control potential of the modulator V_G of this circuit, and of the intensity I_dd of the current flowing in the diode that this circuit controls.</li></ul>

0046The figures representing chronograms do not take into account a scale of values ​​in order to better reveal certain details which would not appear clearly if the proportions had been respected.

0047In order to simplify the description, identical references are used for the elements which perform the same functions.

0048The embodiments presented below relate to image display panels where the emitters are organic light-emitting diodes deposited on an active matrix integrating control and supply circuits for these diodes. These transmitters are arranged in a row and in a column.

0049We will now describe a first embodiment of the invention where the panel comprises two networks of electrodes arranged in line, and where the control circuits of the transmitters each comprise only three TFT transistors forming one a current modulator and the other two switches.

0050With reference to the <figref idref="f0001">figure 1</figref> which describes a control and power supply circuit for a diode and its connections to the panel electrodes, the active matrix of the panel according to this first embodiment comprises:<ul id="ul0007" list-style="dash" compact="compact"><li>a network of addressing electrodes arranged in columns so that all the circuits controlling the diodes of the same column are served by the same addressing electrode X_D ;</li><li>a network of Y selection electrodes_S arranged in lines so that all the circuits controlling the diodes of the same line are served by the same electrode;</li><li>an array of Y timing control electrodes_VS arranged in lines so that all the circuits controlling the diodes of the same line are served by the same electrode;</li><li>a reference electrode P_R common to all circuits;</li><li>a supply base electrode P_B common to all circuits;</li></ul>

0051The active matrix also includes a control and supply circuit 1 for each diode 2.

0052The panel also includes an upper feed electrode P_AT, common to all diodes.

0053The control and supply circuit 1 of each diode 2 comprises:<ul id="ul0008" list-style="dash" compact="compact"><li>a current modulator T2 comprising two current terminals, namely a drain terminal D and a source terminal S, and a gate terminal G, which here corresponds to the control terminal C of the circuit.</li><li>a holding capacitor C_S connected between said grid G ​​and a timing terminal R of the circuit.</li></ul>

0054The circuit control terminal C is coupled to a addressing electrode

0055X_D via a selection switch T4 and a coupling capacitor C_VS, which are connected in series; there is no connection here by electrical conduction between this control terminal C and this addressing electrode X_D. Preferably, this coupling capacitor C_VS is common to all the control circuits served by this addressing electrode. The selection switch T4 is controlled by a selection electrode Y_S.

0056The circuit 1 also includes a timing switch T3 capable of connecting, via the switch T4, the control terminal C to the timing terminal R of the circuit; this timing switch T3 is controlled by a timing electrode Y_VS.

0057The calibration terminal R is connected to the reference electrode P_R.

0058The current modulator T2 is connected in series with the diode 2: the drain terminal D is thus connected to the cathode of the diode 2. This series is connected between two supply electrodes: the source terminal S is connected to the supply base electrode P_B and the anode of diode 2 is connected to the upper supply electrode P_AT.

0059With reference to the <figref idref="f0002">figure 3</figref>, we will now describe the operation of the panel according to this first embodiment.

0060Apply to the reference electrodes P_R, supply P_AT and P_B, respectively the potentials V_cal, Vdd and Vss. Here, the potential Vss of the supply base electrode P_B is zero and serves as a reference for the control voltage of the circuit, which here corresponds to the difference V_G-V_S = V_G-V_SS = V_G. Other references for the control voltage of the circuit can be envisaged without departing from the invention. The difference Vdd - Vss is adapted to obtain the emission of the diode when the control of the modulator is higher than its triggering threshold voltage. The value of V_cal is generally negative (that is to say less than the “0” level of the addressing signal) for reasons which will be described later.

0061As in the aforementioned prior art, at each diode of the panel and its control circuit, each image frame is broken down into a transmission period from the transmitter, for displaying the pixel or corresponding pixel of this image, and a depolarization period, for the compensation of the drift of the threshold of the modulator of this circuit.

0062For the control of each control circuit 1 of a diode 2, the duration of each image frame is then broken down into six stages.

Step 1 of setting the modulator control during the transmission period

: this step marks the start of the period of emission of the diode during this image frame.

0063The selection switch T4 and the timing switch T3 are closed simultaneously by applying to the electrodes Y respectively_S and Y_VS a suitable logic signal (see the first two timing diagrams of the <figref idref="f0002">figure 3</figref>); closing T4 has the effect of selecting the control circuit 1 of the diode 2 (as well as the other circuits of the same line), by coupling, via the capacitor C_VS, the control terminal C at the addressing electrode X_D ; the simultaneous closing of the switches T3 and T4 also has the effect, despite the capacitive coupling, of setting the potential the control terminal C to the setting potential V_cal applied to the reference electrode P_R, and thus to set the voltage of the gate G of the modulator T2; during the setting of the control terminal C, the potential of the addressing electrode is brought to the value V_ini-E = 0. The duration of this step is high enough to stabilize the potentials, and in particular so that the potential of the gate G remains at the value V_cal.

Step 2 of addressing the circuit during the transmission period

:

0064The setting switch T3 is then opened while keeping the selection switch T4 closed; during this time, the potential of the addressing electrode is brought to the value V_data-1 (and the potential of the other addressing electrodes to the values ​​V_data-1, ..., V_data-i, ....). By capacitive coupling via coupling capacitor C_VS, the potential V_G of grid G ​​undergoes a (positive) jump ΔV_prog-data-1 proportional to ΔV_data-i = V_data-1 - V_ini-E = V_data-1, and thus goes from the value V_cal at a positive value V_cal + ΔV_prog-data-1 = V_prog-data-1 ; the value of V_data-1 is set so that the control voltage of the modulator V_G-V_S = V_proo-data-1- V_SS = V_prog-data-1 is proportional to the image data to be displayed by the diode 2 during this image frame, to within a correction which will be described later. The duration of step 2 is adapted in a manner known per se to obtain the stabilization of the potentials at these values ​​and to charge the holding capacitor C_S. At this stage, the diode 2 therefore begins to emit a luminance proportional, to the said correction, to the image data of the pixel or sub-pixel which is associated with it during this image frame.

Step 3 to maintain the circuit during the transmission period

:

0065During the remainder of the period of emission of this diode 2 during this image frame, the selection switch T4 is opened while keeping the setting switch T3 open; the control circuit 1 is therefore no longer selected and there is no longer any capacitive coupling between the addressing electrode X_D and the control terminal C of circuit 1. During this step, the capacitor C_S maintains the voltage of the control terminal C at a constant value, and the diode 2 therefore continues to emit a luminance proportional to the image data of the pixel or sub-pixel associated with it.

0066The voltage of the control terminal C may drop slightly -ΔV_{prog-data-cor} between step 2 and step 3 due to the elimination of the capacitive coupling; so that the luminance of the diode is well proportional to the image data, it is preferable to make a correction + ΔV_{prog-data-cor} at the value V_prog-data-1 referred to in step 2.

0067During this step 3, the control circuits of the other diode lines are selected and addressed by also applying steps 1 and 2 above to them; the panel then displays the entire image.

Step 4 of setting the modulator control during the depolarization period

: the start of this step marks the end of the period of emission of the diode and the start of the depolarization period of the T2 modulator.

0068The selection switch T4 and the timing switch T3 are closed simultaneously by applying to the electrodes Y respectively_S and Y_VS a suitable logic signal (see the first two timing diagrams of the <figref idref="f0002">figure 3</figref>); closing T4 has the effect of selecting the control circuit 1 of the diode 2 by coupling, via the capacitor C_VS, the control terminal C at the addressing electrode X_D ; the simultaneous closing of switches T3 and T4 has the effect, despite the capacitive coupling, of setting the potential of the control terminal C to the setting potential V_cal applied to the reference electrode P_R ; during the setting of the control terminal C, the potential of the addressing electrode is brought to the value V_ini-P-1 whose value will be established later. The duration of this step is high enough to stabilize the potentials, and in particular so that the potential of the control terminal C remains at the value V_cal.

Step 5 of addressing the circuit during the depolarization period

:

0069The setting switch T3 is then opened while keeping the selection switch T4 closed; during this time, the potential of the addressing electrode is brought to the value V_pol-1 less than V_data-1. By capacitive coupling via coupling capacitor C_VS, the voltage V_G of the control terminal C therefore undergoes a voltage jump ΔV_prog-pol-1 proportional to ΔV_pol-1 = V_pol-1 - V_ini-P-1, and thus goes from the value V_cal at a value: V_cal + ΔV_prog-pol-1 = V_prog-pol-1 ; according to the invention, the values ​​of V_ini-P-1 and of V_pol-1 are chosen according to a double criterion:<ul id="ul0009" list-style="dash" compact="compact"><li>criterion 1: the difference ΔV_pol-1 positive here (but negative during 2^th image frame - see <figref idref="f0002">figure 3</figref>), is adapted, to within a correction which will be described later, to obtain a (negative) voltage for depolarization control of the modulator V_G-V_S = V_prog-pol-1 - Vss = V_prog-pol-1 of a value adapted, in a manner known per se, to compensate for the drift of the trigger threshold voltage of the modulator which occurred during the previous emission period;</li><li>criterion 2: V_ini-P-1 is high enough that V_pol-1, defined according to criterion 1, either positive or zero. Preferably, when the value of ΔV_pol-1 allows it, we choose V_ini-P-1 = 0, as illustrated in <figref idref="f0002">figure 3</figref> in the case of the first frame. Thus, the voltage of the addressing electrode never changes sign and it is advantageous to use conventional and economical means for controlling the addressing electrodes.</li></ul>

0070The duration of step 5 is adapted in a manner known per se to obtain the stabilization of the potentials at these values ​​and to charge the holding capacitor C_S. At this stage, the T2 modulator begins to be depolarized in proportion to the value of V_prog-pol-1.

Step 6 of maintaining the circuit during the depolarization period

:

0071During the rest of the depolarization period of this diode 2 during this image frame, the selection switch T4 is opened while keeping the setting switch T3 open; the control circuit 1 is therefore no longer selected and there is no longer any capacitive coupling between the addressing electrode X_D and the control terminal C of circuit 1. During this step, the capacitor C_S maintains the control voltage of the T2 modulator at a constant value, and the T2 modulator therefore continues to be depolarized in proportion to the value of V_prog-pol-1.

0072The control voltage of the T2 modulator may suffer a slight drop -ΔV_prog-pol-cor between step 4 and step 5 due to the elimination of the capacitive coupling; so that the depolarization of the modulator conforms to the objectives, it is then preferable to make a correction + ΔV_prog-pol-cor at the value V_prog-pol-1 referred to in step 4.

0073During this step 6, steps 4 and 5 are applied to the control circuits of the other diode lines so as to depolarize the modulators of the circuits of the other lines; the depolarization of the modulators of the entire panel is thus obtained.

0074The end of this step marks the end of the depolarization period of the modulator T2 and the start of a new period of emission of the diode 2, during a new image frame.

0075The <figref idref="f0002">figure 3</figref> represents the control timing diagrams of a control circuit 1 of a transmitter 2 for two successive image frames.

0076As seen above, during the first frame, the potentials of the addressing electrode X_D successively take the values ​​V_ini-E = 0, V_data-1, V_ini-P-1 , V_pol-1, and the potentials of the grid G ​​of the modulator T2 successively take the values ​​V_cal, V_prog-data-1, V_cal, V_prog-pol-1, with ΔV_data-1 = V_data-1 - V_ini-E, ΔV_prog-data-1 = V_prog-data-1 - V_cal, ΔV_pol-1 = V_pol-1 - V_ini-P-1, ΔV_prog-pol-1 = V_prog-pol-1 - V_cal ; like here V_prog-pol-1 ≥ V_cal (i.e. ΔV_prog-pol-1 ≥ 0), we can keep V_ini-P-1 = 0, because ΔV_pol-1 is also positive or zero so that V_pol-1 rest of the same sign of V_data-1.

0077In the same way, during the second frame, the potentials of the addressing electrode X_D successively take the values ​​V_ini-E = 0, V_data-2, V_ini-P-2, V_pol-2, and the potentials of the control terminal C successively take the values ​​V_cal, V_prog-data-2, V_cal, V_prog-pol-2, with ΔV_data-2 = V_data-2 - V_ini-E, ΔV_prog-data-2 = V_prog-data-2 - V_cal, ΔV_pol-2 = V_pol-2 - V_ini-P-2, ΔV_prog-pol-2 = V_prog-pol-2 - V_cal. ; like this time V_prog-pol-2 &lt;V_cal. (i.e. ΔV_prog-pol-1 &lt;0), it is appropriate that V_ini-P-2 ≥ - ΔV_pol-2 so that V_ini-P-2 + ΔV_pol-2 = V_pol-2 remains positive or zero, i.e. with the same sign of V_data-2.

0078We show that the proportionality constant, that is to say the coupling constant K (t), between the potential jumps on the control terminal C: ΔV_prog-data-1, ΔV_prog-pol-1, ΔV_prog-data-2, and ΔV_prog-pol-2, and the corresponding potential jumps on the addressing electrode ΔV_data-1, ΔV_pol-1, ΔV_data-2, and ΔV_pol-2, which changes as a function of time from the instant t = 0 to which the said potential jump is applied to the addressing electrode, is expressed in the form: <maths id="math0001"><math display="block"><mi>K</mi><mfenced><mi>t</mi></mfenced><mo>=</mo><mi>K</mi><mo>×</mo><mfenced><mn>1</mn><mo>-</mo><msup><mi>e</mi><mrow><mo>-</mo><mfrac><mi>t</mi><mi mathvariant="normal">τ</mi></mfrac></mrow></msup></mfenced><mo>,</mo></math><img file="EP1964094B1_D0001.tif" /></maths><ul id="ul0010" list-style="dash" compact="compact"><li>where K = C_VS / (VS_VS + C_S), VS_VS and C_S designating here the values ​​of the capacitances respectively of the coupling capacitors and of the holding capacitors,</li><li>where τ = R4 x C_S x C_VS / (VS_VS + C_S), where R4 is the electrical resistance of the selector switch when it is closed.</li></ul>

0079To stabilize the potentials and to charge the holding capacitor C_S during an addressing step (step 2 or 5 above), it is preferable that the duration of this step is at least equal to 5 x τ.

0080As the transistors of the control circuit are made of amorphous silicon, the value of R4 is generally high, of the order of a hundred kiloOhms, which induces a relatively high time constant τ.

0081Specifically, taking C_S = 0.5 pF, C_VS = 3 pF, a simulation using the SPICE software shows that the time to stabilize the potentials after an addressing signal with a potential jump of 17 V is 3.25 µs.

0082Specifically, taking C_S = 0.5 pF, C_VS = 10 pF, a simulation using the “aimSPICE” software shows that the time required to stabilize the potentials after an addressing signal with a potential jump of 16 V is 4.5 µs.

0083Concerning the stabilization time, these two simulations give more precise results although of the same order of magnitude as the equation above.

0084In order to obtain a coupling constant K as close as possible to 1, it is preferable to choose C_VS >> C_S, which is illustrated by the two simulation examples above.

0085As the <figref idref="f0002">figure 3</figref>, V_prog-data-2 >> V_prog-data-1, which means that the T2 modulator is much more strongly polarized during the second frame than during the first frame, causing a much greater variation in the trigger threshold voltage of this modulator; therefore, we choose | V_prog-pol-2| >> | V_prog-pol-1|, so as to compensate for this greater polarization during the second frame by an equally greater depolarization. It can therefore be seen that this embodiment of the invention advantageously makes it possible to adapt the value of each depolarization addressing signal V_polished a depolarization period to the value of each display addressing signal V_data-i of the preceding display period so as to compensate as best as possible for the drift of the triggering threshold voltage of the modulators of each control circuit 1.

0086A variant of the first embodiment is illustrated in <figref idref="f0001">figure 2</figref> : the display panel is identical to the previous one except that the timing switch T3 is able to connect directly, without going through the selection switch T4, the timing terminal R to the control terminal C of the circuit 1 '.

0087The panel according to this variant can be controlled as described above for the main embodiment.

0088The embodiments described below relate to display panels with active matrix organic light-emitting diodes; the invention applies more generally to all kinds of active matrix display panels, in particular to transmitters which can be controlled by current or with optical valves.