EP1908244B1

Bit-operated rearrangement diversity for AICO mapping

Abstract

Transmit diversity system in which constellation rearrangement is used. Both diversity signals contain the same data and both are 16-QAM, but the location of the data bits within the constellation is different. This averages the effect of the different levels of reliability of the different constellation points. A method for modifying a quadruple of data bits in a data transmission system using Quadrature. Amplitude Modulation with 16 different modulation states, 16-QAM, using an Antipodal Inverted Constellation AICO) mapping, swapping bits selecting contiguous symbol regions with bits selecting non-contiguous symbol regions. Depending on the particular pre-defined mapping and on the particular permutation of bits, inversion of selected bits may be performed in addition. The quadruples thus obtained are mapped to modulation symbols according to a pre-defined AICO mapping. In the corresponding method for receiving the symbols, likelihood values are swapped and modified in a way which is complementary to the permutation and inversion of bits, before they are combined with likelihood values from other symbols representing the same bits. Method ensures that there is a one to one correspondence between Hamming distance and Euclidian distance for the combined received data. In other words it ensures that, once combined, all 4 bit data words which differ by the same number of bits (Hamming distance) are the same distance apart in the constellation (Euclidian distance).

EP1908244B1, drawing sheet 1
Sheet 1 of 51

Term

Term ended

Expired 26 July 2025, 1.2 years ago.

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  4. Today

30 claims: 4 independent, 26 dependent

  1. 1
    A method for modifying a quadruple of data bits in a data transmission system using Quadrature Amplitude Modulation with 16 different modulation states, 16-QAM, in which a quadruple of data bits is mapped to a modulation symbol according to the logical values and positions of said bits within said quadruple and according to a pre-defined mapping, wherein in the pre-defined mapping of bit value combinations to complex modulation states four bits in a quadruple of data bits are mapped to a modulation symbol, such that i) a bit on a first one of the four bit positions selects one of two contiguous regions of the 16-QAM modulation states based on its logical value, each of the two contiguous regions being formed by two rows adjacent to each other; ii) a bit on a second one of the four bit positions selects one of two contiguous regions of the 16-QAM modulation states based on its logical value, each of the two contiguous regions being formed by two columns adjacent to each other; iii) a bit on a third one of the four bit positions selects one of two non-contiguous regions of the 16-QAM modulation states based on its logical value, each of the two non-contiguous regions being formed by two rows not adjacent to each other; and iv) a bit on a fourth one of the four bit positions selects one of two non-contiguous regions of the 16-QAM modulation states based on its logical value, each of the two non-contiguous regions being formed by two columns not adjacent to each other; characterized by the method comprising the steps of:a) receiving a first quadruple of data bits;b) performing a pre-defined permutation of data bits within the first quadruple of data bits to obtain a second quadruple of data bits, wherein bits from positions in said first quadruple selecting contiguous symbol regions are shifted to positions in said second quadruple selecting non-contiguous symbol regions, and bits from positions in said first quadruple selecting non-contiguous symbol regions are shifted to positions in said second quadruple selecting contiguous symbol regions;and c) mapping data bits from the second quadruple to a modulation symbol according to their position in the quadruple and according to the pre-defined mapping of bit value combinations to complex modulation states.
  2. 5
    The method of one of the claims 2 to 4, further comprising prior to step c) the step e) inverting either two bits selecting regions formed by columns, or inverting two bits selecting regions formed by rows, or inverting all four bits, if in said pre-defined permutation of bits both bits from positions selecting rows in said first quadruple are shifted to positions selecting columns in said second quadruple, and if the pre-defined mapping is such that both bits selecting regions formed by columns have the same value for the outer columns and both bits selecting regions formed by rows have different values for the outer rows, or if the pre-defined mapping is such that both bits selecting regions formed by columns have different values for the outer columns and both bits selecting regions formed by rows have the same value for the outer rows.
  3. 6
    The method of one of the claims 1 to 5, further comprising the steps of mapping said first quadruple of data bits to a first modulation symbol according to said pre-defined mapping;and transmitting said first and said second modulation symbol, wherein the transmissions of said first and said second modulation symbol are differing in at least one of a physical channel, a transmission medium, a transmission frequency, a transmission time, a transmission code, a polarization of a transmission wave, and an antenna location.
  4. 7
    A computer-readable storage medium having stored thereon instructions which when executed on at least one processor of a digital data transmitter system using Quadrature Amplitude Modulation with 16 different modulation states, 16-QAM, cause the transmitter system to carry out the method of one of the claims 1 to 6.
  5. 8
    An apparatus for modifying a quadruple of data bits in a data transmission system using Quadrature Amplitude Modulation with 16 different modulation states, 16-QAM, in which a quadruple of data bits is mapped to a modulation symbol according to the logical values and positions of said bits within said quadruple and according to a pre-defined mapping, wherein in the pre-defined mapping of bit value combinations to complex modulation states four bits in a quadruple of data bits are mapped to a modulation symbol, such that i) a bit on a first one of the four bit positions selects one of two contiguous regions of the 16-QAM modulation states based on its logical value, each of the two contiguous regions being formed by two rows adjacent to each other; ii) a bit on a second one of the four bit positions selects one of two contiguous regions of the 16-QAM modulation states based on its logical value, each of the two contiguous regions being formed by two columns adjacent to each other; iii) a bit on a third one of the four bit positions selects one of two non-contiguous regions of the 16-QAM modulation states based on its logical value, each of the two non-contiguous regions being formed by two rows not adjacent to each other; and iv) a bit on a fourth one of the four bit positions selects one of two-non-contiguous regions of the 16-QAM modulation states based on its logical value, each of the two non-contiguous regions being formed by two columns not adjacent to each other; characterized by the apparatus comprising:a permutating unit configured to perform a pre-defined permutation of data bits within the first quadruple of data bits to obtain a second quadruple of data bits, wherein bits from positions in said first quadruple selecting contiguous symbol regions are shifted to positions in said second quadruple selecting non-contiguous symbol regions, and bits from positions in said first quadruple selecting non-contiguous symbol regions are shifted to positions in said second quadruple selecting contiguous symbol regions;and a mapper configured to map data bits from the second quadruple to a modulation symbol according to their position in the quadruple and according to the pre-defined mapping of bit value combinations to complex modulation states.
  6. 12
    The apparatus of one of the claims 9 to 11, wherein the permutating unit is further configured to invert either two bits selecting regions formed by columns, or to invert two bits selecting regions formed by rows, or to invert all four bits, if in said pre-defined permutation of bits both bits from positions selecting rows in said first quadruple are shifted to positions selecting columns in said second quadruple and if both bits from positions selecting columns in said first quadruple are shifted to positions selecting rows in said second quadruple, and if the pre-defined mapping is such that both bits selecting regions formed by columns have the same value for the outer columns and both bits selecting regions formed by rows have different values for the outer rows, or if the pre-defined mapping is such that both bits selecting regions formed by columns have different values for the outer columns and both bits selecting regions formed by rows have the same value for the outer rows.
  7. 13
    The apparatus of one of the claims 8 to 12, wherein the mapper is further configured to map said first quadruple of data bits to a first modulation symbol according to said pre-defined mapping;and the apparatus further comprises transmission means configured to transmit said first and said second modulation symbol, wherein the transmissions of said first and said second modulation symbol are differing in at least one of a physical channel, a transmission medium, a transmission frequency, a transmission time, a transmission code, a polarization of a transmission wave, and an antenna location.
  8. 14
    A method for modifying a quadruple of likelihood values for receiving data transmitted using Quadrature Amplitude Modulation with 16 different modulation states, 16-QAM, in which a quadruple of data bits is mapped to a modulation symbol according to the logical values and positions of said bits within said quadruple and according to a pre-defined mapping, wherein in the pre-defined mapping of bit value combinations to complex modulation states four bits in a quadruple of data bits are mapped to a modulation symbol, such that i) a bit on a first one of the four bit positions selects one of two contiguous regions of the 16-QAM modulation states based on its logical value, each of the two contiguous regions being formed by two rows adjacent to each other; ii) a bit on a second one of the four bit positions selects one of two contiguous regions of the 16-QAM modulation states based on its logical value, each of the two contiguous regions being formed by two columns adjacent to each other; iii) a bit on a third one of the four bit positions selects one of two non-contiguous regions of the 16-QAM modulation states based on its logical value, each of the two non-contiguous regions being formed by two rows not adjacent to each other; and iv) a bit on a fourth one of the four bit positions selects one of two non-contiguous regions of the 16-QAM modulation states based on its logical value, each of the two non-contiguous regions being formed by two columns not adjacent to each other; characterized by the method comprising the steps of:a) receiving a second symbol representing a second quadruple of data bits obtained from a first quadruple of data bits by a pre-defined permutation of the data bits within the quadruple, wherein data bits from the second set of quadruples are mapped to modulation symbols according to their position in the quadruple and according to said pre-defined mapping of bit value combinations to complex modulation states;b) determining a second quadruple of likelihood values from the received second symbol, wherein each likelihood value in the second quadruple of likelihood values corresponds to the bit having the same position in the second quadruple of data bits;and c) performing a pre-defined permutation of the likelihood values within the second quadruple of likelihood values to obtain a third quadruple of likelihood values, wherein likelihood values from positions corresponding to bits of the second quadruple of bits selecting a contiguous region of complex modulation states are shifted to positions corresponding to bits of the second quadruple selecting a non-contiguous region of complex modulation states, and likelihood values from positions corresponding to bits of the second quadruple of bits selecting a non-contiguous region of complex modulation states, are shifted to positions corresponding to bits of the second quadruple selecting a contiguous region of complex modulation states.
  9. 18
    The method of one of the claims 15 to 17, further comprising after step b) the step e) modifying either two likelihood values corresponding to bits selecting regions formed by columns, or modifying two likelihood values corresponding to bits selecting regions formed by rows, or modifying all four likelihood values, to obtain respective complementary likelihood values, if in said pre-defined permutation of likelihood values both likelihood values from positions corresponding to bits from positions selecting rows in said first quadruple are shifted to positions corresponding to bits selecting columns in said second quadruple and if both likelihood values from positions corresponding to bits from positions selecting columns in said first quadruple are shifted to positions corresponding to bits selecting rows in said second quadruple, and if the pre-defined mapping is such that both bits selecting regions formed by columns have the same value for the outer columns and both bits selecting regions formed by rows have different values for the outer rows, or if the pre-defined mapping is such that both bits selecting regions formed by columns have different values for the outer columns and both bits selecting regions formed by rows have the same value for the outer rows.
  10. 19
    The method of one of the claims 14 to 18, wherein the likelihood values comprise linear probabilities, and a complementary likelihood value is obtained by calculating 1 minus the respective original likelihood value.
  11. 20
    The method of one of the claims 14 to 18, wherein the likelihood values comprise logarithms of probability ratios, and a complementary likelihood value is obtained by inverting the sign of the respective original likelihood value.
  12. 21
    The method of one of the claims 14 to 20, further comprising the steps:f) receiving a first symbol representing a first quadruple of data bits;g) determining a first quadruple of likelihood values from the received first symbol, wherein each likelihood value in the first quadruple of likelihood values corresponds to the bit having the same position in the first quadruple of data bits;and h) combining likelihood values from corresponding positions of the first and third quadruple of likelihood values to detect a value combination of the first quadruple of data bits.
  13. 22
    A computer-readable storage medium having stored thereon instructions which when executed on at least one processor of a digital data receiver system for reception of digital data, transmitted using Quadrature Amplitude Modulation with 16 different modulation states, 16-QAM, cause the receiver system to carry out the method of one of the claims 14 to 21.
  14. 23
    A digital receiver system, for reception of digital data transmitted using Quadrature Amplitude Modulation with 16 different modulation states, 16-QAM, the digital receiver system comprising:a) receiving means for receiving a second symbol representing a second quadruple of data bits obtained from a first quadruple of data bits by a pre-defined permutation of the data bits within the quadruple, wherein data bits from the quadruples of bits are mapped to modulation symbols according to their position in the quadruple and according to a pre-defined mapping of bit value combinations to complex modulation states, and in the pre-defined mapping of bit value combinations to complex modulation states, four bits in a quadruple of data bits are mapped to a modulation symbol such that i) a bit on a first one of the four bit positions selects one of two contiguous regions of the 16-QAM modulation states based on its logical value, each of the two contiguous regions being formed by two rows adjacent to each other;ii) a bit on a second one of the four bit positions selects one of two contiguous regions of the 16-QAM modulation states based on its logical value, each of the two contiguous regions being formed by two columns adjacent to each other;iii) a bit on a third one of the four bit positions selects one of two non-contiguous regions of the 16-QAM modulation states based on its logical value, each of the two non-contiguous regions being formed by two rows not adjacent to each other;and iv) a bit on a fourth one of the four bit positions selects one of two non-contiguous regions of the 16-QAM modulation states based on its logical value, each of the two non-contiguous regions being formed by two columns not adjacent to each other;b) a likelihood value calculation unit for determining a second quadruple of likelihood values from the received second symbol, wherein each likelihood value in the quadruple of likelihood values corresponds to the bit having the same position in the corresponding quadruple of data bits;characterized by c) a permutating unit with an input to receive the second quadruple of likelihood values, and an output, the permutating unit being configured to perform a pre-defined permutation of the likelihood values within the input quadruple of likelihood values to obtain a third quadruple of likelihood values for output, wherein likelihood values from positions corresponding to bits of the second quadruple of bits selecting a contiguous region of complex modulation states are shifted to positions corresponding to bits of the second quadruple of data bits selecting a non-contiguous region of complex modulation states, and likelihood values from positions corresponding to bits of the second quadruple of bits selecting a non-contiguous region of complex modulation states are shifted to positions corresponding to bits of the second quadruple of data bits selecting a contiguous region of complex modulation states.
  15. 27
    The digital receiver system of one of the claims 24 to 26, wherein the permutating unit is further configured to modify either two likelihood values corresponding to bits selecting regions formed by columns, or to modify two likelihood values corresponding to bits selecting regions formed by rows, or to modify all four likelihood values, to obtain respective complementary likelihood values, if in said pre-defined permutation of likelihood values both likelihood values from positions corresponding to bits from positions selecting rows in said first quadruple are shifted to positions corresponding to bits selecting columns in said second quadruple and if both likelihood values from positions corresponding to bits from positions selecting columns in said first quadruple are shifted to positions corresponding to bits selecting rows in said second quadruple, and if the pre-defined mapping is such that both bits selecting regions formed by columns have the same value for the outer columns and both bits selecting regions formed by rows have different values for the outer rows, or if the pre-defined mapping is such that both bits selecting regions formed by columns have different values for the outer columns and both bits selecting regions formed by rows have the same value for the outer rows.
  16. 28
    The digital receiver system of one of the claims 23 to 27, wherein the likelihood values comprise linear probabilities, and the permutating unit is configured to obtain a complementary likelihood value by calculating 1 minus the respective original likelihood value.
  17. 29
    The digital receiver system of one of the claims 23 to 27, wherein the likelihood values comprise logarithms of probability ratios, and the permutating unit is configured to obtain a complementary likelihood value by inverting the sign of the respective original likelihood value.
  18. 30
    The digital receiver system of one of the claims 23 to 29, wherein the receiving means is further configured to receive a first data symbol representing said first quadruple of data bits, wherein data bits from said first quadruple of bits are mapped to said first modulation symbol according to their position in the quadruple and according to said pre-defined mapping of bit value combinations to complex modulation states;the likelihood value calculation unit is further configured to determine a first quadruple of likelihood values from the received first symbol, wherein each likelihood value in the quadruple of likelihood values corresponds to the bit having the same position in the corresponding quadruple of data bits;and the digital receiver system further comprises a combiner with at least two inputs for combining likelihood values from corresponding positions of quadruples provided to the inputs, to detect a value combination of the first quadruple of data bits, wherein a first input of the combiner is configured to receive the first quadruple of likelihood values and a second input of the combiner is connected to the output of the permutating unit for receiving the third quadruple of likelihood values.
Independent claims18