Nova Patents
EP1887845A1

Printed wiring board

Abstract

A printed wiring board comprises a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. Connection reliability and insulation reliability are easily improved by making the ratio (H/D) of a height H from solder resist layer surface the solder bump to an opening diameter of the opening 0.55 to 1.0 even in narrow pitch structure under the pitch of the opening provided in the solder resist layer of 200 µm or less.

EP1887845A1, drawing sheet 1
Sheet 1 of 10

Term

Term ended

Projected expiry passed 28 June 2026, 0.2 years ago.

  1. Priority
  2. Filed
  3. Published
  4. Projected expiry
  5. Today

7 claims: 2 independent, 5 dependent

  1. 1
    A printed wiring board comprising a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads, wherein the conductor pads are arranged with a pitch of 200 µm or less and the ratio (H/D) of a height H of the solder bump from the surface of the solder resist layer to an opening diameter D of the opening is 0.55 to 1.0.
  2. 2
    A printed wiring board comprising a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, solder bumps formed on the respective conductor pads, and an under fill material or resin for sealing a gap or space defined between electronic parts mounted through the solder bumps and the solder resist layer, wherein the conductor pads are arranged with a pitch of 200 µm or less and the ratio (H/D) of a height H of the solder bump from the surface of the solder resist layer to an opening diameter D of the opening is 0.55 to 1.0.