Multilayered printed circuit board and manufacturing method therefor
Abstract
A multilayered printed circuit board comprising: a substrate (330) on which a conductive circuit (334) is formed; an interlayer insulating resin layer (350) formed on the conductive circuit (334); an opening (348) for forming a via hole (360) formed in the interlayer insulating resin layer (350); and another conductive circuit (358) including a via hole (360) and formed on the interlayer insulating resin layer (350), wherein the surface of the conductive circuit (334) is subjected to a coarsening process using etching solution containing cupric complex and organic acid, and stripe pits and projections are formed on the inner wall of the opening (348) for forming the via hole (360).

Term
Term ended
Projected expiry passed 30 July 2019, 7.2 years ago.
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2 sheets
Sheet 1 Sheet 2
Every citation, both ways
| Document | Relation | Office | Category | Cited during | Relevant claims |
|---|---|---|---|---|---|
| EP0811480A1 | Cites | European Patent Office (EPO) | Y | Search report | 5,6,8,10 |
| EP0844809A2 | Cites | European Patent Office (EPO) | Y | Search report | 9 |
| EP0855454A1 | Cites | European Patent Office (EPO) | Y | Search report | 1-3 |
| JPH09186456A | Cites | Japan | XY | Search report | 4,7 |
| JPH09246732A | Cites | Japan | A | Search report | 1-3 |
44 members in 8 offices
Priority claims17
| Document | Office | Kind | Date |
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| 24938298 | Japan | – | |
| 24938298 | Japan | A | |
| 28194098 | Japan | – | |
| 28194298 | Japan | – | |
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| 30324798 | Japan | – | |
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| 6024099 | Japan | – | |
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| 11624699 | Japan | – | |
| 11624699 | Japan | A | |
| 99933214 | European Patent Office (EPO) | A |
Members44
| Document | Office | Kind | |
|---|---|---|---|
| JP2000077851A | Japan | A | |
| WO0015015A1 | World Intellectual Property Organization (WIPO) | A1 | |
| JP2000091742A | Japan | A | |
| JP2000091750A | Japan | A | |
| JP2000114727A | Japan | A | |
| JP2000244124A | Japan | A | |
| JP2000244125A | Japan | A | |
| JP2000261149A | Japan | A | |
| TW407453B | Taiwan Province of China | B | |
| JP2000307245A | Japan | A | |
| EP1121008A1 | European Patent Office (EPO) | A1 | |
| KR20010088796A | Republic of Korea | A | |
| US2001042637A1 | United States of America | A1 | |
| US6591495B2 | United States of America | B2 | |
| US2004025333A1 | United States of America | A1 | |
| EP1121008A4 | European Patent Office (EPO) | A4 | |
| MY123228A | Malaysia | A | |
| KR20070086858A | Republic of Korea | A | |
| KR20070086859A | Republic of Korea | A | |
| KR20070086860A | Republic of Korea | A | |
| KR20070086861A | Republic of Korea | A | |
| KR20070086862A | Republic of Korea | A | |
| KR20070086863A | Republic of Korea | A | |
| KR20070086864A | Republic of Korea | A | |
| EP1843649A2 | European Patent Office (EPO) | A2 | |
| EP1843650A2 | European Patent Office (EPO) | A2 | |
| EP1843649A3 | European Patent Office (EPO) | A3 | |
| EP1843650A3This record | European Patent Office (EPO) | A3 | |
| US2008173473A1 | United States of America | A1 | |
| EP1121008B1 | European Patent Office (EPO) | B1 | |
| JP4127441B2 | Japan | B2 | |
| JP4127442B2 | Japan | B2 | |
| US2008189943A1 | United States of America | A1 | |
| JP4137279B2 | Japan | B2 | |
| US7415761B2 | United States of America | B2 | |
| KR100855528B1 | Republic of Korea | B1 | |
| KR100855529B1 | Republic of Korea | B1 | |
| KR100855530B1 | Republic of Korea | B1 | |
| DE69939221D1 | Germany | D1 | |
| MY139553A | Malaysia | A | |
| US7832098B2 | United States of America | B2 | |
| EP1843650B1 | European Patent Office (EPO) | B1 | |
| US8148643B2 | United States of America | B2 | |
| US2012125680A1 | United States of America | A1 |
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| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
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| No opposition filed against granted patent, or epo opposition proceedings concluded without decisionGrantedR097 | R097 | DE | |
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| Discontinued in the netherlands as no translation has been filedVDEP | VDEP | NL | |
| Dpma publication of mentioned ep patent grantGrantedR096 | R096 | DE | |
| Divisional application: reference to earlier applicationAC | AC | EP | |
| Designated contracting statesAK | AK | EP | |
| European patent grantedGrantedFG4D | FG4D | GB | |
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| (expected) grantORIGINAL CODE: 0009210GRAA | GRAA | EP | |
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| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Title (correction)METHOD OF MANUFACTURING A MULTILAYERED PRINTED CIRCUIT BOARDRTI1 | RTI1 | EP | |
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Numbers
- Publication
- 1843650
- Application
- 70135249
Titles3
- German
- Mehrschichtige Leiterplatte und Verfahren zu deren Herstellung
- English
- Multilayered printed circuit board and manufacturing method therefor
- French
- Panneau à circuit imprimé multicouche et son procédé de fabrication
Classification
- CPC, 43
- H05K3/4652
- H05K3/46
- H05K1/0201
- H05K3/0032
- H05K3/0035
- H05K3/0038
- H05K3/0055
- H05K3/0094
- H05K3/108
- H05K3/28
- H05K3/381
- H05K3/383
- H05K3/384
- H05K3/427
- H05K3/4602
- H05K3/4623
- H05K3/4661
- H05K2201/0195
- H05K2201/0352
- H05K2201/0358
- H05K2201/062
- H05K2201/09536
- H05K2201/0959
- H05K2201/09827
- H05K2201/09863
- H05K2201/09881
- H05K2203/0307
- H05K2203/0353
- H05K2203/0554
- H05K2203/0773
- H05K2203/107
- H05K2203/121
- B23K26/389
- Y10T29/49156
- Y10T29/4913
- Y10T29/49155
- Y10T29/49165
- Y10T29/49124
- Y10T29/49126
- Y10T29/49128
- Y10T29/49117
- H10W90/724
- H10W70/655
- IPC, 8
- H05K3 46
- H05K3 38
- B23K26 38
- H05K1 02
- H05K3 00
- H05K3 10
- H05K3 28
- H05K3 42
Designated states4
- Contracting states, 4
- Germany
- Finland
- United Kingdom
- Netherlands (Kingdom of the)