Circuit for converting an AC voltage into a DC voltage

Technical field

The invention relates to circuits for converting an AC voltage into a DC voltage. An advantageous embodiment of the invention includes a Power factor correction, hereinafter referred to as PFC.

State of the art

A source supplies to a load an input AC voltage and an input current. The source is, for example, a commercial power source provided with a frequency of 50 Hz. If a DC voltage are, so the use of a full bridge rectifier consisting of four rectifier diodes common. Such a circuit provides first a pulsating DC voltage. With a smoothing capacitor can this vibrant DC voltage can be smoothed. The smoothing capacitor causes but a pulsed current consumption of the AC voltage source. This results a power factor, which is significantly less than 1. To remedy this, in particular adhere to relevant regulations such as IEC 61000-3-2, are PFC circuits known.

Usual PFC circuits are, for. Example boost converter, buck converter, deep releasing half and Full bridges and Cuk, SEPIC and Zeta converter.

The full-bridge rectifier described above produces a power loss, the Is dependent on a forward voltage of the rectifier diodes and the input alternating current. Since the forward voltage of the diodes on the semiconductor material used dependent, the power loss of the full-bridge rectifier has accepted will. This is particularly disadvantageous for devices that do not contain fans, since the Power loss at high temperatures of the components used leads. Typically fanless are ballasts for lamps.

Another drawback of the described prior art is the number of switches, which are needed to provide a DC voltage, in particular: when a PFC is required. The switches are generally prepared by semiconductor switches realized, whereby diodes are understood as a switch. furthermore are transistors such. B. MOSFET, bipolar transistors and IGBT, controlled Switches that can be switched on and off via a control signal.

Summary of the Invention

It is an object of the present invention, a circuit for converting a to provide AC voltage into a DC voltage with respect to a Circuit with full bridge inverter having a reduced power dissipation.

It is another object of the invention, the above-mentioned circuit with respect to the prior art reduced number of switches to enable. This particular Also, when a PFC is realized.

This object is achieved by the following basic design of an inventive dissolved circuit: The full-bridge rectifier is omitted, it contains the circuit a series circuit of at least two controlled switches. The smoothing capacitor is divided into a series circuit of two storage capacitors. The Source fed to the connection points of the controlled switches and storage capacitors a one inductance. The series circuits of switches and storage capacitors are connected in parallel. To this parallel circuit, the desired DC voltage are tapped.

Compared to the full-bridge rectifier with 4 diodes, the described Basic design of an inventive circuit only 2 controlled switch on. So that the number of switches compared to the prior art is reduced.

Furthermore, the power dissipated by the prior art is characterized by two improvements reduced. The input current flows through the full-bridge inverter 2 switch while in the basic embodiment of the invention Circuit only flows through a switch. In addition, it is at the Switches in the full bridge inverter to diode while inventively controlled use switches that cause fewer losses.

The switches are alternately turned on and off. If following switch control applied, the circuit according to the invention realizes a PFC: According to a definition for the positive current direction of the input alternating current causes the turning on a switch a rising input AC current, while turning the other switch a falling input current causes. Now, the first-mentioned switch is turned on until the input current reaches an upper hysteresis. The former Switch is then turned off and turned on the other switch, until the input current reaches a lower hysteresis. The input current Thus within a hysteresis band whose width optional is. It should be noted that a narrow hysteresis band a high switching frequency the switch causes. The hysteresis values ​​are proportional to the input AC voltage selected. Thus corresponds to the time curve of the hysteresis band and thus substantially the time course of the input alternating current the time course of the input AC voltage. Thus, the invention Circuit ideally achieve the value of 1 for the power factor. The opposite a mains frequency high-frequency variations of the input alternating current can by known filter circuits at the input of the circuit are attenuated.

At the storage capacitors is in the steady state in each case one Voltage which is at least as large as the peak value of the input AC voltage. Between the storage capacitors to form a stabilized Center from a center voltage. This center can be beneficial for a load circuit to be used, requires a square-wave AC voltage. The load circuit is connected to a terminal at the center, to the other terminal alternately with the voltage of the one and the other Storage capacitor charged. This square wave frequency, with the intermediate the storage capacitors is switched, a higher-frequency switching be superimposed. Using an inductance in the load circuit, by the higher frequency Turn a load current to be regulated.

Brief Description of Drawings

In the following the invention by means of embodiments with reference to Details are given on drawings. Show it:<dl tsize="7"><dt>figure 1</dt><dd>an exemplary embodiment of an inventive circuit,</dd><dt>figure 2</dt><dd>time characteristic of input AC voltage, input AC and the voltage between the switches,</dd><dt>figure 3</dt><dd>an embodiment of an inventive circuit with 3 State implementation,</dd><dt>figure 4</dt><dd>time characteristic of input AC voltage, input AC and the voltage between the switches in State 3 Realization,</dd><dt>figure 5</dt><dd>An embodiment of an inventive circuit with a Load circuit which includes a lamp,</dd><dt>figure 6</dt><dd>An embodiment of an inventive circuit with a Load circuit with 3 State implementation,</dd><dt>figure 7</dt><dd>Time characteristics of voltage and current of a load circuit according to the embodiment in FIG. 6</dd></dl>

The following switches by the letter S, diodes by the letter D, capacitors by the letter C, connecting node by the Letters N, inductors by the letter L and connections by the letter J each followed by a number. Also, in the following for identical and functionally identical elements of the various embodiments like reference numerals are used.

Preferred embodiments of the invention

1 shows an embodiment of an inventive circuit for Converting an AC voltage into a DC voltage UN. The circuit has the following characteristics:<ul><li>A first and a second input terminal J1, J2, connectable to a source is that an input AC voltage UN and an input AC IN can deliver,</li><li>a first and a second output terminal J3, J4, to the load connected is,</li><li>a first and a second controlled switch S1, S2 which are connected in series between the output terminals J3, J4 are connected and a Switch connecting node N1 form,</li><li>a first and a second storage capacitor C1, C2, which are connected in series between the output terminals J3, J4 are connected and a forming capacitor connecting node N2</li><li>the first input terminal J1 is connected via an inductor L1 to the switch connection node N1,</li><li>the second input terminal J2 is connected to the capacitor-connecting node N2.</li></ul>

Parallel to each of switches S1 and S2 in Figure 1 is in each case a generally known Freewheeling diode D1 and D2 connected. These diodes reduce the turn-on and are unnecessary for the practice of the invention. If the switch used MOSFETs, the freewheeling diodes are already in principle as so. body diode the switch included.

In Figure 1, an inductor L1 is only between the input terminal J1 and switch connecting node N1 connected. but it can also be a further inductor between the input terminal J2 and the capacitor connecting node N2 be connected. For the operation of the circuit is the sum of the values ​​of the two inductances of importance. symmetrized the use of two inductors the circuit, resulting in an improvement in the radio interference. A further improvement results in a coupling of the two inductors.

A control device not shown provides control signals that switch the turn on and off. The ratio of on and off time of Switch defines a duty cycle. Via the duty cycle, the value of DC voltage is provided between the output terminals J3 and J4, be adjusted. In a process known from the prior art "Continuous Mode "and a 50% duty cycle is between the output terminals J3 J4 and the four fold value of the maximum value of the input AC voltage.

The circuit shown in Figure 1 is to effect a PFC also capable. For this, the switch must be connected as it can be seen from Figure 2 is.

The abscissa in Figure 2 is a time axis. is as AC voltage input a sinusoidal voltage UN located. The frequency of UN is z. B. 50 Hz. The switching state of the switch is shown in the voltage US which the Voltage between the switch connecting node N1 and the capacitor-connecting node N2 represents. If the switch S2 is closed, the voltage US at an arbitrarily defined potential -E / 2; the switch S1 is closed the voltage US is an arbitrarily defined potential + E / 2.

The input AC IN passes within a phantom shown Hysteresis. Once the input AC IN to the limit of the predetermined Hysteresis band abuts the respective set switch is turned off and the respectively switched-off switch turned on. The einzuschaltende switch can also be switched on delayed because firstly the associated freewheeling diode can take over the power switch.

The switching frequency of the switch in Figure 2 in comparison to the frequency of the AC voltage input UN recorded very low to a clear presentation to obtain. It is clear that the time profile of the input alternating current In substantially the time course of the AC voltage input UN follows. For a PFC is achieved.

In figure 3 a opposite Figure 1 modified circuit is shown. In series with the Switch S1 is connected a switch S3 and in series with the switch S2 is a switch S4 connected. As to the switches S1 and S2 may also to the switches S3 and S4, a freewheeling diode D5 and D6 are connected in parallel. Between the Switches S1 and S3 is a third connection node N3 between the switch and S2 and S4 is a fourth connection node N4. The connection node N3 and N4 are respectively connected via a clamping diode D3, D4 to the capacitor-connecting node N2. By series connection of the switch creates a Topology called the a. Multi-level or multi-state operation allows. These operating mode is in the prior art and z. B. from the following literature refer to: T. Skvarenia: "The Power Electronics Handbook," CRC Press, Boca Raton, Florida, USA, 2001; Chapter 6. Figure 3 depicts an application of this Mode to the inventive circuit of FIG. 1

By the multi-state mode, the voltage stress of the switches is reduced. In Figure 3 is 3-state operation possible which halves the voltage stress of the switches. According to the cited reference, is also the operation for more than 3 "States" known which is also applicable to the present invention. Characteristic of the 3-state operation, that there are conditions in which S1 and S2 are closed and Thus, the voltage between N1 and N2 to zero.

In Figure 4 is analogous to Figure 2, the time course of the AC voltage input UN, of the input alternating current in and the voltage US between N1 and N2 for the 3-State mode shown. From the course is required each switch position refer to. The history of UN and IN coincides substantially with the course as shown in FIG. 2 Different, however, the course the voltage US. With a positive input AC voltage UN the voltage is US minimal zero. S1 can remain closed and S2 and S3 alternately close. With negative input AC voltage UN is the Voltage US maximum zero. Here, S2 always remain closed and S1 and S4 close alternately.

Particularly advantageous is the combination of an inventive circuit with a load which requires a center voltage, since the potential at the capacitor-connecting node N2 in the middle between the potentials of the output terminals J3 and J4 is. What is needed is a middle voltage if a load a rectangular Voltage required and this generates switch-saving with only 2 switches shall be. The combination of an inventive circuit with such Load is also advantageous because the inventive circuit, the input voltage at least doubled.

5 shows an example of such a circuit is shown. The part of the circuit, of the DC voltage is provides at J3 and J4 from Figure 1 known. In between J3 and J4 is S5 and S6 connected the series connection of two switches, wherein the connection node N5 is formed. Between N5 and N2, the load is connected. It consists in the example of a gas discharge lamp, and a lamp inductor Lp L2.

Gas discharge lamps for AC are preferred with a rectangular AC operated. are for the most in the prior art full-bridge used. The invention even delivery allows for the midpoint potential to N2 using a half-bridge.

The switches S5 and S6 are turned on at a desired frequency and rectangle switched off. The rectangle frequency may be superimposed on a higher frequency, with of a just switched switch is additionally clocked. This timing leads together with the lamp inductor L2 to a deep-setting (step-down) effect, whereby the lamp current can be regulated.

Parallel to S5 and S6 freewheeling diodes D7 and D8 connected can be. Parallel to the input terminals J1 and J2 may be a capacitor, the opposite a mains frequency high-frequency transient currents allows.

In figure 6 is shown how not only the input part to the switches S1-4 as 3-State Stage is executed according to Figure 3, but also the output part with the switches S5-8. The insertion of the switches S7 and S8 and the clamping diodes D9 and D10 can derive operating from the literature cited above for Multi-State will.

For the operation of a gas discharge lamp with a square-wave voltage and PFC an arrangement known from the prior art, which concerns 4 rectifier diodes a boost converter a buck converter and a full bridge is composed. Therefore 10 switch necessary. Even shown in Figure 6 variant of the present Invention, with 8 switches a reduced number of switches compared to the mentioned Stand in the art.

Also, the output portion, according to the literature reference above to Multi-state operation have a higher number of "States" as. 3

In Figure 7, in contrast to the time curves of Figures 2 and 4 no input side but the output side curves shown. shown Waveforms for circuit of Figure 6. UL shows the voltage between the Connection node N5 and N2. IL shows the variation of the load current IL through the Lamp.

It is clearly visible, as the low-frequency square-wave voltage, a high frequency Keying is superimposed. The 3-state operation can be recognized that the voltage UL does not oscillate between maximum and minimum voltage, but between maximum voltage and mid voltage (abscissa) or between minimum Voltage and mid voltage (abscissa) swings. The center voltage thus forms the third "State".

A control device, not shown, were running, the control signals for the switches S5-S8. They are connected so that the load current IL in the predetermined dashed drawn hysteresis runs.