EP1580567A2

Device and method for nondestructive inspection on semiconductor device

Abstract

A nondestructive inspection device (or method) is basically configured such that a laser beam (1300 nm) (3, 53) is irradiated on a surface (or back) of a semiconductor device chip (4) to scan. Due to irradiation of the laser beam, a defect position is heated to cause a thermoelectromotive current, which induces a magnetic field. A magnetic field detector (5) such as SQUID (55) detects a strength of the magnetic field, based on which a scan magnetic field image is produced. A display device (7) superimposes the scan magnetic field image on a scan laser microphotograph on a screen, so it is possible to perform defect inspection on the semiconductor device chip. Incidentally, a semiconductor device wafer (40) is constructed to include a thermoelectromotive force generator (21) and its wires (20a), which are electrically connected to first-layer wires (34a, 34b). By irradiation of the laser beam on the thermoelectromotive force generator, it is possible to detect a short-circuit defect (42), which lies between the first-layer wires. Further, it is possible to perform nondestructive inspection on a semiconductor integrated circuit, which is in an intermediate stage of manufacture before formation of bonding pads and which includes a closed circuit configured by a first-layer wire (34), including a thermoelectromotive force generating defect (41), a circuit via (35) and an inspection via (305) as well as a metal film (36), which is formed in a relatively broad range of a surface area and is used to form a second-layer wire (37).

EP1580567A2, drawing sheet 1
Sheet 1 of 26

Term

Term ended

Projected expiry passed 24 September 2019, 7 years ago.

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43 claims: 5 independent, 38 dependent

  1. 1
    A semiconductor device for nondestructive inspection, comprising:a first conductor (34a) being formed on a substrate (31);a second conductor (34b) being formed on the substrate in proximity to the first conductor;a thermoelectromotive force generator (21) being formed on the substrate;a first wire (20a) for connecting a first end of the thermoelectromotive force generator to the first conductor;and a second wire (20a) for connecting a second end of the thermoelectromotive force generator to the second conductor.
  2. 19
    A method for manufacturing a semiconductor device for nondestructive inspection, comprising the steps of:forming a first conductor (34a) on a substrate (31);forming a second conductor (34b) on the substrate in proximity to the first conductor;arranging a thermoelectromotive force generator (21) being formed on the substrate;connecting a first end of the thermoelectromotive force generator to the first conductor by a first wire (20a);and connecting a second end of the thermoelectromotive force generator to the second conductor by a second wire (20a).
  3. 37
    A semiconductor integrated circuit comprising:a n-layer wire (34) (where "n" is an integer arbitrarily selected) formed on a substrate (31);a (n+1)-layer wire (37) formed above the n-layer wire via an insulating layer (32);a circuit via (35) for connecting the n-layer wire and the (n+1)-layer wire together;and at least one inspection (305) via formed on the n-layer wire, wherein the inspection via is connected to the n-layer wire but is not connected to the (n+1)-layer wire.
  4. 38
    A semiconductor integrated circuit comprising:a n-layer wire (34) (where "n" is an integer arbitrarily selected) formed on a substrate (31);a (n+1)-layer wire (37) formed above the n-layer wire via an insulating layer (32);at least two inspection vias (305a, 305b) formed on the n-layer wire,    wherein the inspection vias are connected to the n-layer wire but are not connected to the (n+1)-layer wire, and    wherein no circuit via for connecting the n-layer wire and the (n+1)-layer wire together is provided on the n-layer wire having the inspection vias.
  5. 40
    A semiconductor integrated circuit according to any one of claims 37 to 39 wherein the inspection via is connected to an end portion of the n-layer wire.
  6. 41
    A semiconductor device chip comprising:a silicon substrate (31);a first-layer wire (34) formed above the substrate;a contact portion (33) for connecting the first-layer wire to a diffusion layer formed on the substrate;a circuit via (35) formed on a first end portion of the first-layer wire;an inspection via (305) formed on a second end portion of the first-layer wire;and a metal film (36), which is formed in a relatively broad range of a surface area and a selected area of which is used for formation of a second-layer wire (37),    wherein the first end portion of the first-layer wire is connected to the metal film, corresponding to the formation of the second-layer wire, by the circuit via, while the second end portion of the first-layer wire is temporarily connected to the metal film, which does not correspond to the formation of the second-layer wire, by the inspection via.