EP1569084B1

Information processing system and information processing method

Abstract

This record has no abstract on file.

EP1569084B1, drawing sheet 1
Sheet 1 of 14

Term

Term ended

Expired 18 August 2024, 2.1 years ago.

  1. Priority
  2. Filed
  3. Granted
  4. Expired
  5. Today

2 claims: 2 independent, 0 dependent

  1. 1
    An information processing system, comprising:a host computer (1,50) having a plurality of adapters (11,12,51,52,53,54);a storage device (4,60) having: a plurality of host side ports (21,22,61,62,63,64) connected to the host computer (1,50);a plurality of processors for controlling said plurality of host side ports;and a cache memory (65), connected to said plurality of host side ports, for temporarily holding data in response to commands from said host computer;and further comprising: a shared memory (71) for accumulating information relating to the internal composition of said storage device (4,60) for reference by said plurality of processors;and an internal management device (24,72) for outputting said compositional information to an external device;and a management server (5,90) connected respectively to said internal management device (24,72) and said host computer, by means of a communications circuit (80);wherein said host computer (1,50) executes a path switching program (13,57), and establishes communications paths between said plurality of adapters and said plurality of host side ports, characterised in that : said storage device is arranged to accumulate information relating to said communications paths, in said shared memory (71), and said internal management device (24,72) refer to this information relating to communications paths and is arranged to judge whether or not said communications paths from said plurality of adapters to said cache memory (65) can be secured in the event of at least one of said processors being blocked off;and the system being arranged such that if said judgment result is that said communications paths can be secured, then said internal management device (24,72) sends a notification indicating that it is possible to block off the processors for which said judgment was made, to said management server (5,90), via said communications circuit, and that said management server (5,90) is arranged to send information indicating that the communications paths connected to the processors for which said judgment has been made are to be blocked off, to said path switching program (13,57).
  2. 2
    An information processing method used in a system comprising:a host computer (1,50) having a plurality of adapters (11,12,51,52,53,54);a storage device (4,60) having: a plurality of host side ports (21,22,61,62,63,64) connected to the host computer;a plurality of processors for controlling said plurality of host side ports;and a cache memory (65), connected to said plurality of host side ports, for temporarily holding data in response to commands from said host computer;and further comprising: a shared memory (71) for accumulating information relating to the internal composition of said storage device (4,60) for reference by said plurality of processors;and an internal management device (24,72) for outputting said compositional information to an external device;and a management server (5,90) connected respectively to said internal management device (24,72) and said host computer, by means of a communications circuit (80);wherein said host computer (1,50) executes a path switching program (13,57), and establishes communications paths between said plurality of adapters and said plurality of host side ports, characterised in that : said storage device accumulates information relating to said communications paths, in said shared memory (71), and said internal management device (24,72) refers to this information relating to communications paths and judges whether or not said communications paths from said plurality of adapters to said cache memory (65) can be secured in the event of at least one of said processors being blocked off;and if said judgment result is that said communications paths can be secured, then said internal management device sends a notification indicating that it is possible to block off the processors for which said judgment was made, to said management servery (5,90), via said communications circuit, and that said management server (5,90) sends information indicating that the communications paths connected to the processors for which said judgment has been made are to be blocked off, to said path switching program (13,57).