System and method for adjusting power amplifier output power in linear dB steps

BACKGROUND

Technical Field:

0001This invention relates generally to wireless communication systems, and more particularly, but not exclusively, to adjusting power amplifier output power in a transmitter.

Description of the Related Art:

0002Communication systems are known to support wireless and wire lined communications between wireless and/or wire lined communication devices. Such communication systems range from national and/or international cellular telephone systems to the Internet to point-to-point in-home wireless networks. Each type of communication system is constructed, and hence operates, in accordance with one or more communication standards. For instance, wireless communication systems may operate in accordance with one or more standards including, but not limited to, IEEE 802.11, Bluetooth, advanced mobile phone services (AMPS), digital AMPS, global system for mobile communications (GSM), code division multiple access (CDMA), and/or variations thereof.

0003Depending on the type of wireless communication system, a wireless communication device, such as a cellular telephone, two-way radio, personal digital assistant (PDA), personal computer (PC), laptop computer, home entertainment equipment, et cetera communicates directly or indirectly with other wireless communication devices. For direct communications (also known as point-to-point communications), the participating wireless communication devices tune their receivers and transmitters to the same channel or channel pair (e.g., one of the plurality of radio frequency (RF) carriers of the wireless communication system) and communicate over that channel or channel pair. For indirect wireless communications, each wireless communication device communicates directly with an associated base station (e.g., for cellular services) and/or an associated access point (e.g., for an in-home or in-building wireless network) via an assigned channel. To complete a communication connection between the wireless communication devices, the associated base stations and/or associated access points communicate with each other directly, via a system controller, via the public switch telephone network, via the internet, and/or via some other wide area network.

0004For each wireless communication device to participate in wireless communications, it includes a built-in radio transceiver (i.e., receiver and transmitter) or is coupled to an associated radio transceiver (e.g., a station for in-home and/or in-building wireless communication networks, RF modem, etc.). As is known, the receiver receives RF signals, removes the RF carrier frequency from the RF signals directly or via one or more intermediate frequency stages, and demodulates the signals in accordance with a particular wireless communication standard to recapture the transmitted data. The transmitter converts data into RF signals by modulating the data to RF carrier in accordance with the particular wireless communication standard and directly or in one or more intermediate frequency stages to produce the RF signals.

0005Before transmitting wireless RF signals, a power amplifier amplifies the output power level so that a base station or other receiver can clearly receive the RF signals. Different systems adjust their output power in different ways.

0006Accordingly, a new system and method enables adjustment of the output power of power amplifiers in linear dB steps.

0007<patcit id="pcit0001" dnum="US6255906B1"><text>US 6,255,906 B1</text></patcit> discloses a power amplifier that amplifies an electrical signal that is passed through a power amplification array. The power amplifier is employed in various applications including cellular telephones, radio frequency signal transmission, and other electrical signal applications requiring power amplification. The power amplifier contains a number of power amplifiers arranged in a power amplifier array. To reproduce a particular envelope profile, a selected number of the power amplifiers of the power amplifier array is switched ON, whereas another selected number of the power amplifiers of the power amplifier array are switched OFF.

SUMMARY

0008The invention is defined as set forth in the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

0009Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.

0010<figref idref="f0001">FIG. 1</figref> is a block diagram illustrating a network system;

0011<figref idref="f0002">FIG. 2</figref> is a block diagram illustrating a transmitter section;

0012<figref idref="f0002">FIG. 3A</figref> and <figref idref="f0003">3B</figref> are block diagrams illustrating a power amplifier of the transmitter section according to the invention of <figref idref="f0002">FIG.2</figref>;

0013<figref idref="f0004">FIG. 4</figref> is a block diagram illustrating a power amplifier control system of the transmitter section of <figref idref="f0002">FIG. 2</figref>; and

0014<figref idref="f0004">FIG. 5</figref> is a flowchart illustrating a method of adjusting power amplifier output power.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

0015The following description is provided to enable any person having ordinary skill in the art to make and use the invention, and is provided in the context of a particular application and its requirements. Various modifications to the embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments and applications without departing from the scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles, features and teachings disclosed herein.

0016<figref idref="f0001">FIG. 1</figref> is a block diagram illustrating a network system 10 . The system 10 includes a plurality of base stations and/or access points 12-16, a plurality of wireless communication devices 18-32 and a network hardware component 34. The wireless communication devices 18-32 may be laptop host computers 18 and 26, personal digital assistant hosts 20 and 30, personal computer hosts 24 and 32 and/or cellular telephone hosts 22 and 28. The details of the wireless communication devices will be described in greater detail with reference to <figref idref="f0002">FIG. 2</figref>.

0017The base stations or access points 12 are operably coupled to the network hardware 34 via local area network connections 36, 38 and 40. The network hardware 34, which may be a router, switch, bridge, modem, system controller, etc. provides a wide area network connection 42 for the communication system 10. Each of the base stations or access points 12-16 has an associated antenna or antenna array to communicate with the wireless communication devices in its area. Typically, the wireless communication devices register with a particular base station or access point 12-14 to receive services from the communication system 10. For direct connections (i.e., point-to-point communications), wireless communication devices communicate directly via an allocated channel.

0018Typically, base stations are used for cellular telephone systems and like-type systems, while access points are used for in-home or in-building wireless networks. Regardless of the particular type of communication system, each wireless communication device includes a built-in radio and/or is coupled to a radio. The radio includes a transmitter capable of adjusting power amplifier output power and therefore has characteristics of reduced power requirements, thereby extending the life of an associated power supply.

0019<figref idref="f0002">FIG. 2</figref> is a block diagram illustrating a transmitter section (or portion) 200. Each wireless device of the network system 10 can include a transmitter portion 200 for transmitting data to other wireless network nodes. The transmitter section 200 includes a modulator 210 communicatively coupled to DC Offset Adjustment Engines 220a and 220b, which are communicatively coupled to Interpolation Filters 230a and 230b respectively. The Interpolation Filters 230a and 230b and communicatively coupled to delta sigma modulators 240a and 240b respectively (also referred to as sigma delta modulators). The delta sigma modulators 240a and 240b are communicatively coupled to binary to thermometer decoders 245a and 245b respectively. The decoders 245a and 245b are communicatively coupled to the DACs 250a and 250b respectively, which are communicatively coupled to low pass filters (LPFs) 260a and 260b. The LPFs 260a and 260b are communicatively coupled to mixers 270a and 270b respectively, which are each communicatively coupled to a power amplifier 280, which is communicatively coupled to an antenna 290. A power amplifier control system 285 is also communicatively coupled to the power amplifier 280.

0020The modulator 210 receives digital data from a processing component of a wireless device and performs quadrature amplitude modulation on the data. The modulation can include, for example, Gaussian Frequency Shift Keying (GFSK), 4-Phase Shift Keying (PSK), and/or 8-PSK. The modulator 210 provides quadrature outputs. In an embodiment of the invention, the sampling frequency is 12MHz and output is 12 bits.

0021For FSK modulation, the I output can be represented as<maths id="math0001"><math display="inline"><mi>I</mi><mo>=</mo><mi>cos</mi><mfenced><mn>2</mn><mo>⁢</mo><mi mathvariant="italic">πfct</mi><mo>+</mo><mn>2</mn><mo>⁢</mo><msub><mi mathvariant="italic">πf</mi><mi>d</mi></msub><mo>∫</mo><mi mathvariant="italic">vdt</mi></mfenced></math><img file="EP1557943B1_D0001.tif" /></maths> and the Q output can be represented as<maths id="math0002"><math display="inline"><mi>I</mi><mo>=</mo><mi>sin</mi><mfenced><mn>2</mn><mo>⁢</mo><mi mathvariant="italic">πfct</mi><mo>+</mo><mn>2</mn><mo>⁢</mo><msub><mi mathvariant="italic">πf</mi><mi>d</mi></msub><mo>∫</mo><mi mathvariant="italic">vdt</mi></mfenced><mn>.</mn></math><img file="EP1557943B1_D0002.tif" /></maths> For PSK modulation, the I output can be represented as<maths id="math0003"><math display="inline"><mi>I</mi><mo>=</mo><mi>Re</mi><mfenced><mi>R</mi><mfenced><mi>t</mi></mfenced><mo>⁢</mo><msup><mi>e</mi><mrow><mi>j</mi><mo>⁢</mo><mn>2</mn><mo>⁢</mo><mi mathvariant="normal">Π</mi><mo>⁢</mo><msub><mi>F</mi><mi>i</mi></msub><mo>⁢</mo><mi mathvariant="italic">ft</mi></mrow></msup></mfenced></math><img file="EP1557943B1_D0003.tif" /></maths> and the Q output can be represented as<maths id="math0004"><math display="inline"><mi>Q</mi><mo>=</mo><mi mathvariant="italic">IM</mi><mfenced><mi>R</mi><mfenced><mi>t</mi></mfenced><mo>⁢</mo><msup><mi>e</mi><mrow><mi>j</mi><mo>⁢</mo><mn>2</mn><mo>⁢</mo><mi mathvariant="normal">Π</mi><mo>⁢</mo><msub><mi>F</mi><mi>i</mi></msub><mo>⁢</mo><mi mathvariant="italic">ft</mi></mrow></msup></mfenced><mn>.</mn></math><img file="EP1557943B1_D0004.tif" /></maths>

0022The DC offset adjustment engines 220a and 220b adjust the DC offset at the digital domain of the I and Q outputs from the modulator 210. The DC adjustment word length is 11 bits.

0023The interpolation filters 230a and 230b up sample the output from 12 MHz to 96 MHz. Higher OSR will make the following delta sigma modulation easier. For IF frequency ≤1 MHz, the interpolation filters 230a and 230b filter out the 12 MHz image by more than 80 dBc. For IF of 2 MHz, the interpolation filters 230a and 230b filter out the 12 MHz by more than 60 dBc. Output of the interpolation filters 230a and 230b are 10 bits.

0024The delta sigma modulators 240a and 240b are second order delta sigma modulators that output 4 bits from a 16 bit input. The delta sigma modulators 240a and 240b also push quantization noise outside the LPF 260a and 260b bandwidth. The sampling frequency of the delta sigma modulators 240a and 240b are each 96 MHz. Input ranges from -2 to 1.75. Depending on control bit settings, incoming input can range from -1 to +1 or from -1.25 to +1.25. The extra range is reserved for signal excursions when modulation is present. With an input range of -1.25 to +1.25 and no modulation, output amplitude will be 5. The binary to thermometer decoders 245a and 245b convert the 4 bit output from delta sigma modulators 240a and 240b to thermometer coding (16 bits) according to Table I. In an embodiment of the invention, the DACs 250a and 250b incorporate the decoders 245a and 245b therein. <tables id="tabl0001" num="0001"><table frame="none"><title><b>Table I</b></title><tgroup cols="19" rowsep="0"><colspec colnum="1" colname="col1" colwidth="20mm" /><colspec colnum="2" colname="col2" colwidth="26mm" /><colspec colnum="3" colname="col3" colwidth="12mm" /><colspec colnum="4" colname="col4" colwidth="11mm" /><colspec colnum="5" colname="col5" colwidth="11mm" /><colspec colnum="6" colname="col6" colwidth="11mm" /><colspec colnum="7" colname="col7" colwidth="11mm" /><colspec colnum="8" colname="col8" colwidth="11mm" /><colspec colnum="9" colname="col9" colwidth="11mm" /><colspec colnum="10" colname="col10" colwidth="10mm" /><colspec colnum="11" colname="col11" colwidth="10mm" /><colspec colnum="12" colname="col12" colwidth="10mm" /><colspec colnum="13" colname="col13" colwidth="10mm" /><colspec colnum="14" colname="col14" colwidth="10mm" /><colspec colnum="15" colname="col15" colwidth="10mm" /><colspec colnum="16" colname="col16" colwidth="10mm" /><colspec colnum="17" colname="col17" colwidth="10mm" /><colspec colnum="18" colname="col18" colwidth="10mm" /><colspec colnum="19" colname="col19" colwidth="10mm" /><thead valign="top"><row rowsep="1"><entry colsep="0" rowsep="0">ΔΣ Output</entry><entry colsep="0" rowsep="0">Binary Number</entry><entry colsep="0" rowsep="0">Mag</entry><entry colsep="0" rowsep="0">b15</entry><entry colsep="0" rowsep="0">b14</entry><entry colsep="0" rowsep="0">b13</entry><entry colsep="0" rowsep="0">b12</entry><entry colsep="0" rowsep="0">b11</entry><entry colsep="0" rowsep="0">b10</entry><entry colsep="0" rowsep="0">b9</entry><entry colsep="0" rowsep="0">b8</entry><entry colsep="0" rowsep="0">b7</entry><entry colsep="0" rowsep="0">b6</entry><entry colsep="0" rowsep="0">b5</entry><entry colsep="0" rowsep="0">b4</entry><entry colsep="0" rowsep="0">b3</entry><entry colsep="0" rowsep="0">b2</entry><entry colsep="0" rowsep="0">b1</entry><entry colsep="0" rowsep="0">b0</entry></row></thead><tbody><row><entry colsep="0">7</entry><entry colsep="0">0111</entry><entry colsep="0">15</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">6</entry><entry colsep="0">0110</entry><entry colsep="0">14</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">5</entry><entry colsep="0">0101</entry><entry colsep="0">13</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">4</entry><entry colsep="0">0100</entry><entry colsep="0">12</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">3</entry><entry colsep="0">0011</entry><entry colsep="0">11</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">2</entry><entry colsep="0">0010</entry><entry colsep="0">10</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">1</entry><entry colsep="0">0001</entry><entry colsep="0">9</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">0</entry><entry colsep="0">0000</entry><entry colsep="0">8</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">-1</entry><entry colsep="0">1111</entry><entry colsep="0">7</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">-2</entry><entry colsep="0">1110</entry><entry colsep="0">6</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">-3</entry><entry colsep="0">1101</entry><entry colsep="0">5</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">-4</entry><entry colsep="0">1100</entry><entry colsep="0">4</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">-5</entry><entry colsep="0">1011</entry><entry colsep="0">3</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">-6</entry><entry colsep="0">1010</entry><entry colsep="0">2</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry><entry colsep="0">1</entry></row><row><entry colsep="0">-7</entry><entry colsep="0">1001</entry><entry colsep="0">1</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">0</entry><entry colsep="0">1</entry></row><row rowsep="1"><entry colsep="0" rowsep="0">-8</entry><entry colsep="0" rowsep="0">1000</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry><entry colsep="0" rowsep="0">0</entry></row></tbody></tgroup></table></tables>

0025The DACs 250a and 250b use thermometer coding to minimize sampling clock (96 MHz) glitches. The DACs 250a and 250b convert the digital signals to analog signals. The LPFs 260a and 260b receive the analog signals and filter out any glitches to generate a continuous signal. The mixers 270a and 270b convert the analog signals to an RF signal (e.g., 2.4 GHz for Bluetooth), which is then amplified by the power amplifier 280 and transmitted by the antenna 290.

0026The power amplifier 280, in an embodiment of the invention, is 200 µm by 0.15 µm and comprises 17 stages (or branches). The power amplifier 280 has a power control capability of 0dB to - 32dB with a step size of 2 dB. The power amplifier 280, which will be discussed in further detail in conjunction with <figref idref="f0002">FIG. 3A</figref> and <figref idref="f0003">FIG. 3B</figref> below, adjusts output power based on input from the power amplifier control system 285.

0027The power amplifier control system 285, as will be discussed in further detail in conjunction with <figref idref="f0004">FIG. 4</figref> below, controls the power amplifier 280 output power based on instructions received from a base station, other wireless node, or other source. For example, if a wireless device incorporating the transmitter section 200 is near a base station (e.g., BS 12), the base station can instruct the power amplifier control system 285 to decrease the output power on the power amplifier 280, thereby reducing power consumption and reducing interference in any other nearby wireless devices. The power amplifier control system 285 will then instruct the power amplifier 280 to turn off one or more branches to decrease output power. However, if the wireless device incorporating the transmitter section 200 is far away from a base station, the base station can instruct the power amplifier control system 285 to increase the output power of the power amplifier 280.

0028<figref idref="f0002">FIG. 3A</figref> is a block diagram illustrating a section 280a of power amplifier 280 of the transmitter section 200 (<figref idref="f0002">FIG. 2</figref>) according to the invention. The power amplifier section 280a comprises 17 branches such as branch 300. For maximum power, all branches are turned on. For minimum power, all branches except one are turned off. Further, power can be adjusted in 2 dB steps between adjacent power settings. To turn off each branch, cascade device bias is connected to each Control (Vdd/ground). In an embodiment of the invention, thermometer coded power control words are used to ensure monotonic power control.

0029In an embodiment of the invention, Vdd is equal to about 1.5V with available linear output swing of about 1V. The power amplifier 180 can provide linear output power up to about 5 dBm at the antenna 290. With a resistor coupled to each Vdd having a resistance of 158 Ohms, I can be equal to about 6.3 mA.

0030It will be appreciated by one of ordinary skill in the art that the number of stages and the amount of each step in power can be varied according to anticipated applications. Further, the maximum and minimum power can also vary according to anticipated applications. Further, it will be appreciated that the power amplifier can be employed in any device requiring power amplification.

0031<figref idref="f0003">FIG. 3B</figref> is a block diagram illustrating the power amplifier 280 of the transmitter section 200 (<figref idref="f0002">FIG. 2</figref>) according to the invention. Each input (In) of the section 280a is communicatively coupled to a transistor of the transistors 280b, which vary in size to enable linear in dB steps in adjust output power levels of the amplifier 280 as shown in Table II below (e.g., transistors are arranged in a logarithmic scale). <tables id="tabl0002" num="0002"><table frame="none"><title>Table II</title><tgroup cols="4" rowsep="0"><colspec colnum="1" colname="col1" colwidth="10mm" /><colspec colnum="2" colname="col2" colwidth="24mm" /><colspec colnum="3" colname="col3" colwidth="19mm" /><colspec colnum="4" colname="col4" colwidth="13mm" /><thead valign="top"><row rowsep="1"><entry colsep="0" rowsep="0">dB</entry><entry colsep="0" rowsep="0" align="center">%</entry><entry colsep="0" rowsep="0" align="center">Size (µm)</entry><entry colsep="0" rowsep="0" align="center">Δ</entry></row></thead><tbody><row><entry colsep="0" align="right">0</entry><entry colsep="0" align="right">1</entry><entry colsep="0" align="right">200</entry><entry colsep="0" align="right">41.14</entry></row><row><entry colsep="0" align="right">-2</entry><entry colsep="0" align="right">0.794328235</entry><entry colsep="0" align="right">158.8656</entry><entry colsep="0" align="right">32.66</entry></row><row><entry colsep="0" align="right">-4</entry><entry colsep="0" align="right">0.630957344</entry><entry colsep="0" align="right">126.1915</entry><entry colsep="0" align="right">25.96</entry></row><row><entry colsep="0" align="right">-6</entry><entry colsep="0" align="right">0.501187234</entry><entry colsep="0" align="right">100.2374</entry><entry colsep="0" align="right">20.62</entry></row><row><entry colsep="0" align="right">-8</entry><entry colsep="0" align="right">0.398107171</entry><entry colsep="0" align="right">79.62143</entry><entry colsep="0" align="right">16.38</entry></row><row><entry colsep="0" align="right">-10</entry><entry colsep="0" align="right">0.316227766</entry><entry colsep="0" align="right">63.24555</entry><entry colsep="0" align="right">13</entry></row><row><entry colsep="0" align="right">-12</entry><entry colsep="0" align="right">0.251188643</entry><entry colsep="0" align="right">50.23773</entry><entry colsep="0" align="right">10.34</entry></row><row><entry colsep="0" align="right">-14</entry><entry colsep="0" align="right">0.199526231</entry><entry colsep="0" align="right">39.90525</entry><entry colsep="0" align="right">8.2</entry></row><row><entry colsep="0" align="right">-16</entry><entry colsep="0" align="right">0.158489319</entry><entry colsep="0" align="right">31.69786</entry><entry colsep="0" align="right">6.52</entry></row><row><entry colsep="0" align="right">-18</entry><entry colsep="0" align="right">0.125892541</entry><entry colsep="0" align="right">25.17851</entry><entry colsep="0" align="right">5.18</entry></row><row><entry colsep="0" align="right">-20</entry><entry colsep="0" align="right">0.1</entry><entry colsep="0" align="right">20</entry><entry colsep="0" align="right">4.12</entry></row><row><entry colsep="0" align="right">-22</entry><entry colsep="0" align="right">0.079432823</entry><entry colsep="0" align="right">15.88656</entry><entry colsep="0" align="right">3.26</entry></row><row><entry colsep="0" align="right">-24</entry><entry colsep="0" align="right">0.063095734</entry><entry colsep="0" align="right">12.61915</entry><entry colsep="0" align="right">2.62</entry></row><row><entry colsep="0" align="right">-26</entry><entry colsep="0" align="right">0.050118723</entry><entry colsep="0" align="right">10.02374</entry><entry colsep="0" align="right">2.04</entry></row><row><entry colsep="0" align="right">-28</entry><entry colsep="0" align="right">0.039810717</entry><entry colsep="0" align="right">7.962143</entry><entry colsep="0" align="right">1.64</entry></row><row><entry colsep="0" align="right">-30</entry><entry colsep="0" align="right">0.031622777</entry><entry colsep="0" align="right">6.324555</entry><entry colsep="0" align="right">1.3</entry></row><row rowsep="1"><entry colsep="0" rowsep="0" align="right">-32</entry><entry colsep="0" rowsep="0" align="right">0.025118864</entry><entry colsep="0" rowsep="0" align="right">5.023773</entry><entry colsep="0" rowsep="0" align="right">5.02</entry></row></tbody></tgroup></table></tables>

0032<figref idref="f0004">FIG. 4</figref> is a block diagram illustrating the power amplifier control system 285 of the transmitter section 200 (<figref idref="f0002">FIG. 2</figref>). The power amplifier control system 285 includes control logic that can be implemented as an Application Specific Integrated Circuit (ASIC), as software, or with other techniques. The power amplifier control system 285 includes a receiving engine 410, a determining engine 420, and a power amplifier engine 430. The receiving engine 410, via the antenna 290 or other source, receives instructions for adjusting the output power of the power amplifier 280. For example, if a device incorporating the power amplifier 280 is close to a base station, the base station will transmit instructions to the device to lower the output power to reduce power consumption and prevent interference with nearby devices. If the device incorporating the power amplifier 280 is far from a base station, the base station may instruct the device to increase output power. Instructions from the base station can be step wise or specify a numerical value for output power decrease or increase. For example, the base station may simply specify to increase or decrease output power or the base station may specify that a specific percentage or dB change in power.

0033The receiving engine 410 may receive instructions from other sources, such as other wireless devices. For example, if another wireless device is facing interference, it can transmit an instruction to decrease the power of the power amplifier 280, thereby decreasing interference. Alternatively, instructions may be generated by the device incorporating the power amplifier 280. For example, to conserve power when a power supply is running low, the receiving engine 410 may receive instructions to turn off stages in the power amplifier 280.

0034The determining engine 420 determines how many stages in the power amplifier 280 to shut off or power up based on the instructions received by the receiving engine 410 from the base station. If the instructions only specify increase or decrease power, then the determining engine 420 determines to power on or power off one stage of the power amplifier respectively. If the instructions specify a percentage increase or decrease, the determining engine 420 calculates how many stages need to be powered on or off, respectively, to meet the instruction's specifications.

0035After the determining engine 420 determines how many stages of the power amplifier 280 need to be powered up or down, the determining engine 420 notifies the power amplifier engine 430 accordingly. The power amplifier engine 430 then powers up or down the specified number of stages of the power amplifier 280 to meet the instruction's specifications. The power amplifier engine 430 may use thermometer coded power control words to ensure monotonic power control in powering branches of the power amplifier 280 on and off.

0036<figref idref="f0004">FIG. 5</figref> is a flowchart illustrating a method 500 of adjusting power amplifier output power. The power amplifier 280 and the power amplifier control system 285 may execute the method 500. First, a signal is received (510) from a base station or other source indicating whether to increase or decrease the power of the transmitting signal. After receiving (510), the adjustment of the power amplifier is calculated (520), e.g., how many stages to power up or down. If the received signal didn't identify a specific increase or decrease (i.e., only to increase or decrease) then a pre-specified number of stages (e.g., 1 or 2) may be powered on or off. The power amplifier is then adjusted (530) according to the calculation (520) and the signal to be transmitted is amplified (540) accordingly. The method 500 then ends. The method 500 can be repeated continuously.

0037The foregoing description of the illustrated embodiment of the present invention is by way of example only, and other variations and modifications of the above-described embodiments and methods are possible in light of the foregoing teaching. Connections may be wired, wireless, modem, etc. The embodiments described herein are not intended to be exhaustive or limiting. The present invention is limited only by the following claims.