Mechanism in a microprocessor for executing native instructions directly from memory

An microprocessor apparatus and method are provided for executing native instructions directly from memory. The apparatus includes instruction translation logic and bypass logic. The instruction translation logic retrieves macro instructions provided via an external instruction bus, and translates each of the macro instructions into associated native instructions for execution. If a first form of a first macro instruction is retrieved, the instruction translation logic directs the microprocessor to enable a native bypass mode and indicates such by asserting a first bit within a control register. The bypass logic is coupled to the instruction translation logic. The bypass logic accesses the first bit within the control register to determine if the native bypass mode has been enabled, and detects wrapper macro instructions and, upon detection of the wrapper macro instructions, disables the instruction translation logic, and provides the native instructions for execution by the microprocessor, thereby bypassing the instruction translation logic.