EP1530236A3

Semiconductor device with multi-layered wiring arrangement including reinforcing patterns, and production method for manufacturing such semiconductor device

Abstract

A semiconductor device includes a semiconductor substrate (10) having electronic elements produced therein, and an insulating underlayer (14) formed thereon, and a multi-layered wiring arrangement constructed on the insulating underlayer semiconductor substrate. The multi-layered wiring arrangement includes a first insulating interlayer structure (16) formed on the insulating underlayer, a second insulating interlayer structure (30), and a third insulating interlayer structure (44) formed on the first insulating interlayer structure. Each of the first, second and third insulating interlayer structures includes a low-k insulating layer (16B, 30B, 44B), and has a reinforcing element (28, 48) formed therein. The second insulating interlayer structure has a joint plug (30C) formed therein. The reinforcing elements of the first and third insulating interlayer structures are connected to each other through the joint plug.

EP1530236A3, drawing sheet 1
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Term ended

Projected expiry passed 5 November 2024, 1.9 years ago.

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