MOS transistor control circuit for synchronous rectifier

p0001The present invention relates to the rectifying elements of an alternating voltage. The invention relates more particularly to the production of a rectifying function (diode) by means of a MOS transistor.

p0002The <figref idrefs="f0001">figure 1</figref> represents, very schematically, a first example of a circuit using type rectifying elements which can be applied to the present invention. In this example, it is a converter called type "Forward". Such a converter essentially consists of a transformer T with a primary winding T1 receives a DC voltage supplied by a capacitor C1 connected to the output of a diode bridge B fed by an alternating voltage. The winding T1 is connected through a switch K to ground. The switch K is controlled in pulse width modulation by a PWM signal (high frequency compared with the AC power supply) established so as to regulate a DC voltage Vout supplied by the converter. This voltage Vout is provided secondary side T2 across a capacitor C2 storing energy transferred from the primary T1 to T2 transformer secondary during periods when switch K is closed. A first end of the secondary winding T2 is connected via a diode D1 in series with an inductor L1, a first electrode of capacitor C2 defining a positive output terminal, while its other end is directly connected to the other electrode capacitor C2 defining the M2 voltage Vout side. A freewheeling diode D2 connects the point the series association of medium between the diode D1 and the inductor L1 to the mass M2, the anode of the diode being grounded side. The operation of such a converter is known.

p0003The rectifying elements are constituted of diodes D1 and D2 have the drawback of having an order of threshold voltage of 0.3 to 1.5 Volts, detrimental to the efficiency of the converter, particularly in low voltage applications.

p0004The <figref idrefs="f0001">2</figref> illustrates partially and schematically a modification applied to the PWM converter <figref idrefs="f0001">figure 1</figref> to reduce the threshold voltage of the rectifier elements. In<figref idrefs="f0001">2</figref>Only a portion of the secondary has been shown, the rest being similar to the <figref idrefs="f0001">figure 1</figref>. To decrease the threshold voltage of the diodes D1 and D2, these are replaced by two N channel MOS transistors N1 and N2 that can adequately control by a particular circuit CTRL. For voltage reference questions, the transistor N1 replacing the diode D1, however, must be placed on the ground part of the converter, the transistor N2 can be placed him in the same way that the diode D2 of the<figref idrefs="f0001">figure 1</figref>. CTRL control circuit also receives a supply voltage SUPPLY and a synchronization signal CLK relative to the cutting of the DC voltage made on the primary side in order to synchronize the respective openings and closures of the transistors N1 and N2 with the openings and closures of switch K (not shown in<figref idrefs="f0001">2</figref>).

p0005A disadvantage of the synchronous rectifier circuit of the <figref idrefs="f0001">2</figref> is that the transistors N1 and N2 can not have autonomous operation. They need a synchronization signal from the primary as well as a supply voltage.

p0006Another disadvantage is the presence of a MOS transistor on the ground line and not on the high secondary side line.

p0007The <figref idrefs="f0001">3</figref> illustrates another example of the voltage converter to which the present invention applies. This is a DC-DC converter whose role is to raise an output voltage Vout from the level of an input voltage V1 supplied, for example, by a battery. The positive electrode of the battery V1 is connected to a first end of an inductor L, whose other end is connected, by a first MOS transistor N1, to a first electrode of an output capacitor C across which is imposed the output voltage Vout. The point series association of the middle of the inductance L and the transistor N1 is also connected, by a transistor N2, to the ground defined by the negative electrode of the battery V1 to which is connected the second electrode of the capacitor C . in such an application, the control of transistors N1 and N2 is particularly delicate as it requires a level shifter for controlling the transistor N1 which has no reference to ground.

p0008Known from independent rectifying circuits, that is to say with two terminals, including a MOS transistor and its control circuit, for example that described in the application of <patcit id="pcit0001" dnum="EP0891830A1"><text>EP 0891830 A1</text></patcit>.

p0009Such a system, however, presents a number of drawbacks, including the absence of the opening of the transistor in advance with respect to the occurrence of the positive half cycle, to prevent conduction, although of short duration, the system during the positive half cycle.

p0010It would be desirable to have a low threshold voltage in rectifying element, which does not pose the MOS transistors control problems in conventional configurations.

p0011The present invention is to provide an independent control circuit of a MOS transistor ensuring recovery of function.

p0012To achieve these objects and other, the present invention provides a control circuit of a switch controlling unidirectionally while the voltage at its terminals is an AC voltage, comprising: <ul><li>means for delaying the closing of the switch with respect to a zero crossing of the voltage thereacross; and</li><li>means for triggering the opening of the following switch closure, at the end of a predetermined time interval plus or minus an error time locked to the duty ratio of the alternating voltage across the switch during of one or more prior periods.</li></ul>

p0013According to one embodiment of the present invention, said predetermined time is chosen according to the maximum expected variations of the duty cycle.

p0014According to one embodiment of the present invention, a capacitor and a diode are connected in series between the terminals of the switch to provide a supply voltage to the control circuit, the capacitor being charged when the switch is open.

p0015According to one embodiment of the present invention, the control circuit comprises:<ul><li>a circuit for detecting the sign of the voltage across the switch;</li><li>a ramp generator reset on each change of sign of the voltage across the switch in a direction in which it must become conductive, said generator being controlled by the detection circuit;</li><li>means for causing the closure of the switch following the detection of a change of sign of the voltage at its terminals; and</li><li>a servo circuit of the closing time on a predetermined value.</li></ul>

p0016According to one embodiment of the present invention, a first delay element brings a minimum delay to a switch opening instruction following its closure.

p0017According to one embodiment of the present invention, a second delay element introduces a delay in the closing of the switch relative to the reversal of the voltage at its terminals.

p0018According to one embodiment of the present invention, an output amplifier providing the switch control signal is controlled by means for detecting a reversal of the direction of the voltage, to cause opening of the switch when reversing accidental voltage.

p0019According to one embodiment of the present invention, the switch is a MOS transistor.

p0020According to one embodiment of the present invention, a diode in parallel on the switch is used to start.

p0021The invention also provides a low threshold voltage rectifying circuit comprising a switch in parallel with a diode preferably formed of its parasitic diode, and a control circuit associated with a supply circuit taking its power directly to the terminals of the transistor controlled while it is closed.

p0022According to one embodiment of the present invention, the recovery circuit includes only two external connection terminals.

p0023These objects, features and advantages, and others of the present invention will be discussed in detail in the following description of specific embodiments in non-limiting in connection with the accompanying drawings:<ul><li>the <figref idrefs="f0001">Figures 1 to 3</figref> described above illustrate typical installation examples of rectifying elements which the present invention applies;</li><li>the <figref idrefs="f0001">4</figref> represents, very schematically, an embodiment of a MOS transistor-based rectifier circuit according to the present invention;</li><li>the <figref idrefs="f0001">Figures 5A and 5B</figref> illustrate, in timing diagrams, the operation of the circuit of <figref idrefs="f0001">4</figref> ; </li><li>the <figref idrefs="f0002">6</figref> represents an embodiment of a control circuit of a MOS transistor mounted in rectifying element according to the present invention;</li><li>the <figref idrefs="f0002">7A to 7H</figref> illustrate, in the form of timing diagrams, the operation of the circuit of <figref idrefs="f0002">6</figref> ; and</li><li>the <figref idrefs="f0003">8</figref> represents a variation of a control circuit according to the invention, including optional protective devices.</li></ul>

p0024The same elements have been designated by the same references in the different figures. For reasons of clarity, only the elements which are necessary for understanding the invention have been shown in the drawings and will be described subsequently. In particular, all the possible applications of autonomous recovery circuit according to the invention have not been detailed, this applying generally to the replacement of a diode in a rectifying function by a MOS transistor and its control circuit.

p0025A feature of the present invention is to control a MOS transistor, the drain and the source define two end terminals of the rectifier circuit, by synchronizing its conduction periods exclusively depending on the voltage present at its terminals (between drain and source).

p0026Preferably, the control circuit is autonomous, that is to say it collects the energy required for its operation to the two terminals of the MOS transistor.

p0027The invention thus realizes a diode function by means of an autonomous circuit having only two terminals to be connected to the rest of the application.

p0028The <figref idrefs="f0001">4</figref> represents, schematically and in block form, a MOSFET rectifier circuit according to the invention. This circuit comprises essentially a MOS transistor 1 to N channel whose source defines the anode A of the rectifying circuit and the drain of which defines the cathode K. A diode 2 is connected in parallel to the transistor 1 with its anode confused with source of the transistor 1. In practice, the diode 2 can be constituted by the parasitic diode of the transistor 1.

p0029According to the invention, the gate of transistor 1 receives a control voltage Vc provided by a circuit 3 (CT) which sets the transistor conduction periods 1 based on the detected voltage at its terminals. For this purpose, the circuit 3 comprises two terminals respectively connected to the electrodes K and A. The circuit 3 is also self-powered by a voltage Vcc derived directly from the voltage between the terminals K and A. In the example of<figref idrefs="f0001">4</figref>, The supply circuit consists of a diode 4, whose anode is connected to the cathode K of the circuit and whose cathode is connected via a capacitor storage 5 to the anode A. The voltage Vcc to Circuit 3 is taken from the terminals of the capacitor 5. This embodiment is a simplified embodiment which improved versions will be exhibited later.

p0030According to the invention, the alternation is used during which the transistor 1 is blocked because the voltage Vd between the terminals K and A is positive (with the conventions adopted in the figures) for charging the capacitor 5, the diode 4 is during these periods biased. During the alternations where the voltage Vd is negative, the transistor 1 is turned on by the circuit 3 and the diode 4 prevents the capacitor 5 to discharge other than feeding channel 3.

p0031This shows that the invention fulfills a function of recovery in case the voltage between terminals K and A is a voltage that changes direction, that is to say, comes from an alternative source. More particularly, the invention applies to the case where the voltage Vd is the relatively high frequency switching type (tens of kilohertz) to not require a capacitor 5 too large, the latter must indeed maintain sufficient charge during periods when the transistor 1 leads.

p0032Of course, the voltage Vcc necessary for operation of the circuit 3 may be provided by other means, especially in case an adequate voltage is available in the rest of the circuit. However, obtaining the voltage Vcc by the voltage at the terminals of the inventive circuit is preferred insofar as it provides a completely independent circuit and reference voltage without problem.

p0033The <figref idrefs="f0001">Figures 5A and 5B</figref> illustrate respectively, in the form of timing diagrams, voltage-looking example Vd across transistor 1 and the corresponding control voltage V provided by the circuit 3.

p0034As the capacitor 5 is discharged (system start), the transistor 1 is blocked regardless of the voltage Vd (the circuit 3 is not energized and therefore can not provide control). A possible conduction during periods when the potential of the terminal A is greater than the potential of the terminal K (negative voltage Vd with the conventions adopted in the figures) is then provided by the diode 2 so biased. Some alternating voltage Vd may be needed to sufficiently charge the capacitor 5 and allow the system startup.

p0035The <figref idrefs="f0001">Figures 5A and 5B</figref> illustrate an example in steady and, for simplicity, assume a rectangular voltage Vd (eg, from a switching power supply). All that will be discussed hereafter also applies in the case of a Vd voltage sinusoidal or another, provided that it is alternative.

p0036Or reciprocation during periods where the voltage Vd across the transistor 1 is positive, it is blocked (Vc = 0). It is during these periods that is in charge the capacitor 5.

p0037At a time t1 where the voltage Vd is zero (alternation of change and transition to a negative half), reverse voltage (negative voltage in the direction of the figure) is initially limited to a first threshold corresponding to TH1 the threshold voltage (approximately 0.7 volts) of the diode 2. in fact, as soon as the voltage Vd reaches this negative value, the diode 2 leads and introduces a forward voltage drop value TH1. The circuit 3 is adapted to detect the onset of this negative voltage and to cause the closing of the transistor 1 to a time t2 following the time t1 with a predetermined time. At time t2, the transistor 1 is brought into conduction, which reduces the forward voltage drop at the TH2 threshold voltage of this transistor. In practice, this voltage drop is, at worst, less than 0.2 and may even be reduced to about 50 mV. It is related to the resistance of the MOS transistor in the on state (RdsON) and thus depends on the current set by the application. It also depends on the size of the transistor and the avalanche voltage of the technology.

p0038The opening of the transistor 1 must at a time t3 which precedes a time (in principle unknown) t4 change of alternation (transition to the new positive alternation).

p0039The invention takes advantage of the fact that it changes the duty cycle of the voltage Vd are generally low from one period to another to predict the moment t4 change of alternation with respect to the previous period P of the voltage Vd. in fact, the circuit 3 determines a closing time (t3-t2) relative to the previous period of the voltage Vd. the time interval .DELTA.t = t4-t3 is controlled by the circuit 3 during a cyclic shift to be maintained at a predetermined value selected according to the maximum size of expected duty cycle variations from one period to another in the application considered.

p0040The opening of the transistor 1 in advance of the appearance of the positive half cycle is essential to prevent a conduction system during the positive half cycle, thereby nullifying the desired straightening effect. For against, upon closure of the transistor (time t2), the dead time (the difference between times t1 and t2) can optionally be omitted if the application allows a turning-on at the beginning of the negative alternation.

p0041Several methods can be considered to enslave the time interval .DELTA.t a predetermined minimum in order to delay the time t3 in case of increase of the period P of the voltage Vd or conversely to advance the moment t3 in the case of shortening of the period P, taking account of at least one previous period.

p0042The <figref idrefs="f0002">6</figref> represents the diagram of an exemplary embodiment of a circuit 3 according to the invention implementing these functions. We find the one transistor to control and the diode 2 in parallel. To simplify the explanation, the supply means of the supply voltage Vcc are not shown in<figref idrefs="f0002">6</figref>. These are, for example, constituted of the diode 4 and the capacitor 5 as in the<figref idrefs="f0001">4</figref>.

p0043The <figref idrefs="f0002">7A to 7H</figref> will be described together with the <figref idrefs="f0002">6</figref> they explain the operation by timing diagrams showing examples of shapes in the characteristic points of the circuit.

p0044As has been explained above, the operation of the circuit is determined by the disappearance of the voltage Vd or more particularly the transition from a positive to negative alternation of the voltage Vd (<figref idrefs="f0002">7A</figref>, T1) with the meaning of conventions figures.

p0045Detection of the direction of the voltage Vd is effected by means of a bridge R1-R2 resistive divider connected to the terminals A and K and the midpoint of which is connected in an inverting input 10. The inverter 10 serves to in digital form the detection signal. The voltage V10 (<figref idrefs="f0002">7B</figref>) At the output of the inverter 10 is at a positive level (state 1 corresponding substantially to the voltage Vdc of the inverter power supply) from the time t1 and for the duration of the negative half cycle of the voltage Vd, that is to say, until time t4.

p0046The output of inverter 10 drives a differentiator 11 (eg, a resistive and capacitive cell RC) whose output is connected to the base of a very bipolar NPN ansistor type (or equivalent means) whose role is to short -circuiter a capacitor 13 otherwise receiving a current from a power source 14 draws energy from the supply Vcc. The emitter of transistor 12 is connected to terminal A while its collector is connected to the midpoint of the series connection of the source 14 and capacitor 13. The signal V11 (<figref idrefs="f0002">7C</figref>) At the output of the differentiator has a short duration pulse at every moment t1 of disappearance of the voltage Vd. This pulse closes transistor 12, which causes the discharge of the capacitor 13 (voltage V13, <figref idrefs="f0002">7D</figref>). From t5 where the control of the transistor 12 disappears, charging the capacitor 13 by the constant current source 14 resumes. The difference between t1 and t5, set by the time constant of the differentiator 11, is chosen to be as low as possible. thus generating a signal of period P sawtooth (t5-t1 pulse near).

p0047The voltage V13 is applied to inverting input of an operational amplifier 15. The output of the amplifier 15 is sent to the input of two delay elements (e.g., delay lines) 16 and 17 providing respective predetermined delays td1 and td2 . The output V15 (<figref idrefs="f0002">7E</figref>) Of the amplifier 15 goes high at time t1 when the potential of its inverting input disappears. The<figref idrefs="f0002">7F</figref> illustrates the shape of the V16 output voltage of the delay element 16. Arbitrarily, it is assumed in this example that the delay td1 td2 exceeded the delay. Note however that these delays do not need to be connected to one another. The delay td1 corresponds to the minimum predetermined time interval between the instants t3 and t4, while the delay td2 corresponding to the predetermined delay in the closing of the switch 1 (the difference between times t1 and t2).

p0048In the example of <figref idrefs="f0002">6</figref>It is assumed that the delay element 16 acts only on the falling edges of the signal V15 and provides no delay on the leading edges. Similarly, it is assumed that the delay element 17 acts only on the rising edges of signal V15. These assumptions are consistent insofar as the td1 and td2 times are negligible practice before the switching period.

p0049The <figref idrefs="f0002">Figure 7G</figref> illustrates the shape of the voltage Vc which corresponds to the output of element 17. Optionally, a "buffer" or level matching amplifier 18 is provided between the output of the element 17 and the gate of transistor 1. This amplifier 18 is then preferably controllable as will be described in connection with the <figref idrefs="f0003">8</figref>.

p0050The output of element 16 is combined in a 19 type-OR gate with the state detected by the inverter 10 (signal V10). The<figref idrefs="f0002">Figure 7H</figref> illustrates the result of this combination (V19 signal) which passes through an integrator 20 before being fed back to the non-inverting input of the amplifier 15. The value of the error provided by the integrator 20 is visible in <figref idrefs="f0002">7D</figref> (Level V20) and the time the ramp signal V13 V20 reached this value corresponds to the time t3 where td1 interval starts counting down by the element 16.

p0051That is to add at the time td1, a variable time ter tends to 0 by the feedback. Ter this time corresponds to the servo error whose integral is multiplied by a coefficient E by integrator 20. This corresponds approximately to a linear first order system. More constant E, the greater a change in the duty cycle is recovered quickly. There are in theory not limited to the value E, except possible problems of saturation or similar.

p0052In <figref idrefs="f0002">7</figref>, Consider the case where the error ter vanishes on the second period. The gap between t3 and t4 corresponds to constant td1. Of course, in practice, the ter term approaches zero but is never truly zero.

p0053Preferably, limit the possible variation of the term ter to constant td1 to prevent, when the error ter evades constant td1, the transistor 1 is conductive when the voltage Vd is positive.

p0054An advantage of the invention is that the transistor control circuit is completely autonomous and does not require a fixed voltage reference (e.g., ground) of the circuit to which is connected the straightening member. The only constraint is that to enable its supply (supply voltage Vcc) and proper operation, it is necessary that the signal applied across transistor 1 is properly an AC signal.

p0055The <figref idrefs="f0003">8</figref> partially represents the additional elements of the circuit <figref idrefs="f0001">figures 4</figref> and <figref idrefs="f0002">6</figref> according to a preferred embodiment of the invention. The circuit 3 of the<figref idrefs="f0003">8</figref> includes the elements described in relation with the <figref idrefs="f0002">6</figref> which only the controllable buffer 18 has been shown.

p0056According to this embodiment, the circuit 18 is controlled (on or off) to block the control signal of transistor 1 under the effect of a flip-flop 30 of the RS type. The set input 1 (S) of flip-flop 30 is connected, via an inverter 31, to the cathode K and its reset input 0 (R) is connected to the output of an operational amplifier 32. The inputs inverting and respective non-inverting amplifier 32 are connected to terminals K and A. the role of such an assembly is to open the MOS transistor if, accidentally, the voltage at the terminals K and a reverses during a negative half . Indeed, when the voltage Vd becomes positive, the output of amplifier 22 switches to a high state, which disables the amplifier 18. By against, on each falling edge of the voltage Vd, the signal S passes to state 1, which activates the amplifier 18.

p0057The <figref idrefs="f0003">8</figref> illustrates another variation regarding the power supply circuit. This is to insert a resistor R 4 between the diode and capacitor 5. This resistance R allows the load current of the capacitor 5 is of type leakage current while it is covering common type in the absence of resistor R. if necessary, the voltage supplied by the capacitor 5 can be controlled by a circuit 33 (REG) before supplying the voltage Vcc to the block 3.

p0058An advantage of the invention is that it allows to have a unidirectional and independent rectifying circuit capable of replacing a diode in many applications. In addition, the invention allows to replace a transistor in a synchronous operation to the extent that the circuit is an automatic synchronization with respect to the voltage present between the terminals A and K. In this type of application, the invention enables preserve the position of the switch to the positive line (unlike<figref idrefs="f0001">2</figref> where the transistor N1 is on the ground line). This avoids cutting the mass line, which greatly enhances compliance of electromagnetic constraints.

p0059Another advantage of the invention is that (except for short durations of switching (td1 + td2 durations and b), the series voltage drop of the rectifying element of the invention corresponds to that of a transistor MOS and is therefore considerably lower than that of a diode.

p0060Of course, the present invention is capable of various variants and modifications that occur to those skilled in the art without departing from the scope of the appended claims. In particular, channels other than those illustrated in connection with<figref idrefs="f0002">6</figref> can be used to realize the functions of introducing a predetermined delay to the closure and a variable delay in the opening of the MOS transistor. Similarly, in an embodiment of the type of<figref idrefs="f0002">6</figref>, The logic states chosen for the operation of the circuit 3 are arbitrary as long as the level of signal Vc compatible with the control of the transistor 1.

p0061Moreover, the connection of a rectifier circuit according to the invention in a conventional converter is the human range of art based on the functional indications given above.

p0062In addition, although the use of a MOS transistor is preferred, other switches are possible. For example, one can use a bipolar transistor providing a current control and oversizing capacity 5 system power.