Assembly comprising a semiconductor chip and support therefor, in addition to method for a bonded wiring connection
Abstract
This record has no abstract on file.
Term
Term ended
Projected expiry passed 22 July 2023, 3.2 years ago.
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6 claims: 2 independent, 4 dependent
- 1Claims of equivalent WO 2004017400 A1 Patentansprüche 1. Anordnung mit einem Halbleiterchip (3) und einem mit einer Kontaktstelle versehenen Träger (1) sowie einem ein Anschlusspad des Halbleiterchips (3) mit der Kontaktstelle verbindenden Draht (6) , wobei auf der Kontaktstelle ein erster Nailhead-Kontakt (4) geformt ist, das erste Ende des Drahtes (6) mit einem zweiten Nailhead-Kontakt (5) mit dem Anschlusspad des Halbleiterchips (3) und das zweite Ende des Drahtes (6) mittels eines Wedge-Kontaktes (7) mit dem ersten Nailhead-Kontakt (5) verbunden ist, dadurch gekennzeichnet, dass die Kontaktstelle eine Durchkontaktierung (9) im Träger (1) ist und der erste Nailhead-Kontakt (4) direkt auf der Trägeroberfläche an der Stelle der Durchkontaktierung (9) angebracht ist, ohne dass dort eine weitere Oberflächenmetallisierung vorhanden ist.
- 2Anordnung nach Anspruch 1, dadurch gekennzeichnet, dass der Träger (1) mit einer Keramik gebildet ist.
- 3Anordnung nach Anspruch 1 oder 2 , dadurch gekennzeichnet , dass der Träger (1) mit einer mehrlagigen Keramik gebildet ist und die Durchkontaktierung (9) eine Oberfläche des Trä- gers mit einer Metallisierung (2) zwischen zwei Keramiklagen verbindet .
- 4Anordnung nach Anspruch 1, dadurch gekennzeichnet, dass der Träger (1) ein PC-Board ist.
- 5Anordnung nach Anspruch 1 oder 4 , dadurch gekennzeichnet, dass der Träger (1) mit einem mehrlagigen PC-Board gebildet ist und die Durchkontaktierung (9) eine Oberfläche des Trägers mit einer Metallisierung (2) zwischen zwei PC-Board- Lagen verbindet.
- 6Verfahren zum elektrischen Verbinden eines Anschlusspads eines Halbleiterchips (3) mit einer Durchkontaktierung (9) auf einem Träger (1) mit den Schritten:• Formen eines ersten Nailhead-Kontaktes (4) direkt auf der Trägeroberfläche an der Stelle der Durchkontaktierung (9), ohne dass dort eine weitere Oberflächenmetallisierung vorhanden ist, mittels der Kapillare eines Bondwerkzeugs, • Abtrennen des Drahtes (6) von dem ersten Nailhead-Kontakt (4) , • Formen eines zweiten Nailhead-Kontaktes (5) auf dem Anschlusspad des Halbleiterchips (3) mittels der Kapillare (8) des Bondwerkzeugs, • Führen des Drahtes (6) zum ersten Nailhead-Kontakt (4), • Formen eines Wedge-Kontaktes (7) mit dem Ende des Drahtes (6) auf dem ersten Nailhead-Kontakt (4) mittels der Kapillare (8) des Bondwerkzeugs.
Independent claims6
18 paragraphs, as filed
Translation of description of equivalent WO 2004017400 A1
p0001ARRANGEMENT WITH A SEMICONDUCTOR CHIP AND ITS CARRIER AND METHOD FOR BOND WIRE CONNECTION
p0002description
p0003Arrangement with a semiconductor chip and a carrier provided with a via hole and a connection pad of the semiconductor chip one with the via connecting wire and method for producing such an arrangement
p0004The invention relates to an arrangement with a semiconductor chip and a provided with a contact point support as well as an a connection pad of the semiconductor chip to the pad connecting wire, to the point of contact, a first nailhead contact is formed, the first end of. Wire having a second nailhead contact with the connection pad of the semiconductor chip and the second end of the wire by means of a wedge contact is connected to the first nailhead contact. The invention also relates to a method for producing such an arrangement.
p0005Such an arrangement and such a method are known from JP 2000-323514 A. There the problem is to be solved, good bond contacts, in particular wedge contacts, prepare to interconnects from poorly connected with gold materials. Other applications include this signature can not be inferred.
p0006The object of the invention, a simple and cost effective and good connection of a wire, in particular a gold or aluminum wire having a support surface, which only has a GE wrestle metallization on the to be bonded point is to allow.
p0007The object is achieved by the arrangement according to claim 1 or the method of claim. 6 Advantageous developments are specified in the dependent claims.
p0008Accordingly, the invention teaches a nailhead contact directly to a support surface at the site of vias tion to apply, without there is another Oberflächenme- metallization available. Only the forming the via hole through the substrate is metallized. By applying the nailhead contact on the surface of the support at the location of this hole a sufficiently good connection to the metallization in the hole is made, so that by means of the applied to the nailhead contact Wedge contact a connection to the other surface of the carrier or is produced layers to a metal layer between two insulating carrier. a contact pad on the support so it is replaced in the inventive manner by the first nailhead contact. This expensive substrate surface is saved in an advantageous manner; the circuit can be rinkt gesh-.
p0009Another advantage of the inventive arrangement and the inventive method is that a process step in the manufacture of circuit traces on the substrate surface can be saved by avoiding the usual bond pads on the support surface. This leads to a cost reduction due to the saving of gold paste commonly used for this purpose.
p0010In development of the invention the carrier is to be formed ramic with a bevel. Alternatively it can be a PC board (printed circuit board) of the carrier. The carrier may be either of an insulating layer such that the via extends from a carrier surface to the other, but it may also consist of two or more insulating layers, being arranged between the layers metallizations in the form of wires and / or ground planes and at least partially extend the vias up to those Zwischenmetallisierungen.
p0011The invention will be described in greater detail using an exemplary embodiment, game by means of a figure. It shows the
p0012Figure shows an inventive arrangement.
p0013In the figure, a carrier 1 is formed with two insulating layers, between which are metallized surfaces and / or conductors. 2 On one surface of the substrate 1 a semiconductor chip 3 is arranged. Due to the support layer on which the semiconductor chip 3 is arranged, performs a plated-through hole 9 by means of the metallized surface can be contacted by the conductor track o- second In the inventive manner no contact pad is provided but a first nailhead contact 4 is applied, of which the wire was separated on the support surface. On a connection pad (not shown in detail) of the semiconductor chip 3, a second
p0014is nailhead contact 5 produces, starting extending the semiconductor chip 3 with the plated-through hole 9 connecting wire 6 to the first nailhead contact 4 from where it is connected by means of a wedge contact 7 with this. First Nail head contact 4 is slightly pushed in the example shown in the hole in the carrier layer of the via 9, so that a good contact with the metallization of the hole comes.
p0015The invention is not limited to use in multi-layer
p0016Carriers with limited Zwischenmetallisierungen but can also be applied to single-layer support with backside metallization.
p0017In the figure, also the capillary of the bonding tool 8 is shown to indicate the inventive method.
9 members in 6 offices
Priority claims3
| Document | Office | Kind | Date |
|---|---|---|---|
| 10233607 | Germany | – | |
| 10233607 | Germany | A | |
| 0302465 | Germany | W |
Members9
| Document | Office | Kind | |
|---|---|---|---|
| DE10233607A1 | Germany | A1 | |
| WO2004017400A1 | World Intellectual Property Organization (WIPO) | A1 | |
| AU2003258458A1 | Australia | A1 | |
| EP1523769A1This record | European Patent Office (EPO) | A1 | |
| US2005127497A1 | United States of America | A1 | |
| DE10233607B4 | Germany | B4 | |
| JP2006502564A | Japan | A | |
| US7053489B2 | United States of America | B2 | |
| JP4308765B2 | Japan | B2 |
11 legal events, as 2 offices reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | Office | |
|---|---|---|---|
| Application deemed to be withdrawnWithdrawn18D | 18D | EP | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWNSTAA | STAA | EP | |
| Party data changed (applicant data changed or rights of an application transferred)RAP1 | RAP1 | EP | |
| First examination report despatched17Q | 17Q | EP | |
| Designated country de not longer valid8566 | 8566 | DE | |
| Request for extension of the european patent (deleted)DAX | DAX | EP | |
| Designated contracting states (corrected)RBV | RBV | EP | |
| Request for examination filed17P | 17P | EP | |
| Designated contracting statesAK | AK | EP | |
| Request for extension of the european patentAX | AX | EP | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI | EP |
Numbers
- Publication
- 1523769
- Application
- 37877149
Titles3
- German
- ANORDNUNG MIT EINEM HALBLEITERCHIP UND DESSEN TRÄGER SOWIE VERFAHREN ZUR BOND-DRAHTVERBINDUNG
- English
- ASSEMBLY COMPRISING A SEMICONDUCTOR CHIP AND SUPPORT THEREFOR, IN ADDITION TO METHOD FOR A BONDED WIRING CONNECTION
- French
- CIRCUIT COMPRENANT UNE PUCE SEMI-CONDUCTRICE ET SON SUPPORT ET PROCEDE DE LIAISON PAR FIL DE CONNEXION
Classification
- CPC, 17
- H05K3/328
- H10W70/095
- H05K1/113
- H05K3/4015
- H05K2203/049
- H10W72/07141
- H10W72/07511
- H10W72/07521
- H10W72/07533
- H10W72/5366
- H10W90/754
- H10W72/5434
- H10W72/59
- H10W72/5522
- H10W72/536
- H10W72/5363
- H10W72/5524
- IPC, 3
- H01L21 48
- H01L21 607
- H10W70 60
Designated states2
- Contracting states, 1
- Türkiye
- Extension states, 1
- North Macedonia