Encoding of low-density parity check (ldpc) codes using a structured parity check matrix
Abstract
An approach is provided for a method of encoding structure Low Density Parity Check (LDPC) codes. Memory storing information representing a structured parity check Matrix of Low Density Parity Check (LDPC) codes is accessed during the encoding process. The information is organized in tabular form, wherein each row represents occurrences of one Values within a first column of a group of columns of the parity check matrix. The rows correspond to groups of columns of the parity check matrix, wherein subsequent columns within each of the groups are derived according to a predetermined operation. An LDPC coded signal is output based on the stored information representing the parity check matrix.
Term
Term ended
Expired 3 July 2023, 3.2 years ago.
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20 claims: 20 independent, 0 dependent
- 1A method of encoding, comprising:accessing memory (1605, 1607) storing information representing a structured parity check matrix of Low Density Parity Check (LDPC) codes, the information being organized in tabular form, each row of the information in memory representing occurrences of one values within a first column of a group of columns of the parity check matrix, the rows corresponding to groups of columns of the parity check matrix, and subsequent columns within each of the groups being derived according to a predetermined operation;initializing parity bit accumulators to zero, wherein the parity bit accumulators correspond to parity bits;accumulating the first information bit with index jM of the jth group of M information bits in the parity bit accumulator at the specified address i if the ith entry in (jM)th column of the parity check matrix is 1, where j = 0, 1, 2, 3, ... kldpc/M-1;andoutputting an LDPC coded signal based on the stored information representing the parity check matrix,characterized by, after the step of accumulating the first information bit, the following steps: accumulating each of the remaining (M-1) information bits with index m =jM+1, jM+2, jM+3,..., (j+1)M-1 of the jth group in one or more parity bit accumulators, related to each parity bit accumulator in which the first information bit with index jM in the group was accumulated, at an address {x + m mod M x q} mod (nldpc -kldpc), where nldpc represents codeword size, kldpc represents information block size, x denotes the address of each parity bit accumulator at which the first information bit with index jM in the group was accumulated, and q is a code rate dependent constant;andafter all of the information bits are exhausted, performing operations, starting with i = 1 according to pi = pi ⊕ pi-1, i = 1, 2, ..., nldpc - kldpc -1, to obtain final parity bits pi, i = 0, 1, ... , nldpc - kldpc -1, wherein pi denotes the contents of the parity bit accumulator at address i. Codierverfahren, mit den folgenden Schritten: Zugreifen auf einen Speicher (1605, 1607), der Informationen gespeichert enthält, die eine strukturierte Paritätsprüf-Matrix von Paritätsprüf-Codes niedriger Dichte (LDPC) wiedergeben, wobei die Informationen in einer Tabellenform organisiert sind, jede Reihe der Informationen in dem Speicher das Auftreten eines Wertes innerhalb einer ersten Spalte einer Gruppe von Spalten der Paritätsprüf-Matrix repräsentiert, die Reihen den Gruppen der Spalten der Paritätsprüf-Matrix entsprechen und wobei nachfolgende Spalten innerhalb jeder der Gruppen entsprechend einer vorbestimmten Operation abgeleitet wird;Initialisieren von Paritätsbit-Sammlern auf Null, wobei die Paritätsbit-Sammler den Paritätsbits entsprechen;Sammeln des ersten Informationsbits mit dem Index jM der j-ten Gruppe von M Informationsbits in dem Paritätsbit-Sammler an der spezifizierten Adresse i, wenn der i-te Eintrag in der (jM)-ten Spalte der Paritätsprüf-Matrix gleich 1 ist, wobei gilt j = 0, 1, 2, 3, ... kldpc/M-1;undAusgeben eines LDPC codierten Signals basierend auf den gespeicherten Informationen, welche die Paritätsprüf-Matrix repräsentieren,gekennzeichnet durch die folgenden Schritte, die nach dem Schritt der Sammlung des ersten Informationsbits folgen: Sammeln von jedem der verbleibenden (M-1) Informationsbits mit dem Index m = jM+1, jM+2, jM+3, ..., (j+1)M-1 der j-ten Gruppe in einem oder in mehreren Paritätsbit-Sammlern, die auf jeden Paritätsbit-Sammler bezogen sind, in welchem das erste Informationsbit mit dem Index jM in der Gruppe gesammelt worden war, bei einer Adresse {x + m mod M x q} mod (nldpc - kldpc), worin nldpc die Codewortgröße repräsentiert, kldpc die Informationsblockgröße repräsentiert, x die Adresse von jedem Paritätsbit-Sammler bezeichnet, an dem das erste Informationsbit mit dem Index jM in der Gruppe gesammelt worden war, und wobei q eine Coderaten unabhängige Konstante ist;undnachdem alle die Informationsbits ausgeschöpft worden sind, Durchführen von Operationen, beginnend mit i = 1 entsprechend zu pi = pi ⊕ pi-1, i = 1, 2, ..., nldpc - kldpc - 1, um endgültige Paritätsbits pi zu erhalten, mit i = 0, 1, ..., nldpc - kldpc - 1, worin pi die Inhalte des Paritätsbit-Sammlers bei der Adresse i bezeichnet. Procédé de codage, comprenant les étapes consistant à : accéder à une mémoire (1605, 1607) stockant des informations représentant une matrice de vérification de parité structurée de codes LDPC (pour « Low Density Parity Check » - Contrôle de parité à faible densité), les informations étant agencées sous la forme d'un tableau, chaque rangée d'informations en mémoire représentant les occurrences de valeurs 1 dans une première colonne sur un groupe de colonnes de la matrice de vérification de parité, les rangées correspondant à des groupes de colonnes de la matrice de vérification de parité et des colonnes suivantes, dans chacun des groupes, étant dérivées selon une opération prédéterminée ;initialiser à zéro des accumulateurs de bits de parité, les accumulateurs de bits de parité correspondant à des bits de parité ;accumuler le premier bit d'information d'index jM du jième groupe de M bits d'informations dans l'accumulateur de bits de parité à l'adresse spécifiée i si le iième terme dans la (jM)iéme colonne de la matrice de vérification de parité est 1, avec j = 0, 1, 2, 3, ... , kldpc/M-1;etproduire en sortie un signal codé LDPC sur la base des informations stockées qui représentent la matrice de vérification de parité,caractérisé, après l'étape d'accumulation du premier bit d'information, par les étapes consistant à : accumuler chacun des (M-1) bits d'information restants, d'index m = jM+1, jM+2, jM+3, ..., (j+1)M-1 du jième groupe dans un ou plusieurs accumulateurs de bits de parité, liés à chaque accumulateur de bits de parité dans lequel a été accumulé le premier bit d'information d'index jM dans le groupe, à une adresse {x+mmod M x q} mod (nldpc - kldpc), où nldpc représente la taille du mot de code, kldpc représente la taille du bloc d'informations, x dénote l'adresse de chaque accumulateur de bits de parité dans lequel a été accumulé le premier bit d'information d'index jM dans le groupe et q est une constante dépendant du débit de code ;etaprès que tous les bits d'information sont consommés, exécuter des opérations, en commençant par i = 1, selon pi = pi ⊕ pi-1, i = 1, 2, ... , nldpc - kldpc -1, pour obtenir des bits de parité finals pi, pour i = 0, 1, ... , nldpc - kldpc -1, où pi dénote le contenu de l'accumulateur de bits de parité à l'adresse i.
- 2A method according to claim 1, wherein the predetermined operation specifies the step of:performing a cyclic shift by q positions on the first column of each of the group of columns. Procédé selon la revendication 1, dans lequel l'opération prédéterminée désigne l'étape consistant à : exécuter un décalage cyclique de q positions sur la première colonne de chaque groupe de colonnes. Verfahren nach Anspruch 1, bei dem die vorbestimmte Operation die folgenden Schritte spezifiziert: Durchführen einer zyklischen Verschiebung um q Positionen an der ersten Spalte von jeder Gruppe der Spalten.
- 3A method according to claim 1, wherein M = 360. Procédé selon la revendication 1, dans lequel M = 360. Verfahren nach Anspruch 1, bei dem M = 360 ist.
- 4A method according to claim 1, wherein the code dependent constant q is 60, 30, 90, 45, 36, 72, 20, and 18 for code rates 2/3, 5/6, 1/2, 3/4, 4/5, 3/5, 8/9, and 9/10, respectively. Procédé selon la revendication 1, dans lequel la constante dépendant du code q est de 60, 30, 90, 45, 36, 72, 20 et 18 pour des débits de code 2/3, 5/6, 1/2, 3/4, 4/5, 3/5, 8/9 et 9/10, respectivement. Verfahren nach Anspruch 1, bei dem die codeunabhängige Konstante q gleich 60, 30, 90, 45, 36, 72, 20 und 18 für die Coderaten 2/3, 5/6, 1/2, 3/4, 4/5, 3/5, 8/9 und 9/10 jeweils ist.
- 5A method according to claim 1, further comprising:modulating the LDPC coded signal according to a signal constellation that includes one of 8-PSK Phase Shift Keying, 16-QAM Quadrature Amplitude Modulation, QPSK Quadrature Phase Shift Keying, 16-APSK Amplitude Phase Shift Keying and 32-APSK. Procédé selon la revendication 1, comprenant en outre l'étape consistant à : moduler le signal codé LDPC selon une constellation de signaux comprenant l'un des mécanismes suivants : 8-PSK (pour « Phase Shift Keying » - Modulation à déplacement de phase), 16-QAM (pour « Quadrature Amplitude Modulation » - Modulation d'amplitude en quadrature), QPSK (pour « Quadrature Phase Shift Keying » - Modulation par quadrature de phase), 16-APSK (pour « Amplitude Phase Shift Keying » - Modulation à déplacement d'amplitude et de phase) ou 32-APSK. Verfahren nach Anspruch 1, ferner mit den folgenden Schritten: Modulieren des LDPC codierten Signals entsprechend einer Signalkonstellation, welche eine von 8-PSK Phasenverschiebungs-Verschlüsselungen, eine 16-QAM Quadraturamplitudenmodulation, eine QPSK Quadraturphasenverschiebungs-Verschlüsselung, eine 17-APSK Amplitudenphasenverschiebungs-Verschlüsselung und eine 32-APSK enthält.
- 6A method according to claim 1, wherein the information bits are obtained by encoding an input signal according to Bose Chaudhuri Hocquenghem (BCH) codes. Procédé selon la revendication 1, dans lequel les bits d'information sont obtenus en codant un signal d'entrée selon des codes de Bose Chaudhuri Hocquenghem (BCH). Verfahren nach Anspruch 1, bei dem die Informationsbits dadurch erhalten werden, indem ein Eingangssignal entsprechend den Bose Chaudhuri Hocquenghem (BCH) Codes codiert wird.
- 7A method according to claim 6, wherein the number of redundant BCH bits is nBCH- kBCH = 16* t wherein t represents error correcting capability of the BCH code, nBCH is codeword size of the BCH code, and kBCH is information block size of the BCH code. Procédé selon la revendication 6, dans lequel le nombre de bits BCH redondants est nBCH - kBCH = 16*t, où t représente la capacité de correction d'erreur du code BCH, nBCH est la taille du mot de code du code BCH et kBCH est la taille du bloc d'informations du code BCH. Verfahren nach Anspruch 6, bei dem die Zahl der redundanten BCH Bits gleich ist nBCH - kBCH = 16*t, worin t eine Fehlerkorrekturfähigkeit des BCH Codes repräsentiert, nBCH eine Codewortgröße des BCH Codes ist, und kBCH die Informationsblockgröße des BCH Codes ist.
- 8A method according to claim 6, wherein the error correction capability of the BCH code is 12 bits when used in concatenation with rate 1/2, 3/4, 4/5 and 3/5 LDPC codes, is 10 bits when used in concatenation with rate 2/3 and 5/6 LDPC codes, and is 8 bits when used in concatenation with rate 8/9 and 9/10 LDPC codes. Procédé selon la revendication 6, dans lequel la capacité de correction d'erreur du code BCH est de 12 bits lorsqu'il est utilisé en concaténation avec des codes LDPC à débit de 1/2, 3/4, 4/5 et 3/5, est de 10 bits lorsqu'il est utilisé en concaténation avec des codes LDPC à débit de 2/3 et de 5/6 et est de 8 bits lorsqu'il est utilisé en concaténation avec des codes LDPC à débit de 8/9 et 9/10. Verfahren nach Anspruch 6, bei dem die Fehlerkorrekturfähigkeit des BCH Codes 12 Bits beträgt, wenn diese in der Konzentration mit Raten von 1/2, 3/4, 4/5 und 3/5 LDPC Codes verwendet wird, bei 10 Bits liegt, wenn diese in der Konzentration mit Raten von 2/3 und 5/6 LDPC Codes verwendet wird, und 8 Bits beträgt, wenn diese in einer Konzentration mit einer Rate von 8/9 und 9/10 LDPC Codes verwendet wird.
- 9A method according to claim 1, wherein M = 360 and the row indices of 1's in the (jM)th column, j = 0, 1, 2, 3, ..., (kldpc / 360 ) - 1, of the parity check matrix are given at the jth row according to one of Tables 1-8:Table 1Address of Parity Bit Accumulators (Rate 2/3)0 10491 16043 506 12826 8065 8226 2767 240 18673 9279 10579 20928117819 8313 6433 6224 5120 5824 12812 17187 9940 13447 13825 184332 17957 6024 8681 18628 12794 5915 14576 10970 12064 20437 4455 71513 19777 6183 9972 14536 8182 17749 11341 5556 4379 17434 15477 185324 4651 19689 1608 659 16707 14335 6143 3058 14618 17894 20684 53065 9778 2552 12096 12369 15198 16890 4851 3109 1700 18725 1997 158826 486 6111 13743 11537 55917433 15227141451483 3887 17431 124307 20647 14311 11734 4180 8110 5525 12141 15761 18661 18441 10569 81928 3791 14759 15264 19918 10132 9062 10010 12786 10675 9682 19246 54549 19525 9485 7777 19999 8378 9209 3163 20232 6690 16518 716 735310 4588 6709 2020210905 915 4317 11073 13576 16433 368 3508 211711114072 4033 1995912608 631 19494 14160 824910223 21504 12395 432212138001416113 2948 964714 14693 1602715 20506 1108216 1143 902017 13501 4014181548 21901912216 2155620 2095 1989721 4189 795822 15940 10048235151261424 8501 845025 17595 1678426 5913 849527 16394 1042328 7409 698129 6678 1593930 20344 1298731 2510 1458832 17918 665533 6703 1945134 496 421735 7290 576636 10521 892537 20379 1190538 4090 583839 19082 1704040 20233 1235241 19365 1954642 6249 1903043 11037 1919344 19760 1177245 19644 742846 16076 352147 11779 2106248 13062 968249 8934 521750 11087 331951 18892 435652 7894 389853 5963 436054 7346 11726555182560956 2412 1729557 9845 2049458 6687 186459 20564 52160 18226 172071 9380 82662 7073 30653 18252 134374 9161 156425 10714 1015361158590787 5359 94188 9024 95159 12061635410 14994 110211 9375 2079612 15964 602713 14789 645214 8002 1859115 14742 1408916253304517 1274 1928618 14777 204419 13920 990020 452 737421 18206 992122 6131 541423 10077 972624 12045 547925 4322 799026 15616 555027 15561 1066128 20718 738729 2518 1880430 8984 260031 6516 1790932 11148 9833 20559 3704347510156935 16000 1169236 9147 1030337 16650 19138 15577 1868539 17167 2091740 4256 339141 20092 1721942 9218 505643 18429 847244 12093 2075345 16345 1274846 16023 1109547 5048 1759548 18995 481749 16483 353650 1439 1614851 3661 303952 19010 1812153 8968 1179354 13427 1800355 5303 308356 531 1666857 4771 672258 5695 796059 3589 14630Table 2Address of Parity Bit Accumulators (Rate 5/6)0 4362 416 8909 4156 3216 3112 2560 2912 6405 8593 4969 672312479 1786 8978 30114339 9313 6397 2957 7288 5484 6031 102172 10175 9009 9889 30914985 7267 4092 8874 56712777 2189 87163 9052 4795 3924 3370 10058 1128 9996 10165 9360 4297 434 51384 2379 7834 4835 2327 9843 804 329 8353 7167 3070 1528 73115 3435 7871348 3693 1876 6585 10340 7144 5870 2084 4052 27806 3917 31113476 1304 103315939 5199 1611 1991 699 8316 99607 6883 3237 1717 10752 7891 9764 4745 3888 10009 4176 4614 15678 10587 2195 1689 2968 5420 2580 2883 6496 111 6023 1024 44499 3786 8593 2074 3321 5057 1450 3840 5444 6572 3094 9892 151210 8548 1848 10372 4585 7313 6536 6379 1766 9462 2456 5606 997511 8204 10593 7935 3636 3882 394 5968 8561 2395 7289 9267 997812 7795 741633 9542 6867 7352 6417 7568 10623 725 2531 911513 7151 2482 4260 5003 10105 7419 9203 6691 8798 2092 8263 375514 3600 570 4527 200 9718 6771 1995 8902 5446 768 1103 652015 6304 762116 6498 920917 7293 6786185950170819 8521 179320 6174 785421 9773 119022 9517 1026823 2181 934924 1949 556025 1556 55526 8600 382727 5072 105728 7928 354229 3226 37620 7045 24201 9645 26412 2774 24523533120314 9400 75035 1850 23386 10456 97747 1692 92768 10037 40389 3964 33810 2640 508711 858 347312 5582 568313 9523 91614 4107 155915 4506 349116 8191 418217 10192 615718 5668 330519 3449 154020 4766 2697214069 6675221117101623 5619 308524 8483 840025 8255 39426 6338 504227 6174 511928 7203 1989291781 51740 1464 35591 3376 42142 7238 673 10595 88314 1221 65135 5300 46526 1429 97497 7878 51318 4435 102849 6331 550710 6662 4941119614 1023812 8400 802513 9156 563014 7067 887815 9027 341516 1690 386617 2854 846918 6206 63019 363 545320 4125 700821 1612 670222 9069 922623 5767 406024 3743 923725 7018 557226 8892 453627 853 606428 8069 589329 2051 2885010691 31531 3602 4055232817173 2219 92994 1939 78985 617 2066 8544 13747 10676 32408 6672 9489931707457107868573111 6121 1073212 4843 913213 580 959114 6267 929015 3009 226816 195 241917 8016 155718 1516 919519 8062 906420 2095 896821 753 732622 6291 383323 2614 784424 2303 64625 2075 61126 4687 36227 8684 994028 4830 206529 7038 13630 1769 78371 3801 16892 10070 23593 3667 99184 1914 69205 4244 56696 10245 78217 7648 39448 3310 54889 6346 966610 7088 612211 1291782712 10592 894513 3609 712014 9168 911215 6203 805216 3330 289517 4264 1056318 10556 649619 8807 764520 1999 453021 9202 681822 3403 173423 2106 902324 6881 388325 3895 217126 4062 642427 3755 953628 4683 213129 7347 8027Table 3Address of Parity Bit Accumulators (Rate 1/2)54 9318 14392 27561 26909 10219 2534 859755 7263 4635 2530 28130 3033 23830 365156 24731 23583 26036 17299 5750 792 916957 5811 26154 18653 11551 15447 13685 1626458 12610 11347 28768 2792 3174 29371 1299759 16789 16018 21449 6165 21202 15850 318660 31016 21449 17618 6213 12166 8334 1821261 22836 14213 11327 5896 718 11727 930862 2091 24941 29966 23634 9013 15587 544463 22207 3983 16904 28534 21415 27524 2591264 25687 4501 22193 14665 14798 16158 549165 4520 17094 23397 4264 22370 16941 2152666 10490 6182 32370 9597 30841 25954 276267 22120 22865 29870 15147 13668 14955 1923568 6689 18408 18346 9918 25746 5443 2064569 29982 12529 13858 4746 30370 10023 2482870 1262 28032 29888 13063 24033 21951 786371 6594 29642 31451 14831 9509 9335 3155272 1358 6454 16633 20354 24598 624 526573 19529 295 18011 3080 13364 8032 1532374 11981 1510 7960 21462 9129 11370 2574175 9276 29656 4543 30699 20646 21921 2805076 15975 25634 5520 31119 13715 21949 1960577 18688 4608 31755 30165 13103 10706 2922478 21514 23117 12245 26035 31656 25631 3069979 9674 24966 31285 29908 17042 24588 3185780 21856 27777 29919 27000 14897 11409 712281 29773 23310 263 4877 28622 20545 2209282 15605 5651 21864 3967 14419 22757 1589683 30145 1759 10139 29223 26086 10556 509884 18815 16575 2936 24457 26738 6030 50585 30326 22298 27562 20131 26390 6247 2479186 928 29246 21246 12400 15311 32309 1860887 20314 6025 26689 16302 2296 3244 1961388 6237 11943 22851 15642 23857 15112 2094789 26403 25168 19038 18384 8882 12719 70930 14567 249651 3908 1002 10279 2403241027644 12383 41735 13861 159186 21327 10467 5288 145798 28158 80699 16583 1109810 16681 2836311 13980 2472512 32169 1798913 10907 276714 21557 381815 26676 1242216 7676 875417 14905 2023218 15719 2464619 31942 858920 19978 2719721 27060 1507122 6071 2664923 10393 1117624 9597 1337025 7081 1767726 1433 1951327 26925 901428 19202 890029 18152 3064730 20803 173731 11804 2522132 31683 1778333 29694 934534 12280 2661135 6526 2612236 26165 1124137 7666 2696238 16290 848039 11774 1012040 30051 3042641 1335 1542442 6865 1774243 31779 1248944 32120 2100145 14508 699646 979 2502447 4554 2189648 7989 2177749 4972 2066150 6612 273051 12742 441852 29194 59553 19267 20113Table 4Address of Parity Bit Accumulators (Rate 3/4)0 6385 7901 14611 13389 11200 3252 5243 2504 2722 821 73741 11359 2698 357 13824 12772 7244 6752 15310 852 2001 114172 7862 7977 6321 13612 12197 14449 15137 13860 1708 6399 134443 1560 11804 6975 13292 3646 3812 8772 7306 5795 14327 78664 7626 11407 14599 9689 1628 2113 10809 9283 1230 1524148705 1610 5699 15876 9446 12515 1400 6303 5411 14181 13925 73586 4059 8836 3405 7853 7992 15336 5970 10368 10278 9675 46517 4441 3963 9153 2109 12683 7459 12030 12221 629 152124068 6007 8411 5771 3497 543 14202 875 9186 6235 13908 35639 3232 6625 4795 546 9781 20717312 3399 7250 4932 1265210 8820 10088 11090 7069 6585 13134 10158 7183 488 7455 923811 1903 10818 119 215 7558 11046 10615 11545 14784 7961 1561912 3655 8736 4917 15874 5129 2134 15944 14768 7150 2692 146913 8316 3820 505 8923 6757 806 7957 4216 15589 13244 262214 14463 4852 15733 3041 11193 12860 13673 8152 6551 15108 875815 3149 1198116 13416 690617 13098 1335218 2009 1446019 7207 431420 3312 3945214418 624822 2669 1397523 7571 902324 14172 296725 7271 713826 6135 1367027 7490 1455928 8657 246629 8599 12834303470315231 13917 436532 6024 1373033 10973 1418234 2464 1316735 5281 1504936 1103 184937 2058 106938 9654 609539 14311766740 15617 8146414588 1121842 13660 624343 8578 787444 1174126860 1022 12641 12604 99652 8217 27073 3156 117934 354 15145 6978 140586 7922 160797 15087 121388 5053 64'709 12687 1493210 15458 176311 8121 172112 12431 54913 4129 709114 1426 841515 9783 760416 6295 1132917 1409 1206118 8065 908719 2918 843820 1293 1411521 3922 1385122 3851 400023 5865 176824 2655 1495725 5565 633226 4303 1263127 11653 1223628 16025 763229 4655 1412830 9584 1312331 13987 959732 15409 1211033 8754 1549034 7416 1532535 2909 1554936 2995 825737 9406 479138 11111485439 2812 852140 8476 14717417820 1536042 1179 793943 2357 867844 7703 62160 3477 706713931 138452 7675 128993 1754 81874 7785 14005 9213 58916 2494 77037 2576 79028 4821 156829 10426 1193510 1810 90411 11332 926412 11312 357013 14916 2650147679784215 6089 13084163938275117 8509 464818 12204 891719 5749 1244320 12613 443121 1344 401422 8488 1385023 1730 1489624 14942 712625 14983 886326 6578 856427 4947 39628 297 1280529 13878 669230 11857 111863114395 1149332 16145 1225133 13462 742834 14526 1311935 2535 1124336 6465 1269037 6872 933438 153711402339 8101 1018740 11963 484841 15125 611942 8051 1446543 11139 516744 2883 14521Table 5Address of Parity Bit Accumulators (Rate 4/5)0 149 11212 5575 6360 12559 8108 8505 408 10026 128281 5237 490 10677 4998 3869 3734 3092 3509 7703 103052 8742 5553 2820 7085 12116 10485 564 7795 2972 21573 2699 4304 8350 712 2841 3250 4731 10105 517 75164 12067 1351 11992 12191 11267 5161 537 6166 4246 23635 6828 7107 2127 3724 5743 11040 10756 4073 1011 34226 11259 1216 95261466 10816 940 3744 2815 11506 115737 4549 11507 1118 1274 11751 5207 7854 12803 4047 64848 8430 4115 9440 413 4455 2262 7915 12402 8579 70529 3885 9126 5665 4505 2343 253 4707 3742 4166 155610 1704 8936 6775 8639 8179 7954 8234 7850 8883 87131111716 4344 908711264 2274 8832 9147 11930 6054 545512 7323 3970 10329 2170 8262 3854 2087 12899 9497 1170013 4418 1467 2490 5841 817 11453 533 11217 11962 525114 15414525 7976 3457 9536 7725 3788 2982 6307 599715 11484 2739 4023 12107 6516 551 2572 6628 8150 985216 6070 17614627 6534 7913 3730 11866 1813 12306 824917 12441 5489 8748 7837 7660 2102 11341 2936 6712 1197718 10155 421019 1010 1048320 8900 1025021 10243 1227822 7070 439723 12271 388724 11980 6836259514435626 7137 1028127 11881252628 1969 1147729 3044 1092130 2236 8724319104634032 7342 858233 11675 1040534 6467 1277535 3186 121980 9621 114451748656112 4319 48793 2196 3444 7527 66505 10693 24406 6755 27067 5144 59988 11043 80339 4846 443510 4157 922811 12270 656212 11954 759213 7420 259214 8810 963615 689 543016 920 130417 1253 1193418 9559 601619312758920 4439 419721 4002 955522 12232 777923 1494 878224 10749 396925 4368 347926 6316 534227 2455 349328 12157 740529 6598 1149530 11805 445531 9625 209032 4731 232133 3578 260834 8504 184935402711510 5647 493514219 18702 10968 80543 6970 54474 3217 56385 8972 6696 5618 124727 1457 12808 8868 38839 8866 122410 8371 597211 266 440512 3706 324413 6039 584414 7200 328315 1502 1128216 12318 220217 4523 96518 9587 7011192552205120 12045 1030621 11070 510422 6627 690623 9889 212124 829 970125 2201 181926 6689 1292527 2139 875728 12004 594829 8704 319130 8171 1093331 6297 711632 616 7146335142976134 10377 813835 7616 58110 7285 98631 7764 108672 12343 90193 4414 83314 3464 6425 6960 20396 786 30217 710 20868 7423 56019 8120 488510 12385 1199011 9739 1003412 424 1016213 1347 759714 1450 11215 7965 847816 8945 739717 6590 831618 6838 901119 6174 941020 255 11321 6197 583522 12902 384423 4377 350524 5478 867225 4453 213226 9724 138027 12131 1152628 12323 951129 8231 175230 497 902231 9288 3080322481751533 2696 26834 4023 1234135 7108 5553Table 6Address of Parity Bit Accumulators (Rate 3/5)22422 10282 11626 19997 11161 2922 3122 99 5625 17064 8270 17925087 16218 17015 828 20041 25656 4186 11629 22599 17305 22515 646311049 22853 25706 14388 5500 19245 8732 2177 13555 11346 17265 306916581 22225 12563 19717 23577 11555 25496 6853 25403 5218 15925 2176616529 14487 7643 10715 17442 11119 5679 14155 24213 21000 1116 156205340 8636 16693 1434 5635 6516 9482 20189 1066 15013 25361 1424318506 22236 20912 8952 5421 15691 6126 21595 500 6904 13059 68028433 4694 5524 14216 3685 19721 25420 9937 23813 9047 25651 1682621500 24814 6344 17382 7064 13929 4004 16552 12818 8720 5286 220622517 2429 19065 292121611 1873 7507 5661 23006 23128 20543 197771770 4636 20900 14931 9247 12340 11008 12966 4471 2731 16445 7916635 14556 18865 22421 22124 12697 9803 25485 7744 18254 11313 900419982 23963 18912 7206 12500 4382 20067 6177 21007 1195 23547 24837756 11158 14646 20534 3647 17728 11676 11843 12937 4402 8261229449306 24009 10012 11081 3746 24325 8060 19826 842 8836 2898 50197575 7455 25244 4736 14400 22981 5543 8006 24203 13053 1120 51283482 9270 13059 15825 7453 23747 3656 24585 16542 17507 22462 1467015627 15290 4198 22748 5842 13395 23918 16985 14929 3726 25350 2415724896 16365 16423 13461 16615 8107 24741 3604 25904 8716 9604 203653729 17245 18448 9862 20831 25326 20517 24618 13282 5099 14183 880416455 17646 15376 18194 25528 1777 6066 21855 14372 12517 4488 174901400 8135 23375 20879 8476 4084 12936 25536 22309 16582 6402 2436025119 23586 128 4761 10443 22536 8607 9752 25446 15053 1856 4040377 21160 13474 5451 17170 5938 10256 11972 24210 17833 22047 1610813075 9648 24546 13150 23867 7309 19798 2988 16858 4825 23950 1512520526 3553 11525 23366 2452 17626 19265 20172 18060 24593 13255 155218839 21132 20119 15214 14705 7096 10174 5663 18651 19700 12524 140334127 2971 17499 16287 22368 21463 7943 18880 5567 8047 23363 679710651 24471 14325 4081 7258 4949 7044 1078 797 22910 20474 431821374 1323122985 5056 3821 23718 14178 9978 19030 23594 8895 253586199 22056 7749 13310 3999 23697 16445 22636 5225 22437 24153 94427978 12177 2893 20778 3175 8645 11863 24623 1031125767 17057 369120473 11294 9914 22815 2574 8439 3699 5431 24840 21908 16088 182448208 5755 19059 8541 24924 6454 11234 10492 16406 10831 11436 964916264 11275 24953 2347 12667 19190 7257 7174 24819 2938 2522 117493627 5969 13862 1538 23176 6353 2855 17720 2472 7428 573 150360 18539 186611 10502 30022 9368 107613 12299 78284 15048 133625 18444 246406 20775 191757 18970 109718 5329 199829 11296 1865510 15046 20659117300 2214012 22029 1447713 11129 74214 13254 1381315 19234 1327316 6079 2112217 22782 582818 19775 424719 1660 1941320 4403 364921 13371 2585122 22770 2178423 10757 1413124 16071 2161725 6393 372526 597 1996827 5743 808428 6770 954829 4285 1754230 13568 2259931 1786 461732 23238 1164833 19627 203034 13601 1345835 13740 1732836 25012 1394437 22513 668738 4934 1258739 21197 513340 22705 6938417534 2463342 24400 1279743 21911 2571244 12039 114045 24306 102146 14012 2074747 11265 1521948 4670 1553149 9417 1435950 2415 65045124964 2469052 14443 881653 6926 129154 6209 2080655 13915 407956 24410 1319657 13505 611758 9869 822059 1570 604460 25780 1738761 20671 2491362 24558 2059163 12402 370264 8314 135765 20071 1461666 17014 368867 19837 94668 15195 1213669 7758 2280870 3564 292571 3434 7769Table 7Address of Parity Bit Accumulators (Rate 8/9)0 6235 2848 32221 5800 3492 53482 2757 927 903 69614516 47394 1172 3237 62645 1927 2425 36836 3714 6309 24957 3070 6342 71548 2428 613 37619 2906 264 592710 1716 1950 427311 4613 6179 349112 4865 3286 600513 1343 5923 352914 4589 4035 213215 1579 3920 673716 1644 1191599817 1482 2381462018 6791 6014 659619 2738 5918 37860515661661 1504 43562 130 19043602731874 6718 7595 6240 28706 2343 13117 1039 54658 6617 25139 1588 5222106561535114765205412 5966 689213 1969 386914 3571 242015 4632 98116 3215 416317 973 311718 3802 619819 3794 39480319661261 573 19092 850 40343 5622 16014 6005 5245 5251 57836 172 20327 1875 24758 497 12919 2566 343010 1249 74011 2944 194812 6528 289913 2243 361614 867 373315 1374 470216 4698 228517 4760 391718 1859 405819 6141 35270 2148 50661 1306 1452 2319 8713 3463 10614 5554 66475 5837 3396 5821 49327 6356 47568 3930 4189 211 309410 1007 492811 3584 123512 6982 286913 1612 101314 953 496415 4555 441016 4925 484217 5778 60018 6509 241719 1260 49030 3369 30311 3557 32242 3028 5833 3258 4404 6226 66555 4895 10946 1481 68477 4433 19328 2107 16499 2119 206510 4003 638811 6720 362212 3694 452113 1164 705014 1965 36131543316616 2970 179617 4652 321818 1762 477719 5736 13990 970 25721 2062 65992 4597 48703 1228 69134415910375 2916 23626 395 12267 6911 45488 4618 22419 4120 428010 5825 4741121545558123793547113 5707 159514 1403 325156601518316 6369 456917 4846 89618 7092 618419 6764 71270 6358 19511311769602 2710 70623 1133 36044 3694 6575 1355 1106 3329 67367 2505 34078 2462 48069 4216 21410 5348 5619116627624312 2644 507313 4212 508814 3463 388915 5306 47816 4320 612117 3961 112518569911951965117920 3934 27781 3238 65872111165963 1457 62264 1446 38855 3907 40436 6839 28737 1733 56158 5202 42699 3024 472210 5445 637211 370 182812 4695 160013 680 207414 1801 669015 2669 137716 2463 1681175972517118 5728 428419 1696 1459Table 8Address of Parity Bit Accumulators (Rate 9/10)0 56112563 290015220 3143 48132 2481 834 813 6265 4064 426541055 2914 56385 1734 2182 33156 3342 5678 22467 2185 552 33858 2615 236 53349 1546 1755 384610415455613142114382 2957 540012 1209 5329 317913 1421 3528 606314 1480 1072 539815 3843 1777 436916 1334 2145 416317 2368 5055 2600 6118 54051 2994 43702 3405 16693 4640 55504 1354 39215 117 17136 5425 28667 6047 6838 5616 25829 2108 117910 933 4921115953226112 1430 469913 5905 48014 4289 184615 5374 620816 1775 347617 3216 2178041658841 2896 37442 874 28013 3423 55794 3404 35525 2876 5515651617197 765 36318 5059 14419 5629 59810 5405 47311 4724 521012 155 183213 1689 222914449116415 2308 308816112266917 2268 57580 5878 26091 782 33592 1231 42313 4225 20524 4286 35175 5531 31846 1935 45607 1174 131831159569 3129 108810 5238 444011 5722 428012 3540 37513 191 278214 906 4432153225 111116 6296 258317 1457 9030 855 44751 4097 39702 4433 43613 5198 5414 1146 44265 3202 29026 2724 5257 1083 41248 2326 60039 5605 599010 4376 157911 4407 98412 1332 616313 5359 397514 1907 185415 3601 574816 6056 326617 3322 40850 1768 32441 2149 14421589 42913 5154 12524 1855 59395 4820 27066 1475 33607 4266 6938 4156 20189 2103 75210 3710 385311 5123 93112 6146 332313 1939 500214 5140 143715 1263 29316 5949 466517 4548 63800317146901 5204 21142 6384 55653 5722 17574 2805 62645 1202 26166 1018 32447 4018 52898 2257 30679 2483 307310 1196 532911 649 391812 3791 458113 5028 380314 3119 350615 4779 43116 3888 551017 4387 40840 5836 16921 5126 10782572161653 3540 24994 2225 63485 1044 14846 6323 40427 1313 56038 1303 34969 3516 363910 5161 229311 4682 384512 3045 64313 2818 261614 3267 64915 6236 59316 646 294817 4213 14420 5779 15961 2403 12372 2217 15143 5609 7164 5155 38585 1517 13126 2554 31587 5280 26438 4990 13539 5648 117010 1152 436611 3561 536812 3581 141113 5647 466114 1542 540115 5078 268716316175517 3392 1991 Procédé selon la revendication 1, dans lequel M = 360 et les indices de rangée des 1 dans la (jM)ième colonne, pour j = 0, 1, 2, 3, ..., (kldpc/360)-1 de la matrice de vérification de parité sont donnés dans la jième rangée de l'un des tableaux 1 à 8 : Tableau 1Adresses des accumulateurs de bits de parité (débit 2/3)0 10491 16043 506 12826 8065 8226 2767 240 18673 9279 10579 209281 17819 8313 6433 6224 5120 5824 12812 17187 9940 13447 13825 184832 17957 6024 8681 18628 12794 5915 14516 10970 12064 20437 4455 71513 19777 6183 9972 14536 8182 17749 11341 5556 4379 17434 15477 185324 4651 19689 1608 659 16707 14335 6143 3058 14618 17894 20684 53065 9778 2552 12096 12369 15198 16890 4851 3109 1700 18725 1997 158826 486 6111 13743 11537 5591 7433 15227 14145 1483 3887 17431 124307 20647 14311 11734 4180 8110 5525 12141 15761 18661 18441 10569 81928 3791 14759 15264 19918 10132 9062 10010 12786 10675 9682 19246 54549 19525 9485 7777 19999 8378 9209 3163 20232 6690 16518 716 735310 4588 6709 20202 10905 915 4317 11073 13576 16433 368 3508 2117111 14072 4033 19959 12608 631 19494 14160 8249 10223 21504 12395 432212 13800 1416113 2948 964714 14693 1602715 20506 1108216 1143 902017 13501 401418 1548 21901912216215562020951989721 4189 7958221594010048235151261424 8501 845025 17595 1678426 5913 849527 16394 1042328 7409 698129 6678 1593930 20344 1298731 2510 1458832 17918 665533 6703 1945134 496 421735 7290 576636 10521 892537 20379 1190538 4090 583839 19082 1704040 20233 1235241 19365 1954642 6249 1903043 11037 1919344 19760 1177245 19644 742846 16076 352147 11779 2106248 13062968249 8934 521750 11087 331951 18892 435652 7894 389853 5963 436054 7346 11726555182560956 2412 1729557 9845 2049458 6687 186459 20564 5216018226172071938082662 7073 30653 18252 1343749161156425 10714 101536 11585 90787535994188 9024 9515912061635410 14994 110211 9375 2079612 15964 602713 14789 645214 80021859115 14742 1408916 253 304517 1274 1928618 14777 204419 13920 990020 452 737421 18206 992122 6131 541423 10077 972624 12045 547925 4322 799026 15616 555027 15561 1066128 20718 738729 2518 1880430 8984 26003165161790932 11148 9833 20559 370434 7510 156935 16000 1169236 9147 1030337 16650 19138 15577 1868539 17167 2091740 4256 339141 20092 1721942 9218 505643 18429 847244 12093 2075345 16345 1274846 16023 1109547 5048 1759548 18995 481749 16483 353650 1439 1614851 3661 303952 190101812153 8968 1179354 13427 1800355 5303 308356 531 16668574771672258 5695 796059 3589 14630Tableau 2Adresses des accumulateurs de bits de parité (débit 5/6)0 4362 416 8909 4156 3216 3112 2560 2912 6405 8593 4969 672312479 1786 8978 30114339 9313 6397 2957 7288 5484 6031102172 10175 9009 9889 30914985 7267 4092 8874 56712777 2189 87163 9052 4795 3924 3370 10058 1128 9996 10165 9360 4297 434 51384 2379 7834 4835 2327 9843 804 329 8353 7167 3070 1528 73115 3435 7871348 3693 1876 6585 10340 7144 5870 2084 4052 27806 3917 311134761304 103315939 5199 16111991699 8316 99607 6883 3237 1717 10752 7891 9764 4745 3888 10009 4176 461415678 10587 2195 1689 2968 5420 2580 2883 6496 1116023 1024 44499 3786 8593 2074 3321 5057 1450 3840 5444 6572 3094 9892 151210 8548 1848 10372 4585 7313 6536 6379 1766 9462 2456 5606 997511 8204 10593 7935 3636 3882 394 5968 85612395 7289 9267 997812 7795 74 1633 9542 6867 7352 6417 7568 10623 725 2531911513 7151 2482 4260 5003 10105 7419 9203 6691 8798 2092 8263 375514 3600 570 4527 200 9718 67711995 8902 5446 768 1103 652015 6304 762116 6498 920917 7293 678618 5950 1708198521179320 6174 785421 9773 119022 9517 1026823 2181 934924 1949 556025 1556 55526 8600 382727 5072 105728 7928 354229 3226 37620 7045 24201 9645 26412 2774 24523 5331 20314 9400 75035 1850 2338610456 97747 1692 92768 10037 40389 3964 338102640508711858347312 5582 568313 9523 91614 4107 155915 4506 349116 819141821710192 615718 5668 330519 3449 154020 4766 269721 4069 667522 1117 101623 5619 308524 8483 840025 8255 39426 6338 504227 6174 511928 7203 198929 1781 517401464 35591337642142 7238 673 10595 88314 1221 65135 5300 46526 1429 97497 7878 51318 4435 102849 6331 550710 6662 4941119614 10238128400802513 9156 563014 7067 887815 9027 3415161690 386617 2854 846918 6206 63019 363 545320 4125 700821 1612 670222 9069 9226235767406024 3743 923725 7018 557226 8892 453627 853 606428 8069 589329 20512885010691315313602 4055232817173 2219 92994 1939 789856172066 8544 137471067632408 6672 94899 3170 745710 7868 573111 6121 1073212 4843 913213 580 959114 6267 929015 3009 226816 195 241917 8016 155718 1516 919519 8062 906420 2095 896821 753 732622 6291 383323 2614 784424 2303 64625 2075 61126 4687 36227 8684 994028 4830 206529 7038 13630176978371 3801 168921007023593 3667 99184 1914 69205 4244 5669610245 78217 7648 39448331054889 6346 966610 7088 612211 1291 782712 10592 894513 3609 712014 9168 911215 6203 805216 3330 289517 42641056318 10556 649619 8807 764520 1999 453021 9202 681822 3403 173423 2106 902324 6881388325 3895 217126 4062 642427 3755 953628 4683 213129 7347 8027Tableau 3Adresses des accumulateurs de bits de parité (débit 1/2)54 9318 14392 27561 26909 10219 2534 859755 7263 4635 2530 28130 3033 23830 365156 2473123583 26036 17299 5750 792 916957 5811 2615418653 11551 15447 13685 1626458 12610 11347 28768 2792 3174 29371 1299759 16789 16018 21449 6165 21202 15850 318660 31016 21449 17618 6213 12166 8334 182126122836 14213 11327 5896 718 11727 930862 20912494129966 23634 9013 15587 544463 22207 3983 16904 28534 21415 27524 2591264 25687 450122193 14665 14798 16158 549165 4520 17094 23397 4264 2237016941 2152666 10490 6182 32370 9597 30841 25954 276267 22120 22865 29870 15147 13668 14955 1923568 6689 18408 18346 9918 25746 5443 2064569 29982 12529 13858 4746 3037010023 24828701262 28032 29888 13063 24033 21951786371 6594 29642 3145114831 9509 9335 3155272 1358 6454 16633 20354 24598 624 526573 19529 295 18011 3080 13364 8032 1532374 11981 1510 7960 21462 9129 11370 2574175 9276 29656 4543 30699 20646 21921280507615975 25634 5520 31119 13715 21949 1960577 18688 4608 31755 30165 13103 10706 2922478 21514 23117 12245 26035 31656 256313069979 9674 24966 31285 29908 17042 24588 3185780 21856 27777 29919 27000 14897 11409 712281 29773 23310 263 4877 28622 20545 2209282 15605 565121864 3967 14419 22757 1589683 30145 1759 10139 29223 2608610556 509884 18815 16575 2936 24457 26738 6030 50585 30326 22298 27562 2013126390 6247 2479186 928 29246 21246 12400 15311 32309 1860887 20314 6025 26689 16302 2296 3244 1961388 6237 11943 22851 15642 23857 15112 2094789 26403 25168 19038 18384 8882 12719 7093014567 2496513908 1002102792403241027644 12383 4173513861159186 21327 10467 5288 145798 28158 80699 16583 1109810 16681 2836311 13980 2472512 32169 1798913 10907 276714 21557 381815 26676 1242216 7676 875417 14905 2023218 15719 2464619 31942 858920 19978 2719721 27060 1507122 60712664923 10393 1117624 9597 1337025 70811767726 1433 1951327 26925 901428 19202 890029 18152 3064730 20803 173731 11804 2522132 31683 1778333 29694 934534 12280 2661135 6526 2612236 26165 1124137 7666 2696238 16290 848039 11774 1012040 30051 30426411335 1542442 6865 1774243 31779 1248944 32120 2100145 14508 699646 979 2502447 4554 2189648 7989 2177749 4972 2066150 6612 273051 12742 4418522919459553 19267 20113Tableau 4Adresses des accumulateurs de bits de parité (débit 3/4)0 6385 7901 14611 13389 11200 3252 S243 2504 2722 82173741 11359 2698 357 13824 12772 7244 6752 15310 852 2001 114172 7862 7977 6321 13612 12197 14449 15137 138601708 6399 134443 1560 11804 6975 13292 3646 3812 8772 7306 5795 14327 78664 7626 11407 14599 9689 1628 2113 10809 9283 1230 15241 48705 1610 5699 15876 9446 12515 1400 6303 5411 14181 13925 73586 4059 8836 3405 7853 7992 15336 5970 10368 10278 9675 46517 4441 3963 9153 2109 12683 7459 12030 12221 629 15212 4068 6007 84115771 3497 543 14202 875 9186 623513908 35639 3232 6625 4795 546 978120717312 3399 7250 49321265210 8820 10088 11090 7069 6585 13134 10158 7183 488 7455 923811 1903 10818 119 215 75581104610615 11545 14784 7961 1561912 3655 8736 4917 15874 5129 2134 15944 14768 7150 2692146913 8316 3820 505 8923 6757 806 7957 4216 15589 13244 262214 14463 4852 15733 3041 11193 12860 13673 8152 6551 15108 875815 3149 1198116 13416 690617 13098 1335218 2009 1446019 7207 431420 3312 3945214418 624822 2669 1397523 7571 902324 14172 296725 7271 713826 6135 1367027 7490 1455928 8657 246629 8599 1283430 3470 315231 13917 436532 6024 1373033 10973 1418234 2464 1316735 5281 1504936 1103 184937 2058 106938 9654 60953914311766740 15617 8146414588 1121842 13660 624343 8578 787444 1174126860 1022 12641 12604 99652 8217 27073315611793435415145 6978 1405867922160797 15087 121388 5053 6470912687 1493210 15458 176311 8121 172112 12431 54913 4129 709114 1426 841515 9783 760416 6295 1132917 1409 1206118 8065 9087192918843820 1293 14115213922 13851223851400023 5865 176824 2655 1495725 5565 633226 4303 1263127 11653 1223628 16025 763229 4655 1412830 9584 131233113987 959732 15409 1211033 8754 1549034 7416 1532535 2909 1554936 2995 825737 9406 479138 11111485439 2812 852140 8476147174178201536042 1179 793943 2357 867844 7703 62160 3477 70671 3931 138452 7675 1289931754 81874 7785 14005 9213 58916 2494 77037 2576 79028 4821 156829 10426 1193510 1810 90411 11332 926412 11312 357013 149162650147679784215 6089 13084163938275117 8509 464818 12204 891719 5749 124432012613 443121 1344 401422 8488 1385023 17301489624 14942712625 14983 886326 6578 856427 4947 39628 297 1280529 13878 669230 11857 111863114395 1149332 16145 1225133 13462 742834 14526 1311935 2535 1124336 6465 1269037 6872 933438 153711402339 8101 1018740 11963 484841 15125 611942 8051 1446543 11139 516744 288314521Tableau 5Adresses des accumulateurs de bits de parité (débit 4/5)0 149 11212 5575 6360 12559 8108 8505 408 10026 128281 5237 49010677 4998 3869 3734 3092 3509 7703 103052 8742 5553 2820 7085 12116 10485 564 7795 2972 21573 2699 4304 8350 712 2841 3250 4731 10105 517 75164 12067 1351 11992 12191 11267 5161537 6166 4246 23635 6828 7107 2127 3724 57431104010756 407310113422611259 1216 95261466 10816 940 3744 2815 11506 115737 4549 11507 11181274 11751 5207 785412803 4047 64848 8430 4115 9440 413 4455 2262 7915 12402 8579 70529 3885 9126 5665 4505 2343 253 4707 3742 4166 155610 1704 8936 6775 8639 8179 7954 8234 7850 8883 871311 11716 4344 9087 11264 2274 8832 9147 11930 6054 545512 7323 3970 10329 2170 8262 3854 2087 12899 9497 1170013 4418 1467 2490 5841 817 11453 533 1121711962 525114 1541 4525 7976 3457 9536 7725 3788 2982 6307 599715 11484 2739 402312107 6516 551 2572 6628 8150 985216 6070 17614627 6534 7913 3730 11866 1813 12306 824917 124415489 8748 7837 7660 2102 113412936 6712 1197718 10155 421019 1010 1048320 8900 1025021 10243 1227822 7070 439723 12271388724 119806836259514435626 7137 1028127 11881252628 1969 1147729 30441092130 2236 872431 9104 634032 7342 858233 11675 1040534 6467 1277535 3186 121980 9621 114451748656112431948793 2196 3444 7527 6650510693 24406 6755 27067 5144 59988 11043 80339 4846 4435104157922811 12270 656212 11954 759213 7420 259214 8810 963615 689 543016 920 130417 12531193418 9559 601619312758920 4439 419721 4002 955522 12232 777923 1494 878224 10749 396925 4368 347926 6316 534227 2455 349328 12157 740529 6598 1149530 11805 445531 9625 2090324731232133 3578 260834 8504 184935 4027 11510 5647 49351421918702 10968 80543 6970 54474 3217 56385 8972 6696 5618 124727 1457 12808 8868 38839 8866 122410 8371 597211266440512 3706 324413 6039 584414 7200 328315 1502 1128216 12318 220217 4523 96518 9587 701119 2552 205120 12045 1030621 11070 510422 6627 690623 9889 212124 829 970125 2201 181926 6689 1292527 2139 875728 12004 594829 8704 319130 8171 1093331 6297 711632 616 714633 5142 976134 10377 813835 7616 58110 7285 98631776410867212343 90193 4414 8331434646425 6960 20396 786 30217 710 20868 7423 56019 8120 488510 12385 1199011 9739 10034124241016213 1347 759714 1450 11215 7965 847816 8945 739717 6590 831618 6838 901119 6174 941020 255 11321 6197 583522 12902 384423 4377 350524 5478 867225 4453 213226 9724 138027 12131 1152628 12323 951129 8231 175230 497 9022319288 3080322481751533 2696 26834 4023 1234135 7108 5553Tableau 6Adresses des accumulateurs de bits de parité (débit 3/5)22422 10282 11626 19997 11161 2922 3122 99 5625 17064 827017925087 16218 17015 828 2004125656 418611629 2259917305 22515 646311049 22853 25706 14388 5500 19245 8732 2177 13555 11346 17265 306916581 22225 12563 19717 23577 11555 25496 6853 25403 5218 15925 2176616529 14487 7643 10715 17442 11119 5679 14155 24213 21000 1116 156205340 8636 16693 1434 5635 6516 9482 20189 1066 15013 25361 1424318506 22236 20912 8952 5421 15691 6126 21595 500 6904 13059 68028433 4694 5524 14216 3685 1972125420 9937 23813 9047 25651 1682621500 24814 6344 17382 706413929 40041655212818 8720 5286 220622517 2429 19065 2921 21611 1873 7507 566123006 23128 20543 197771770 4636 2090014931924712340 11008 12966 4471273116445 7916635 14556 18865 22421 22124 12697 9803 25485 7744 18254 11313 900419982 23963 18912 720612500 4382 20067 6177 21007 1195 23547 24837756 11158 14646 20534 3647 17728 11676 11843 12937 4402 8261229449306 24009 10012 110813746 24325 8060 19826 842 8836 2898 50197575 7455 25244 4736 14400 22981 5543 8006 24203 13053 1120 51283482 9270 13059 15825 7453 23747 3656 24585 1654217507 224621467015627 15290 4198 22748 584213395 23918 16985 14929 3726 25350 241572489616365 16423 13461 16615 8107 24741 3604 25904 8716 9604 20365372917245 18448 9862 2083125326 20517 24618 13282 5099 14183 880416455 17646 15376 18194 25528 1777 6066 21855 14372 12517 4488 174901400 8135 23375 20879 8476 4084 12936 25536 22309 16582 6402 2436025119 23586 128 4761 10443 22536 8607 9752 25446 15053 1856 4040.377 21160 13474 5451 17170 5938 10256 11972 2421017833 220471610813075 9648 24546 13150 23867 7309 19798 2988 16858 4825 239501512520526 3553 11525 23366 245217626 19265 20172 18060 24593 13255 155218839 21132 20119 15214 14705 7096 10174 5663 18651 1970012524 140334127 2971 17499 16287 22368 21463 7943 18880 5567 8047 23363 67971065124471 14325 4081 7258 4949 7044 1078 797 22910 20474 431821374 13231 22985 5056 382123718 14178 9978 19030 23594 8895 253586199 22056 7749 13310 3999 23697 16445 22636 5225 22437 24153 94427978 12177 2893 20778 3175 8645 11863 24623 103112576717057 369120473 11294 9914 22815 2574 8439 3699 543124840 21908 16088 182448208 5755 19059 854124924 6454 11234 10492 16406 10831 11436 964916264 11275 24953 2347 12667 19190 7257 7174 24819 2938 2522117493627 5969 13862 1538 23176 6353 2855 17720 2472 7428 573 15036018539186611 10502 300229368107613 12299 78284 15048 133625 18444 246406 20775191757 18970 109718 5329 199829112961865510 15046 2065911 7300 2214012 22029 14477131112974214 13254 1381315 19234 1327316 6079 2112217 22782 582818 19775 424719 16601941320 4403 364921133712585122 22770 2178423 10757 1413124160712161725 6393 372526 597 1996827 5743 808428 6770 954829 4285 175423013568 22599311786461732 23238 1164833 19627 203034 13601 1345835 13740 1732836 25012 1394437 22513 668738 4934 1258739 21197 513340 22705 693841 7534 2463342 24400 1279743 219112571244 12039 114045 24306 102146 14012 2074747 11265 152194846701553149 9417 1435950 2415 650451 24964 2469052 14443 881653 6926129154 6209 2080655 13915 407956 24410 1319657 13505 611758 9869 822059 1570 604460 25780 1738761206712491362 24558 2059163 12402 370264 8314 135765 200711461666 17014 368867 19837 94668 15195 1213669 7758 228087035642925713434 7769Tableau 7Adresses des accumulateurs de bits de parité (débit 8/9)0 6235 2848 322215800 3492 53482 2757 927 903 69614516 47394 1172 3237 62645 1927 2425 36836 3714 6309 24957 3070 6342 71548 2428 613 37619 2906 264 592710 1716 1950 4273114613 6179 349112 4865 3286 600513 1343 5923 352914 4589 4035 213215 1579 3920 673716 1644 1191 599817 1482 2381 46201867916014659619 2738 5918 37860515661661 1504 4356213019043 6027 31874 6718 7595 6240 28706 2343 13117 1039 54658 6617 25139 1588 5222106561535114765205412 5966 689213 1969 3869143571242015 4632 98116 3215 416317 973 311718 3802 619819 3794 39480319661261573 19092 850 403435622 16014 6005 5245 525157836 172 203271875 2475849712919 2566 343010 1249 740112944194812 6528 289913 2243 361614 867 373315 1374 470216 4698 228517 4760 391718 1859 405819 6141 35270 2148 506611306145223198713 3463 10614 5554 66475 5837 3396 5821 49327 6356 4756839304189211309410 1007 49281135841235126982286913 1612 101314 953 496415 4555 441016 4925 484217 5778 60018 6509 241719 1260 49030 3369 30311 3557 32242 3028 5833 3258 4404 6226 66555489510946148168477 4433 19328 2107 16499 2119 206510 4003 638811 6720 362212 3694 452113 1164 705014 1965 36131543316616 2970 179617 4652 321818 1762 477719 573613990 970 25721206265992 4597 48703 1228 69134415910375291623626 395 12267 691145488461822419 4120 428010 5825 474112154555812 3793 547113 5707 159514 1403 32515 6601518316 6369 456917 4846 89618 7092 618419 6764 71270 6358 19511 3117 69602 2710 70623 1133 36044 3694 6575 1355 1106 3329 67367 2505 34078246248069 4216 21410 5348 5619116627624312 2644 507313 4212 508814 3463 388915 5306 47816 4320 612117 3961 112518 5699 119519 6511 7920 3934 277813238 65872111165963 1457 622641446 38855 3907 40436 6839 287371733 56158 5202 42699 3024 472210 5445 637211370182812 4695 160013 680 207414 1801 669015 2669 137716 2463 168117 5972 517118 5728 428419 1696 1459Tableau 8Adresses des accumulateurs de bits de parité (débit 9/10)0 5611 2563 290015220314348132 2481 834 813 6265 4064 426541055 2914 563851734 2182 33156 3342 5678 22467 2185 552 33858 2615 236 53349 1546 1755 384610 4154 5561 314211 4382 2957 540012 1209 5329 317913 1421 3528 606314 1480 1072 539815 3843 1777 436916 1334 2145 416317 2368 5055 2600 6118 54051 2994 43702340516693 4640 55504 1354 39215 117 17136 5425 28667 6047 6838 5616 25829 2108 117910 933 492111 5953 226112 1430 469913 5905 48014 4289 184615 5374 620816 1775 347617 3216 21780416588412896 3744287428013 3423 55794 3404 35525287655156 516 17197 765 36318 5059 14419 5629 59810 5405 47311 4724 521012 155 183213 1689 222914 449 116415 2308 308816 1122 66917 2268 57580 5878 26091782 33592 123142313 4225 20524 4286 35175553131846 1935 45607 1174 1318 3115 9569 3129 108810 5238 444011 5722 428012 3540 375131912782149064432153225111116 6296 2583171457 9030 855 44751 4097 39702 4433 43613 5198 5414114644265 3202 29026 2724 5257 1083 41248 2326 60039 5605 5990104376157911 4407 984121332616313 5359 397514 1907 1854153601574816 6056 326617 3322 40850 1768 324412149 1442 1589 42913 5154 125241855 59395 4820 27066 1475 33607 4266 6938415620189 2103 7521037103853115123 93112 6146 332313 1939 5002145140143715 1263 29316 5949 466517 4548 63800 3171 46901 5204 21142 6384 55653 5722 17574 2805 62645 1202 26166 1018 32447 4018 52898 2257 30679 2483 3073101196532911 649 3918123791458113 5028 380314 3119 350615477943116 3888 551017 4387 40840 5836 16921 5126 10782 5721 616533540 24994 2225 63485 1044 14846 6323 40427 1313 56038 1303 34969 3516 363910 5161 2293114682384512 3045 64313 2818 261614 3267 64915 6236 59316 646 294817 4213 14420 5779 15961 2403 123722217 15143 5609 7164 5155 38585 1517 13126 2554 31587 5280 26438 4990 13539 5648 117010 1152 4366113561536812 3581 1411135647466114 1542 540115 5078 268716316175517 3392 1991 Verfahren nach Anspruch 1, bei dem M = 360 ist und die Reihenindizes von 1-en in der (jM)-ten Spalte betragen, mit j = 0, 1, 2, 3, ..., (kldpc/360) - 1, und zwar von der Paritätsprüf-Matrix und diese gegeben sind bei der j-ten Reihe gemäß einer der folgenden Tabellen 1-8: Tabelle 1Adresse der Paritäts-Bit-Sammler (Rate 2/3)0 10491 16043 506 12226 8065 8226 2767 240 18673 9279 10579 209281 17819 8313 6433 6224 5120 5824 12812 17187 9940 13447 13825 184832 17957 6024 8681 18628 12794 5915 14576 10970 12064 20437 4455 71513 19777 6183 9972 14536 8182 17749 11341 5556 4379 17434 15477 185324 4651 19689 1608 659 16707 14335 6143 3058 14618 17894 20684 53065 9778 2552 12096 12369 15198 16890 4851 3109 1700 18725 1997 158826 486 6111 13743 11537 55917433 15227 14145 1433 3887 17431 124307 20647 14311 11734 4180 8110 5525 12141 15761 18661 18441 10569 81928 3791 14759 15264 19918 10132 9062 10010 12186 10675 9682 19246 54549 19525 9485 7777 19999 8378 9209 3163 20232 6690 16518 716 735310 4588 6709 20202 10905 915 4317 11073 13576 16433 368 3508 2117111 14072 4033 19959 12608 631 19494 14160 8249 10223 21504 12395 432212 13800 1416113 2948 964714 14693 1602715 20506 1108216 1143 902017 13501 401418 1548 219019 12216 2155620 2095 1989721 4189 795822159401004823 515 1261424 8501845025 17595 1678426 5913 849527 16394 1042328 7409 698129 6678 1593930 20344 1298731 2510 1458832 17918 665533 6703 1945134 496 421735 7290 576636 10521 892537 20379 1190538 4090 583839 19082 1704040 20233 1235241 19365 1954642 6249 1903043 11037 1919344 197601177245 19644 742846 16076 352147 11779 2106248 13062 968249 8934 521750 11087 331951 18892 435652 7894 389853 5963 436054 7346 1172655 5182 560956 2412 1729557 9845 2049458 6687 186459 205645216018226172071 9380 82662 7073 30653 182521343749161156425 10714 101536 11585 90787 5359 94188 9024 9515912061635410 14994 110211 9375 2079612 15964 602713 14789 645214 8002 1859115 14742 1408916 253 304517 1274 1928618 14777 204419 13920 990020 452 737421 18206 992122 6131 541423 10077 972624 12045 547925 4322 799026 15616 555027 15561 1066128 20718 738729 2518 1880430 8984 260031 6516 1790932 11148 9833 20559 370434 7510 156935 16000 1169236 9147 1030337 16650 19138 15577 1868539 17167 2091740 4256 339141 20092 17219429218505643 18429 847244 12093 2075345 16345 1274846 16023 1109547 5048 1759548 18995 481749 16483 353650 1439 1614851 3661 303952 19010 1812153 8968 1179354 13427 1800355 5303 308356 531 1666857 4771 672258 5695 796059 3589 14630Tabelle 2Adresse der Paritäts-Bit-Sammler (Rate 5/6)0 4362 416 8909 4156 3216 3112 2560 2912 6405 8593 4969 67231 2479 1786 8978 30114339 9313 6397 2957 7288 5484 6031 102172 10175 9009 9889 3091 4985 7267 4092 8874 5671 2777 2189 87163 9052 4795 3924 337010058 1128 9996 10165 9360 4297 434 51384 2379 7834 4835 2327 9843 804 329 8353 7167 3070 1528 73115 3435 7871 348 3693 1876 6585 10340 7144 5870 2084 4052 27806 3917 3111 3476 1304 10331 5939 5199 1611 1991 699 8316 99607 6883 3237 1717 10752 7891 9764 4745 3888 10009 4176 461415678 10587 2195 1689 2968 5420 2580 2883 6496 111 6023 1024 44499 3786 8593 2074 3321 5057 1450 3840 5444 6572 3094 9892 151210 8548 1848 10372 4585 7313 6536 6379 1766 9462 2456 5606 997511 8204 10593 7935 3636 3882 394 5968 85612395 7289 9267 997812 7795 741633 9542 6867 7352 6417 7568 10623 725 2531 911513 71512482 4260 5003 10105 7419 9203 6691 8798 2092 8263 375514 3600 570 4527 200 9718 67711995 8902 5446 768 1103 652015 6304 762116 6498 920917 7293 678618 5950 170819 8521 179320 6174 785421 9773 119022 9517 1026823 2181 934924 1949 556025 1556 55526 8600 382727 5072 105728 7928 354229 3226 37620 7045 24201 9645 26412 2774 24523 5331 20314 9400 75035 1850 23386 10456 97747 1692 92768 10037 40389 3964 33810 2640 508711 858 347312 5582 568313 9523 91614 4107 155915 4506 349116 8191 418217 10192 615718 5668 330519 3449 154020 4766 2697214069 6675221117 101623 5619 308524 8483 840025 8255 394266338 504227 6174 511928 7203 1989291781 517401464 35591 3376 42142 7238 673 10595 88314 1221 65135 5300 46526 I429 97497787851318 4435 102849 6331550710 6662 494111 9614 1023812 8400 802513 9156 563014 7067 887815 9027 341516 1690 386617 2854 846918 6206 63019 363 545320 4125 700821 1612 670222 9069 922623 5767 406024 3743 923725 7018 557226 8892 453627 853 606428 8069 589329 2051 288501069131531 3602 40552 328 17173 22I9 929941939 789856172066 8544 13747 10676 32408 6672 948993170745710 7868 573111 6121 1073212 4843 913213 580 959114 6267 929015 3009 226816 195 241917 8016 155718 1516 919519 8062 906420 2095 896821 753 732622 6291 383323 2614 784424 2303 64625 2075 61126 4687 36227 8684 994028 4830 206529 7038 13630 1769 78371 3801 168921007023593 3667 99184 1914 69205 4244 56696 10245 78217 7648 39448 3310 54889 6346 966610 7088 612211 1291 782712 10592 894513 3609 7120149168911215 6203 805216 3330 289517 42641056318 10556 649619 8807 764520 1999 453021 9202 681822 3403 173423 2106 902324 6881 388325 3895 217126 4062 642427 3755 953628 4683 213129 7347 8027Tabelle 3Adresse der Paritäts-Bit-Sammler (Rate 1/2)54 9318 14392 2756126909 10219 2534 859755 7263 4635 2530 28130 3033 23830 365156 2473123583 26036 17299 5750 792 916957 5811 2615418653 11551 15447 13685 1626458 12610 11347 28768 2792 3174 29371 1299759 16789 16018 21449 6165 21202 15850 318660 31016 21449 17618 6213 12166 8334 1821261 22836 14213 11327 5896 718 11727 930862 20912494129966 23634 9013 15587 544463 22207 3983 16904 28534 21415 27524 2591264 25687 4501 22193 14665 14798 16158 549165 4520 17094 23397 4264 22370169412152666 10490 6182 32370 9597 30841 25954 276267 22120 22865 29870 15147 13668 14955 1923568 6689 18408 18346 9918 25746 5443 2064569 29982 12529 13858 4746 30370 10023 2482870 1262 28032 29888 13063 24033 21951786371 6594 29642 31451 14831 9509 9335 3155272 1358 6454 16633 20354 24598 624 526573 19529 295 180113080 13364 8032 1532374 11981 1510 7960 21462 9129 11370 2574175 9276 29656 4543 30699 20646 21921 2805076 15975 25634 5520 31119 13715 21949 1960577 18688 4608 31755 30165 13103 10706 2922478 21514 23117 12245 26035 31656 25631 3069979 9674 24966 31285 29908 17042 24588 3185780 21856 27777 29919 270001489711409 712281 29773 23310 263 4877 28622 20545 2209282 15605 5651 21864 3967 14419 22757 1589683 30145 1759 10139 29223 2608610556 509884 18815 16575 2936 24457 26738 6030 50585 30326 22298 27562 20131 26390 6247 2479186 928 29246 21246 1240015311 32309 1860887 20314 6025 26689 16302 2296 3244 1961388 6237 11943 22851 1564223857 15112 2094789 26403 25168 19038 18384 8882 12719 70930 14567 249651 3908 1002 10279 2403241027644 12383 4173513861159186 21327 10467 5288 145798 28158 80699 16583 1109810 16681 2836311 13980 2472512 32169 1798913 10907 276714 21557 381815 26676 1242216 7676 875417 14905 2023218 15719 2464619 31942 858920 19978 2719721 27060 1507122 60712664923 10393 11176249597 1337025 7081 1767726 1433 1951327 26925 901428 19202 890029 18152 306473020803 173731 11804 2522132 31683 1778333 29694 934534 12280 2661135 6526 2612236 26165 1124137 7666 2696238 16290 848039 11774 1012040 30051 3042641 1335 1542442 6865 1774243 31779 1248944 32120 2100145 14508 699646 979 2502447 4554 2189648 7989 2177749 4972 2066150 6612 273051 12742 441852 29194 59553 19267 20113Tabelle 4Adresse der Paritäts-Bit-Sammler (Rate 3/4)0 6385 7901 14611 13389 11200 3252 5243 2504 2722 82173741 11359 2698 357 13824 12772 7244 6752 15310 852 2001 114172 7862 7977 6321 13612 12197 14449 15137 13860 1708 6399 134443 1560 11804 6975 13292 3646 3812 8772 7306 5795 14327 78664 7626 11407 14599 9689 1628 2113 10809 9283 12301524148705 1610 5699 15876 9446 12515 1400 6303 5411 14181 13925 73586 4059 8836 3405 7853 7992 15336 5970 10368 10278 9675 46517 4441 3963 9153 2109 12683 7459 12030 12221 629 15212 4068 6007 8411 5771 3497 543 14202 875 9186 6235 13908 35639 3232 6625 4795 546 9781 20717312 3399 7250 4932 1265210 8820 10088 11090 7069 6585 13134 10158 7183 488 7455 923811 1903 10818 119 215 7558 11046 10615 11545 1478479611561912 3655 8736 4917 15874 5129 2134 15944 14768 7150 2692 146913 8316 3820 505 8923 6757 806 7957 4216 15589 13244 262214 14463 485215733 3041 11193 12860 13673 8152 6551 15108 875815 3149 1198116 13416690617 13098 1335218 2009 1446019 7207 431420 3312 394521 4418 624822 2669 1397523 7571 902324 14172296725 7271 713826 6135 1367027 7490 1455928 8657 246629 8599 1283430 3470 315231 13917436532 6024 1373033 10973 1418234 2464 1316735 5281 1504936 1103 184937 2058 106938 9654 609539 14311766740 15617 814641 4588 1121842 13660 624343 8578 787444 1174126860 1022 12641 12604 99652 8217 27073 3156 117934 354 15145 6978 140586 7922 160797 15087 121388 5053 64709 12687 1493210 15458 176311 8121 172112 12431 54913 4129 709114 1426 841515 9783 760416 6295 1132917 1409 1206118 8065 908719 2918 843820 1293 1411521 3922 1385122 3851400023 5865 176824 2655 1495725 5565 633226 4303 1263127 11653 1223628 16025 763229 4655 1412830 9584 1312331 13987 959732 15409 1211033 8754 1549034 7416 1532535 2909 1554936 2995 825737 9406 479138 11111 485439 2812 852140 8476 1471741 7820 1536042 1179 793943 2357 867844 7703 62160 3477 70671 3931 138452 7675 128993 1754 81874 7785 14005 9213 58916 2494 77037 2576 79028 4821 156829 10426 1193510 1810 90411 11332 92641211312357013 14916 265014 7679 784215 6089 1308416 3938 275117 8509 464818 12204 891719 5749 1244320 12613 443121 1344 401422 8488 1385023 17301489624 14942 712625 14983 886326 6578 856427 4947 39628 297 1280529 13878 669230 11857 1118631 14395 1149332 16145 1225133 13462 742834 14526 1311935 2535 1124336 6465 1269037 6872 933438 153711402339 8101 1018740 11963 484841 15125 611942 8051 1446543 11139 516744 2883 14521Tabelle 5Adresse der Paritäts-Bit-Sammler (Rate 4/5)0 14911212 5575 6360 12559 8108 8505 408 10026 128281 5237 49010677 4998 3869 3734 3092 3509 7703 103052 8742 5553 2820 7085 12116 10485 564 7795 2972 21573 2699 4304 8350 712 2841 3250 4731 10105 517 75164 12067 1351 11992 12191 11267 5161537 6166 4246 23635 6828 7107 2127 3724 5743 11040 10756 4073 101134226 11259 1216 9526 1466 10816 940 3744 2815 11506 115737 4549 11507 1118 1274 11751 5207 7854 12803 4047 64848 8430 4115 9440 413 4455 2262 7915 12402 8579 70529 3885 9126 5665 4505 2343 253 4707 3742 4166 155610 1704 8936 6775 8639 8179 7954 8234 7850 8883 871311 11716 4344 908711264 2274 8832 9147 11930 6054 545512 7323 3970 10329 2170 8262 3854 2087 12899 9497 1170013 4418 1467 2490 5841 817 11453 533 11217 11962 525114 15414525 7976 3457 9536 7725 3788 2982 6307 599715 11484 2739 4023 12107 6516 551 2572 6628 8150 985216 6070 1761 4627 6534 7913 3730 11866 1813 12306 824917 12441 5489 8748 7837 7660 2102 11341 2936 6712 1197718 10155 421019 1010 1048320 8900 1025021 10243 1227822 7070 439723 12271 388724 11980 683625 9514 435626 7137 1028127 11881 252628 1969 1147729 3044 1092130 2236 872431 9104 634032 7342 858233 11675 1040534 6467 1277535 3186 121980 9621 14451748656112 4319 48793 2196 3444 7527 66505 10693 24406 6755 27067 5144 599881104380339 4846 4435104157922811 12270 656212 11954 759213 7420 259214 8810 963615 689 543016 920130417 1253 1193418 9559 601619312758920 4439 419721 4002 955522 12232 777923 1494 878224 10749 396925 4368 347926 6316 534227 2455 349328 12157 740529 6598 1149530 11805 445531 9625 209032 4731 232133 3578 260834 8504 184935 4027 11510564749351 4219 18702 10968 80543 6970 54474 3217 56385 8972 6696 5618 124727 1457 12808 8868 38839 8866 122410 8371 597211 266 440512 3706 3244136039584414 7200 328315 1502 1128216 12318 220217 4523 96518 9587 701119 2552 205120 12045 1030621 11070 510422 6627 690623 9889 212124 829 970125 2201 181926 6689 1292527 2139 875728 12004 594829 8704 319130 8171 1093331 62977116326167146335142976134 10377 813835 7616 58110 7285 98631776410867212343 90193441483314 3464 6425 6960 20396 786 30217 710 20868 7423 56019 8120 488510 12385 1199011 9739 10034124241016213 1347 759714 1450 11215 7965 847816 8945 7397176590831618 6838 901119 6174 94102025511321 6197 583522 12902 384423 4377 350524 5478 867225 4453 213226 9724 138027 12131 1152628 12323 9511298231175230 497 9022319288308032 2481 751533 2696 26834 4023 123413571085553Tabelle 6Adresse der Paritäts-Bit-Sammler (Rate 3/5)22422 1028211626 19997 1 1161 2922 3122 99 5625 17064 827017925087 16218 17015 828 2004125656 4186 11629 22599 17305 22515 646311049 22853 25706 14388 5500 19245 8732 2177 13555 11346 17265 306916581 22225 12563 19717 23577 11555 25496 6853 25403 5218 15925 2176616529 14487 7643 10715 1744211119 5679 14155 24213 21000 1116156205340 8636 16693 1434 5635 6516 9482 20189 1066 15013 25361 1424318506 22236 20912 8952 5421 15691 6126 2I595 500 6904 13059 68028433 4694 5524 14216 3685 19721 25420 9937 23813 9047 25651 1682621500 24814 6344 17382 706413929 40041655212818 8720 5286 220622517 2429 19065 2921 216111873 7507 5661 23006 23128 20543 197771770 4636 2090014931 9247 12340 11008 12966 44712731 16445 7916635 14556 18865 2242122124 12697 9803 25485 7744 18254 11313 900419982 23963 18912 7206 12500 4382 20067 6177 21007 1195 23547 2483775611158 14646 20534 364717728 11676 11843 12937 4402 8261229449306 24009 10012 11081 3746 24325 8060 19826 842 8836 2898 50197575 7455 25244 4736 14400 22981 5543 8006 24203 13053 1120 51283482 9270 13059 15825 7453 23747 3656 24585 16542 17507 22462 1467015627 15290 4198 22748 5842 13395 23918 16985 14929 3726 25350 2415724896 16365 16423 13461 16615 8107 24741 3604 25904 8716 9604 203653729 17245 18448 9862 20831 25326 20517 24618 13282 5099 14183 880416455 17646 15376 18194 25528 1777 6066 21855 14372 12517 4488 174901400 8135 23375 20879 8476 4084 12936 25536 22309 16582 6402 2436025119 23586128 4761 10443 22536 8607 9752 25446 15053 1856 4040377 21160 13474 5451 17170 5938 10256 11972 2421017833 22047 1610813075 9648 24546 13150 23867 7309 19798 2988 16858 4825 23950 1512520526 3553 11525 23366 2452 17626 19265 20172 18060 24593 13255 155218839 21132 20119 15214 14705 7096 10174 5663 18651 19700 12524 140334127 2971 17499 16287 22368 21463 7943 18880 5567 8047 23363 679710651 24471 14325 40817258 4949 7044 1078 797 22910 20474 431821374 13231 22985 5056 3821 23718 14178 9978 19030 23594 8895 253586199 22056 7749 13310 3999 23697 16445 22636 5225 22437 24153 94427978 12177 2893 20778 3175 8645 11863 24623 103112576717057 369120473 11294 9914 22815 2574 8439 3699 5431 24840 21908 16088182448208 5755 19059 8541 24924 6454 11234 10492 16406 10831 11436 964916264 11275 24953 2347 12667 19190 7257 7174 24819 2938 2522117493627 5969 13862 1538 23176 6353 2855 17720 2472 7428 573 150360 18539 186611 10502 30022 9368 107613 12299 78284 15048 133625 18444 246406 20775 191757 18970 109718 5329199829 11296 1865510 15046 2065911 7300 2214012 22029 1447713 11129 74214 13254 1381315 19234 1327316 6079 2112217 22782 582818 19775 424719 1660 1941320 4403 364921 13371 2585122 22770 2178423 10757 1413124 16071 2161725 6393 372526 597 1996827 5743 808428 6770 954829 4285 1754230 13568 2259931 1786 461732 23238 1164833 19627 203034 13601 1345835 13740 1732836 25012 1394437 22513 668738 4934 1258739 21197 513340 22705 693841 7534 2463342 24400 1279743 219112571244 12039 114045 24306 102146 14012 2074747 11265 1521948 46701553149 94171435950 2415 650451 24964 246905214443 881653 6926 129154 6209 2080655 13915 407956 244101319657 13505 611758 9869 822059 1570 604460 25780 1738761206712491362 24558 2059163 12402 370264 8314 135765 20071 146166617014 368867 19837 94668 15195 1213669 7758 2280870 3564 292571 3434 7769Tabelle 7Adresse der Paritäts-Bit-Sammler (Rate 8/9)0 6235 2848 32221 5800 3492 53482 2757 927 903 69614516 47394 1172 3237 62645 1927 2425 36836 3714 6309 24957 3070 6342 71548 2428 613 37619 2906 264 592710 1716 1950 4273114613 6179 349112 4865 3286 600513 1343 5923 352914 4589 4035 213215 1579 3920 673716 1644 1191 599817 1482 2381 462018 6791 6014 659619 2738 5918 37860 5156 61661 1504 4356213019043 6027 31874 6718 7595 6240 28706 2343 13117 1039 54658 6617 25139 1588 522210 6561 535114765205412 5966 689213 1969 386914 3571 242015 4632 98116 3215 416317 973 311718 3802 619819 3794 39480319661261 573 19092 850 40343 562216014 6005 5245 52515783617220327 1875 2475849712919 2566 343010 1249 74011 2944 194812 6528 289913 2243 361614 867 373315 1374 470216 4698 228517 4760 391718 1859 405819 6141 35270 2148 50661 1306 1452 2319 8713 3463 10614 5554 66475 5837 3396 5821 49327 6356 47568 3930 4189 211 309410 1007 492811 3584 123512 6982 286913 1612 101314 953 4964I5 4555 441016 4925 484217 5778 60018 6509 241719 1260 49030 3369 30311 3557 32242 3028 5833 3258 4404 6226 66555 4895 10946 1481 68477 4433 19328 2107 164992119206510 4003 638811 6720 362212 3694 452113 1164 705014 1965 361315 4331 6616 2970 179617 4652 321818 1762 477719 57361399097025721 2062 65992 4597 48703 1228 69134 4159 10375 2916 23626 395 12267 691145488 4618 224194120428010 5825 474112154555812 3793 547113 5707 159514 1403 32515 6601518316 6369 456917 4846 89618 7092 618419 6764 71270 6358 19511 3117 69602 2710 70623113336044 3694 6575 1355 1106 3329 67367 2505 34078 2462 48069 4216 21410 5348 561911 6627 624312 2644 507313 4212 508814 3463 388915 5306 47816 4320 6121173961112518 5699 119519 6511 7920 3934 277813238 658721111 65963 1457 622641446 38855 3907 40436 6839 287371733 56158 5202 42699 3024 472210 5445 637211370182812 4695 160013 680 207414 1801 669015 2669 137716 2463 168117 5972 517118 5728 428419 1696 1459Tabelle 8Adresse der Paritäts-Bit-Sammler (Rate 9/10)0 5611 2563 290015220 3143 48132 2481 834 813 6265 4064 42654 1055 2914 563851734 2182 33156 3342 5678 22467 2185 552 33858 2615 236 533491546 1755 384610 4154 5561 314211 4382 2957 540012 1209 5329 317913 1421 3528 606314 1480 1072 539815 3843 1777 436916 1334 2145 416317 2368 5055 2600 6118 54051 2994 43702 3405 16693 4640 55504 1354 39215 117 17136 5425 28667 6047 6838 5616 258292108117910 933 492111 5953 226112 1430 469913 5905 48014 4289 184615 5374 620816 1775 3476I7 3216 21780 4165 88412896 3744287428013 3423 55794 3404 3552528765515651617197 765 36318 5059 14419 5629 59810 5405 47311 4724 521012 155 183213 1689 222914 449 116415 2308 308816112266917 2268 57580 5878 26091 782 33592 1231 42313 4225 20524 4286 35175 5531 31846 1935 45607 1174 1318 3115 9569 3129 108810 5238 444011 5722 428012 3540 37513 191 278214 906 443215 3225 111116 6296 258317 1457 9030 855 44751 4097 39702 4433 43613 5198 5414 1146 44265 3202 29026 2724 5257 1083 41248 2326 60039 5605 599010 4376 157911 4407 98412 1332 616313 5359 397514 1907 185415 3601 574816 6056 326617 3322 40850 1768 32441 2149 1442 1589 42913 5154 12524 1855 59395 4820 27066 1475 33607 4266 6938415620189 2103 75210 3710 385311 5123 931126146332313 1939 5002145140143715 1263 293165949466517454863800317146901 5204 21142 6384 55653 5722 17574 2805 62645 1202 26166 1018 32447 4018 52898 2257 30679 2483 307310 1196 532911649 391812 3791 458113 5028 380314 3119 350615 4779 43116 3888 551017 4387 40840 5836 169215126 10782 5721 61653 3540 24994 2225 63485 1044 14846 6323 40427 1313 56038 1303 34969 3516 363910 5161 2293114682384512 3045 64313 2818 261614 3267 64915 6236 59316 646 294817 4213 14420 5779 15961 2403 12372 2217 15143 5609 7164 5155 38585 1517 13126 2554 31587 5280 26438 4990 13539 5648 117010 1152 4366113561536812 3581 141113 5647 466114 1542 540115 5078 268716316175517 3392 1991
- 10A method according to claim 9, wherein the row indices of 1's in other column indices m, m modulo 360 ≠0 and m < kldpc, of the parity check matrix are given by {x + m mod 360 x q} mod (nldpc - kldpc), where q = 60 for rate 2/3 LDPC code, q = 30 for rate 5/6 LDPC code, q = 90 for rate 1/2 LDPC code, q = 45 for rate 3/4 LDPC code, q = 36 for rate 4/5 LDPC code, q = 72 for rate 3/5 LDPC code, q = 20 for rate 8/9 LDPC code, q = 18 for rate 9/10 LDPC code, wherein x denotes an entry at the jth row of Tables 1-8, where j = int{m/360}, and int{.} denotes the integer function, the row indices of 1's in the column index m = kldpc + j, j = 0, 1, 2, ..., nldpc - kldpc - 2, of the parity check matrix being given by j and j+1, the row index of 1 in the column index nldpc - 1 of the parity check matrix being given by nldpc - kldpc - 1. Procédé selon la revendication 9, dans lequel les indices de rangée de 1 dans d'autres colonnes d'indice m, m modulo 360 # 0 et m < kldpc de la matrice de vérification de parité sont donnés par {x + m mod 360 x q} mod (nldpc - kldpc), où q = 60 pour un code LDPC de débit 2/3, q = 30 pour un code LDPC de débit 5/6, q = 90 pour un code LDPC de débit 1/2, q = 45 pour un code LDPC de débit 3/4, q = 36 pour un code LDPC de débit 4/5, q = 72 pour un code LDPC de débit 3/5, q = 20 pour un code LDPC de débit 8/9, q = 18 pour un code LDPC de débit 9/10, où x dénote un terme dans la jième rangée des tableaux 1 à 8, où j = int {m/360} et int {.} dénote la fonction de production d'un entier, les indices de rangée des 1 dans la colonne d'index m = kldpc+j, j = 0, 1, 2, ..., nldpc - kldpc - 2 de la matrice de vérification de parité étant fournis par j et j+1, l'index de rangée de 1 dans la colonne d'index nldpc-1 de la matrice de vérification de parité étant donné par nldpc - kldpc -1. Verfahren nach Anspruch 9, bei dem die Reihenindizes der 1-en in anderen Spaltenindizes m, m Modulo 360 ≠ 0 und m < kldpc der Paritätsprüf-Matrix gegeben sind durch {x + m mod360 x q} mod (nldpc - kldpc), worin q = 60 für die Rate gemäß 2/3 LDPC Code, q = 30 für die Rate entsprechend 5/6 LDPC Code, q = 90 entsprechend der Rate 1/2 LDPC Code, q = 45 für die Rate entsprechend 3/4 LDPC Code, q = 36 für die Rate entsprechend 4/5 LDPC Code, q = 72 für die Rate entsprechend 3/5 LDPC Code, q = 20 für die Rate entsprechend 8/9 LDPC Code, q = 18 für die Rate entsprechend 9/10 LDPC Code, worin x einen Eintrag an der j-ten Reihe der Tabellen 1 bis 8 bezeichnet, wo j = int{m/360} und int{.} die Ganzzahlfunktion bezeichnet, die Reihenindizes der 1-en in dem Spaltenindex m = kldpc + j, wobei j = 0, 1, 2, ...;nldpc - kldpc -2 der Paritätsprüf-Matrix gegeben ist durch j und j+1, der Reihenindex von 1 in dem Spaltenindex nldpc - 1 der Paritätsprüf-Matrix gegeben ist durch nldpc - kldpc- 1.
- 11A computer-readable medium bearing instructions for encoding, said instructions, being arranged, upon execution, to cause one or more processors to perform the method of any one of claims 1 to 10. Computerlesbares Medium, welches Instruktionen zum Codieren enthält, wobei die Instruktionen nach der Ausführung so angeordnet werden, um einen oder mehrere Prozessoren zu veranlassen das Verfahren nach einem der Ansprüche 1 bis 10 durchzuführen. Support lisible par ordinateur portant des instructions de codage, lesdites instructions étant conçues, lors de leur exécution, pour faire exécuter par un ou plusieurs processeurs le procédé selon l'une quelconque des revendications 1 à 10.
- 12An encoder for generating Low Density Parity Check (LDPC) codewords, comprising:memory (1605, 1607) storing information representing a structured parity check matrix of the LDPC codes, the information being organized in tabular form, each row of the information in memory representing occurrences of one values within a first column of a group of columns of the parity check matrix, the rows corresponding to groups of columns of the parity check matrix, and subsequent columns within each of the groups being derived according to a predetermined operation;means for retrieving the stored information representing the parity check matrix to output an LDPC coded signal;andmeans for initializing the parity bit accumulators to zero, wherein the first information bit with index jM of the jth group of M information bits is accumulated in the parity bit accumulator at the specified address i if the ith entry in (jM)th column of the parity check matrix is 1, where j = 0, 1, 2, 3, ..., kldpc/M-1,characterized by: means for accumulating each of the remaining (M-1) information bits with index m = jM+1, jM+2, jM+3, ..., (j+1)M-1 of the jth group in one or more parity bit accumulators, related to each parity bit accumulator in which the first information bit with index jM in the group was accumulated, at an address {x + m mod M x q} mod (nldpc- kldpc), where nldpc represents codeword size, kldpc represents information block size, x denotes the address of each parity bit accumulator at which the first information bit with index jM in the group was accumulated, and q is a code rate dependent constant;andmeans for performing operations, after all of the information bits are exhausted, starting with i = 1 according to pi = pt ⊕ pi-l, i = 1, 2, ... , nldpc - kldpc - 1 to obtain final parity bits pi, i = 0, 1, ... , nldpc - kldpc-1, wherein pi denotes the contents of the parity bit accumulator at address i. Codeur destiné à produire des mots de code LDPC (pour « Low Density Parity Check »), comprenant : une mémoire (1605, 1607) stockant des informations représentant une matrice de vérification de parité structurée des codes LDPC, les informations étant agencées sous la forme d'un tableau, chaque rangée d'informations en mémoire représentant les occurrences de valeurs 1 dans une première colonne sur un groupe de colonnes de la matrice de vérification de parité, les rangées correspondant à des groupes de colonnes de la matrice de vérification de parité et des colonnes suivantes, dans chacun des groupes, étant dérivées selon une opération prédéterminée ;un moyen destiné à obtenir les informations stockées représentant la matrice de vérification de parité afin de produire en sortie un signal codé LDPC ;etun moyen destiné à initialiser à zéro les accumulateurs de bits de parité, le premier bit d'information d'index jM du jième groupe de M bits d'informations étant accumulé dans l'accumulateur de bits de parité à l'adresse spécifiée i si le iième terme dans la (jM)ième colonne de la matrice de vérification de parité est 1, avec j = 0, 1, 2, 3, ... , kldpc/M-1 ,caractérisé par : un moyen destiné à accumuler chacun des (M-1) bits d'information restants, d'index m = jM+1, jM+2, jM+3, ..., (j+1) M-1 du jième groupe dans un ou plusieurs accumulateurs de bits de parité, liés à chaque accumulateur de bits de parité dans lequel a été accumulé le premier bit d'information d'index jM dans le groupe, à une adresse {x+m mod M x q} mod (nldpc - kldpc), où nldpc représente la taille du mot de code, kldpc représente la taille du bloc d'informations, x dénote l'adresse de chaque accumulateur de bits de parité dans lequel a été accumulé le premier bit d'information d'index jM dans le groupe et q est une constante dépendant du débit de code ;etun moyen destiné à exécuter des opérations, après que tous les bits d'information sont consommés, en commençant par i = 1, selon pi = pi ⊕ pi-1, pour i = 1, 2, ... , nldpc - k1dpc -1, pour obtenir des bits de parité finals pi, pour i = 0, 1, ... , n1dpc - k1dpc -1, où pi dénote le contenu de l'accumulateur de bits de parité à l'adresse i. Codierer zum Erzeugen von Low Density Parity Check (LDPC) Codewörtern (Paritätsprüf-Codewörter niedriger Dichte), der folgendes aufweist: einen Speicher (1605, 1607), der Informationen speichert, die eine strukturierte Paritätsprüf-Matrix der LDPC Codes repräsentieren, wobei die Informationen in einer Tabellenform organisiert sind, jede der Reihe der Informationen in dem Speicher das Auftreten von einem von Werten innerhalb einer ersten Spalte einer Gruppe von Spalten der Paritätsprüf-Matrix repräsentiert, die Reihen den Gruppen von Spalten der Paritätsprüf-Matrix entsprechen und nachfolgende Spalten innerhalb jeder der Gruppen in Einklang mit einer vorbestimmten Operation ableitbar sind;eine Einrichtung zum Wiederauffinden der gespeicherten Informationen, welche die Paritätsprüf-Matrix wiedergeben, umein LDPC codiertes Signal auszugeben;undeine Einrichtung zum Initialisieren von Paritätsbit-Sammlern auf Null, wobei das erste Informationsbit mit dem Index jM der j-ten Gruppe der M Informationsbits in dem Paritätsbit-Sammler an der spezifischen Adresse i gesammelt wird, wenn der i-te Eintrag in der (jM)-ten Spalte der Paritätsprüf-Matrix gleich 1 ist, wobei gilt j = 0, 1, 2, 3, ..., kldpc/M-1,gekennzeichnet durcheine Einrichtung zum Sammeln von jedem der verbleibenden (M-1) Informationsbits mit dem Index m = jM+1, jM+2, jM+3, ..., (j+1)M-1 der j-ten Gruppe in einem oder mehreren Paritätsbit-Sammlern, die auf jeden Paritätsbit-Sammler bezogen sind, in welchem das erste Informationsbit mit dem Index jM in der Gruppe angesammelt worden war, und zwar bei einer Adresse {x - m mod M x q} mod (nldpc - kldpc), worin nldpc die Codewortgröße repräsentiert, kldpc die Informationsblockgröße repräsentiert, x die Adresse von jedem Paritätsbit-Sammler bezeichnet, an welchem das erste Informationsbit mit dem Index jM in der Gruppe gesammelt worden war, und wobei q eine Coderaten unabhängige Konstante ist;undeine Einrichtung zur Durchführung von Operationen nachdem alle Informationsbits ausgeschöpft worden sind, beginnend mit i = 1 entsprechend zu pi = p1 ⊕ pi-1, i = 1, 2, ..., nldpc - kldpc - 1, um die endgültigen Paritätsbits pi zu erhalten, wobei i = 0, 1, ..., nldpc - kldpc - 1 ist, wobei pi die Inhalte des Paritätsbit-Sammlers an der Adresse i bezeichnet.
- 13An encoder according to claim 12, wherein the predetermined operation specifies a cyclic shift by q positions on the first column of each of the group of columns. Codeur selon la revendication 12, dans lequel l'opération prédéterminée désigne un décalage cyclique de q positions sur la première colonne de chaque groupe de colonnes. Codierer nach Anspruch 12, bei dem die vorbestimmte Operation eine zyklische Verschiebung um q Positionen der ersten Spalte und jeder Gruppe der Spalten spezifiziert.
- 14An encoder according to claim 12, wherein M = 360:Codeur selon la revendication 12, dans lequel M = 360. Codierer nach Anspruch 12, bei dem M = 360 ist.
- 15An encoder according to claim 12, wherein the code dependent constant q is 60, 30, 90, 45, 36, 72, 20, and 18 for code rates 2/3, 5/6, 1/2, 3/4, 4/5, 3/5, 8/9, and 9/10, respectively. Codeur selon la revendication 12, dans lequel la constante dépendant du code q est de 60, 30, 90, 45, 36, 72, 20 et 18 pour des débits de code 2/3, 5/6, 1/2, 3/4, 4/5, 3/5, 8/9 et 9/10, respectivement. Codierer nach Anspruch 12, bei dem die codeunabhängige Konstante q gleich 60, 30, 90, 45, 36, 72, 20 und 18 für die Coderaten von 2/3. bzw. 5/6 bzw. 1/2 bzw. 3/4 bzw. 4/5 bzw. 3/5 bzw. 8/9 bzw. 9/10 ist.
- 16An encoder according to claim 12, wherein the LDPC coded signal is modulated according to a signal constellation that includes one of 8-PSK Phase Shift Keying, 16-QAM Quadrature Amplitude Modulation, QPSK Quadrature Phase Shift Keying, 16-APSK Amplitude Phase Shift Keying and 32-APSK. Codeur selon la revendication 12, dans lequel le signal codé LDPC selon une constellation de signaux comprenant l'un des mécanismes suivants:8-PSK (pour « Phase Shift Keying »), 16-QAM (pour « Quadrature Amplitude Modulation »), QPSK (pour « Quadrature Phase Shift Keying »), 16-APSK (pour « Amplitude Phase Shift Keying ») ou 32-APSK. Codierer nach Anspruch 12, bei dem das LDPC-codierte Signal entsprechend einer Signalkonstellation moduliert ist, die eine 8-PSK Phasenverschiebungs-Verschlüsselung, eine 16-QAM Quadraturamplitudenmodulation, eine QPSK Quadraturphasenverschiebungs-Verschlüsselung, eine 16-APSK Amplitudenphasenverschiebungs-Verschlüsselung und eine 32-APSK enthält.
- 17An encoder according to claim 12, further comprising:a Bose Chaudhuri Hocquenghem (BCH) encoder,wherein the information bits are obtained from the BCH encoder which is configured to encode an input signal using BCH codes. Codeur selon la revendication 12, comprenant en outre : un codeur de Bose Chaudhuri Hocquenghem (BCH),dans lequel les bits d'informations sont obtenus du codeur BCH qui est configuré pour coder un signal d'entrée en utilisant des codes BCH. Codierer nach Anspruch 12, ferner mit: einem Bose Chaudhuri Hocquenghem (BCH) Codierer,wobei die Informationsbits von dem BCH Codierer erhalten werden, der so konfiguriert ist, um ein Eingangssignal unter Verwendung von BCH Codes zu codieren.
- 18An encoder according to claim 17, wherein the number of redundant BCH bits is nBCH - kBCH = 16*t, wherein t represents error correcting capability of the BCH code, nBCH is codeword size of the BCH code, and kBCH is information block size of the BCH code. Codeur selon la revendication 17, dans lequel le nombre de bits BCH redondants est nBCH - kBCH = 16*t, où t représente la capacité de correction d'erreur du code BCH, nBCH est la taille du mot de code du code BCH et kBCH est la taille du bloc d'informations du code BCH. Codierer nach Anspruch 17, bei dem die Zahl der redundanten BCH Bits gleich ist nBCH - kBCH = 16*t ist, wobei t eine Fehlerkorrekturfähigkeit des BCH Codes repräsentiert, nBCH die Codewortgröße des BCH Codes repräsentiert, und wobei kBCH die Informationsblockgröße des BCH Codes repräsentiert.
- 19An encoder according to claim 17, wherein the error correction capability of the BCH code is 12 bits when used in concatenation with rate 1/2, 3/4, 4/5 and 3/5 LDPC codes, is 10 bits when used in concatenation with rate 2/3 and 5/6 LDPC codes, and is 8 bits when used in concatenation with rate 8/9 and 9/10 LDPC codes. Codeur selon la revendication 17, dans lequel la capacité de correction d'erreur du code BCH est de 12 bits lorsqu'il est utilisé en concaténation avec des codes LDPC à débit de 1/2, 3/4, 4/5 et 3/5, est de 10 bits lorsqu'il est utilisé en concaténation avec des codes LDPC à débit de 2/3 et de 5/6 et est de 8 bits lorsqu'il est utilisé en concaténation avec des codes LDPC à débit de 8/9 et 9/10. Codierer nach Anspruch 17, bei dem die Fehlerkorrekturfähigkeit des BCH Codes 12 Bits beträgt, wenn dieser in einer Konzentration mit einer Rate von 1/2, ¾, 4/5 und 3/5 LDPC Codes verwendet wird, bei 10 Bits liegt, wenn dieser in einer Konzentration entsprechend der Rate 2/3 und 5/6 LDPC Codes verwendet wird, und 8 Bits beträgt, wenn dieser in einer Konzentration mit einer Rate von 8/9 und 9/10 LDC Codes verwendet wird.
- 20A transmitter for transmitting Low Density Parity Check (LDPC) codewords, comprising the encoder of any one of claims 12 to 19. Sender zum Senden von Low Density Parity Check (LDPC) Codeworten (Paritätsprüf-Codeworten niedriger Dichte), welcher einen Codierer nach einem der Ansprüche 12 bis 19 enthält. Émetteur destiné à émettre des mots de code LDPC(pour « Low Density Parity Check »), comprenant le codeur selon l'une quelconque des revendications 12 à 19.
Independent claims20
103 paragraphs in 5 sections, as filed
FIELD OF THE INVENTION
The present invention relates to communication systems, and more particularly to coded systems.
BACKGROUND OF THE INVENTION
Communication systems employ coding to ensure reliable communication across noisy communication channels. These communication channels exhibit a fixed capacity that can be expressed in terms of bits per symbol at certain signal to noise ratio (SNR), defining a theoretical upper limit (known as the Shannon limit). As a result, coding design has aimed to achieve rates approaching this Shannon limit. One such class of codes that approach the Shannon limit is Low Density Parity Check (LDPC) codes.
Traditionally, LDPC codes have not been widely deployed because of a number of drawbacks. One drawback is that the LDPC encoding technique is highly complex. Encoding an LDPC code using its generator matrix would require storing a very large, non-sparse matrix. Additionally, LDPC codes require large blocks to be effective; consequently, even though parity check matrices of LDPC codes are sparse, storing these matrices is problematic.
From an implementation perspective, a number of challenges are confronted. For example, storage is an important reason why LDPC codes have not become widespread in practice. Also, a key challenge in LDPC code implementation has been how to achieve the connection network between several processing engines (nodes) in the decoder. Further, the computational load in the decoding process, specifically the check node operations, poses a problem.
Therefore, there is a need for an LDPC communication system that employs simple encoding and decoding processes. There is also a need for using LDPC codes efficiently to support high data rates, without introducing greater complexity. There is also a need to improve performance of LDPC encoders and decoders. There is also a need to minimize storage requirements for implementing LDPC coding. There is a further need for a scheme that simplifies the communication between processing nodes in the LDPC decoder.
[06a] Vasic B., "Kirkman systems and their application in perpendicular magnetic recording" (IEEE Transactions on Magnetics, vol. 38, no. 4, July 2002) describes using structured parity check matrices of LPDC codes and encoding processes using the structured parity check matrices. Information bits are accumulated in parity bit accumulators wherein each parity bit corresponds to one parity bit accumulator.
<b>[06b]</b> WO-A2-02/099976, published on 12th December 2002, describes using structured parity check matrices of LPDC codes and encoding processes using the structured parity check matrices. Information bits are accumulated in parity bit accumulators wherein each parity bit corresponds to one parity bit accumulator.
SUMMARY OF THE INVENTION
These and other needs are addressed by the present invention which is defined in the appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
FIG. 1 is a diagram of a communications system configured to utilize Low Density Parity Check (LDPC) codes, according to an embodiment of the present invention;
FIGs. 2A and 2B are diagrams of exemplary LDPC encoders deployed in the transmitter of FIG. 1;
FIG. 3 is a diagram of an exemplary receiver in the system of FIG. 1;
FIG. 4 is a diagram of a sparse parity check matrix, in accordance with an embodiment of the present invention;
FIG. 5 is a diagram of a bipartite graph of an LDPC code of the matrix of FIG. 4;
FIG. 6 is a diagram of a sub-matrix of a sparse parity check matrix, wherein the sub-matrix contains parity check values restricted to the lower triangular region, according to an embodiment of the present invention;
FIG. 7 is a graph showing performance between codes utilizing unrestricted parity check matrix (H matrix) versus restricted H matrix having a sub-matrix as in FIG. 6;
FIGs. 8A and 8B are, respectively, a diagram of a non-Gray 8-PSK modulation scheme, and a Gray 8-PSK modulation, each of which can be used in the system of FIG. 1;
FIG. 9 is a graph showing performance between codes utilizing Gray labeling versus non-Gray labeling;
FIG. 10 is a flow chart of the operation of the LDPC decoder using non-Gray mapping, according to an embodiment of the present invention;
FIG. 11 is a flow chart of the operation of the LDPC decoder of FIG. 3 using Gray mapping, according to an embodiment of the present invention;
FIGs. 12A-12C are diagrams of the interactions between the check nodes and the bit nodes in a decoding process, according to an embodiment of the present invention;
FIGs. 13A and 13B are flowcharts of processes for computing outgoing messages between the check nodes and the bit nodes using, respectively, a forward-backward approach and a parallel approach, according to various embodiments of the present invention;
FIGs. 14A-14 are graphs showing simulation results of LDPC codes generated in accordance with various embodiments of the present invention;
FIGs. 15A and 15B are diagrams of the top edge and bottom edge, respectively, of memory organized to support structured access as to realize randomness in LDPC coding, according to an embodiment of the present invention; and
FIG. 16 is a diagram of a computer system that can perform the processes of encoding and decoding of LDPC codes, in accordance with embodiments of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT
A system, method, and software for efficiently decoding structured Low Density Parity Check (LDPC) codes are described. In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It is apparent, however, to one skilled in the art that the present invention may be practiced without these specific details or with an equivalent arrangement. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the present invention.
FIG. 1 is a diagram of a communications system configured to utilize Low Density Parity Check (LDPC) codes, according to an embodiment of the present invention. A digital communications system 100 includes a transmitter 101 that generates signal waveforms across a communication channel 103 to a receiver 105. In this discrete communications system 100, the transmitter 101 has a message source that produces a discrete set of possible messages; each of the possible messages has a corresponding signal waveform. These signal waveforms are attenuated, or otherwise altered, by communications channel 103. To combat the noise channel 103, LDPC codes are utilized.
The LDPC codes that are generated by the transmitter 101 enable high speed implementation without incurring any performance loss. These structured LDPC codes output from the transmitter 101 avoid assignment of a small number of check nodes to the bit nodes already vulnerable to channel errors by virtue of the modulation scheme (e.g., 8-PSK).
Such LDPC codes have a parallelizable decoding algorithm (unlike turbo codes), which advantageously involves simple operations such as addition, comparison and table look-up. Moreover, carefully designed LDPC codes do not exhibit any sign of error floor.
According to one embodiment of the present invention, the transmitter 101 generates, using a relatively simple encoding technique, LDPC codes based on parity check matrices (which facilitate efficient memory access during decoding) to communicate with the receiver 105. The transmitter 101 employs LDPC codes that can outperform concatenated turbo+RS (Reed-Solomon) codes, provided the block length is sufficiently large.
FIGs. 2A and 2B are diagrams of exemplary LDPC encoders deployed in the transmitter of FIG. 1. As seen in FIG. 2A, a transmitter 200 is equipped with an LDPC encoder 203 that accepts input from an information source 201 and outputs coded stream of higher redundancy suitable for error correction processing at the receiver 105. The information source 201 generates <i>k</i> signals from a discrete alphabet, <i>X</i>. LDPC codes are specified with parity check matrices. On the other hand, encoding LDPC codes require, in general, specifying the generator matrices. Even though it is possible to obtain generator matrices from parity check matrices using Gaussian elimination, the resulting matrix is no longer sparse and storing a large generator matrix can be complex.
Encoder 203 generates signals from alphabet <i>Y</i> to a modulator 205 using a simple encoding technique that makes use of only the parity check matrix by imposing structure onto the parity check matrix. Specifically, a restriction is placed on the parity check matrix by constraining certain portion of the matrix to be triangular. The construction of such a parity check matrix is described more fully below in FIG. 6. Such a restriction results in negligible performance loss, and therefore, constitutes an attractive trade-off.
Modulator 205 maps the encoded messages from encoder 203 to signal waveforms that are transmitted to a transmit antenna 207, which emits these waveforms over the communication channel 103. Accordingly, the encoded messages are modulated and distributed to a transmit antenna 207. The transmissions from the transmit antenna 207 propagate to a receiver, as discussed below.
FIG. 2B shows an LDPC encoder utilized with a Bose Chaudhuri Hocquenghem (BCH) encoder and a cyclic redundancy check (CRC) encoder, according to one embodiment of the present invention. Under this scenario, the codes generated by the LDPC encoder 203, along with the CRC encoder 209 and the BCH encoder 211, have a concatenated outer BCH code and inner low density parity check (LDPC) code. Furthermore, error detection is achieved using cyclic redundancy check (CRC) codes. The CRC encoder 209, in an exemplary embodiment, encodes using an 8-bit CRC code with generator polynomial (x<sup>5</sup>+x<sup>4</sup>+x<sup>3</sup>+x<sup>2</sup>+1)(x<sup>2</sup>+x+1)(x+1).
The LDPC encoder 203 systematically encodes an information block of size <i>k<sub>ldpc</sub>,</i><maths id="math0001" num=""><math display="inline"><mi>i</mi><mo>=</mo><mfenced><msub><mi>i</mi><mn>0</mn></msub><mo></mo><msub><mi>i</mi><mn>1</mn></msub><mo>…</mo><msub><mi>i</mi><mrow><msub><mi>k</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub></mfenced></math><img file="EP1518328B1_D0001.tif" /></maths> onto a codeword of size <maths id="math0002" num=""><math display="inline"><msub><mi>n</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>,</mo><mi mathvariant="bold-italic">c</mi><mo>=</mo><mfenced separators=""><msub><mi>i</mi><mn>0</mn></msub><mo>,</mo><msub><mi>i</mi><mn>1</mn></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>i</mi><mrow><msub><mi>k</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub><mo>,</mo><msub><mi>p</mi><mn>0</mn></msub><mo>,</mo><msub><mi>p</mi><mn>1</mn></msub><mo>,</mo><mo>…</mo><msub><mi>p</mi><mrow><msub><mi>n</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub></mfenced></math><img file="EP1518328B1_D0002.tif" /></maths> The transmission of the codeword starts in the given order from <i>i</i><sub>0</sub> and ends with <maths id="math0003" num=""><math display="inline"><msub><mi>p</mi><mrow><msub><mi>n</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub></math><img file="EP1518328B1_D0003.tif" /></maths><i>.</i> LDPC code parameters (n<i><sub>ldpc</sub></i>, k<i><sub>ldpc</sub></i>) are given in Table 1 below. <tables id="tabl0001" num="0001"><table frame="all"><title>Table 1</title><tgroup cols="3"><colspec colnum="1" colname="col1" colwidth="22mm" /><colspec colnum="2" colname="col2" colwidth="49mm" /><colspec colnum="3" colname="col3" colwidth="45mm" /><thead><row><entry namest="col1" nameend="col3" align="center" valign="top"><b>LDPC Code Parameters</b><i>(n<sub>ldpc</sub>, k<sub>ldpc</sub>)</i></entry></row><row rowsep="0"><entry align="center" valign="top"><b>Code Rate</b></entry><entry align="center" valign="top"><b>LDPC Uncoded Block Length</b></entry><entry align="center" valign="top"><b>LDPC Coded Block Length</b></entry></row><row><entry align="center" valign="top" /><entry align="center" valign="top"><i>k<sub>ldpc</sub></i></entry><entry align="center" valign="top"><i>n<sub>ldpc</sub></i></entry></row></thead><tbody><row><entry align="center">1/2</entry><entry align="center">32400</entry><entry align="center">64800</entry></row><row><entry align="center">2/3</entry><entry align="center">43200</entry><entry align="center">64800</entry></row><row><entry align="center">3/4</entry><entry align="center">48600</entry><entry align="center">64800</entry></row><row><entry align="center">4/5</entry><entry align="center">51840</entry><entry align="center">64800</entry></row><row><entry align="center">5/6</entry><entry align="center">54000</entry><entry align="center">64800</entry></row><row><entry align="center">3/5</entry><entry align="center">38880</entry><entry align="center">64800</entry></row><row><entry align="center">8/9</entry><entry align="center">57600</entry><entry align="center">64800</entry></row><row><entry align="center">9/10</entry><entry align="center">58320</entry><entry align="center">64800</entry></row></tbody></tgroup></table></tables>
The task of the LDPC encoder 203 is to determine <i>n<sub>ldpc</sub> - k<sub>ldpc</sub></i> parity bits <maths id="math0004" num=""><math display="inline"><mfenced><msub><mi>p</mi><mn>0</mn></msub><mo></mo><msub><mi>p</mi><mn>1</mn></msub><mo>…</mo><msub><mi>p</mi><mrow><msub><mi>n</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub></mfenced></math><img file="EP1518328B1_D0004.tif" /></maths> for every block of <i>k<sub>ldpc</sub></i> information bits, <maths id="math0005" num=""><math display="inline"><mfenced><msub><mi>i</mi><mn>0</mn></msub><mo></mo><msub><mi>i</mi><mn>1</mn></msub><mo>…</mo><msub><mi>i</mi><mrow><msub><mi>k</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub></mfenced></math><img file="EP1518328B1_D0005.tif" /></maths>. The procedure is as follows. First, the parity bits are initialized; <maths id="math0006" num=""><math display="inline"><msub><mi>p</mi><mn>0</mn></msub><mo>=</mo><msub><mi>p</mi><mn>1</mn></msub><mo>=</mo><msub><mi>p</mi><mn>2</mn></msub><mo>=</mo><mo>…</mo><mo>=</mo><msub><mi>p</mi><mrow><msub><mi>n</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi>p</mi><mo></mo><mi>c</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub><mo>=</mo><mn>0</mn></math><img file="EP1518328B1_D0006.tif" /></maths>. The first information bit, <i>i</i><sub>0</sub>, are accumulated at parity bit addresses specified in the first row of Tables 3 through 10. For example, for rate 2/3 (Table 3), the following results: <maths id="math0007" num=""><math display="block"><msub><mi>p</mi><mn>0</mn></msub><mo>=</mo><msub><mi>p</mi><mn>0</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0007.tif" /></maths><maths id="math0008" num=""><math display="block"><msub><mi>p</mi><mn>10491</mn></msub><mo>=</mo><msub><mi>p</mi><mn>10491</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0008.tif" /></maths><maths id="math0009" num=""><math display="block"><msub><mi>p</mi><mn>16043</mn></msub><mo>=</mo><msub><mi>p</mi><mn>16043</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0009.tif" /></maths><maths id="math0010" num=""><math display="block"><msub><mi>p</mi><mn>506</mn></msub><mo>=</mo><msub><mi>p</mi><mn>506</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0010.tif" /></maths><maths id="math0011" num=""><math display="block"><msub><mi>p</mi><mn>12826</mn></msub><mo>=</mo><msub><mi>p</mi><mn>12826</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0011.tif" /></maths><maths id="math0012" num=""><math display="block"><msub><mi>p</mi><mn>8065</mn></msub><mo>=</mo><msub><mi>p</mi><mn>8065</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0012.tif" /></maths><maths id="math0013" num=""><math display="block"><msub><mi>p</mi><mn>8226</mn></msub><mo>=</mo><msub><mi>p</mi><mn>8226</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0013.tif" /></maths><maths id="math0014" num=""><math display="block"><msub><mi>p</mi><mn>2767</mn></msub><mo>=</mo><msub><mi>p</mi><mn>2767</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0014.tif" /></maths><maths id="math0015" num=""><math display="block"><msub><mi>p</mi><mn>240</mn></msub><mo>=</mo><msub><mi>p</mi><mn>240</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0015.tif" /></maths><maths id="math0016" num=""><math display="block"><msub><mi>p</mi><mn>18673</mn></msub><mo>=</mo><msub><mi>p</mi><mn>18673</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0016.tif" /></maths><maths id="math0017" num=""><math display="block"><msub><mi>p</mi><mn>9279</mn></msub><mo>=</mo><msub><mi>p</mi><mn>9279</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0017.tif" /></maths><maths id="math0018" num=""><math display="block"><msub><mi>p</mi><mn>10579</mn></msub><mo>=</mo><msub><mi>p</mi><mn>10579</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0018.tif" /></maths><maths id="math0019" num=""><math display="block"><msub><mi>p</mi><mn>20928</mn></msub><mo>=</mo><msub><mi>p</mi><mn>20928</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0019.tif" /></maths> (All additions are in GF(2)).
Then, for the next 359 information bits, <i>i<sub>m</sub>, m</i> =1,2,...,359 , these bits are accumulated at parity bit addresses {x<i>+m</i> mod 360×<i>q</i>}mod(<i>n<sub>ldpc</sub> - k<sub>ldpc</sub></i>), where <i>x</i> denotes the address of the parity bit accumulator corresponding to the first bit <i>i</i><sub>0</sub> , and <i>q</i> is a code rate dependent constant specified in Table 2.Continuing with the example, <i>q</i> = 60 for rate 2/3. By way of example, for information bit <i>i</i><sub>1</sub>, the following operations are performed: <maths id="math0020" num=""><math display="block"><msub><mi>p</mi><mn>60</mn></msub><mo>=</mo><msub><mi>p</mi><mn>60</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0020.tif" /></maths><maths id="math0021" num=""><math display="block"><msub><mi>p</mi><mn>10551</mn></msub><mo>=</mo><msub><mi>p</mi><mn>10551</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0021.tif" /></maths><maths id="math0022" num=""><math display="block"><msub><mi>p</mi><mn>16103</mn></msub><mo>=</mo><msub><mi>p</mi><mn>16103</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0022.tif" /></maths><maths id="math0023" num=""><math display="block"><msub><mi>p</mi><mn>566</mn></msub><mo>=</mo><msub><mi>p</mi><mn>566</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0023.tif" /></maths><maths id="math0024" num=""><math display="block"><msub><mi>p</mi><mn>12886</mn></msub><mo>=</mo><msub><mi>p</mi><mn>12886</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0024.tif" /></maths><maths id="math0025" num=""><math display="block"><msub><mi>p</mi><mn>8125</mn></msub><mo>=</mo><msub><mi>p</mi><mn>8125</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0025.tif" /></maths><maths id="math0026" num=""><math display="block"><msub><mi>p</mi><mn>8286</mn></msub><mo>=</mo><msub><mi>p</mi><mn>8286</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0026.tif" /></maths><maths id="math0027" num=""><math display="block"><msub><mi>p</mi><mn>2827</mn></msub><mo>=</mo><msub><mi>p</mi><mn>2827</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0027.tif" /></maths><maths id="math0028" num=""><math display="block"><msub><mi>p</mi><mn>300</mn></msub><mo>=</mo><msub><mi>p</mi><mn>300</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0028.tif" /></maths><maths id="math0029" num=""><math display="block"><msub><mi>p</mi><mn>18733</mn></msub><mo>=</mo><msub><mi>p</mi><mn>18733</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0029.tif" /></maths><maths id="math0030" num=""><math display="block"><msub><mi>p</mi><mn>9339</mn></msub><mo>=</mo><msub><mi>p</mi><mn>9339</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0030.tif" /></maths><maths id="math0031" num=""><math display="block"><msub><mi>p</mi><mn>10639</mn></msub><mo>=</mo><msub><mi>p</mi><mn>10639</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0031.tif" /></maths><maths id="math0032" num=""><math display="block"><msub><mi>p</mi><mn>20988</mn></msub><mo>=</mo><msub><mi>p</mi><mn>20988</mn></msub><mo>⊕</mo><msub><mi>i</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0032.tif" /></maths>
For the 361<sup>st</sup> information bit <i>i</i><sub>360</sub>, the addresses of the parity bit accumulators are given in the second row of the Tables 3 through 10. In a similar manner the addresses of the parity bit accumulators for the following 359 information bits <i>i<sub>m</sub></i>, <i>m</i> = 361,362,...,719 are obtained using the formula {<i>x</i>+<i>m</i> mod360×<i>q</i>}mod(<i>n<sub>ldpc</sub>-k<sub>ldpc</sub></i>), where <i>x</i> denotes the address of the parity bit accumulator corresponding to the information bit <i>i</i><sub>360</sub>, i.e., the entries in the second row of the Tables 3-10. In a similar manner, for every group of 360 new information bits, a new row from Tables 3 through 10 are used to find the addresses of the parity bit accumulators.
After all of the information bits are exhausted, the final parity bits are obtained as follows. First, the following operations are performed, starting with <i>i</i> = 1 <maths id="math0033" num=""><math display="block"><msub><mi>p</mi><mi>i</mi></msub><mo>=</mo><msub><mi>p</mi><mi>i</mi></msub><mo>⊕</mo><msub><mi>p</mi><mrow><mi>i</mi><mo>-</mo><mn>1</mn></mrow></msub><mo>,</mo><mspace width="1em" /><mi>i</mi><mo>=</mo><mn>1</mn><mo>,</mo><mn>2</mn><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>n</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi mathvariant="italic">pc</mi><mtext /></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>l</mi><mo></mo><mi>d</mi><mo></mo><mi mathvariant="italic">pc</mi><mtext /></mrow></msub><mo>-</mo><mn>1.</mn></math><img file="EP1518328B1_D0033.tif" /></maths> Final content of <i>p<sub>i</sub> , i</i> = 0,1,.., <i>n<sub>ldpc</sub> - k<sub>ldpc</sub> -</i>1 is equal to the parity bit <i>p<sub>i</sub>.</i><tables id="tabl0002" num="0002"><table frame="all"><title>Table 2</title><tgroup cols="2" rowsep="0"><colspec colnum="1" colname="col1" colwidth="20mm" /><colspec colnum="2" colname="col2" colwidth="10mm" /><thead><row><entry rowsep="1" align="center" valign="top"><b>Code Rate</b></entry><entry rowsep="1" align="center" valign="top"><b><i>q</i></b></entry></row></thead><tbody><row rowsep="1"><entry align="center">2/3</entry><entry align="center">60</entry></row><row rowsep="1"><entry align="center">5/6</entry><entry align="center">30</entry></row><row rowsep="1"><entry align="center">1/2</entry><entry align="center">90</entry></row><row rowsep="1"><entry align="center">3/4</entry><entry align="center">45</entry></row><row rowsep="1"><entry align="center">4/5</entry><entry align="center">36</entry></row><row rowsep="1"><entry align="center">3/5</entry><entry align="center">72</entry></row><row rowsep="1"><entry align="center">8/9</entry><entry align="center">20</entry></row><row rowsep="1"><entry align="center">9/10</entry><entry align="center">18</entry></row></tbody></tgroup></table></tables><tables id="tabl0003" num="0003"><table frame="all"><title>Table 3</title><tgroup cols="1" colsep="0"><colspec colnum="1" colname="col1" colwidth="111mm" colsep="1" /><thead><row><entry align="center" valign="top"><b>Address of Parity Bit Accumulators (Rate 2/3)</b></entry></row></thead><tbody><row rowsep="0"><entry>0 10491 16043 506 12826 8065 8226 2767 240 18673 9279 10579 20928</entry></row><row rowsep="0"><entry>1 17819 8313 6433 6224 5120 5824 12812 17187 9940 13447 13825 18483</entry></row><row rowsep="0"><entry>2 17957 6024 8681 18628 12794 5915 14576 10970 12064 20437 4455 7151</entry></row><row rowsep="0"><entry>3 19777 6183 9972 14536 8182 17749 11341 5556 4379 17434 15477 18532</entry></row><row rowsep="0"><entry>4 4651 19689 1608 659 16707 14335 6143 3058 14618 17894 20684 5306</entry></row><row rowsep="0"><entry>5 9778 2552 12096 12369 15198 16890 4851 3109 1700 18725 1997 15882</entry></row><row rowsep="0"><entry>6486 6111 13743 11537 5591 7433 15227 14145 1483 3887 17431 12430</entry></row><row rowsep="0"><entry>720647 14311 11734 4180 8110 5525 12141 15761 18661 18441 10569 8192</entry></row><row rowsep="0"><entry>8 3791 14759 15264 19918 10132 9062 10010 12786 10675 9682 19246 5454</entry></row><row rowsep="0"><entry>9 19525 9485 7777 19999 8378 9209 3163 20232 669016518 716 7353</entry></row><row rowsep="0"><entry>10 4588 6709 20202 10905 915 4317 11073 13576 16433 368 3508 21171</entry></row><row rowsep="0"><entry>11 14072 4033 19959 12608 631 19494 14160 8249 10223 21504 12395 4322</entry></row><row rowsep="0"><entry>12 13800 14161</entry></row><row rowsep="0"><entry>13 2948 9647</entry></row><row rowsep="0"><entry>14 14693 16027</entry></row><row rowsep="0"><entry>15 20506 11082</entry></row><row rowsep="0"><entry>16 1143 9020</entry></row><row rowsep="0"><entry>17 13501 4014</entry></row><row rowsep="0"><entry>18 1548 2190</entry></row><row rowsep="0"><entry>19 12216 21556</entry></row><row rowsep="0"><entry>20 2095 19897</entry></row><row rowsep="0"><entry>214189 7958</entry></row><row rowsep="0"><entry>22 15940 10048</entry></row><row rowsep="0"><entry>23 515 12614</entry></row><row rowsep="0"><entry>24 8501 8450</entry></row><row rowsep="0"><entry>25 17595 16784</entry></row><row rowsep="0"><entry>26 5913 8495</entry></row><row rowsep="0"><entry>27 16394 10423</entry></row><row rowsep="0"><entry>28 7409 6981</entry></row><row rowsep="0"><entry>29 6678 15939</entry></row><row rowsep="0"><entry>30 20344 12987</entry></row><row rowsep="0"><entry>31 2510 14588</entry></row><row rowsep="0"><entry>32 17918 6655</entry></row><row rowsep="0"><entry>33 6703 19451</entry></row><row rowsep="0"><entry>34 496 4217</entry></row><row rowsep="0"><entry>35 7290 5766</entry></row><row rowsep="0"><entry>36 10521 8925</entry></row><row rowsep="0"><entry>37 20379 11905</entry></row><row rowsep="0"><entry>38 4090 5838</entry></row><row rowsep="0"><entry>39 19082 17040</entry></row><row rowsep="0"><entry>40 20233 12352</entry></row><row rowsep="0"><entry>41 19365 19546</entry></row><row rowsep="0"><entry>42 6249 19030</entry></row><row rowsep="0"><entry>43 11037 19193</entry></row><row rowsep="0"><entry>44 19760 11772</entry></row><row rowsep="0"><entry>45 19644 7428</entry></row><row rowsep="0"><entry>46 16076 3521</entry></row><row rowsep="0"><entry>47 11779 21062</entry></row><row rowsep="0"><entry>48 13062 9682</entry></row><row rowsep="0"><entry>49 8934 5217</entry></row><row rowsep="0"><entry>50 11087 3319</entry></row><row rowsep="0"><entry>51 18892 4356</entry></row><row rowsep="0"><entry>52 7894 3898</entry></row><row rowsep="0"><entry>53 5963 4360</entry></row><row rowsep="0"><entry>54 7346 11726</entry></row><row rowsep="0"><entry>55 5182 5609</entry></row><row rowsep="0"><entry>56 2412 17295</entry></row><row rowsep="0"><entry>57 9845 20494</entry></row><row rowsep="0"><entry>58 6687 1864</entry></row><row rowsep="0"><entry>59 20564 5216</entry></row><row rowsep="0"><entry>0 18226 17207</entry></row><row rowsep="0"><entry>1 9380 8266</entry></row><row rowsep="0"><entry>2 7073 3065</entry></row><row rowsep="0"><entry>3 18252 13437</entry></row><row rowsep="0"><entry>4 9161 15642</entry></row><row rowsep="0"><entry>5 10714 10153</entry></row><row rowsep="0"><entry>6 11585 9078</entry></row><row rowsep="0"><entry>7 5359 9418</entry></row><row rowsep="0"><entry>8 9024 9515</entry></row><row rowsep="0"><entry>9 1206 16354</entry></row><row rowsep="0"><entry>10 14994 1102</entry></row><row rowsep="0"><entry>11 9375 20796</entry></row><row rowsep="0"><entry>12 15964 6027</entry></row><row rowsep="0"><entry>13 14789 6452</entry></row><row rowsep="0"><entry>14 8002 18591</entry></row><row rowsep="0"><entry>15 14742 14089</entry></row><row rowsep="0"><entry>16 253 3045</entry></row><row rowsep="0"><entry>17 1274 19286</entry></row><row rowsep="0"><entry>18 14777 2044</entry></row><row rowsep="0"><entry>19 13920 9900</entry></row><row rowsep="0"><entry>20 452 7374</entry></row><row rowsep="0"><entry>21 18206 9921</entry></row><row rowsep="0"><entry>22 6131 5414</entry></row><row rowsep="0"><entry>23 10077 9726</entry></row><row rowsep="0"><entry>24 12045 5479</entry></row><row rowsep="0"><entry>25 4322 7990</entry></row><row rowsep="0"><entry>26 15616 5550</entry></row><row rowsep="0"><entry>27 15561 10661</entry></row><row rowsep="0"><entry>28 20718 7387</entry></row><row rowsep="0"><entry>29 2518 18804</entry></row><row rowsep="0"><entry>30 8984 2600</entry></row><row rowsep="0"><entry>31651617909</entry></row><row rowsep="0"><entry>32 11148 98</entry></row><row rowsep="0"><entry>33 20559 3704</entry></row><row rowsep="0"><entry>3475101569</entry></row><row rowsep="0"><entry>35 16000 11692</entry></row><row rowsep="0"><entry>36 9147 10303</entry></row><row rowsep="0"><entry>37 16650 191</entry></row><row rowsep="0"><entry>38 15577 18685</entry></row><row rowsep="0"><entry>39 17167 20917</entry></row><row rowsep="0"><entry>40 4256 3391</entry></row><row rowsep="0"><entry>41 20092 17219</entry></row><row rowsep="0"><entry>42 9218 5056</entry></row><row rowsep="0"><entry>43 18429 8472</entry></row><row rowsep="0"><entry>44 12093 20753</entry></row><row rowsep="0"><entry>45 16345 12748</entry></row><row rowsep="0"><entry>46 16023 11095</entry></row><row rowsep="0"><entry>47 5048 17595</entry></row><row rowsep="0"><entry>48 18995 4817</entry></row><row rowsep="0"><entry>49 16483 3536</entry></row><row rowsep="0"><entry>50 1439 16148</entry></row><row rowsep="0"><entry>51 3661 3039</entry></row><row rowsep="0"><entry>52 19010 18121</entry></row><row rowsep="0"><entry>53 8968 11793</entry></row><row rowsep="0"><entry>54 13427 18003</entry></row><row rowsep="0"><entry>55 5303 3083</entry></row><row rowsep="0"><entry>5653116668</entry></row><row rowsep="0"><entry>57 4771 6722</entry></row><row rowsep="0"><entry>58 5695 7960</entry></row><row><entry>59 3589 14630</entry></row></tbody></tgroup></table></tables><tables id="tabl0004" num="0004"><table frame="all"><title>Table 4</title><tgroup cols="1" colsep="0"><colspec colnum="1" colname="col1" colwidth="101mm" colsep="1" /><thead><row><entry align="center" valign="top"><b>Address of Parity Bit Accumulators (Rate 5/6)</b></entry></row></thead><tbody><row rowsep="0"><entry>0 4362 416 8909 4156 3216 3112 2560 2912 6405 8593 4969 6723</entry></row><row rowsep="0"><entry>1 2479 1786 8978 30114339 9313 6397 2957 7288 5484 6031 10217</entry></row><row rowsep="0"><entry>2 10175 9009 9889 3091 4985 7267 4092 8874 5671 2777 2189 8716</entry></row><row rowsep="0"><entry>3 9052 4795 3924 3370 10058 1128 9996 10165 9360 4297 434 5138</entry></row><row rowsep="0"><entry>4 2379 7834 4835 2327 9843 804 329 8353 7167 3070 1528 7311</entry></row><row rowsep="0"><entry>5 3435 7871 348 3693 1876 6585 10340 7144 5870 2084 4052 2780</entry></row><row rowsep="0"><entry>6 3917 31113476 1304 10331 5939 5199 1611 1991 699 8316 9960</entry></row><row rowsep="0"><entry>7 6883 3237 1717 10752 7891 9764 4745 3888 10009 4176 4614 1567</entry></row><row rowsep="0"><entry>8 10587 2195 1689 2968 5420 2580 2883 6496 111 6023 1024 4449</entry></row><row rowsep="0"><entry>9 3786 8593 2074 33215057 1450 3840 5444 6572 3094 9892 1512</entry></row><row rowsep="0"><entry>10 8548 1848 10372 4585 7313 6536 6379 1766 9462 2456 5606 9975</entry></row><row rowsep="0"><entry>11 8204 10593 7935 3636 3882 394 5968 85612395 7289 9267 9978</entry></row><row rowsep="0"><entry>12 7795 74 1633 9542 6867 7352 6417 7568 10623 725 25319115</entry></row><row rowsep="0"><entry>13 71512482 4260 5003 10105 7419 9203 6691 8798 2092 8263 3755</entry></row><row rowsep="0"><entry>14 3600 570 4527 200 9718 6771 1995 8902 5446 768 1103 6520</entry></row><row rowsep="0"><entry>15 6304 7621</entry></row><row rowsep="0"><entry>16 6498 9209</entry></row><row rowsep="0"><entry>17 7293 6786</entry></row><row rowsep="0"><entry>18 5950 1708</entry></row><row rowsep="0"><entry>19 8521 1793</entry></row><row rowsep="0"><entry>20 6174 7854</entry></row><row rowsep="0"><entry>21 9773 1190</entry></row><row rowsep="0"><entry>22 9517 10268</entry></row><row rowsep="0"><entry>23 2181 9349</entry></row><row rowsep="0"><entry>24 1949 5560</entry></row><row rowsep="0"><entry>25 1556 555</entry></row><row rowsep="0"><entry>26 8600 3827</entry></row><row rowsep="0"><entry>27 5072 1057</entry></row><row rowsep="0"><entry>28 7928 3542</entry></row><row rowsep="0"><entry>29 3226 3762</entry></row><row rowsep="0"><entry>0 7045 2420</entry></row><row rowsep="0"><entry>1 9645 2641</entry></row><row rowsep="0"><entry>2 2774 2452</entry></row><row rowsep="0"><entry>3 5331 2031</entry></row><row rowsep="0"><entry>4 9400 7503</entry></row><row rowsep="0"><entry>5 1850 2338</entry></row><row rowsep="0"><entry>6 10456 9774</entry></row><row rowsep="0"><entry>7 1692 9276</entry></row><row rowsep="0"><entry>8 10037 4038</entry></row><row rowsep="0"><entry>9 3964 338</entry></row><row rowsep="0"><entry>10 2640 5087</entry></row><row rowsep="0"><entry>11 858 3473</entry></row><row rowsep="0"><entry>12 5582 5683</entry></row><row rowsep="0"><entry>13 9523 916</entry></row><row rowsep="0"><entry>14 4107 1559</entry></row><row rowsep="0"><entry>15 4506 3491</entry></row><row rowsep="0"><entry>1681914182</entry></row><row rowsep="0"><entry>17 10192 6157</entry></row><row rowsep="0"><entry>18 5668 3305</entry></row><row rowsep="0"><entry>19 3449 1540</entry></row><row rowsep="0"><entry>20 4766 2697</entry></row><row rowsep="0"><entry>214069 6675</entry></row><row rowsep="0"><entry>22 1117 1016</entry></row><row rowsep="0"><entry>23 5619 3085</entry></row><row rowsep="0"><entry>24 8483 8400</entry></row><row rowsep="0"><entry>25 8255 394</entry></row><row rowsep="0"><entry>26 6338 5042</entry></row><row rowsep="0"><entry>27 6174 5119</entry></row><row rowsep="0"><entry>28 7203 1989</entry></row><row rowsep="0"><entry>29 1781 5174</entry></row><row rowsep="0"><entry>0 1464 3559</entry></row><row rowsep="0"><entry>1 3376 4214</entry></row><row rowsep="0"><entry>2 7238 67</entry></row><row rowsep="0"><entry>3 10595 8831</entry></row><row rowsep="0"><entry>4 1221 6513</entry></row><row rowsep="0"><entry>5 5300 4652</entry></row><row rowsep="0"><entry>6 1429 9749</entry></row><row rowsep="0"><entry>7 78785131</entry></row><row rowsep="0"><entry>8 4435 10284</entry></row><row rowsep="0"><entry>9 6331 5507</entry></row><row rowsep="0"><entry>10 6662 4941</entry></row><row rowsep="0"><entry>11 9614 10238</entry></row><row rowsep="0"><entry>12 8400 8025</entry></row><row rowsep="0"><entry>13 9156 5630</entry></row><row rowsep="0"><entry>14 7067 8878</entry></row><row rowsep="0"><entry>15 9027 3415</entry></row><row rowsep="0"><entry>16 1690 3866</entry></row><row rowsep="0"><entry>17 2854 8469</entry></row><row rowsep="0"><entry>18 6206 630</entry></row><row rowsep="0"><entry>19 363 5453</entry></row><row rowsep="0"><entry>20 4125 7008</entry></row><row rowsep="0"><entry>21 1612 6702</entry></row><row rowsep="0"><entry>22 9069 9226</entry></row><row rowsep="0"><entry>23 5767 4060</entry></row><row rowsep="0"><entry>24 3743 9237</entry></row><row rowsep="0"><entry>25 7018 5572</entry></row><row rowsep="0"><entry>26 8892 4536</entry></row><row rowsep="0"><entry>27 853 6064</entry></row><row rowsep="0"><entry>28 8069 5893</entry></row><row rowsep="0"><entry>29 2051 2885</entry></row><row rowsep="0"><entry>0 10691 3153</entry></row><row rowsep="0"><entry>1 3602 4055</entry></row><row rowsep="0"><entry>2 328 1717</entry></row><row rowsep="0"><entry>3 2219 9299</entry></row><row rowsep="0"><entry>4 1939 7898</entry></row><row rowsep="0"><entry>5 617 206</entry></row><row rowsep="0"><entry>6 8544 1374</entry></row><row rowsep="0"><entry>7 10676 3240</entry></row><row rowsep="0"><entry>8 6672 9489</entry></row><row rowsep="0"><entry>931707457</entry></row><row rowsep="0"><entry>10 7868 5731</entry></row><row rowsep="0"><entry>11 6121 10732</entry></row><row rowsep="0"><entry>12 4843 9132</entry></row><row rowsep="0"><entry>13 580 9591</entry></row><row rowsep="0"><entry>14 6267 9290</entry></row><row rowsep="0"><entry>15 3009 2268</entry></row><row rowsep="0"><entry>16 195 2419</entry></row><row rowsep="0"><entry>17 8016 1557</entry></row><row rowsep="0"><entry>18 1516 9195</entry></row><row rowsep="0"><entry>19 8062 9064</entry></row><row rowsep="0"><entry>20 2095 8968</entry></row><row rowsep="0"><entry>21 753 7326</entry></row><row rowsep="0"><entry>22 6291 3833</entry></row><row rowsep="0"><entry>23 2614 7844</entry></row><row rowsep="0"><entry>24 2303 646</entry></row><row rowsep="0"><entry>25 2075 611</entry></row><row rowsep="0"><entry>26 4687 362</entry></row><row rowsep="0"><entry>27 8684 9940</entry></row><row rowsep="0"><entry>28 4830 2065</entry></row><row rowsep="0"><entry>29 7038 1363</entry></row><row rowsep="0"><entry>0 1769 7837</entry></row><row rowsep="0"><entry>1 3801 1689</entry></row><row rowsep="0"><entry>2 10070 2359</entry></row><row rowsep="0"><entry>3 3667 9918</entry></row><row rowsep="0"><entry>4 1914 6920</entry></row><row rowsep="0"><entry>5 4244 5669</entry></row><row rowsep="0"><entry>6 10245 7821</entry></row><row rowsep="0"><entry>7 7648 3944</entry></row><row rowsep="0"><entry>8 3310 5488</entry></row><row rowsep="0"><entry>9 6346 9666</entry></row><row rowsep="0"><entry>10 7088 6122</entry></row><row rowsep="0"><entry>11 1291 7827</entry></row><row rowsep="0"><entry>12 10592 8945</entry></row><row rowsep="0"><entry>13 3609 7120</entry></row><row rowsep="0"><entry>14 9168 9112</entry></row><row rowsep="0"><entry>15 6203 8052</entry></row><row rowsep="0"><entry>16 3330 2895</entry></row><row rowsep="0"><entry>17 4264 10563</entry></row><row rowsep="0"><entry>18 10556 6496</entry></row><row rowsep="0"><entry>19 8807 7645</entry></row><row rowsep="0"><entry>20 1999 4530</entry></row><row rowsep="0"><entry>21 9202 6818</entry></row><row rowsep="0"><entry>22 3403 1734</entry></row><row rowsep="0"><entry>23 2106 9023</entry></row><row rowsep="0"><entry>24 6881 3883</entry></row><row rowsep="0"><entry>25 3895 2171</entry></row><row rowsep="0"><entry>26 4062 6424</entry></row><row rowsep="0"><entry>27 3755 9536</entry></row><row rowsep="0"><entry>28 4683 2131</entry></row><row><entry>29 7347 8027</entry></row></tbody></tgroup></table></tables><tables id="tabl0005" num="0005"><table frame="all"><title>Table 5</title><tgroup cols="1" colsep="0"><colspec colnum="1" colname="col1" colwidth="74mm" colsep="1" /><thead><row><entry align="center" valign="top"><b>Address of Parity Bit Accumulators (Rate 1/2)</b></entry></row></thead><tbody><row rowsep="0"><entry>54 9318 14392 27561 26909 10219 2534 8597</entry></row><row rowsep="0"><entry>55 7263 4635 2530 28130 3033 23830 3651</entry></row><row rowsep="0"><entry>56 2473123583 2603617299 5750 792 9169</entry></row><row rowsep="0"><entry>57 58112615418653 11551 15447 13685 16264</entry></row><row rowsep="0"><entry>58 12610 11347 28768 2792 3174 29371 12997</entry></row><row rowsep="0"><entry>59 16789 16018 21449 6165 21202 15850 3186</entry></row><row rowsep="0"><entry>60 31016 21449 17618 6213 12166 8334 18212</entry></row><row rowsep="0"><entry>6122836 14213 11327 5896 718 11727 9308</entry></row><row rowsep="0"><entry>62 20912494129966 23634 9013 15587 5444</entry></row><row rowsep="0"><entry>63 22207 3983 16904 28534 21415 27524 25912</entry></row><row rowsep="0"><entry>64 25687 450122193 14665 14798 16158 5491</entry></row><row rowsep="0"><entry>65 4520 17094 23397 4264 22370 16941 21526</entry></row><row rowsep="0"><entry>66 10490 6182 32370 9597 30841 25954 2762</entry></row><row rowsep="0"><entry>67 22120 22865 29870 15147 13668 14955 19235</entry></row><row rowsep="0"><entry>68 6689 18408 18346 9918 25746 5443 20645</entry></row><row rowsep="0"><entry>69 29982 12529 13858 4746 30370 10023 24828</entry></row><row rowsep="0"><entry>70 1262 28032 29888 13063 24033 219517863</entry></row><row rowsep="0"><entry>71 6594 29642 31451 14831 9509 9335 31552</entry></row><row rowsep="0"><entry>72 1358 6454 16633 20354 24598 624 5265</entry></row><row rowsep="0"><entry>73 19529 295 18011 3080 13364 8032 15323</entry></row><row rowsep="0"><entry>74 11981 1510 7960 21462 9129 11370 25741</entry></row><row rowsep="0"><entry>75 9276 29656 4543 30699 20646 2192128050</entry></row><row rowsep="0"><entry>76 15975 25634 5520 31119 13715 21949 19605</entry></row><row rowsep="0"><entry>77 18688 4608 31755 30165 13103 10706 29224</entry></row><row rowsep="0"><entry>78 21514 23117 12245 26035 31656 25631 30699</entry></row><row rowsep="0"><entry>79 9674 24966 31285 29908 17042 24588 31857</entry></row><row rowsep="0"><entry>80 21856 27777 29919 27000 14897 11409 7122</entry></row><row rowsep="0"><entry>8129773 23310 263 4877 28622 20545 22092</entry></row><row rowsep="0"><entry>82 15605 5651 21864 3967 14419 22757 15896</entry></row><row rowsep="0"><entry>83 30145 1759 10139 29223 26086 10556 5098</entry></row><row rowsep="0"><entry>84 18815 16575 2936 24457 26738 6030 505</entry></row><row rowsep="0"><entry>85 30326 22298 27562 20131 26390 6247 24791</entry></row><row rowsep="0"><entry>86 928 29246 21246 12400 15311 32309 18608</entry></row><row rowsep="0"><entry>87 20314 6025 26689 16302 2296 3244 19613</entry></row><row rowsep="0"><entry>88 6237 11943 22851 15642 23857 1511220947</entry></row><row rowsep="0"><entry>89 26403 25168 19038 18384 888212719 7093</entry></row><row rowsep="0"><entry>0 14567 24965</entry></row><row rowsep="0"><entry>1 3908 100</entry></row><row rowsep="0"><entry>2 10279 240</entry></row><row rowsep="0"><entry>3 24102 764</entry></row><row rowsep="0"><entry>4123834173</entry></row><row rowsep="0"><entry>5 13861 15918</entry></row><row rowsep="0"><entry>6 21327 1046</entry></row><row rowsep="0"><entry>7 5288 14579</entry></row><row rowsep="0"><entry>8 28158 8069</entry></row><row rowsep="0"><entry>9 16583 11098</entry></row><row rowsep="0"><entry>10 1668128363</entry></row><row rowsep="0"><entry>11 13980 24725</entry></row><row rowsep="0"><entry>12 32169 17989</entry></row><row rowsep="0"><entry>13 10907 2767</entry></row><row rowsep="0"><entry>14 21557 3818</entry></row><row rowsep="0"><entry>15 26676 12422</entry></row><row rowsep="0"><entry>16 7676 8754</entry></row><row rowsep="0"><entry>17 14905 20232</entry></row><row rowsep="0"><entry>18 15719 24646</entry></row><row rowsep="0"><entry>19 31942 8589</entry></row><row rowsep="0"><entry>20 19978 27197</entry></row><row rowsep="0"><entry>21 27060 15071</entry></row><row rowsep="0"><entry>22 6071 26649</entry></row><row rowsep="0"><entry>23 10393 11176</entry></row><row rowsep="0"><entry>24 9597 13370</entry></row><row rowsep="0"><entry>25 7081 17677</entry></row><row rowsep="0"><entry>26 1433 19513</entry></row><row rowsep="0"><entry>27 26925 9014</entry></row><row rowsep="0"><entry>28 19202 8900</entry></row><row rowsep="0"><entry>29 18152 30647</entry></row><row rowsep="0"><entry>30 20803 1737</entry></row><row rowsep="0"><entry>31 11804 25221</entry></row><row rowsep="0"><entry>32 31683 17783</entry></row><row rowsep="0"><entry>33 29694 9345</entry></row><row rowsep="0"><entry>34 12280 26611</entry></row><row rowsep="0"><entry>35 6526 26122</entry></row><row rowsep="0"><entry>36 26165 11241</entry></row><row rowsep="0"><entry>37 7666 26962</entry></row><row rowsep="0"><entry>38 16290 8480</entry></row><row rowsep="0"><entry>39 11774 10120</entry></row><row rowsep="0"><entry>40 3005130426</entry></row><row rowsep="0"><entry>41 1335 15424</entry></row><row rowsep="0"><entry>42 6865 17742</entry></row><row rowsep="0"><entry>43 31779 12489</entry></row><row rowsep="0"><entry>44 32120 21001</entry></row><row rowsep="0"><entry>45 14508 6996</entry></row><row rowsep="0"><entry>46 979 25024</entry></row><row rowsep="0"><entry>47 4554 21896</entry></row><row rowsep="0"><entry>48 7989 21777</entry></row><row rowsep="0"><entry>49 4972 20661</entry></row><row rowsep="0"><entry>50 6612 2730</entry></row><row rowsep="0"><entry>51 12742 4418</entry></row><row rowsep="0"><entry>52 29194 595</entry></row><row><entry>53 19267 20113</entry></row></tbody></tgroup></table></tables><tables id="tabl0006" num="0006"><table frame="all"><title>Table 6</title><tgroup cols="1" colsep="0"><colspec colnum="1" colname="col1" colwidth="103mm" colsep="1" /><thead><row><entry align="center" valign="top"><b>Address of Parity Bit Accumulators (Rate 3/4)</b></entry></row></thead><tbody><row rowsep="0"><entry>0 6385 7901 14611 13389 11200 3252 5243 2504 2722 8217374</entry></row><row rowsep="0"><entry>1 11359 2698 357 13824 12772 7244 6752 15310 852 2001 11417</entry></row><row rowsep="0"><entry>2 7862 7977 6321 13612 12197 14449 15137 13860 1708 6399 13444</entry></row><row rowsep="0"><entry>3 1560 11804 6975 13292 3646 3812 8772 7306 5795 14327 7866</entry></row><row rowsep="0"><entry>4 7626 11407 14599 9689 1628 2113 10809 9283 1230 152414870</entry></row><row rowsep="0"><entry>5 1610 5699 15876 9446 12515 1400 6303 5411 14181 13925 7358</entry></row><row rowsep="0"><entry>6 4059 8836 3405 7853 799215336 5970 10368 10278 9675 4651</entry></row><row rowsep="0"><entry>7 44413963 9153 2109 12683 7459 12030 12221 629 15212 406</entry></row><row rowsep="0"><entry>8 6007 84115771 3497 543 14202 875 9186 6235 13908 3563</entry></row><row rowsep="0"><entry>9 3232 6625 4795 546 9781 2071 7312 3399 7250 4932 12652</entry></row><row rowsep="0"><entry>10 8820 10088 11090 7069 6585 13134 10158 7183 488 7455 9238</entry></row><row rowsep="0"><entry>11 1903 10818 119 215 7558 11046 10615 11545 14784 7961 15619</entry></row><row rowsep="0"><entry>12 3655 8736 4917 15874 5129 2134 15944 14768 7150 2692 1469</entry></row><row rowsep="0"><entry>13 8316 3820 505 8923 6757 806 7957 4216 15589 13244 2622</entry></row><row rowsep="0"><entry>14 14463 4852 15733 3041 11193 12860 13673 8152 6551 15108 8758</entry></row><row rowsep="0"><entry>15 3149 11981</entry></row><row rowsep="0"><entry>16 13416 6906</entry></row><row rowsep="0"><entry>17 13098 13352</entry></row><row rowsep="0"><entry>18 2009 14460</entry></row><row rowsep="0"><entry>1972074314</entry></row><row rowsep="0"><entry>20 3312 3945</entry></row><row rowsep="0"><entry>21 4418 6248</entry></row><row rowsep="0"><entry>22 2669 13975</entry></row><row rowsep="0"><entry>23 7571 9023</entry></row><row rowsep="0"><entry>24 14172 2967</entry></row><row rowsep="0"><entry>25 7271 7138</entry></row><row rowsep="0"><entry>26 6135 13670</entry></row><row rowsep="0"><entry>27 7490 14559</entry></row><row rowsep="0"><entry>28 8657 2466</entry></row><row rowsep="0"><entry>29 8599 12834</entry></row><row rowsep="0"><entry>30 3470 3152</entry></row><row rowsep="0"><entry>31 13917 4365</entry></row><row rowsep="0"><entry>32 6024 13730</entry></row><row rowsep="0"><entry>33 10973 14182</entry></row><row rowsep="0"><entry>34 2464 13167</entry></row><row rowsep="0"><entry>35 5281 15049</entry></row><row rowsep="0"><entry>36 1103 1849</entry></row><row rowsep="0"><entry>37 2058 1069</entry></row><row rowsep="0"><entry>38 9654 6095</entry></row><row rowsep="0"><entry>39 143117667</entry></row><row rowsep="0"><entry>40 15617 8146</entry></row><row rowsep="0"><entry>414588 11218</entry></row><row rowsep="0"><entry>42 13660 6243</entry></row><row rowsep="0"><entry>43 8578 7874</entry></row><row rowsep="0"><entry>44 11741 2686</entry></row><row rowsep="0"><entry>0 1022 1264</entry></row><row rowsep="0"><entry>1 12604 9965</entry></row><row rowsep="0"><entry>2 8217 2707</entry></row><row rowsep="0"><entry>3315611793</entry></row><row rowsep="0"><entry>4 354 1514</entry></row><row rowsep="0"><entry>5 6978 14058</entry></row><row rowsep="0"><entry>6 7922 16079</entry></row><row rowsep="0"><entry>7 15087 12138</entry></row><row rowsep="0"><entry>8 5053 6470</entry></row><row rowsep="0"><entry>9 12687 14932</entry></row><row rowsep="0"><entry>10 15458 1763</entry></row><row rowsep="0"><entry>11 8121 1721</entry></row><row rowsep="0"><entry>12 12431 549</entry></row><row rowsep="0"><entry>13 4129 7091</entry></row><row rowsep="0"><entry>14 1426 8415</entry></row><row rowsep="0"><entry>15 9783 7604</entry></row><row rowsep="0"><entry>16 6295 11329</entry></row><row rowsep="0"><entry>17 1409 12061</entry></row><row rowsep="0"><entry>18 8065 9087</entry></row><row rowsep="0"><entry>19 2918 8438</entry></row><row rowsep="0"><entry>20 1293 14115</entry></row><row rowsep="0"><entry>21 3922 13851</entry></row><row rowsep="0"><entry>2238514000</entry></row><row rowsep="0"><entry>23 5865 1768</entry></row><row rowsep="0"><entry>24 2655 14957</entry></row><row rowsep="0"><entry>25 5565 6332</entry></row><row rowsep="0"><entry>26 4303 12631</entry></row><row rowsep="0"><entry>27 11653 12236</entry></row><row rowsep="0"><entry>28 16025 7632</entry></row><row rowsep="0"><entry>29 4655 14128</entry></row><row rowsep="0"><entry>30 9584 13123</entry></row><row rowsep="0"><entry>31 13987 9597</entry></row><row rowsep="0"><entry>32 15409 12110</entry></row><row rowsep="0"><entry>33 8754 15490</entry></row><row rowsep="0"><entry>34 7416 15325</entry></row><row rowsep="0"><entry>35 2909 15549</entry></row><row rowsep="0"><entry>36 2995 8257</entry></row><row rowsep="0"><entry>37 9406 4791</entry></row><row rowsep="0"><entry>38 111114854</entry></row><row rowsep="0"><entry>39 2812 8521</entry></row><row rowsep="0"><entry>40 8476 14717</entry></row><row rowsep="0"><entry>41 7820 15360</entry></row><row rowsep="0"><entry>42 1179 7939</entry></row><row rowsep="0"><entry>43 2357 8678</entry></row><row rowsep="0"><entry>44 7703 6216</entry></row><row rowsep="0"><entry>0 3477 7067</entry></row><row rowsep="0"><entry>1 3931 13845</entry></row><row rowsep="0"><entry>2 7675 12899</entry></row><row rowsep="0"><entry>317548187</entry></row><row rowsep="0"><entry>4 7785 1400</entry></row><row rowsep="0"><entry>5 9213 5891</entry></row><row rowsep="0"><entry>6 2494 7703</entry></row><row rowsep="0"><entry>7 2576 7902</entry></row><row rowsep="0"><entry>8 4821 15682</entry></row><row rowsep="0"><entry>9 10426 11935</entry></row><row rowsep="0"><entry>10 1810 904</entry></row><row rowsep="0"><entry>11 11332 9264</entry></row><row rowsep="0"><entry>12 11312 3570</entry></row><row rowsep="0"><entry>13 14916 2650</entry></row><row rowsep="0"><entry>14 7679 7842</entry></row><row rowsep="0"><entry>15 6089 13084</entry></row><row rowsep="0"><entry>16 3938 2751</entry></row><row rowsep="0"><entry>17 8509 4648</entry></row><row rowsep="0"><entry>18 12204 8917</entry></row><row rowsep="0"><entry>19 5749 12443</entry></row><row rowsep="0"><entry>20 12613 4431</entry></row><row rowsep="0"><entry>21 1344 4014</entry></row><row rowsep="0"><entry>22 8488 13850</entry></row><row rowsep="0"><entry>23 1730 14896</entry></row><row rowsep="0"><entry>24 14942 7126</entry></row><row rowsep="0"><entry>25 14983 8863</entry></row><row rowsep="0"><entry>26 6578 8564</entry></row><row rowsep="0"><entry>27 4947 396</entry></row><row rowsep="0"><entry>28 297 12805</entry></row><row rowsep="0"><entry>29 13878 6692</entry></row><row rowsep="0"><entry>30 11857 11186</entry></row><row rowsep="0"><entry>31 14395 11493</entry></row><row rowsep="0"><entry>32 16145 12251</entry></row><row rowsep="0"><entry>33 13462 7428</entry></row><row rowsep="0"><entry>34 14526 13119</entry></row><row rowsep="0"><entry>35 2535 11243</entry></row><row rowsep="0"><entry>36 6465 12690</entry></row><row rowsep="0"><entry>37 6872 9334</entry></row><row rowsep="0"><entry>38 1537114023</entry></row><row rowsep="0"><entry>39 8101 10187</entry></row><row rowsep="0"><entry>40 11963 4848</entry></row><row rowsep="0"><entry>41 15125 6119</entry></row><row rowsep="0"><entry>42 8051 14465</entry></row><row rowsep="0"><entry>43 11139 5167</entry></row><row><entry>44 2883 14521</entry></row></tbody></tgroup></table></tables><tables id="tabl0007" num="0007"><table frame="all"><title>Table 7</title><tgroup cols="1" colsep="0"><colspec colnum="1" colname="col1" colwidth="89mm" colsep="1" /><thead><row><entry align="center" valign="top"><b>Address of Parity Bit Accumulators (Rate 4/5)</b></entry></row></thead><tbody><row rowsep="0"><entry>0 149 11212 5575 6360 12559 8108 8505 408 10026 12828</entry></row><row rowsep="0"><entry>1 5237 490 10677 4998 3869 3734 3092 3509 7703 10305</entry></row><row rowsep="0"><entry>2 8742 5553 2820 7085 12116 10485 564 7795 2972 2157</entry></row><row rowsep="0"><entry>3 2699 4304 8350 712 2841 3250 4731 10105 517 7516</entry></row><row rowsep="0"><entry>4 12067 1351 11992 12191 11267 5161 537 6166 4246 2363</entry></row><row rowsep="0"><entry>5 6828 7107 2127 3724 5743 11040 10756 4073 1011 3422</entry></row><row rowsep="0"><entry>6 11259 1216 9526 1466 10816 940 3744 2815 11506 11573</entry></row><row rowsep="0"><entry>7 4549 11507 1118 1274 11751 5207 7854 12803 4047 6484</entry></row><row rowsep="0"><entry>8 8430 4115 9440 413 4455 2262 7915 12402 8579 7052</entry></row><row rowsep="0"><entry>9 3885 9126 5665 4505 2343 253 4707 3742 4166 1556</entry></row><row rowsep="0"><entry>10 1704 8936 6775 8639 8179 7954 8234 7850 8883 8713</entry></row><row rowsep="0"><entry>11 11716 4344 9087 11264 2274 8832 9147 11930 6054 5455</entry></row><row rowsep="0"><entry>12 7323 3970 10329 2170 8262 3854 2087 12899 9497 11700</entry></row><row rowsep="0"><entry>13 4418 1467 2490 5841 817 11453 533 11217 11962 5251</entry></row><row rowsep="0"><entry>14 15414525 7976 3457 9536 7725 3788 2982 6307 5997</entry></row><row rowsep="0"><entry>15 11484 2739 4023 12107 6516 551 2572 6628 8150 9852</entry></row><row rowsep="0"><entry>16 6070 17614627 6534 7913 373011866 1813 12306 8249</entry></row><row rowsep="0"><entry>17 12441 5489 8748 7837 7660 2102 11341 2936 6712 11977</entry></row><row rowsep="0"><entry>18 10155 4210</entry></row><row rowsep="0"><entry>19 1010 10483</entry></row><row rowsep="0"><entry>20 8900 10250</entry></row><row rowsep="0"><entry>21 10243 12278</entry></row><row rowsep="0"><entry>2270704397</entry></row><row rowsep="0"><entry>23 12271 3887</entry></row><row rowsep="0"><entry>24 11980 6836</entry></row><row rowsep="0"><entry>25 9514 4356</entry></row><row rowsep="0"><entry>26 7137 10281</entry></row><row rowsep="0"><entry>27 118812526</entry></row><row rowsep="0"><entry>28 1969 11477</entry></row><row rowsep="0"><entry>29 3044 10921</entry></row><row rowsep="0"><entry>30 2236 8724</entry></row><row rowsep="0"><entry>31 9104 6340</entry></row><row rowsep="0"><entry>32 7342 8582</entry></row><row rowsep="0"><entry>33 11675 10405</entry></row><row rowsep="0"><entry>34 6467 12775</entry></row><row rowsep="0"><entry>35 3186 12198</entry></row><row rowsep="0"><entry>0 9621 11445</entry></row><row rowsep="0"><entry>1 7486 5611</entry></row><row rowsep="0"><entry>2 4319 4879</entry></row><row rowsep="0"><entry>3 2196 344</entry></row><row rowsep="0"><entry>4 7527 6650</entry></row><row rowsep="0"><entry>5 10693 2440</entry></row><row rowsep="0"><entry>6 6755 2706</entry></row><row rowsep="0"><entry>7 5144 5998</entry></row><row rowsep="0"><entry>8 11043 8033</entry></row><row rowsep="0"><entry>9 4846 4435</entry></row><row rowsep="0"><entry>10 4157 9228</entry></row><row rowsep="0"><entry>11 12270 6562</entry></row><row rowsep="0"><entry>12 11954 7592</entry></row><row rowsep="0"><entry>13 7420 2592</entry></row><row rowsep="0"><entry>14 8810 9636</entry></row><row rowsep="0"><entry>15 689 5430</entry></row><row rowsep="0"><entry>16 920 1304</entry></row><row rowsep="0"><entry>17 1253 11934</entry></row><row rowsep="0"><entry>18 9559 6016</entry></row><row rowsep="0"><entry>19 312 7589</entry></row><row rowsep="0"><entry>20 4439 4197</entry></row><row rowsep="0"><entry>21 4002 9555</entry></row><row rowsep="0"><entry>22 12232 7779</entry></row><row rowsep="0"><entry>23 1494 8782</entry></row><row rowsep="0"><entry>24 10749 3969</entry></row><row rowsep="0"><entry>25 4368 3479</entry></row><row rowsep="0"><entry>26 6316 5342</entry></row><row rowsep="0"><entry>27 2455 3493</entry></row><row rowsep="0"><entry>28 12157 7405</entry></row><row rowsep="0"><entry>29 6598 11495</entry></row><row rowsep="0"><entry>30 11805 4455</entry></row><row rowsep="0"><entry>31 9625 2090</entry></row><row rowsep="0"><entry>32 4731 2321</entry></row><row rowsep="0"><entry>33 3578 2608</entry></row><row rowsep="0"><entry>34 8504 1849</entry></row><row rowsep="0"><entry>35 4027 1151</entry></row><row rowsep="0"><entry>0 5647 4935</entry></row><row rowsep="0"><entry>1 4219 1870</entry></row><row rowsep="0"><entry>2 10968 8054</entry></row><row rowsep="0"><entry>3 6970 5447</entry></row><row rowsep="0"><entry>4 3217 5638</entry></row><row rowsep="0"><entry>5 8972 669</entry></row><row rowsep="0"><entry>6 5618 12472</entry></row><row rowsep="0"><entry>7 1457 1280</entry></row><row rowsep="0"><entry>8 8868 3883</entry></row><row rowsep="0"><entry>9 8866 1224</entry></row><row rowsep="0"><entry>10 8371 5972</entry></row><row rowsep="0"><entry>11 266 4405</entry></row><row rowsep="0"><entry>12 3706 3244</entry></row><row rowsep="0"><entry>13 6039 5844</entry></row><row rowsep="0"><entry>14 7200 3283</entry></row><row rowsep="0"><entry>15 1502 11282</entry></row><row rowsep="0"><entry>16 12318 2202</entry></row><row rowsep="0"><entry>17 4523 965</entry></row><row rowsep="0"><entry>18 9587 7011</entry></row><row rowsep="0"><entry>19 2552 2051</entry></row><row rowsep="0"><entry>20 12045 10306</entry></row><row rowsep="0"><entry>21 11070 5104</entry></row><row rowsep="0"><entry>22 6627 6906</entry></row><row rowsep="0"><entry>23 9889 2121</entry></row><row rowsep="0"><entry>24 829 9701</entry></row><row rowsep="0"><entry>252201 1819</entry></row><row rowsep="0"><entry>26 6689 12925</entry></row><row rowsep="0"><entry>27 2139 8757</entry></row><row rowsep="0"><entry>28 12004 5948</entry></row><row rowsep="0"><entry>29 8704 3191</entry></row><row rowsep="0"><entry>30 8171 10933</entry></row><row rowsep="0"><entry>31 6297 7116</entry></row><row rowsep="0"><entry>32 616 7146</entry></row><row rowsep="0"><entry>33 5142 9761</entry></row><row rowsep="0"><entry>34 10377 8138</entry></row><row rowsep="0"><entry>35 7616 5811</entry></row><row rowsep="0"><entry>0 7285 9863</entry></row><row rowsep="0"><entry>17 764 10867</entry></row><row rowsep="0"><entry>2 12343 9019</entry></row><row rowsep="0"><entry>3 4414 8331</entry></row><row rowsep="0"><entry>4 3464 642</entry></row><row rowsep="0"><entry>5 6960 2039</entry></row><row rowsep="0"><entry>6 786 3021</entry></row><row rowsep="0"><entry>7 710 2086</entry></row><row rowsep="0"><entry>8 7423 5601</entry></row><row rowsep="0"><entry>9 8120 4885</entry></row><row rowsep="0"><entry>10 12385 11990</entry></row><row rowsep="0"><entry>11 9739 10034</entry></row><row rowsep="0"><entry>12 424 10162</entry></row><row rowsep="0"><entry>13 1347 7597</entry></row><row rowsep="0"><entry>14 1450 112</entry></row><row rowsep="0"><entry>15 7965 8478</entry></row><row rowsep="0"><entry>16 8945 7397</entry></row><row rowsep="0"><entry>17 6590 8316</entry></row><row rowsep="0"><entry>18 6838 9011</entry></row><row rowsep="0"><entry>19 6174 9410</entry></row><row rowsep="0"><entry>20 255 113</entry></row><row rowsep="0"><entry>21 6197 5835</entry></row><row rowsep="0"><entry>22 12902 3844</entry></row><row rowsep="0"><entry>23 4377 3505</entry></row><row rowsep="0"><entry>24 5478 8672</entry></row><row rowsep="0"><entry>25 4453 2132</entry></row><row rowsep="0"><entry>26 9724 1380</entry></row><row rowsep="0"><entry>27 12131 11526</entry></row><row rowsep="0"><entry>28 12323 9511</entry></row><row rowsep="0"><entry>29 8231 1752</entry></row><row rowsep="0"><entry>30 497 9022</entry></row><row rowsep="0"><entry>31 9288 3080</entry></row><row rowsep="0"><entry>32 2481 7515</entry></row><row rowsep="0"><entry>33 2696 268</entry></row><row rowsep="0"><entry>34 4023 12341</entry></row><row><entry>35 7108 5553</entry></row></tbody></tgroup></table></tables><tables id="tabl0008" num="0008"><table frame="all"><title>Table 8</title><tgroup cols="1" colsep="0"><colspec colnum="1" colname="col1" colwidth="111mm" colsep="1" /><thead><row><entry align="center" valign="top"><b>Address of Parity Bit Accumulators (Rate 3/5)</b></entry></row></thead><tbody><row rowsep="0"><entry>22422 10282 11626 19997 11161 2922 3122 99 5625 17064 8270 179</entry></row><row rowsep="0"><entry>25087 16218 17015 828 20041 25656 4186 11629 22599 17305 22515 6463</entry></row><row rowsep="0"><entry>11049 22853 25706 14388 5500 19245 8732 2177 13555 11346 17265 3069</entry></row><row rowsep="0"><entry>1658122225 12563 19717 23577 11555 25496 6853 25403 5218 15925 21766</entry></row><row rowsep="0"><entry>16529 14487 7643 10715 17442 11119 5679 14155 24213 21000 1116 15620</entry></row><row rowsep="0"><entry>5340 8636 16693 1434 5635 6516 9482 20189 1066 15013 25361 14243</entry></row><row rowsep="0"><entry>18506 22236 20912 8952 5421 15691 6126 21595 500 6904 13059 6802</entry></row><row rowsep="0"><entry>8433 4694 5524 14216 3685 1972125420 9937 23813 9047 25651 16826</entry></row><row rowsep="0"><entry>21500 24814 6344 17382 7064 13929 4004 16552 12818 8720 5286 2206</entry></row><row rowsep="0"><entry>22517 2429 19065 2921 21611 1873 7507 5661 23006 23128 20543 19777</entry></row><row rowsep="0"><entry>1770 4636 20900 149319247 12340 11008 12966 4471 2731 16445 791</entry></row><row rowsep="0"><entry>6635 14556 18865 22421 2212412697 9803 25485 7744 18254 11313 9004</entry></row><row rowsep="0"><entry>19982 23963 18912 7206 12500 4382 20067 6177 21007 1195 23547 24837</entry></row><row rowsep="0"><entry>756 11158 14646 20534 3647 17728 11676 11843 12937 4402 8261 22944</entry></row><row rowsep="0"><entry>9306 24009 10012 11081 3746 24325 8060 19826 842 8836 2898 5019</entry></row><row rowsep="0"><entry>7575 7455 25244 4736 14400 22981 5543 8006 24203 13053 1120 5128</entry></row><row rowsep="0"><entry>3482 9270 13059 15825 7453 23747 3656 24585 16542 17507 22462 14670</entry></row><row rowsep="0"><entry>15627 15290 4198 22748 584213395 23918 16985 14929 3726 25350 24157</entry></row><row rowsep="0"><entry>24896 16365 16423 13461 16615 8107 24741 3604 25904 8716 9604 20365</entry></row><row rowsep="0"><entry>3729 17245 18448 9862 20831 25326 20517 24618 13282 5099 14183 8804</entry></row><row rowsep="0"><entry>16455 17646 15376 18194 25528 1777 6066 21855 14372 12517 4488 17490</entry></row><row rowsep="0"><entry>1400 8135 23375 20879 8476 4084 12936 25536 22309 16582 6402 24360</entry></row><row rowsep="0"><entry>25119 23586 128 4761 10443 22536 8607 9752 25446 15053 1856 4040</entry></row><row rowsep="0"><entry>377 21160 13474 5451 17170 5938 10256 11972 24210 17833 22047 16108</entry></row><row rowsep="0"><entry>13075 9648 24546 13150 23867 7309 19798 2988 16858 4825 23950 15125</entry></row><row rowsep="0"><entry>20526 3553 11525 23366 2452 17626 19265 20172 18060 24593 13255 1552</entry></row><row rowsep="0"><entry>18839 2113220119 15214 14705 7096 10174 5663 18651 19700 12524 14033</entry></row><row rowsep="0"><entry>4127 2971 17499 16287 22368 21463 7943 18880 5567 8047 23363 6797</entry></row><row rowsep="0"><entry>1065124471 14325 40817258 4949 7044 1078 797 22910 20474 4318</entry></row><row rowsep="0"><entry>21374 1323122985 5056 382123718 14178 9978 19030 23594 8895 25358</entry></row><row rowsep="0"><entry>6199 22056 7749 13310 3999 23697 16445 22636 5225 22437 24153 9442</entry></row><row rowsep="0"><entry>7978 12177 2893 20778 3175 8645 11863 24623 10311 25767 17057 3691</entry></row><row rowsep="0"><entry>20473 11294 9914 22815 2574 8439 3699 5431 24840 21908 16088 18244</entry></row><row rowsep="0"><entry>8208 5755 19059 8541 24924 6454 11234 10492 16406 10831 11436 9649</entry></row><row rowsep="0"><entry>16264 11275 24953 2347 12667 19190 7257 7174 24819 2938 2522 11749</entry></row><row rowsep="0"><entry>3627 5969 13862 1538 23176 6353 2855 17720 2472 7428 573 15036</entry></row><row rowsep="0"><entry>0 18539 18661</entry></row><row rowsep="0"><entry>1 10502 3002</entry></row><row rowsep="0"><entry>2 9368 10761</entry></row><row rowsep="0"><entry>3 12299 7828</entry></row><row rowsep="0"><entry>4 15048 13362</entry></row><row rowsep="0"><entry>5 18444 24640</entry></row><row rowsep="0"><entry>6 20775 19175</entry></row><row rowsep="0"><entry>7 18970 10971</entry></row><row rowsep="0"><entry>8 5329 19982</entry></row><row rowsep="0"><entry>9 11296 18655</entry></row><row rowsep="0"><entry>10 15046 20659</entry></row><row rowsep="0"><entry>117300 22140</entry></row><row rowsep="0"><entry>12 22029 14477</entry></row><row rowsep="0"><entry>1311129742</entry></row><row rowsep="0"><entry>14 13254 13813</entry></row><row rowsep="0"><entry>15 19234 13273</entry></row><row rowsep="0"><entry>16 6079 21122</entry></row><row rowsep="0"><entry>17 22782 5828</entry></row><row rowsep="0"><entry>18 19775 4247</entry></row><row rowsep="0"><entry>19 1660 19413</entry></row><row rowsep="0"><entry>20 4403 3649</entry></row><row rowsep="0"><entry>21 13371 25851</entry></row><row rowsep="0"><entry>22 22770 21784</entry></row><row rowsep="0"><entry>23 10757 14131</entry></row><row rowsep="0"><entry>24 1607121617</entry></row><row rowsep="0"><entry>25 6393 3725</entry></row><row rowsep="0"><entry>26 597 19968</entry></row><row rowsep="0"><entry>27 5743 8084</entry></row><row rowsep="0"><entry>28 6770 9548</entry></row><row rowsep="0"><entry>29 4285 17542</entry></row><row rowsep="0"><entry>30 13568 22599</entry></row><row rowsep="0"><entry>31 1786 4617</entry></row><row rowsep="0"><entry>32 23238 11648</entry></row><row rowsep="0"><entry>33 19627 2030</entry></row><row rowsep="0"><entry>34 13601 13458</entry></row><row rowsep="0"><entry>35 13740 17328</entry></row><row rowsep="0"><entry>36 25012 13944</entry></row><row rowsep="0"><entry>37 22513 6687</entry></row><row rowsep="0"><entry>38 4934 12587</entry></row><row rowsep="0"><entry>39 21197 5133</entry></row><row rowsep="0"><entry>40 22705 6938</entry></row><row rowsep="0"><entry>417534 24633</entry></row><row rowsep="0"><entry>42 24400 12797</entry></row><row rowsep="0"><entry>43 21911 25712</entry></row><row rowsep="0"><entry>44 12039 1140</entry></row><row rowsep="0"><entry>45 24306 1021</entry></row><row rowsep="0"><entry>46 14012 20747</entry></row><row rowsep="0"><entry>47 11265 15219</entry></row><row rowsep="0"><entry>48 4670 15531</entry></row><row rowsep="0"><entry>49 9417 14359</entry></row><row rowsep="0"><entry>50 2415 6504</entry></row><row rowsep="0"><entry>51 24964 24690</entry></row><row rowsep="0"><entry>52 14443 8816</entry></row><row rowsep="0"><entry>53 6926 1291</entry></row><row rowsep="0"><entry>54 6209 20806</entry></row><row rowsep="0"><entry>55 13915 4079</entry></row><row rowsep="0"><entry>56 24410 13196</entry></row><row rowsep="0"><entry>57 13505 6117</entry></row><row rowsep="0"><entry>58 9869 8220</entry></row><row rowsep="0"><entry>59 1570 6044</entry></row><row rowsep="0"><entry>60 25780 17387</entry></row><row rowsep="0"><entry>61 20671 24913</entry></row><row rowsep="0"><entry>62 24558 20591</entry></row><row rowsep="0"><entry>63 12402 3702</entry></row><row rowsep="0"><entry>64 8314 1357</entry></row><row rowsep="0"><entry>65 20071 14616</entry></row><row rowsep="0"><entry>66 17014 3688</entry></row><row rowsep="0"><entry>67 19837 946</entry></row><row rowsep="0"><entry>68 15195 12136</entry></row><row rowsep="0"><entry>69 7758 22808</entry></row><row rowsep="0"><entry>70 3564 2925</entry></row><row><entry>71 3434 7769</entry></row></tbody></tgroup></table></tables><tables id="tabl0009" num="0009"><table frame="all"><title>Table 9</title><tgroup cols="1" colsep="0"><colspec colnum="1" colname="col1" colwidth="73mm" colsep="1" /><thead><row><entry align="center" valign="top"><b>Address of Parity Bit Accumulators (Rate 8/9)</b></entry></row></thead><tbody><row rowsep="0"><entry>0 6235 2848 3222</entry></row><row rowsep="0"><entry>1 5800 3492 5348</entry></row><row rowsep="0"><entry>2 2757 927 90</entry></row><row rowsep="0"><entry>3 69614516 4739</entry></row><row rowsep="0"><entry>4 1172 3237 6264</entry></row><row rowsep="0"><entry>5 1927 2425 3683</entry></row><row rowsep="0"><entry>6 3714 6309 2495</entry></row><row rowsep="0"><entry>7 3070 6342 7154</entry></row><row rowsep="0"><entry>8 2428 613 3761</entry></row><row rowsep="0"><entry>9 2906 264 5927</entry></row><row rowsep="0"><entry>10 1716 1950 4273</entry></row><row rowsep="0"><entry>114613 6179 3491</entry></row><row rowsep="0"><entry>12 4865 3286 6005</entry></row><row rowsep="0"><entry>13 1343 5923 3529</entry></row><row rowsep="0"><entry>14 4589 4035 2132</entry></row><row rowsep="0"><entry>15 1579 3920 6737</entry></row><row rowsep="0"><entry>16 1644 1191 5998</entry></row><row rowsep="0"><entry>17 1482 23814620</entry></row><row rowsep="0"><entry>18 6791 6014 6596</entry></row><row rowsep="0"><entry>19 2738 5918 3786</entry></row><row rowsep="0"><entry>0 5156 6166</entry></row><row rowsep="0"><entry>1 1504 4356</entry></row><row rowsep="0"><entry>2 1301904</entry></row><row rowsep="0"><entry>3 6027 3187</entry></row><row rowsep="0"><entry>4 6718 759</entry></row><row rowsep="0"><entry>5 6240 2870</entry></row><row rowsep="0"><entry>6 2343 1311</entry></row><row rowsep="0"><entry>7 1039 5465</entry></row><row rowsep="0"><entry>8 6617 2513</entry></row><row rowsep="0"><entry>9 1588 5222</entry></row><row rowsep="0"><entry>10 6561 535</entry></row><row rowsep="0"><entry>11 4765 2054</entry></row><row rowsep="0"><entry>12 5966 6892</entry></row><row rowsep="0"><entry>13 1969 3869</entry></row><row rowsep="0"><entry>14 3571 2420</entry></row><row rowsep="0"><entry>15 4632 981</entry></row><row rowsep="0"><entry>16 3215 4163</entry></row><row rowsep="0"><entry>179733117</entry></row><row rowsep="0"><entry>18 3802 6198</entry></row><row rowsep="0"><entry>19 3794 3948</entry></row><row rowsep="0"><entry>0 3196 6126</entry></row><row rowsep="0"><entry>1 573 1909</entry></row><row rowsep="0"><entry>2 850 4034</entry></row><row rowsep="0"><entry>3 5622 1601</entry></row><row rowsep="0"><entry>4 6005 524</entry></row><row rowsep="0"><entry>5 52515783</entry></row><row rowsep="0"><entry>6 172 2032</entry></row><row rowsep="0"><entry>7 1875 2475</entry></row><row rowsep="0"><entry>8 497 1291</entry></row><row rowsep="0"><entry>9 2566 3430</entry></row><row rowsep="0"><entry>10 1249 740</entry></row><row rowsep="0"><entry>11 2944 1948</entry></row><row rowsep="0"><entry>12 6528 2899</entry></row><row rowsep="0"><entry>13 2243 3616</entry></row><row rowsep="0"><entry>14 867 3733</entry></row><row rowsep="0"><entry>15 1374 4702</entry></row><row rowsep="0"><entry>16 4698 2285</entry></row><row rowsep="0"><entry>17 4760 3917</entry></row><row rowsep="0"><entry>18 1859 4058</entry></row><row rowsep="0"><entry>19 6141 3527</entry></row><row rowsep="0"><entry>0 2148 5066</entry></row><row rowsep="0"><entry>1 1306 145</entry></row><row rowsep="0"><entry>2 2319 871</entry></row><row rowsep="0"><entry>3 3463 1061</entry></row><row rowsep="0"><entry>4 5554 6647</entry></row><row rowsep="0"><entry>5 5837 339</entry></row><row rowsep="0"><entry>6 5821 4932</entry></row><row rowsep="0"><entry>7 6356 4756</entry></row><row rowsep="0"><entry>8 3930 418</entry></row><row rowsep="0"><entry>9 211 3094</entry></row><row rowsep="0"><entry>10 1007 4928</entry></row><row rowsep="0"><entry>11 3584 1235</entry></row><row rowsep="0"><entry>12 6982 2869</entry></row><row rowsep="0"><entry>13 1612 1013</entry></row><row rowsep="0"><entry>14 953 4964</entry></row><row rowsep="0"><entry>15 4555 4410</entry></row><row rowsep="0"><entry>16 4925 4842</entry></row><row rowsep="0"><entry>17 5778 600</entry></row><row rowsep="0"><entry>18 6509 2417</entry></row><row rowsep="0"><entry>19 1260 4903</entry></row><row rowsep="0"><entry>0 3369 3031</entry></row><row rowsep="0"><entry>1 3557 3224</entry></row><row rowsep="0"><entry>2 3028 583</entry></row><row rowsep="0"><entry>3 3258 440</entry></row><row rowsep="0"><entry>4 6226 6655</entry></row><row rowsep="0"><entry>5 4895 1094</entry></row><row rowsep="0"><entry>6 1481 6847</entry></row><row rowsep="0"><entry>7 4433 1932</entry></row><row rowsep="0"><entry>8 2107 1649</entry></row><row rowsep="0"><entry>9 2119 2065</entry></row><row rowsep="0"><entry>10 4003 6388</entry></row><row rowsep="0"><entry>11 6720 3622</entry></row><row rowsep="0"><entry>12 3694 4521</entry></row><row rowsep="0"><entry>13 1164 7050</entry></row><row rowsep="0"><entry>14 1965 3613</entry></row><row rowsep="0"><entry>15 433 166</entry></row><row rowsep="0"><entry>16 29701796</entry></row><row rowsep="0"><entry>17 4652 3218</entry></row><row rowsep="0"><entry>18 1762 4777</entry></row><row rowsep="0"><entry>19 5736 1399</entry></row><row rowsep="0"><entry>0 970 2572</entry></row><row rowsep="0"><entry>1 2062 6599</entry></row><row rowsep="0"><entry>2 4597 4870</entry></row><row rowsep="0"><entry>3 1228 6913</entry></row><row rowsep="0"><entry>4 4159 1037</entry></row><row rowsep="0"><entry>5 2916 2362</entry></row><row rowsep="0"><entry>6 395 1226</entry></row><row rowsep="0"><entry>7 69114548</entry></row><row rowsep="0"><entry>8 4618 2241</entry></row><row rowsep="0"><entry>9 4120 4280</entry></row><row rowsep="0"><entry>10 5825 474</entry></row><row rowsep="0"><entry>11 2154 5558</entry></row><row rowsep="0"><entry>12 3793 5471</entry></row><row rowsep="0"><entry>13 5707 1595</entry></row><row rowsep="0"><entry>14 1403 325</entry></row><row rowsep="0"><entry>15 6601 5183</entry></row><row rowsep="0"><entry>16 6369 4569</entry></row><row rowsep="0"><entry>17 4846 896</entry></row><row rowsep="0"><entry>18 7092 6184</entry></row><row rowsep="0"><entry>19 6764 7127</entry></row><row rowsep="0"><entry>0 6358 1951</entry></row><row rowsep="0"><entry>1 3117 6960</entry></row><row rowsep="0"><entry>2 2710 7062</entry></row><row rowsep="0"><entry>3 1133 3604</entry></row><row rowsep="0"><entry>4 3694 657</entry></row><row rowsep="0"><entry>5 1355 110</entry></row><row rowsep="0"><entry>6 3329 6736</entry></row><row rowsep="0"><entry>7 2505 3407</entry></row><row rowsep="0"><entry>8 2462 4806</entry></row><row rowsep="0"><entry>9 4216 214</entry></row><row rowsep="0"><entry>10 5348 5619</entry></row><row rowsep="0"><entry>11 6627 6243</entry></row><row rowsep="0"><entry>12 2644 5073</entry></row><row rowsep="0"><entry>13 4212 5088</entry></row><row rowsep="0"><entry>14 3463 3889</entry></row><row rowsep="0"><entry>15 5306 478</entry></row><row rowsep="0"><entry>16 4320 6121</entry></row><row rowsep="0"><entry>17 3961 1125</entry></row><row rowsep="0"><entry>18 5699 1195</entry></row><row rowsep="0"><entry>19 6511 792</entry></row><row rowsep="0"><entry>0 3934 2778</entry></row><row rowsep="0"><entry>1 3238 6587</entry></row><row rowsep="0"><entry>2 1111 6596</entry></row><row rowsep="0"><entry>3 1457 6226</entry></row><row rowsep="0"><entry>4 1446 3885</entry></row><row rowsep="0"><entry>5 3907 4043</entry></row><row rowsep="0"><entry>6 6839 2873</entry></row><row rowsep="0"><entry>7 1733 5615</entry></row><row rowsep="0"><entry>8 5202 4269</entry></row><row rowsep="0"><entry>9 3024 4722</entry></row><row rowsep="0"><entry>10 5445 6372</entry></row><row rowsep="0"><entry>11 370 1828</entry></row><row rowsep="0"><entry>12 4695 1600</entry></row><row rowsep="0"><entry>13 6802074</entry></row><row rowsep="0"><entry>14 1801 6690</entry></row><row rowsep="0"><entry>15 2669 1377</entry></row><row rowsep="0"><entry>16 2463 1681</entry></row><row rowsep="0"><entry>17 5972 5171</entry></row><row rowsep="0"><entry>18 5728 4284</entry></row><row><entry>19 1696 1459</entry></row></tbody></tgroup></table></tables><tables id="tabl0010" num="0010"><table frame="all"><title>Table 10</title><tgroup cols="1" colsep="0"><colspec colnum="1" colname="col1" colwidth="74mm" colsep="1" /><thead><row><entry align="center" valign="top"><b>Address of Parity Bit Accumulators (Rate 9/10)</b></entry></row></thead><tbody><row rowsep="0"><entry>0 5611 2563 2900</entry></row><row rowsep="0"><entry>1 5220 3143 4813</entry></row><row rowsep="0"><entry>2 2481 834 81</entry></row><row rowsep="0"><entry>3 6265 4064 4265</entry></row><row rowsep="0"><entry>4 1055 2914 5638</entry></row><row rowsep="0"><entry>5 1734 2182 3315</entry></row><row rowsep="0"><entry>6 3342 5678 2246</entry></row><row rowsep="0"><entry>7 2185 552 3385</entry></row><row rowsep="0"><entry>8 2615 236 5334</entry></row><row rowsep="0"><entry>9 1546 1755 3846</entry></row><row rowsep="0"><entry>10 4154 5561 3142</entry></row><row rowsep="0"><entry>114382 2957 5400</entry></row><row rowsep="0"><entry>12 1209 5329 3179</entry></row><row rowsep="0"><entry>13 1421 3528 6063</entry></row><row rowsep="0"><entry>14 1480 1072 5398</entry></row><row rowsep="0"><entry>15 3843 1777 4369</entry></row><row rowsep="0"><entry>16 1334 2145 4163</entry></row><row rowsep="0"><entry>17 2368 5055 260</entry></row><row rowsep="0"><entry>0 6118 5405</entry></row><row rowsep="0"><entry>1 2994 4370</entry></row><row rowsep="0"><entry>2 3405 1669</entry></row><row rowsep="0"><entry>3 4640 5550</entry></row><row rowsep="0"><entry>4 1354 3921</entry></row><row rowsep="0"><entry>5 117 1713</entry></row><row rowsep="0"><entry>6 5425 2866</entry></row><row rowsep="0"><entry>7 6047 683</entry></row><row rowsep="0"><entry>8 5616 2582</entry></row><row rowsep="0"><entry>9 2108 1179</entry></row><row rowsep="0"><entry>10 933 4921</entry></row><row rowsep="0"><entry>11 5953 2261</entry></row><row rowsep="0"><entry>12 1430 4699</entry></row><row rowsep="0"><entry>13 5905 480</entry></row><row rowsep="0"><entry>14 4289 1846</entry></row><row rowsep="0"><entry>15 5374 6208</entry></row><row rowsep="0"><entry>16 1775 3476</entry></row><row rowsep="0"><entry>17 3216 2178</entry></row><row rowsep="0"><entry>0 4165 884</entry></row><row rowsep="0"><entry>1 2896 3744</entry></row><row rowsep="0"><entry>2 874 2801</entry></row><row rowsep="0"><entry>3 3423 5579</entry></row><row rowsep="0"><entry>4 3404 3552</entry></row><row rowsep="0"><entry>5 2876 5515</entry></row><row rowsep="0"><entry>6 516 1719</entry></row><row rowsep="0"><entry>7 765 3631</entry></row><row rowsep="0"><entry>8 5059 1441</entry></row><row rowsep="0"><entry>9 5629 598</entry></row><row rowsep="0"><entry>10 5405 473</entry></row><row rowsep="0"><entry>11 4724 5210</entry></row><row rowsep="0"><entry>12 155 1832</entry></row><row rowsep="0"><entry>13 1689 2229</entry></row><row rowsep="0"><entry>14 449 1164</entry></row><row rowsep="0"><entry>15 2308 3088</entry></row><row rowsep="0"><entry>16 1122 669</entry></row><row rowsep="0"><entry>17 2268 5758</entry></row><row rowsep="0"><entry>0 5878 2609</entry></row><row rowsep="0"><entry>1 782 3359</entry></row><row rowsep="0"><entry>2 1231 4231</entry></row><row rowsep="0"><entry>3 4225 2052</entry></row><row rowsep="0"><entry>4 4286 3517</entry></row><row rowsep="0"><entry>5 5531 3184</entry></row><row rowsep="0"><entry>6 1935 4560</entry></row><row rowsep="0"><entry>7 1174 131</entry></row><row rowsep="0"><entry>8 3115 956</entry></row><row rowsep="0"><entry>9 3129 1088</entry></row><row rowsep="0"><entry>10 5238 4440</entry></row><row rowsep="0"><entry>11 5722 4280</entry></row><row rowsep="0"><entry>12 3540 375</entry></row><row rowsep="0"><entry>13 191 2782</entry></row><row rowsep="0"><entry>14 906 4432</entry></row><row rowsep="0"><entry>15 3225 1111</entry></row><row rowsep="0"><entry>16 6296 2583</entry></row><row rowsep="0"><entry>17 1457 903</entry></row><row rowsep="0"><entry>0 855 4475</entry></row><row rowsep="0"><entry>1 4097 3970</entry></row><row rowsep="0"><entry>2 4433 4361</entry></row><row rowsep="0"><entry>3 5198 541</entry></row><row rowsep="0"><entry>4 11464426</entry></row><row rowsep="0"><entry>5 3202 2902</entry></row><row rowsep="0"><entry>6 2724 525</entry></row><row rowsep="0"><entry>7 1083 4124</entry></row><row rowsep="0"><entry>8 2326 6003</entry></row><row rowsep="0"><entry>9 5605 5990</entry></row><row rowsep="0"><entry>10 4376 1579</entry></row><row rowsep="0"><entry>11 4407 984</entry></row><row rowsep="0"><entry>12 1332 6163</entry></row><row rowsep="0"><entry>13 5359 3975</entry></row><row rowsep="0"><entry>14 1907 1854</entry></row><row rowsep="0"><entry>15 3601 5748</entry></row><row rowsep="0"><entry>16 6056 3266</entry></row><row rowsep="0"><entry>17 3322 4085</entry></row><row rowsep="0"><entry>0 1768 3244</entry></row><row rowsep="0"><entry>1 2149 144</entry></row><row rowsep="0"><entry>2 1589 4291</entry></row><row rowsep="0"><entry>3 5154 1252</entry></row><row rowsep="0"><entry>4 1855 5939</entry></row><row rowsep="0"><entry>5 4820 2706</entry></row><row rowsep="0"><entry>6 1475 3360</entry></row><row rowsep="0"><entry>7 4266 693</entry></row><row rowsep="0"><entry>8 4156 2018</entry></row><row rowsep="0"><entry>9 2103 752</entry></row><row rowsep="0"><entry>10 3710 3853</entry></row><row rowsep="0"><entry>11 5123 931</entry></row><row rowsep="0"><entry>12 6146 3323</entry></row><row rowsep="0"><entry>13 1939 5002</entry></row><row rowsep="0"><entry>14 5140 1437</entry></row><row rowsep="0"><entry>15 1263 293</entry></row><row rowsep="0"><entry>16 5949 4665</entry></row><row rowsep="0"><entry>17 4548 6380</entry></row><row rowsep="0"><entry>0 3171 4690</entry></row><row rowsep="0"><entry>1 5204 2114</entry></row><row rowsep="0"><entry>2 6384 5565</entry></row><row rowsep="0"><entry>3 5722 1757</entry></row><row rowsep="0"><entry>4 2805 6264</entry></row><row rowsep="0"><entry>5 1202 2616</entry></row><row rowsep="0"><entry>6 1018 3244</entry></row><row rowsep="0"><entry>7 4018 5289</entry></row><row rowsep="0"><entry>8 2257 3067</entry></row><row rowsep="0"><entry>9 2483 3073</entry></row><row rowsep="0"><entry>10 1196 5329</entry></row><row rowsep="0"><entry>11 649 3918</entry></row><row rowsep="0"><entry>12 3791 4581</entry></row><row rowsep="0"><entry>13 5028 3803</entry></row><row rowsep="0"><entry>14 3119 3506</entry></row><row rowsep="0"><entry>15 4779 431</entry></row><row rowsep="0"><entry>16 3888 5510</entry></row><row rowsep="0"><entry>17 4387 4084</entry></row><row rowsep="0"><entry>0 5836 1692</entry></row><row rowsep="0"><entry>1 5126 1078</entry></row><row rowsep="0"><entry>2 5721 6165</entry></row><row rowsep="0"><entry>3 3540 2499</entry></row><row rowsep="0"><entry>4 2225 6348</entry></row><row rowsep="0"><entry>5 1044 1484</entry></row><row rowsep="0"><entry>6 6323 4042</entry></row><row rowsep="0"><entry>7 1313 5603</entry></row><row rowsep="0"><entry>8 1303 3496</entry></row><row rowsep="0"><entry>9 3516 3639</entry></row><row rowsep="0"><entry>10 51612293</entry></row><row rowsep="0"><entry>11 4682 3845</entry></row><row rowsep="0"><entry>12 3045 643</entry></row><row rowsep="0"><entry>13 2818 2616</entry></row><row rowsep="0"><entry>14 3267 649</entry></row><row rowsep="0"><entry>15 6236 593</entry></row><row rowsep="0"><entry>16 646 2948</entry></row><row rowsep="0"><entry>17 4213 1442</entry></row><row rowsep="0"><entry>0 5779 1596</entry></row><row rowsep="0"><entry>1 2403 1237</entry></row><row rowsep="0"><entry>2 2217 1514</entry></row><row rowsep="0"><entry>3 5609 716</entry></row><row rowsep="0"><entry>4 5155 3858</entry></row><row rowsep="0"><entry>5 1517 1312</entry></row><row rowsep="0"><entry>6 2554 3158</entry></row><row rowsep="0"><entry>7 5280 2643</entry></row><row rowsep="0"><entry>8 4990 1353</entry></row><row rowsep="0"><entry>9 5648 1170</entry></row><row rowsep="0"><entry>10 1152 4366</entry></row><row rowsep="0"><entry>11 3561 5368</entry></row><row rowsep="0"><entry>12 3581 1411</entry></row><row rowsep="0"><entry>13 5647 4661</entry></row><row rowsep="0"><entry>14 1542 5401</entry></row><row rowsep="0"><entry>15 5078 2687</entry></row><row rowsep="0"><entry>16 3161 755</entry></row><row><entry>17 3392 1991</entry></row></tbody></tgroup></table></tables>
As regards the BCH encoder 211, the BCH code parameters are enumerated in Table 11. <tables id="tabl0011" num="0011"><table frame="all"><title>Table 11</title><tgroup cols="4"><colspec colnum="1" colname="col1" colwidth="30mm" /><colspec colnum="2" colname="col2" colwidth="47mm" /><colspec colnum="3" colname="col3" colwidth="50mm" /><colspec colnum="4" colname="col4" colwidth="38mm" /><thead><row rowsep="0"><entry align="center" valign="top"><b>LDPC Code Rate</b></entry><entry align="center" valign="top"><b>BCH Uncoded Block Length</b></entry><entry align="center" valign="top"><b>BCH Coded Block Length</b><i>n<sub>bch</sub></i></entry><entry align="center" valign="top"><b>BCH Error Correction</b></entry></row><row><entry align="center" valign="top" /><entry align="center" valign="top"><i>k<sub>bch</sub></i></entry><entry align="center" valign="top" /><entry align="center" valign="top"><b>(bits)</b></entry></row></thead><tbody><row><entry align="center">1/2</entry><entry align="center">32208</entry><entry align="center">32400</entry><entry align="center">12</entry></row><row><entry align="center">2/3</entry><entry align="center">43040</entry><entry align="center">43200</entry><entry align="center">10</entry></row><row><entry align="center">3/4</entry><entry align="center">48408</entry><entry align="center">48600</entry><entry align="center">12</entry></row><row><entry align="center">4/5</entry><entry align="center">51648</entry><entry align="center">51840</entry><entry align="center">12</entry></row><row><entry align="center">5/6</entry><entry align="center">53840</entry><entry align="center">54000</entry><entry align="center">10</entry></row><row><entry align="center">3/5</entry><entry align="center">38688</entry><entry align="center">38880</entry><entry align="center">12</entry></row><row><entry align="center">8/9</entry><entry align="center">57472</entry><entry align="center">57600</entry><entry align="center">8</entry></row><row><entry align="center">9/10</entry><entry align="center">58192</entry><entry align="center">58320</entry><entry align="center">8</entry></row></tbody></tgroup></table></tables>
It is noted that in the above table, <i>n<sub>bch</sub></i> = <i>k<sub>ldpc</sub>.</i>
The generator polynomial of the <i>t</i> error correcting BCH encoder 211 is obtained by multiplying the first <i>t</i> polynomials in the following list of Table 12: <tables id="tabl0012" num="0012"><table frame="all"><title>Table 12</title><tgroup cols="2"><colspec colnum="1" colname="col1" colwidth="14mm" /><colspec colnum="2" colname="col2" colwidth="73mm" /><tbody><row><entry align="center">g<sub>1</sub>(x)</entry><entry>1+x<sup>2</sup>+x<sup>3</sup>+x<sup>5</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>2</sub>(x)</entry><entry>1+x+x<sup>4</sup>+x<sup>5</sup>+x<sup>6</sup>+x<sup>8</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>3</sub>(x)</entry><entry>1+x<sup>2</sup>+x<sup>3</sup>+x<sup>4</sup>+x<sup>5</sup>+x<sup>7</sup>+x<sup>8</sup>+x<sup>9</sup>+x<sup>10</sup>+x<sup>11</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>4</sub>(x)</entry><entry>1+x<sup>2</sup>+x<sup>4</sup>+x<sup>6</sup>+x<sup>9</sup>+x<sup>11</sup>+x<sup>12</sup>+x<sup>14</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>5</sub>(x)</entry><entry>1+x+x<sup>2</sup>+x<sup>3</sup>+x<sup>5</sup>+x<sup>8</sup>+x<sup>9</sup>+x<sup>10</sup>+x<sup>11</sup>+x<sup>12</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>6</sub>(x)</entry><entry>1+x<sup>2</sup>+x<sup>4</sup>+x<sup>5</sup>+x<sup>7</sup>+x<sup>8</sup>+x<sup>9</sup>+x<sup>10</sup>+x<sup>12</sup>+x<sup>13</sup>+x<sup>14</sup>+x<sup>15</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>7</sub>(x)</entry><entry>1+x<sup>2</sup>+x<sup>5</sup>+x<sup>6</sup>+x<sup>8</sup>+x<sup>9</sup>+x<sup>10</sup>+x<sup>11</sup>+x<sup>13</sup>+x<sup>15</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>8</sub>(x)</entry><entry>1+x+x<sup>2</sup>+x<sup>5</sup>+x<sup>6</sup>+x<sup>8</sup>+x<sup>9</sup>+x<sup>12</sup>+x<sup>13</sup>+x<sup>14</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>9</sub>(x)</entry><entry>1+x<sup>5</sup>+x<sup>7</sup>+x<sup>9</sup>+x<sup>10</sup>+x<sup>11</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>10</sub>(x)</entry><entry>1+x+x<sup>2</sup>+x<sup>5</sup>+x<sup>7</sup>+x<sup>8</sup>+x<sup>10</sup>+x<sup>12</sup>+x<sup>13</sup> +x<sup>14</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>11</sub>(x)</entry><entry>1+x<sup>2</sup>+x<sup>3</sup>+x<sup>5</sup>+x<sup>9</sup>+x<sup>11</sup>+x<sup>12</sup>+x<sup>13</sup>+x<sup>16</sup></entry></row><row><entry align="center">g<sub>12</sub>(x)</entry><entry>1+x+x<sup>5</sup>+x<sup>6</sup>+x<sup>7</sup>+x<sup>9</sup>+x<sup>11</sup>+x<sup>12</sup>+x<sup>16</sup></entry></row></tbody></tgroup></table></tables>
BCH encoding of information bits <maths id="math0034" num=""><math display="inline"><mi>m</mi><mo>=</mo><mfenced><msub><mi>m</mi><mrow><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msub><mi>m</mi><mrow><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>2</mn></mrow></msub><mo>…</mo><msub><mi>m</mi><mn>1</mn></msub><mo></mo><msub><mi>m</mi><mn>0</mn></msub></mfenced></math><img file="EP1518328B1_D0034.tif" /></maths> onto a codeword <maths id="math0035" num=""><math display="inline"><mi>c</mi><mo>=</mo><mfenced><msub><mi>m</mi><mrow><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msub><mi>m</mi><mrow><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>2</mn></mrow></msub><mo>…</mo><msub><mi>m</mi><mn>1</mn></msub><mo></mo><msub><mi>m</mi><mn>0</mn></msub><mo></mo><msub><mi>d</mi><mrow><msub><mi>n</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msub><mi>d</mi><mrow><msub><mi>n</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>2</mn></mrow></msub><mo>…</mo><msub><mi>d</mi><mn>1</mn></msub><mo></mo><msub><mi>d</mi><mn>0</mn></msub></mfenced></math><img file="EP1518328B1_D0035.tif" /></maths> is achieved as follows. The message polynomial <maths id="math0036" num=""><math display="inline"><mi>m</mi><mfenced><mi>x</mi></mfenced><mo>=</mo><msub><mi>m</mi><mrow><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msup><mi>x</mi><mrow><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msup><mo>+</mo><msub><mi>m</mi><mrow><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>2</mn></mrow></msub><mo></mo><msup><mi>x</mi><mrow><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>2</mn></mrow></msup><mo>+</mo><mo>…</mo><mo>+</mo><msub><mi>m</mi><mn>1</mn></msub><mo></mo><mi>x</mi><mo>+</mo><msub><mi>m</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0036.tif" /></maths> is multiplied by <maths id="math0037" num=""><math display="inline"><msup><mi>x</mi><mrow><msub><mi>n</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub></mrow></msup></math><img file="EP1518328B1_D0037.tif" /></maths>. Next, <maths id="math0038" num=""><math display="inline"><msup><mi>x</mi><mrow><msub><mi>n</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub></mrow></msup><mspace width="1em" /><mi>m</mi><mfenced><mi>x</mi></mfenced></math><img file="EP1518328B1_D0038.tif" /></maths> divided by <i>g</i>(<i>x</i>). With <maths id="math0039" num=""><math display="inline"><mi>d</mi><mfenced><mi>x</mi></mfenced><mo>=</mo><msub><mi>d</mi><mrow><msub><mi>n</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msup><mi>x</mi><mrow><msub><mi>n</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><mn>1</mn></mrow></msup><mo>+</mo><mo>…</mo><mo>+</mo><msub><mi>d</mi><mn>1</mn></msub><mo></mo><mi>x</mi><mo>+</mo><msub><mi>d</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0039.tif" /></maths> as the remainder, the codeword polynomial is set as follows: <maths id="math0040" num=""><math display="inline"><mi>c</mi><mfenced><mi>x</mi></mfenced><mo>=</mo><msup><mi>x</mi><mrow><msub><mi>n</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub><mo>-</mo><msub><mi>k</mi><mrow><mi>b</mi><mo></mo><mi>c</mi><mo></mo><mi>h</mi></mrow></msub></mrow></msup><mo></mo><mi>m</mi><mfenced><mi>x</mi></mfenced><mo>+</mo><mi>d</mi><mfenced><mi>x</mi></mfenced></math><img file="EP1518328B1_D0040.tif" /></maths><i>.</i>
The above LDPC codes, in an exemplary embodiment, can be used to variety of digital video applications, such as MPEG (Motion Pictures Expert Group) packet transmission.
FIG. 3 is a diagram of an exemplary receiver in the system of FIG. 1. At the receiving side, a receiver 300 includes a demodulator 301 that performs demodulation of received signals from transmitter 200. These signals are received at a receive antenna 303 for demodulation. After demodulation, the received signals are forwarded to a decoder 305, which attempts to reconstruct the original source messages by generating messages, <i>X</i>', in conjunction with a bit metric generator 307. With non-Gray mapping, the bit metric generator 307 exchanges probability information with the decoder 305 back and forth (iteratively) during the decoding process, which is detailed in FIG. 10. Alternatively, if Gray mapping is used (according to one embodiment of the present invention), one pass of the bit metric generator is sufficient, in which further attempts of bit metric generation after each LDPC decoder iteration are likely to yield limited performance improvement; this approach is more fully described with respect to FIG. 11. To appreciate the advantages offered by the present invention, it is instructive to examine how LDPC codes are generated, as discussed in FIG. 4.
FIG. 4 is a diagram of a sparse parity check matrix, in accordance with an embodiment of the present invention. LDPC codes are long, linear block codes with sparse parity check matrix <i>H</i><sub>(<i>n-k</i>)</sub><i><sub>xn</sub>.</i> Typically the block length, <i>n</i>, ranges from thousands to tens of thousands of bits. For example, a parity check matrix for an LDPC code of length <i>n</i>=8 and rate ½ is shown in FIG. 4. The same code can be equivalently represented by the bipartite graph, per FIG. 5.
FIG. 5 is a diagram of a bipartite graph of an LDPC code of the matrix of FIG. 4. Parity check equations imply that for each check node, the sum (over GF (Galois Field)(2)) of all adjacent bit nodes is equal to zero. As seen in the figure, bit nodes occupy the left side of the graph and are associated with one or more check nodes, according to a predetermined relationship. For example, corresponding to check node <i>m</i><sub>1</sub>, the following expression exists <i>n<sub>1</sub></i> + <i>n<sub>4</sub></i> + <i>n<sub>5</sub></i> + <i>n<sub>8</sub></i> = 0 with respect to the bit nodes.
Returning the receiver 303, the LDPC decoder 305 is considered a message passing decoder, whereby the decoder 305 aims to find the values of bit nodes. To accomplish this task, bit nodes and check nodes iteratively communicate with each other. The nature of this communication is described below.
From check nodes to bit nodes, each check node provides to an adjacent bit node an estimate ("opinion") regarding the value of that bit node based on the information coming from other adjacent bit nodes. For instance, in the above example if the sum of <i>n</i><sub>4</sub> , <i>n</i><sub>5</sub> and <i>n</i><sub>8</sub> "looks like" 0 to <i>m</i><sub>1</sub>, then <i>m</i><sub>1</sub> would indicate to <i>n</i><sub>1</sub> that the value of <i>n</i><sub>1</sub> is believed to be 0 (since <i>n</i><sub>1</sub> + <i>n</i><sub>4</sub> + <i>n</i><sub>5</sub> + <i>n</i><sub>8</sub> = 0); otherwise <i>m</i><sub>1</sub> indicate to <i>n</i><sub>1</sub> that the value of <i>n</i><sub>1</sub> is believed to be 1. Additionally, for soft decision decoding, a reliability measure is added.
From bit nodes to check nodes, each bit node relays to an adjacent check node an estimate about its own value based on the feedback coming from its other adjacent check nodes. In the above example <i>n</i><sub>1</sub> has only two adjacent check nodes <i>m</i><sub>1</sub> and <i>m</i><sub>3</sub>. If the feedback coming from <i>m</i><sub>3</sub> to <i>n</i><sub>1</sub> indicates that the value of <i>n</i><sub>1</sub> is probably 0, then <i>n</i><sub>1</sub> would notify <i>m</i><sub>1</sub> that an estimate of <i>n</i><sub>1</sub> 's own value is 0. For the case in which the bit node has more than two adjacent check nodes, the bit node performs a majority vote (soft decision) on the feedback coming from its other adjacent check nodes before reporting that decision to the check node it communicates. The above process is repeated until all bit nodes are considered to be correct (i.e., all parity check equations are satisfied) or until a predetermined maximum number of iterations is reached, whereby a decoding failure is declared.
FIG. 6 is a diagram of a sub-matrix of a sparse parity check matrix, wherein the sub-matrix contains parity check values restricted to the lower triangular region, according to an embodiment of the present invention. As described previously, the encoder 203 (of FIGs. 2A and 2B) can employ a simple encoding technique by restricting the values of the lower triangular area of the parity check matrix. According to an embodiment of the present invention, the restriction imposed on the parity check matrix is of the form: <maths id="math0041" num=""><math display="block"><msub><mi>H</mi><mrow><mfenced separators=""><mi>n</mi><mo>-</mo><mi>k</mi></mfenced><mo></mo><mi>x</mi><mo></mo><mi>n</mi></mrow></msub><mo>=</mo><mfenced open="[" close="]" separators=""><msub><mi>A</mi><mrow><mo>(</mo><mi>n</mi><mo>-</mo><mi>k</mi><mo>)</mo><mi>x</mi><mo></mo><mi>k</mi></mrow></msub><mspace width="1em" /><msub><mi>B</mi><mrow><mo>(</mo><mi>n</mi><mo>-</mo><mi>k</mi><mo>)</mo><mi>x</mi><mo></mo><mfenced separators=""><mi>n</mi><mo>-</mo><mi>k</mi></mfenced></mrow></msub></mfenced></math><img file="EP1518328B1_D0041.tif" /></maths> , where <i>B</i> is lower triangular.
Any information block <i><b>i</b> =</i> (<i>i</i><sub>0</sub>,<i>i</i><sub>1</sub><i>,..., i<sub>k-1</sub></i>) is encoded to a codeword <b><i>c</i></b> = (<i>i</i><sub>0</sub><i>, i</i><sub>1</sub>,...,<i>i</i><sub><i>k</i>-1</sub>, <i>p</i><sub>0</sub><i>, p</i><sub>1</sub> ,... <i>p</i><sub><i>n</i>-<i>k</i>-1</sub>) using <i>H</i><b>c<sup>T</sup></b>= <b>0,</b> and recursively solving for parity bits; for example, <maths id="math0042" num=""><math display="block"><msub><mi>a</mi><mn>00</mn></msub><mo></mo><msub><mi>i</mi><mn>0</mn></msub><mo>+</mo><msub><mi>a</mi><mn>01</mn></msub><mo></mo><msub><mi>i</mi><mn>1</mn></msub><mo>+</mo><mo>…</mo><mo>+</mo><msub><mi>a</mi><mrow><mn>0</mn><mo>,</mo><mi>k</mi><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msub><mi>i</mi><mrow><mi>k</mi><mo>-</mo><mn>1</mn></mrow></msub><mo>+</mo><msub><mi>p</mi><mn>0</mn></msub><mo>=</mo><mn>0</mn><mo>⇒</mo><msub><mi mathvariant="italic">Solve p</mi><mn>0</mn></msub><mo>,</mo></math><img file="EP1518328B1_D0042.tif" /></maths><maths id="math0043" num=""><math display="block"><msub><mi>a</mi><mn>00</mn></msub><mo></mo><msub><mi>i</mi><mn>0</mn></msub><mo>+</mo><msub><mi>a</mi><mn>11</mn></msub><mo></mo><msub><mi>i</mi><mn>1</mn></msub><mo>+</mo><mo>…</mo><mo>+</mo><msub><mi>a</mi><mrow><mn>1</mn><mo>,</mo><mi>k</mi><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msub><mi>i</mi><mrow><mi>k</mi><mo>-</mo><mn>1</mn></mrow></msub><mo>+</mo><msub><mi>b</mi><mn>10</mn></msub><mo></mo><msub><mi>p</mi><mn>0</mn></msub><mo>+</mo><msub><mi>p</mi><mn>1</mn></msub><mo>=</mo><mn>0</mn><mo>⇒</mo><msub><mi mathvariant="italic">Solve p</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0043.tif" /></maths> and similarly for <i>p</i><sub>2</sub>, <i>p</i><sub>3</sub>,...,<i>p</i><sub>n-k-1.</sub>
FIG. 7 is a graph showing performance between codes utilizing unrestricted parity check matrix (H matrix) versus restricted H matrix of FIG. 6. The graph shows the performance comparison between two LDPC codes: one with a general parity check matrix and the other with a parity check matrix restricted to be lower triangular to simplify encoding. The modulation scheme, for this simulation, is 8-PSK. The performance loss is within 0.1 dB. Therefore, the performance loss is negligible based on the restriction of the lower triangular H matrices, while the gain in simplicity of the encoding technique is significant. Accordingly, any parity check matrix that is equivalent to a lower triangular or upper triangular under row and/or column permutation can be utilized for the same purpose.
FIGs. 8A and 8B are, respectively, a diagram of a non-Gray 8-PSK modulation scheme, and a Gray 8-PSK modulation, each of which can be used in the system of FIG. 1. The non-Gray 8-PSK scheme of FIG. 8A can be utilized in the receiver of FIG. 3 to provide a system that requires very low Frame Erasure Rate (FER). This requirement can also be satisfied by using a Gray 8-PSK scheme, as shown in FIG. 8B, in conjunction with an outer code, such as Bose, Chaudhuri, and Hocquenghem (BCH), Hamming, or Reed-Solomon (RS) code.
Under this scheme, there is no need to iterate between the LDPC decoder 305 (FIG. 3) and the bit metric generator 307, which may employ 8-PSK modulation. In the absence of an outer code, the LDPC decoder 305 using Gray labeling exhibit an earlier error floor, as shown in FIG. 9 below.
FIG. 9 is a graph showing performance between codes utilizing Gray labeling versus non-Gray labeling of FIGs. 8A and 8B. The error floor stems from the fact that assuming correct feedback from LDPC decoder 305, regeneration of 8-PSK bit metrics is more accurate with non-Gray labeling since the two 8-PSK symbols with known two bits are further apart with non-Gray labeling. This can be equivalently seen as operating at higher Signal-to-Noise Ratio (SNR). Therefore, even though error asymptotes of the same LDPC code using Gray or non-Gray labeling have the same slope (i.e., parallel to each other), the one with non-Gray labeling passes through lower FER at any SNR.
On the other hand, for systems that do not require very low FER, Gray labeling without any iteration between LDPC decoder 305, and 8-PSK bit metric generator 307 may be more suitable because re-generating 8-PSK bit metrics before every LDPC decoder iteration causes additional complexity. Moreover, when Gray labeling is used, re-generating 8-PSK bit metrics before every LDPC decoder iteration yields only very slight performance improvement. As mentioned previously, Gray labeling without iteration may be used for systems that require very low FER, provided an outer code is implemented.
The choice between Gray labeling and non-Gray labeling depends also on the characteristics of the LDPC code. Typically, the higher bit or check node degrees, the better it is for Gray labeling, because for higher node degrees, the initial feedback from LDPC decoder 305 to 8-PSK (or similar higher order modulation) bit metric generator 307 deteriorates more with non-Gray labeling.
When 8-PSK (or similar higher order) modulation is utilized with a binary decoder, it is recognized that the three (or more) bits of a symbol are not received "equally noisy". For example with Gray 8-PSK labeling, the third bit of a symbol is considered more noisy to the decoder than the other two bits. Therefore, the LDPC code design does not assign a small number of edges to those bit nodes represented by "more noisy" third bits of 8-PSK symbol so that those bits are not penalized twice.
FIG. 10 is a flow chart of the operation of the LDPC decoder using non-Gray mapping, according to an embodiment of the present invention. Under this approach, the LDPC decoder and bit metric generator iterate one after the other. In this example, 8-PSK modulation is utilized; however, the same principles apply to other higher modulation schemes as well. Under this scenario, it is assumed that the demodulator 301 outputs a distance vector, d, denoting the distances between received noisy symbol points and 8-PSK symbol points to the bit metric generator 307, whereby the vector components are as follows: <maths id="math0044" num=""><math display="block"><msub><mi>d</mi><mi>i</mi></msub><mo>=</mo><mo>-</mo><mfrac><msub><mi>E</mi><mi>s</mi></msub><msub><mi>N</mi><mn>0</mn></msub></mfrac><mrow><mo>{</mo><msup><mfenced separators=""><msub><mi>r</mi><mi>x</mi></msub><mo>-</mo><msub><mi>s</mi><mrow><mi>i</mi><mo>,</mo><mi>x</mi></mrow></msub></mfenced><mn>2</mn></msup><mo>+</mo><msup><mfenced separators=""><msub><mi>r</mi><mi>y</mi></msub><mo>-</mo><msub><mi>s</mi><mrow><mi>i</mi><mo>,</mo><mi>y</mi></mrow></msub></mfenced><mn>2</mn></msup><mo>}</mo><mi>i</mi><mo>=</mo><mn>0</mn><mo>,</mo><mn>1</mn><mo>,</mo><mo>…</mo><mn>7.</mn></mrow></math><img file="EP1518328B1_D0044.tif" /></maths>
The 8-PSK bit metric generator 307 communicates with the LDPC decoder 305 to exchange <i>a priori</i> probability information and <i>a posteriori</i> probability information, which respectively are represented as <b>u</b>, and <b>a</b>. That is, the vectors <b>u</b> and <b>a</b> respectively represent <i>a priori</i> and <i>a posteriori</i> probabilities of log likelihood ratios of coded bits.
The 8-PSK bit metric generator 307 generates the <i>a priori</i> likelihood ratios for each group of three bits as follows. First, extrinsic information on coded bits is obtained: <maths id="math0045" num=""><math display="block"><mtable><mtr><mtd><msub><mi>e</mi><mi>j</mi></msub><mo>=</mo><msub><mi>a</mi><mi>j</mi></msub><mo>-</mo><msub><mi>u</mi><mi>j</mi></msub></mtd><mtd><mi>j</mi><mo>=</mo><mn>0</mn><mo>,</mo><mn>1</mn><mo>,</mo><mn>2.</mn></mtd></mtr></mtable></math><img file="EP1518328B1_D0045.tif" /></maths> Next, 8-PSK symbol probabilities, <i>p<sub>i</sub> i</i> = 0,1,...,7 , are determined. <maths id="math0046" num=""><math display="block"><mo>*</mo><msub><mi mathvariant="italic">y</mi><mi mathvariant="italic">j</mi></msub><mo>=</mo><mo>-</mo><mi mathvariant="italic">f</mi><mfenced><mn>0</mn><mo></mo><msub><mi mathvariant="italic">e</mi><mi mathvariant="italic">j</mi></msub></mfenced><mspace width="3em" /><mi mathvariant="italic">j</mi><mo>=</mo><mn>0</mn><mo>,</mo><mn>1</mn><mo>,</mo><mn>2</mn></math><img file="EP1518328B1_D0046.tif" /></maths> where <i>f</i>(<i>a</i>, <i>b</i>) = max(<i>a</i>, <i>b</i>) + LUT<sub>f</sub>(<i>a</i>, <i>b</i>) with <i>LUT<sub>f</sub> (a,b)</i> = In(1 + <i>e</i><sup>-|<i>a-b</i>|</sup>)<maths id="math0047" num=""><math display="block"><mo>*</mo><msub><mi>x</mi><mi>j</mi></msub><mo>=</mo><msub><mi>y</mi><mi>j</mi></msub><mo>+</mo><msub><mi>e</mi><mi>j</mi></msub><mspace width="3em" /><mi mathvariant="italic">j</mi><mo>=</mo><mn>0</mn><mo>,</mo><mn>1</mn><mo>,</mo><mn>2</mn></math><img file="EP1518328B1_D0047.tif" /></maths><maths id="math0048" num=""><math display="block"><mo>*</mo><msub><mi>p</mi><mn>0</mn></msub><mo>=</mo><msub><mi>x</mi><mn>0</mn></msub><mo>+</mo><msub><mi>x</mi><mn>1</mn></msub><mo>+</mo><msub><mi>x</mi><mn>2</mn></msub><mo></mo><msub><mrow><mspace width="3em" /><mi mathvariant="italic">p</mi></mrow><mn>4</mn></msub><mo>=</mo><msub><mi>y</mi><mn>0</mn></msub><mo>+</mo><msub><mi>x</mi><mn>1</mn></msub><mo>+</mo><msub><mi>x</mi><mn>2</mn></msub></math><img file="EP1518328B1_D0048.tif" /></maths><maths id="math0049" num=""><math display="block"><msub><mi>p</mi><mn>1</mn></msub><mo>=</mo><msub><mi>x</mi><mn>0</mn></msub><mo>+</mo><msub><mi>x</mi><mn>1</mn></msub><mo>+</mo><msub><mi>y</mi><mn>2</mn></msub><mo></mo><msub><mrow><mspace width="3em" /><mi mathvariant="italic">p</mi></mrow><mn>5</mn></msub><mo>=</mo><msub><mi>y</mi><mn>0</mn></msub><mo>+</mo><msub><mi>x</mi><mn>1</mn></msub><mo>+</mo><msub><mi>y</mi><mn>2</mn></msub></math><img file="EP1518328B1_D0049.tif" /></maths><maths id="math0050" num=""><math display="block"><msub><mi>p</mi><mn>2</mn></msub><mo>=</mo><msub><mi>x</mi><mn>0</mn></msub><mo>+</mo><msub><mi>y</mi><mn>1</mn></msub><mo>+</mo><msub><mi mathvariant="italic">x</mi><mn>2</mn></msub><mo></mo><msub><mrow><mspace width="3em" /><mi mathvariant="italic">p</mi></mrow><mn>6</mn></msub><mo>=</mo><msub><mi>y</mi><mn>0</mn></msub><mo>+</mo><msub><mi>y</mi><mn>1</mn></msub><mo>+</mo><msub><mi>x</mi><mn>2</mn></msub></math><img file="EP1518328B1_D0050.tif" /></maths><maths id="math0051" num=""><math display="block"><msub><mi>p</mi><mn>3</mn></msub><mo>=</mo><msub><mi>x</mi><mn>0</mn></msub><mo>+</mo><msub><mi>y</mi><mn>1</mn></msub><mo>+</mo><msub><mi mathvariant="italic">y</mi><mn>2</mn></msub><mo></mo><msub><mrow><mspace width="3em" /><mi mathvariant="italic">p</mi></mrow><mn>7</mn></msub><mo>=</mo><msub><mi>y</mi><mn>0</mn></msub><mo>+</mo><msub><mi>y</mi><mn>1</mn></msub><mo>+</mo><msub><mi>y</mi><mn>2</mn></msub></math><img file="EP1518328B1_D0051.tif" /></maths>
Next, the bit metric generator 307 determines <i>a priori</i> log likelihood ratios of the coded bits as input to LDPC decoder 305, as follows:<maths id="math0052" num=""><math display="block"><msub><mi>u</mi><mn>0</mn></msub><mo>=</mo><mi>f</mi><mo></mo><mfenced separators=""><msub><mi>d</mi><mn>0</mn></msub><mo>+</mo><msub><mi>p</mi><mn>0</mn></msub><mo>,</mo><msub><mi>d</mi><mn>1</mn></msub><mo>+</mo><msub><mi>p</mi><mn>1</mn></msub><mo>,</mo><msub><mi>d</mi><mn>2</mn></msub><mo>+</mo><msub><mi>p</mi><mn>2</mn></msub><mo>,</mo><msub><mi>d</mi><mn>3</mn></msub><mo>+</mo><msub><mi>p</mi><mn>3</mn></msub></mfenced><mo>-</mo><mi>f</mi><mo></mo><mfenced separators=""><msub><mi>d</mi><mn>4</mn></msub><mo>+</mo><msub><mi>p</mi><mn>4</mn></msub><mo>,</mo><msub><mi>d</mi><mn>5</mn></msub><mo>+</mo><msub><mi>p</mi><mn>5</mn></msub><mo>,</mo><msub><mi>d</mi><mn>6</mn></msub><mo>+</mo><msub><mi>p</mi><mn>6</mn></msub><mo>,</mo><msub><mi>d</mi><mn>7</mn></msub><mo>+</mo><msub><mi>p</mi><mn>7</mn></msub></mfenced><mo>-</mo><msub><mi>e</mi><mn>0</mn></msub></math><img file="EP1518328B1_D0052.tif" /></maths><maths id="math0053" num=""><math display="block"><msub><mi>u</mi><mn>1</mn></msub><mo>=</mo><mi>f</mi><mo></mo><mfenced separators=""><msub><mi>d</mi><mn>0</mn></msub><mo>+</mo><msub><mi>p</mi><mn>0</mn></msub><mo>,</mo><msub><mi>d</mi><mn>1</mn></msub><mo>+</mo><msub><mi>p</mi><mn>1</mn></msub><mo>,</mo><msub><mi>d</mi><mn>4</mn></msub><mo>+</mo><msub><mi>p</mi><mn>4</mn></msub><mo>,</mo><msub><mi>d</mi><mn>5</mn></msub><mo>+</mo><msub><mi>p</mi><mn>5</mn></msub></mfenced><mo>-</mo><mi>f</mi><mo></mo><mfenced separators=""><msub><mi>d</mi><mn>2</mn></msub><mo>+</mo><msub><mi>p</mi><mn>2</mn></msub><mo>,</mo><msub><mi>d</mi><mn>3</mn></msub><mo>+</mo><msub><mi>p</mi><mn>3</mn></msub><mo>,</mo><msub><mi>d</mi><mn>6</mn></msub><mo>+</mo><msub><mi>p</mi><mn>6</mn></msub><mo>,</mo><msub><mi>d</mi><mn>7</mn></msub><mo>+</mo><msub><mi>p</mi><mn>7</mn></msub></mfenced><mo>-</mo><msub><mi>e</mi><mn>1</mn></msub></math><img file="EP1518328B1_D0053.tif" /></maths><maths id="math0054" num=""><math display="block"><msub><mi>u</mi><mn>2</mn></msub><mo>=</mo><mi>f</mi><mo></mo><mfenced separators=""><msub><mi>d</mi><mn>0</mn></msub><mo>+</mo><msub><mi>p</mi><mn>0</mn></msub><mo>,</mo><msub><mi>d</mi><mn>2</mn></msub><mo>+</mo><msub><mi>p</mi><mn>2</mn></msub><mo>,</mo><msub><mi>d</mi><mn>4</mn></msub><mo>+</mo><msub><mi>p</mi><mn>4</mn></msub><mo>,</mo><msub><mi>d</mi><mn>6</mn></msub><mo>+</mo><msub><mi>p</mi><mn>6</mn></msub></mfenced><mo>-</mo><mi>f</mi><mo></mo><mfenced separators=""><msub><mi>d</mi><mn>1</mn></msub><mo>+</mo><msub><mi>p</mi><mn>1</mn></msub><mo>,</mo><msub><mi>d</mi><mn>3</mn></msub><mo>+</mo><msub><mi>p</mi><mn>3</mn></msub><mo>,</mo><msub><mi>d</mi><mn>5</mn></msub><mo>+</mo><msub><mi>p</mi><mn>5</mn></msub><mo>,</mo><msub><mi>d</mi><mn>7</mn></msub><mo>+</mo><msub><mi>p</mi><mn>7</mn></msub></mfenced><mo>-</mo><msub><mi>e</mi><mn>2</mn></msub></math><img file="EP1518328B1_D0054.tif" /></maths>
It is noted that the function <i>f</i>(.) with more than two variables can be evaluated recursively; e.g. <i>f</i>(<i>a, b, c</i>) = <i>f</i>(<i>f</i>(<i>a, b</i>)<i>, c</i>)<i>.</i>
The operation of the LDPC decoder 305 utilizing non-Gray mapping is now described. In step 1001, the LDPC decoder 305 initializes log likelihood ratios of coded bits, <i>v,</i> before the first iteration according to the following (and as shown in FIG. 12A): <maths id="math0055" num=""><math display="block"><msub><mi>v</mi><msub><mrow><mi>n</mi><mo>→</mo><mi>k</mi></mrow><mi>i</mi></msub></msub><mo>=</mo><msub><mi>u</mi><mi>n</mi></msub><mo>,</mo><mspace width="1em" /><mi>n</mi><mo>=</mo><mn>0</mn><mo>,</mo><mn>1</mn><mo>,</mo><mo>…</mo><mo>,</mo><mi>N</mi><mo>-</mo><mn>1</mn><mo>,</mo><mi>i</mi><mo>=</mo><mn>1</mn><mo>,</mo><mn>2</mn><mo>,</mo><mo>…</mo><mo>,</mo><mi>deg</mi><mfenced><mi mathvariant="italic">bitnoden</mi></mfenced></math><img file="EP1518328B1_D0055.tif" /></maths> Here, <maths id="math0056" num=""><math display="inline"><msub><mi>v</mi><mrow><mi>n</mi><mo>→</mo><msub><mi>k</mi><mn>1</mn></msub></mrow></msub></math><img file="EP1518328B1_D0056.tif" /></maths> denotes the message that goes from bit node <i>n</i> to its adjacent check node <i>k<sub>i</sub></i>, <i>u<sub>n</sub></i> denotes the demodulator output for the bit <i>n</i> and <i>N</i> is the codeword size.
In step 1003, a check node, <i>k,</i> is updated, whereby the input <i>v</i> yields the output <i>w</i>. As seen in FIG. 12B, the incoming messages to the check node <i>k</i> from its <i>d<sub>c</sub></i> adjacent bit nodes are denoted by <maths id="math0057" num=""><math display="inline"><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>1</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>2</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi mathvariant="italic">dc</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></math><img file="EP1518328B1_D0057.tif" /></maths>. The goal is to compute the outgoing messages from the check node <i>k</i> back to <i>d<sub>c</sub></i> adjacent bit nodes. These messages are denoted by <maths id="math0058" num=""><math display="inline"><msub><mi>w</mi><msub><mrow><mi>k</mi><mo>→</mo><mi>n</mi></mrow><mn>1</mn></msub></msub><mo>,</mo><msub><mi>w</mi><msub><mrow><mi>k</mi><mo>→</mo><mi>n</mi></mrow><mn>2</mn></msub></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>w</mi><msub><mrow><mi>k</mi><mo>→</mo><mi>n</mi></mrow><mi mathvariant="italic">dc</mi></msub></msub></math><img file="EP1518328B1_D0058.tif" /></maths> , where <maths id="math0059" num=""><math display="block"><msub><mi>w</mi><msub><mrow><mi>k</mi><mo>→</mo><mi>n</mi></mrow><mi>i</mi></msub></msub><mo>=</mo><mi>g</mi><mo></mo><mfenced separators=""><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>1</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>2</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mrow><mi>i</mi><mo>-</mo><mn>1</mn></mrow></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mrow><mi>i</mi><mo>+</mo><mn>1</mn></mrow></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi mathvariant="italic">dc</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></mfenced><mn>.</mn></math><img file="EP1518328B1_D0059.tif" /></maths> The function <i>g</i>( ) is defined as follows: <maths id="math0060" num=""><math display="block"><mi>g</mi><mfenced><mi>a</mi><mo></mo><mi>b</mi></mfenced><mo>=</mo><mi mathvariant="italic">sign</mi><mfenced><mi>a</mi></mfenced><mo>×</mo><mi mathvariant="italic">sign</mi><mfenced><mi>b</mi></mfenced><mo>×</mo><mfenced open="{" close="}" separators=""><mi>min</mi><mfenced><mfenced open="|" close="|"><mi>a</mi></mfenced><mo></mo><mfenced open="|" close="|"><mi>b</mi></mfenced></mfenced></mfenced><mo>+</mo><msub><mi mathvariant="italic">LUT</mi><mi>g</mi></msub><mfenced><mi>a</mi><mo></mo><mi>b</mi></mfenced><mo>,</mo></math><img file="EP1518328B1_D0060.tif" /></maths> where <i>LUT<sub>g</sub>(a,b)</i> = ln(1+<i>e</i><sup>-|<i>a</i>+<i>b</i>|</sup>)-ln(1+<i>e</i><sup>-|<i>a</i>-<i>b</i>|</sup>). Similar to function <i>f,</i> function <i>g</i> with more than two variables can be evaluated recursively.
Next, the decoder 305, per step 1205, outputs <i>a posteriori</i> probability information (FIG. 12C), such that: <maths id="math0061" num=""><math display="block"><msub><mi>a</mi><mi>n</mi></msub><mo>=</mo><msub><mi>u</mi><mi>n</mi></msub><mo>+</mo><mstyle displaystyle="false"><mstyle displaystyle="true"><munder><mo>∑</mo><mi>j</mi></munder></mstyle><msub><mi>w</mi><msub><mi>k</mi><mrow><mi>j</mi><mo>→</mo><mi>n</mi></mrow></msub></msub></mstyle><mn>.</mn></math><img file="EP1518328B1_D0061.tif" /></maths>
Per step 1007, it is determined whether all the parity check equations are satisfied. If these parity check equations are not satisfied, then the decoder 305, as in step 1009, re-derives 8-PSK bit metrics and channel input <i>u<sub>n</sub></i>. Next, the bit node is updated, as in step 1011. As shown in FIG. 14C, the incoming messages to the bit node <i>n</i> from its <i>d<sub>v</sub></i> adjacent check nodes are denoted by <maths id="math0062" num=""><math display="inline"><msub><mi>w</mi><mrow><msub><mi>k</mi><mn>1</mn></msub><mo>→</mo><mi>n</mi></mrow></msub><mo>,</mo><msub><mi>w</mi><mrow><msub><mi>k</mi><mn>2</mn></msub><mo>→</mo><mi>n</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>w</mi><mrow><msub><mi>k</mi><mrow><mi>d</mi><mo></mo><mi>v</mi></mrow></msub><mo>→</mo><mi>n</mi></mrow></msub></math><img file="EP1518328B1_D0062.tif" /></maths> The outgoing messages from the bit node n are computed back to <i>d<sub>v</sub></i> adjacent check nodes; such messages are denoted by <maths id="math0063" num=""><math display="inline"><msub><mrow><msub><mi>v</mi><mrow><mi>n</mi><mo>→</mo><msub><mi>k</mi><mn>1</mn></msub></mrow></msub><mo>,</mo><msub><mi>v</mi><mrow><mi>n</mi><mo>→</mo><msub><mi>k</mi><mn>2</mn></msub></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><mi>n</mi><mo>→</mo><mi>k</mi></mrow></msub></mrow><mrow><mi>d</mi><mo></mo><mi>v</mi></mrow></msub></math><img file="EP1518328B1_D0063.tif" /></maths>, and computed as follows: <maths id="math0064" num=""><math display="block"><msub><mi>v</mi><mrow><mi>n</mi><mo>→</mo><msub><mi>k</mi><mi>i</mi></msub></mrow></msub><mo>=</mo><msub><mi>u</mi><mi>n</mi></msub><mo>+</mo><mstyle displaystyle="false"><mstyle displaystyle="true"><munder><mo>∑</mo><mrow><mi>j</mi><mo>≠</mo><mi>i</mi></mrow></munder></mstyle><msub><mi>w</mi><msub><mi>k</mi><mrow><mi>j</mi><mo>→</mo><mi>n</mi></mrow></msub></msub></mstyle></math><img file="EP1518328B1_D0064.tif" /></maths> In step 1013, the decoder 305 outputs the hard decision (in the case that all parity check equations are satisfied): <maths id="math0065" num=""><math display="block"><msub><mover><mi>c</mi><mo>^</mo></mover><mi>n</mi></msub><mo>=</mo><mrow><mo>{</mo><mtable><mtr><mtd><mn>0</mn><mo>,</mo></mtd><mtd><msub><mi>a</mi><mi>n</mi></msub><mo>≥</mo><mn>0</mn></mtd></mtr><mtr><mtd><mn>1</mn><mo>,</mo></mtd><mtd><msub><mi>a</mi><mi>n</mi></msub><mo><</mo><mn>0</mn></mtd></mtr></mtable><mspace width="2em" /><mi>Stop if</mi><mspace width="1em" /><msup><mrow><mi>H</mi><mo></mo><mover><mi>c</mi><mo>^</mo></mover></mrow><mi>T</mi></msup><mo>=</mo><mn>0</mn></mrow></math><img file="EP1518328B1_D0065.tif" /></maths>
The above approach is appropriate when non-Gray labeling is utilized. However, when Gray labeling is implemented, the process of FIG. 11 is executed.
FIG. 11 is a flow chart of the operation of the LDPC decoder of FIG. 3 using Gray mapping, according to an embodiment of the present invention. When Gray labeling is used, bit metrics are advantageously generated only once before the LDPC decoder, as re-generating bit metrics after every LDPC decoder iteration may yield nominal performance improvement. As with steps 1001 and 1003 of FIG. 10, initialization of the log likelihood ratios of coded bits, v, are performed, and the check node is updated, per steps 1101 and 1103. Next, the bit node n is updated, as in step 1105. Thereafter, the decoder outputs the <i>a posteriori</i> probability information (step 1107). In step 1109, a determination is made whether all of the parity check equations are satisfied; if so, the decoder outputs the hard decision (step 1111). Otherwise, steps 1103-1107 are repeated.
FIG. 13A is a flowchart of process for computing outgoing messages between the check nodes and the bit nodes using a forward-backward approach, according to an embodiment of the present invention. For a check node with <i>d<sub>c</sub></i> adjacent edges, the computation of <i>d<sub>c</sub></i>(<i>d<sub>c</sub></i>-1) and numerous <i>g</i>(.,.) functions are performed. However, the forward-backward approach reduces the complexity of the computation to 3(<i>d<sub>c</sub></i>-2), in which <i>d<sub>c</sub></i>-1 variables are stored.
Referring to FIG. 12B, the incoming messages to the check node <i>k</i> from <i>d<sub>c</sub></i> adjacent bit nodes are denoted by <maths id="math0066" num=""><math display="inline"><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>1</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>2</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi mathvariant="italic">dc</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></math><img file="EP1518328B1_D0066.tif" /></maths>. It is desired that the outgoing messages are computed from the check node <i>k</i> back to <i>d<sub>c</sub></i> adjacent bit nodes; these outgoing messages are denoted by <maths id="math0067" num=""><math display="inline"><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><msub><mi>n</mi><mn>1</mn></msub></mrow></msub><mo>,</mo><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><msub><mi>n</mi><mn>2</mn></msub></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><msub><mi>n</mi><mi mathvariant="italic">dc</mi></msub></mrow></msub></math><img file="EP1518328B1_D0067.tif" /></maths>.
Under the forward-backward approach to computing these outgoing messages, forward variables, <i>f</i><sub>1</sub>, <i>f</i><sub>2</sub><i>,..., f<sub>dc</sub></i>, are defined as follows: <maths id="math0068" num=""><math display="block"><mtable columnalign="left"><mtr><mtd><msub><mi>f</mi><mn>1</mn></msub><mo>=</mo><msub><mi>v</mi><mrow><mn>1</mn><mo>→</mo><mi>k</mi></mrow></msub></mtd></mtr><mtr><mtd><msub><mi>f</mi><mn>2</mn></msub><mo>=</mo><mi>g</mi><mfenced><msub><mi>f</mi><mn>1</mn></msub><mo></mo><msub><mi>v</mi><mrow><mn>2</mn><mo>→</mo><mi>k</mi></mrow></msub></mfenced></mtd></mtr><mtr><mtd><msub><mi>f</mi><mn>3</mn></msub><mo>=</mo><mi>g</mi><mfenced><msub><mi>f</mi><mn>2</mn></msub><mo></mo><msub><mi>v</mi><mrow><mn>3</mn><mo>→</mo><mi>k</mi></mrow></msub></mfenced></mtd></mtr><mtr><mtd><mo>:</mo><mspace width="2em" /><mo>:</mo><mspace width="2em" /><mo>:</mo></mtd></mtr><mtr><mtd><msub><mi>f</mi><mi mathvariant="italic">dc</mi></msub><mo>=</mo><mi>g</mi><mo></mo><mfenced><msub><mi>f</mi><mrow><mi mathvariant="italic">dc</mi><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msub><mi>v</mi><mrow><mi mathvariant="italic">dc</mi><mo>→</mo><mi>k</mi></mrow></msub></mfenced></mtd></mtr></mtable></math><img file="EP1518328B1_D0068.tif" /></maths> In step 1301, these forward variables are computed, and stored, per step 1303.
Similarly, backward variables, <i>b</i><sub>1</sub><i>, b</i><sub>2</sub><i>,..., b<sub>dc</sub>,</i> are defined by the following: <maths id="math0069" num=""><math display="block"><mtable columnalign="left"><mtr><mtd><msub><mi>b</mi><mi mathvariant="italic">dc</mi></msub><mo>=</mo><msub><mi>v</mi><mrow><mi mathvariant="italic">dc</mi><mo>→</mo><mi>k</mi></mrow></msub></mtd></mtr><mtr><mtd><msub><mi>b</mi><mrow><mi mathvariant="italic">dc</mi><mo>-</mo><mn>1</mn></mrow></msub><mo>=</mo><mi>g</mi><mo></mo><mfenced><msub><mi>b</mi><mi mathvariant="italic">dc</mi></msub><mo></mo><msub><mi>v</mi><mrow><mi mathvariant="italic">dc</mi><mo>-</mo><mn>1</mn><mo>→</mo><mi>k</mi></mrow></msub></mfenced></mtd></mtr><mtr><mtd><mo>:</mo><mspace width="2em" /><mo>:</mo><mspace width="2em" /><mo>:</mo></mtd></mtr><mtr><mtd><msub><mi>b</mi><mn>1</mn></msub><mo>=</mo><mi>g</mi><mfenced><msub><mi>b</mi><mn>2</mn></msub><mo></mo><msub><mi>v</mi><mrow><mn>1</mn><mo>→</mo><mi>k</mi></mrow></msub></mfenced></mtd></mtr></mtable></math><img file="EP1518328B1_D0069.tif" /></maths> In step 1305, these backward variables are then computed. Thereafter, the outgoing messages are computed, as in step 1307, based on the stored forward variables and the computed backward variables. The outgoing messages are computed as follows: <maths id="math0070" num=""><math display="block"><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><mn>1</mn></mrow></msub><mo>=</mo><msub><mi>b</mi><mn>2</mn></msub></math><img file="EP1518328B1_D0070.tif" /></maths><maths id="math0071" num=""><math display="block"><mtable><mtr><mtd><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><mi>i</mi></mrow></msub><mo>=</mo><mi>g</mi><mo></mo><mfenced><msub><mi>f</mi><mrow><mi>i</mi><mo>-</mo><mn>1</mn></mrow></msub><mo></mo><msub><mi>b</mi><mrow><mi>i</mi><mo>+</mo><mn>1</mn></mrow></msub></mfenced></mtd><mtd><mi>i</mi><mo>=</mo><mn>2</mn><mo>,</mo><mn>3</mn><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>d</mi><mi>c</mi></msub><mo>-</mo><mn>1</mn></mtd></mtr></mtable></math><img file="EP1518328B1_D0071.tif" /></maths><maths id="math0072" num=""><math display="block"><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><mi>d</mi><mo></mo><mi>c</mi></mrow></msub><mo>=</mo><msub><mi>f</mi><mrow><mi>d</mi><mo></mo><mi>c</mi><mo>-</mo><mn>1</mn></mrow></msub></math><img file="EP1518328B1_D0072.tif" /></maths>
Under this approach, only the forward variables, <i>f</i><sub>2</sub><i>, f<sub>3</sub>,..., f<sub>dc</sub>,</i> are required to be stored. As the backward variables <i>b<sub>i</sub></i> are computed, the outgoing messages, <i>w</i><sub><i>k</i>→<i>i</i></sub>, are simultaneously computed, thereby negating the need for storage of the backward variables.
The computation load can be further enhance by a parallel approach, as next discussed.
FIG. 13B is a flowchart of process for computing outgoing messages between the check nodes and the bit nodes using a parallel approach, according to an embodiment of the present invention. For a check node <i>k</i> with inputs <maths id="math0073" num=""><math display="inline"><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>1</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>2</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi mathvariant="italic">dc</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></math><img file="EP1518328B1_D0073.tif" /></maths> from <i>d<sub>c</sub></i> adjacent bit nodes, the following parameter is computed, as in step 1311: <maths id="math0074" num=""><math display="block"><msub><mi mathvariant="italic">γ</mi><mi>k</mi></msub><mo>=</mo><mi>g</mi><mfenced><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>1</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo></mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>2</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>…</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi mathvariant="italic">dc</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></mfenced><mn>.</mn></math><img file="EP1518328B1_D0074.tif" /></maths>
It is noted that the <i>g</i>(.,.) function can also be expressed as follows: <maths id="math0075" num=""><math display="block"><mi>g</mi><mfenced><mi>a</mi><mo></mo><mi>b</mi></mfenced><mo>=</mo><mi>ln</mi><mo></mo><mfrac><mrow><mn>1</mn><mo>+</mo><msup><mi>e</mi><mrow><mi>a</mi><mo>+</mo><mi>b</mi></mrow></msup></mrow><mrow><msup><mi>e</mi><mi>a</mi></msup><mo>+</mo><msup><mi>e</mi><mi>b</mi></msup></mrow></mfrac><mn>.</mn></math><img file="EP1518328B1_D0075.tif" /></maths>
Exploiting the recursive nature of the <i>g</i>(.,.) function, the following expression results: <maths id="math0076" num=""><math display="block"><msub><mi mathvariant="italic">γ</mi><mi>k</mi></msub><mo>=</mo><mi>ln</mi><mo></mo><mfrac><mrow><mn>1</mn><mo>+</mo><msup><mi>e</mi><mrow><mi>g</mi><mrow><mo>(</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>1</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mrow><mi>i</mi><mo>-</mo><mn>1</mn></mrow></msub><mo>→</mo><mi>k</mi><mo>,</mo></mrow></msub><mo></mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mrow><mi>i</mi><mo>+</mo><mn>1</mn></mrow></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi mathvariant="italic">dc</mi></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>)</mo><mo>+</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi>i</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></mrow></mrow></msup></mrow><msup><mi>e</mi><mrow><mi>g</mi><mrow><mo>(</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mn>1</mn></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mrow><mi>i</mi><mo>-</mo><mn>1</mn></mrow></msub><mo>→</mo><mi>k</mi><mo>,</mo></mrow></msub><mo></mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mrow><mi>i</mi><mo>+</mo><mn>1</mn></mrow></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>,</mo><mo>…</mo><mo>,</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi mathvariant="italic">dc</mi></msub><mo>→</mo><mi>k</mi></mrow></msub><mo>)</mo><mo>+</mo><msup><mi>e</mi><msub><mi>v</mi><mrow><msub><mi>n</mi><mi>i</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></msup></mrow></mrow></msup></mfrac><mo>=</mo><mi>ln</mi><mo></mo><mfrac><mrow><mn>1</mn><mo>+</mo><msup><mi>e</mi><mrow><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><msub><mi>n</mi><mi>i</mi></msub></mrow></msub><mo>+</mo><msub><mi>v</mi><mrow><msub><mi>n</mi><mi>i</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></mrow></msup></mrow><mrow><msup><mi>e</mi><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><msub><mi>n</mi><mi>i</mi></msub></mrow></msub></msup><mo>+</mo><msup><mi>e</mi><msub><mi>v</mi><mrow><msub><mi>n</mi><mi>i</mi></msub><mo>→</mo><mi>k</mi></mrow></msub></msup></mrow></mfrac></math><img file="EP1518328B1_D0076.tif" /></maths>
Accordingly, <maths id="math0077" num=""><math display="inline"><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><msub><mi>n</mi><mi>i</mi></msub></mrow></msub></math><img file="EP1518328B1_D0077.tif" /></maths> can be solved in the following manner: <maths id="math0078" num=""><math display="block"><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><msub><mi>n</mi><mi>i</mi></msub></mrow></msub><mo>=</mo><mi>ln</mi><mo></mo><mfrac><mrow><msup><mi>e</mi><msub><mi>v</mi><mrow><msub><mi>n</mi><mi>i</mi></msub><mo>→</mo><mi>k</mi><mo>+</mo><msub><mi>γ</mi><mi>k</mi></msub></mrow></msub></msup><mo>-</mo><mn>1</mn></mrow><mrow><msup><mi>e</mi><msub><mi>v</mi><mrow><msub><mi>n</mi><mi>i</mi></msub><mo>→</mo><mi>k</mi><mo>-</mo><msub><mi>γ</mi><mi>k</mi></msub></mrow></msub></msup><mo>-</mo><mn>1</mn></mrow></mfrac><mo>-</mo><msub><mi>γ</mi><mi>k</mi></msub></math><img file="EP1518328B1_D0078.tif" /></maths>
The ln(.) term of the above equation can be obtained using a look-up table <i>LUT<sub>x</sub></i> that represents the function ln|<i>e<sup>x</sup></i>-1| (step 1313). Unlike the other look-up tables <i>LUT</i><sub>f</sub> or <i>LUT</i><sub>g</sub><i>,</i> the table <i>LUT<sub>x</sub></i> would likely requires as many entries as the number of quantization levels. Once γ<i><sub>k</sub></i> is obtained, the calculation of <maths id="math0079" num=""><math display="inline"><msub><mi>w</mi><mrow><mi>k</mi><mo>→</mo><msub><mi>n</mi><mi>i</mi></msub></mrow></msub></math><img file="EP1518328B1_D0079.tif" /></maths> for all <i>n<sub>i</sub></i> can occur in parallel using the above equation, per step 1315.
The computational latency of <i>γ<sub>k</sub></i> is advantageously log<sub>2</sub>(<i>d<sub>c</sub></i>).
FIGs. 14A-14C are graphs showing simulation results of LDPC codes generated in accordance with various embodiments of the present invention. In particular, FIGs. 14A-14C show the performance of LDPC codes with higher order modulation and code rates of 3/4 (QPSK, 1.485 bits/symbol), 2/3 (8-PSK, 1.980 bits/symbol), and 5/6 (8-PSK, 2.474 bits/symbol).
Two general approaches exist to realize the interconnections between check nodes and bit nodes: (1) a fully parallel approach, and (2) a partially parallel approach. In fully parallel architecture, all of the nodes and their interconnections are physically implemented. The advantage of this architecture is speed.
The fully parallel architecture, however, may involve greater complexity in realizing all of the nodes and their connections. Therefore with fully parallel architecture, a smaller block size may be required to reduce the complexity. In that case, for the same clock frequency, a proportional reduction in throughput and some degradation in FER versus Es/No performance may result.
The second approach to implementing LDPC codes is to physically realize only a subset of the total number of the nodes and use only these limited number of "physical" nodes to process all of the "functional" nodes of the code. Even though the LDPC decoder operations can be made extremely simple and can be performed in parallel, the further challenge in the design is how the communication is established between "randomly" distributed bit nodes and check nodes. The decoder 305 (of FIG. 3), according to one embodiment of the present invention, addresses this problem by accessing memory in a structured way, as to realize a seemingly random code. This approach is explained with respect to FIGs. 15A and 15B.
FIGs. 15A and 15B are diagrams of the top edge and bottom edge, respectively, of memory organized to support structured access as to realize randomness in LDPC coding, according to an embodiment of the present invention. Structured access can be achieved without compromising the performance of a truly random code by focusing on the generation of the parity check matrix. In general, a parity check matrix can be specified by the connections of the check nodes with the bit nodes. For example, the bit nodes can be divided into groups of a fixed size, which for illustrative purposes is 392. Additionally, assuming the check nodes connected to the first bit node of degree 3, for instance, are numbered as <i>a, b</i> and <i>c</i>, then the check nodes connected to the second bit node are numbered as <i>a+p, b+p</i> and <i>c+p,</i> the check nodes connected to the third bit node are numbered as <i>a</i>+2<i>p</i>, <i>b</i>+2<i>p</i> and <i>c</i>+2<i>p</i> etc.; where <i>p</i>=(number of check nodes)/392. For the next group of 392 bit nodes, the check nodes connected to the first bit node are different from <i>a, b, c</i> so that with a suitable choice of <i>p,</i> all the check nodes have the same degree. A random search is performed over the free constants such that the resulting LDPC code is cycle-4 and cycle-6 free. Because of the structural characteristics of the parity check matrix of the present invention, the edge information can stored to permit concurrent access to a group of relevant edge values during decoding.
In other words, the approach of the present invention facilitates memory access during check node and bit node processing. The values of the edges in the bipartite graph can be stored in a storage medium, such as random access memory (RAM). It is noted that for a truly random LDPC code during check node and bit node processing, the values of the edges would need to be accessed one by one in a random fashion. However, such a conventional access scheme would be too slow for a high data rate application. The RAM of FIGs. 15A and 15B are organized in a manner, whereby a large group of relevant edges can be fetched in one clock cycle; accordingly, these values are placed "together" in memory, according to a predetermined scheme or arrangement. It is observed that, in actuality, even with a truly random code, for a group of check nodes (and respectively bit nodes), the relevant edges can be placed next to one another in RAM, but then the relevant edges adjacent to a group of bit nodes (respectively check nodes) will be randomly scattered in RAM. Therefore, the "togetherness," under the present invention, stems from the design of the parity check matrices themselves. That is, the check matrix design ensures that the relevant edges for a group of bit nodes and check nodes are simultaneously placed together in RAM.
As seen in FIGs. 15A and 15B, each box contains the value of an edge, which is multiple bits (e.g., 6). Edge RAM, according to one embodiment of the present invention, is divided into two parts: top edge RAM 1501 (FIG. 15A) and bottom edge RAM 1503 (FIG. 15B). Bottom edge RAM 1503 contains the edges between bit nodes of degree 2, for example, and check nodes. Top edge RAM contains the edges between bit nodes of degree greater than 2 and check nodes. Therefore, for every check node, 2 adjacent edges are stored in the bottom RAM 1503, and the rest of the edges are stored in the top edge RAM 1501. For example, the size of the top edge RAM 1501 and bottom edge RAM 1503 for various code rates are given in Table 14: <tables id="tabl0013" num="0013"><table frame="all"><title>Table 14</title><tgroup cols="5"><colspec colnum="1" colname="col1" colwidth="31mm" /><colspec colnum="2" colname="col2" colwidth="18mm" /><colspec colnum="3" colname="col3" colwidth="18mm" /><colspec colnum="4" colname="col4" colwidth="18mm" /><colspec colnum="5" colname="col5" colwidth="18mm" /><thead><row><entry align="center" valign="top" /><entry align="center" valign="top">1/2</entry><entry align="center" valign="top">2/3</entry><entry align="center" valign="top">3/4</entry><entry align="center" valign="top">5/6</entry></row></thead><tbody><row><entry>Top Edge RAM</entry><entry align="center">400 x 392</entry><entry align="center">440 x 392</entry><entry align="center">504 x 392</entry><entry align="center">520 x 392</entry></row><row><entry>Bottom Edge RAM</entry><entry align="center">160 x 392</entry><entry align="center">110 x 392</entry><entry align="center">72 x 392</entry><entry align="center">52 x 392</entry></row></tbody></tgroup></table></tables>
Based on Table 14, an edge RAM of size 576 x 392 is sufficient to store the edge metrics for all the code rates of 1/2, 2/3, 3/4, and 5/6.
As noted, under this exemplary scenario, a group of 392 bit nodes and 392 check nodes are selected for processing at a time. For 392 check node processing, <i>q</i> = <i>d<sub>c</sub></i>-2 consecutive rows are accessed from the top edge RAM 1501, and 2 consecutive rows from the bottom edge RAM 1503. The value of <i>d<sub>c</sub></i> depends on the specific code, for example <i>d<sub>c</sub></i>=7 for rate ½, <i>d<sub>c</sub></i>=10 for rate 2/3, <i>d<sub>c</sub></i>=16 for rate ¾ and <i>d<sub>c</sub></i>=22 for rate 5/6 for the above codes. Of course other values of <i>d<sub>c</sub></i> for other codes are possible. In this instance, <i>q</i>+2 is the degree of each check node.
For bit node processing, if the group of 392 bit nodes has degree 2, their edges are located in 2 consecutive rows of the bottom edge RAM 1503. If the bit nodes have degree <i>d</i> > 2, their edges are located in some d rows of the top edge RAM 1501. The address of these d rows can be stored in non-volatile memory, such as Read-Only Memory (ROM). The edges in one of the rows correspond to the first edges of 392 bit nodes, the edges in another row correspond to the second edges of 392 bit nodes, etc. Moreover for each row, the column index of the edge that belongs to the first bit node in the group of 392 can also be stored in ROM. The edges that correspond to the second, third, etc. bit nodes follow the starting column index in a "wrapped around" fashion. For example, if the <i>j</i><sup>th</sup> edge in the row belongs to the first bit node, then the (<i>j</i>+1)st edge belongs to the second bit node, (<i>j</i>+2)nd edge belongs to the third bit node, ...., and (<i>j</i>-1)st edge belongs to the 392<sup>th</sup> bit node.
With the organization shown in FIGs. 15A and 15B, speed of memory access is greatly enhanced during LDPC coding.
FIG. 16 illustrates a computer system upon which an embodiment according to the present invention can be implemented. The computer system 1600 includes a bus 1601 or other communication mechanism for communicating information, and a processor 1603 coupled to the bus 1601 for processing information. The computer system 1600 also includes main memory 1605, such as a random access memory (RAM) or other dynamic storage device, coupled to the bus 1601 for storing information and instructions to be executed by the processor 1603. Main memory 1605 can also be used for storing temporary variables or other intermediate information during execution of instructions to be executed by the processor 1603. The computer system 1600 further includes a read only memory (ROM) 1607 or other static storage device coupled to the bus 1601 for storing static information and instructions for the processor 1603. A storage device 1609, such as a magnetic disk or optical disk, is additionally coupled to the bus 1601 for storing information and instructions.
The computer system 1600 may be coupled via the bus 1601 to a display 1611, such as a cathode ray tube (CRT), liquid crystal display, active matrix display, or plasma display, for displaying information to a computer user. An input device 1613, such as a keyboard including alphanumeric and other keys, is coupled to the bus 1601 for communicating information and command selections to the processor 1603. Another type of user input device is cursor control 1615, such as a mouse, a trackball, or cursor direction keys for communicating direction information and command selections to the processor 1603 and for controlling cursor movement on the display 1611.
According to one embodiment of the invention, generation of LDPC codes is provided by the computer system 1600 in response to the processor 1603 executing an arrangement of instructions contained in main memory 1605. Such instructions can be read into main memory 1605 from another computer-readable medium, such as the storage device 1609. Execution of the arrangement of instructions contained in main memory 1605 causes the processor 1603 to perform the process steps described herein. One or more processors in a multi-processing arrangement may also be employed to execute the instructions contained in main memory 1605. In alternative embodiments, hard-wired circuitry may be used in place of or in combination with software instructions to implement the embodiment of the present invention. Thus, embodiments of the present invention are not limited to any specific combination of hardware circuitry and software.
The computer system 1600 also includes a communication interface 1617 coupled to bus 1601. The communication interface 1617 provides a two-way data communication coupling to a network link 1619 connected to a local network 1621. For example, the communication interface 1617 may be a digital subscriber line (DSL) card or modem, an integrated services digital network (ISDN) card, a cable modem, or a telephone modem to provide a data communication connection to a corresponding type of telephone line. As another example, communication interface 1617 may be a local area network (LAN) card (e.g. for Ethernet™ or an Asynchronous Transfer Model (ATM) network) to provide a data communication connection to a compatible LAN. Wireless links can also be implemented. In any such implementation, communication interface 1617 sends and receives electrical, electromagnetic, or optical signals that carry digital data streams representing various types of information. Further, the communication interface 1617 can include peripheral interface devices, such as a Universal Serial Bus (USB) interface, a PCMCIA (Personal Computer Memory Card International Association) interface, etc.
The network link 1619 typically provides data communication through one or more networks to other data devices. For example, the network link 1619 may provide a connection through local network 1621 to a host computer 1623, which has connectivity to a network 1625 (e.g. a wide area network (WAN) or the global packet data communication network now commonly referred to as the "Internet") or to data equipment operated by service provider. The local network 1621 and network 1625 both use electrical, electromagnetic, or optical signals to convey information and instructions. The signals through the various networks and the signals on network link 1619 and through communication interface 1617, which communicate digital data with computer system 1600, are exemplary forms of carrier waves bearing the information and instructions.
The computer system 1600 can send messages and receive data, including program code, through the network(s), network link 1619, and communication interface 1617. In the Internet example, a server (not shown) might transmit requested code belonging to an application program for implementing an embodiment of the present invention through the network 1625, local network 1621 and communication interface 1617. The processor 1603 may execute the transmitted code while being received and/or store the code in storage device 169, or other non-volatile storage for later execution. In this manner, computer system 1600 may obtain application code in the form of a carrier wave.
The term "computer-readable medium" as used herein refers to any medium that participates in providing instructions to the processor 1603 for execution. Such a medium may take many forms, including but not limited to non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, optical or magnetic disks, such as storage device 1609. Volatile media include dynamic memory, such as main memory 1605. Transmission media include coaxial cables, copper wire and fiber optics, including the wires that comprise bus 1601. Transmission media can also take the form of acoustic, optical, or electromagnetic waves, such as those generated during radio frequency (RF) and infrared (IR) data communications. Common forms of computer-readable media include, for example, a floppy disk, a flexible disk, hard disk, magnetic tape, any other magnetic medium, a CD-ROM, CDRW, DVD, any other optical medium, punch cards, paper tape, optical mark sheets, any other physical medium with patterns of holes or other optically recognizable indicia, a RAM, a PROM, and EPROM, a FLASH-EPROM, any other memory chip or cartridge, a carrier wave, or any other medium from which a computer can read.
Various forms of computer-readable media may be involved in providing instructions to a processor for execution. For example, the instructions for carrying out at least part of the present invention may initially be borne on a magnetic disk of a remote computer. In such a scenario, the remote computer loads the instructions into main memory and sends the instructions over a telephone line using a modem. A modem of a local computer system receives the data on the telephone line and uses an infrared transmitter to convert the data to an infrared signal and transmit the infrared signal to a portable computing device, such as a personal digital assistance (PDA) and a laptop. An infrared detector on the portable computing device receives the information and instructions borne by the infrared signal and places the data on a bus. The bus conveys the data to main memory, from which a processor retrieves and executes the instructions. The instructions received by main memory may optionally be stored on storage device either before or after execution by processor.
Accordingly, the various embodiments of the present invention provide an approach for encoding structured Low Density Parity Check (LDPC) codes. Structure of the LDPC codes is provided by restricting portion part of the parity check matrix to be lower triangular and/or satisfying other requirements such that the communication between bit nodes and check nodes of the decoder is simplified. Memory storing information representing the structured parity check matrix is accessed. The information is organized in tabular form, wherein each row represents occurrences of one values within a first column of a group of columns of the parity check matrix. The rows correspond to groups of columns of the parity check matrix, wherein subsequent columns within each of the groups are derived according to a predetermined operation (e.g., cyclic shift, addition, etc.). An LDPC coded signal based on the stored information representing the parity check matrix. According to one embodiment of the present invention, a Bose Chaudhuri Hocquenghem (BCH) encoder is utilized by the transmitter to encode an input signal using BCH codes, wherein the output LDPC coded signal corresponding to the input signal represents a code having an outer BCH code and an inner LDPC code. Further, a cyclic redundancy check (CRC) encoder is supplied to encode the input signal according to a CRC code. The above approach advantageously yields reduced complexity without sacrificing performance.
While the present invention has been described in connection with a number of embodiments and implementations, the present invention is not so limited but covers various obvious modifications and equivalent arrangements, which fall within the purview of the appended claims.
Contents5
96 sheets
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160 members in 15 offices
Priority claims64
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| 42150502 | United States of America | P | |
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| 42199902 | United States of America | P | |
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| 42371002 | United States of America | P | |
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| 44019903 | United States of America | P | |
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| 45622003 | United States of America | P | |
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| 48210703 | United States of America | P | |
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| 48211203 | United States of America | P | |
| 0321073 | United States of America | W | |
| 0321073 | United States of America | W | |
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| US20020423710P | – | – | – |
| US2003021073 | – | – | – |
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| US20030447641P | – | – | – |
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| US20030469356P | – | – | – |
| US20030482107P | – | – | – |
| US20030482112P | – | – | – |
| WO2003US21073 | – | – | – |
Members160
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| WO03071535A1 | World Intellectual Property Organization (WIPO) | A1 | |
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| US2004005865A1 | United States of America | A1 | |
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| AU2003247805A1 | Australia | A1 | |
| AU2003249708A1 | Australia | A1 | |
| AU2003249708A8 | Australia | A8 | |
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| EP1385270B1 | European Patent Office (EPO) | B1 | |
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| EP1477982A4 | European Patent Office (EPO) | A4 | |
| CN100354967C | China | C | |
| CN100356697C | China | C |
65 legal events, as 10 offices reported them to INPADOC
Over the term
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| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Announcement of lapse in spainLapsedFD2A | FD2A | ES | |
| Patent expired because of reaching the maximum lifetime of a patentExpiredMK | MK | BE | |
| Patent expired after termination of 20 yearsExpiredPE20 | PE20 | GB | |
| Patent ceasedCeasedPL | PL | CH | |
| Ep patent expiredExpiredEUP | EUP | DK | |
| Patent expired because of reaching the maximum lifetime of a patentExpiredMK | MK | NL | |
| Expiry of rightR071 | R071 | DE | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
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| Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)REGISTERED BETWEEN 20090416 AND 20090422732E | 732E | GB | |
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Numbers
- Publication
- 1518328
- Publication, DOCDB
- 1518328
- Publication, EPODOC
- EP1518328
- Application
- 3763217
- Application, DOCDB
- 03763217
- Application, EPODOC
- EP20030763217
Titles3
- German
- CODIERUNG VON LDPC-CODES (LOW-DENSITY PARITY CHECK) DURCH VERWENDUNG EINER STRUKTURIERTEN PARITÄTSPRÜFMATRIX
- English
- ENCODING OF LOW-DENSITY PARITY CHECK (LDPC) CODES USING A STRUCTURED PARITY CHECK MATRIX
- French
- CODAGE DE CODE LDPC UTILISANT UNE MATRICE DE CONTROLE DE PARITE STRUCTUREE
Classification
- CPC, 31
- H04L1/005
- H03M13/01
- H03M13/09
- H03M13/11
- H03M13/1102
- H03M13/1111
- H03M13/112
- H03M13/1137
- H03M13/1165
- H03M13/118
- H03M13/15
- H03M13/152
- H03M13/25
- H03M13/255
- H03M13/2906
- H03M13/356
- H03M13/6325
- H03M13/6583
- H04H40/90
- H04L1/0041
- H04L1/0057
- H04L1/006
- H04L1/0061
- H04L1/0065
- H04L1/0071
- H04L25/067
- H04L27/18
- H04L27/186
- H04L27/20
- H04L27/34
- H04L27/36
- IPC, 15
- H03M13 11
- G06F11 10
- G06F13 00
- H03M13 15
- H03M13 19
- H03M13 25
- H03M13 27
- H03M13 29
- H04H40 90
- H04L1 00
- H04L27 00
- H04L27 18
- H04L27 20
- H04L27 34
- H04L27 36
Designated states27
- Contracting states, 27
- Austria
- Belgium
- Bulgaria
- Switzerland
- Cyprus
- Czechia
- Germany
- Denmark
- Estonia
- Spain
- Finland
- France
- United Kingdom
- Greece
- Hungary
- Ireland
- Italy
- Liechtenstein
- Luxembourg
- Monaco
- Netherlands (Kingdom of the)
- Portugal
- Romania
- Sweden
and 3 moreShow fewer
- Slovenia
- Slovakia
- Türkiye